JP6572333B2 - Semiconductor device - Google Patents

Description

  Embodiments described herein relate generally to a semiconductor device.

  In a semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor), an element region in which an element such as a transistor is disposed is surrounded by a termination region, and local destruction may occur in the element region near the termination region. One of the factors is the occurrence of an avalanche breakdown (commonly called a hot spot) between the element region and the termination region. For example, when a load such as a surge is applied to the element region, there is a phenomenon in which hot spots come and go multiple times between the element region and the termination region. When a hot spot moves between the element region and the termination region a plurality of times, the breakdown voltage in the element region exceeds the critical breakdown voltage, and local breakdown occurs in the element region. Such a local breakdown is suppressed, and a semiconductor device with a high breakdown voltage is demanded.

JP 2001-024193 A

  The problem to be solved by the present invention is to provide a semiconductor device having a higher breakdown voltage.

The semiconductor device according to the embodiment includes an element region and a termination region surrounding the element region. The first conductivity type first semiconductor region and the second conductivity type provided on the first semiconductor region. A second semiconductor region; a third semiconductor region of a first conductivity type provided on the second semiconductor region; a first electrode electrically connected to the first semiconductor region; and the third semiconductor region And a third electrode provided in the element region and facing the first semiconductor region, the second semiconductor region, and the third semiconductor region with a first insulating film interposed therebetween. Provided in the element region, provided closer to the termination region than the third electrode, and faces the first semiconductor region, the second semiconductor region, and the third semiconductor region via a second insulating film. a plurality of fourth electrodes, Oyo said first semiconductor region A fifth electrode facing the third electrode via the first insulating film, a first electrode facing the first semiconductor region and the fourth electrode via the second insulating film, and a lower end and the first electrode A plurality of sixth electrodes whose first distance is shorter than a second distance between the lower end of the fifth electrode and the first electrode.
Alternatively, the semiconductor device of the embodiment includes an element region and a termination region surrounding the element region, and the first conductivity type first semiconductor region and the second conductivity provided on the first semiconductor region. -Shaped second semiconductor region, a first conductivity-type third semiconductor region provided on the second semiconductor region, a first electrode electrically connected to the first semiconductor region, and the third A second electrode electrically connected to the semiconductor region; and a plurality of electrodes provided in the element region and facing the first semiconductor region, the second semiconductor region, and the third semiconductor region via a first insulating film A third electrode, provided in the element region, provided closer to the termination region than the third electrode, and a second insulating film in the first semiconductor region, the second semiconductor region, and the third semiconductor region; A fourth electrode facing through the first semiconductor, and the first semiconductor A plurality of fifth electrodes facing the region and the third electrode via the first insulating film; and facing the first semiconductor region and the fourth electrode via the second insulating film; A sixth electrode having a first distance between the first electrode and a second distance between the lower end of the fifth electrode and the first electrode, and the fifth electrode and the sixth electrode. At least one of the distances between the end of the electrode and the lower surface of the first semiconductor region is selectively short.

FIG. 1A is a schematic cross-sectional view illustrating a main part of the semiconductor device according to the first embodiment, and is a schematic cross-sectional view at a position along the line AA ′ in FIG. . FIG. 1B is a schematic cross-sectional view showing the main part of the semiconductor device according to the first embodiment, and is a schematic cross-sectional view at a position along the line BB ′ in FIG. . FIG. 1C is a schematic plan view showing the semiconductor device according to the first embodiment. FIG. 2A to FIG. 2B are schematic cross-sectional views showing the manufacturing process of the main part of the semiconductor device according to the first embodiment. FIG. 3A to FIG. 3B are schematic cross-sectional views showing the manufacturing process of the main part of the semiconductor device according to the first embodiment. FIG. 4A to FIG. 4B are schematic cross-sectional views showing the manufacturing process of the main part of the semiconductor device according to the first embodiment. FIG. 5A is a schematic cross-sectional view showing the main part of the semiconductor device according to the reference example, and FIG. 5B is a schematic plan view showing the semiconductor device according to the reference example. FIG. 6A is a schematic cross-sectional view showing the main part of the semiconductor device according to the first embodiment, and FIG. 6B is a schematic plan view showing the main part of the semiconductor device according to the first embodiment. FIG. FIG. 7 is a schematic cross-sectional view showing a main part of a semiconductor device according to a modification of the first embodiment. FIG. 8A is a schematic cross-sectional view showing the main part of the semiconductor device according to the second embodiment, and FIG. 8B is a schematic cross-section showing the main part of the semiconductor device according to the second embodiment. FIG. FIG. 9 is a schematic cross-sectional view showing a main part of a semiconductor device according to a modification of the second embodiment. FIG. 10A is a schematic cross-sectional view showing a main part of the semiconductor device according to the first example of the third embodiment, and FIG. 10B is a semiconductor device according to the second example of the third embodiment. It is a typical sectional view showing the important section. FIG. 11A is a schematic cross-sectional view showing the main part of the semiconductor device according to the fourth embodiment. FIG. 11B is a schematic plan view at a position along the line C-C ′ of FIG. FIG. 12A is a schematic cross-sectional view showing the main part of the semiconductor device according to the fifth embodiment. FIG. 12B is a schematic plan view at a position along the line C-C ′ of FIG.

Hereinafter, embodiments will be described with reference to the drawings. In the following description, the same members are denoted by the same reference numerals, and the description of the members once described is omitted as appropriate. In the embodiment, unless otherwise specified, the impurity concentration of n-type (first conductivity type) decreases in the order of n ^{+ -type} and n-type. In addition, the impurity concentration of the p-type (second conductivity type) decreases in the order of p ^{+ -type} and p-type. Further, three-dimensional coordinates (X axis, Y axis, and Z axis) are introduced in the following drawings.

(First embodiment)
FIG. 1A is a schematic cross-sectional view illustrating a main part of the semiconductor device according to the first embodiment, and is a schematic cross-sectional view at a position along the line AA ′ in FIG. . FIG. 1B is a schematic cross-sectional view showing the main part of the semiconductor device according to the first embodiment, and is a schematic cross-sectional view at a position along the line BB ′ in FIG. . FIG. 1C is a schematic plan view showing the semiconductor device according to the first embodiment. FIG. 1B also corresponds to a schematic cross-sectional view at a position along the broken line B ″ in FIG. 1A shows a cross section of the semiconductor device 1A according to the first embodiment in the YZ plane, and FIG. 1B shows a cross section of the semiconductor device 1A in the XZ plane. Yes.

  The semiconductor device 1A is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having an upper and lower electrode structure. The semiconductor device 1 </ b> A includes, for example, an element region 90 in which elements (for example, transistors) are disposed, and a termination region 91 that surrounds the element region 90 outside the element region 90. Here, the transistor is, for example, a MOSFET including a source region, a drain region, a base region, a gate electrode, and a gate insulating film. The element region 90 is also referred to as an active region 90.

  The semiconductor device 1A includes, for example, a first semiconductor region (hereinafter, for example, the semiconductor region 20), a second semiconductor region (hereinafter, for example, the base region 30), and a third semiconductor region (hereinafter, for example, the source region 40). A first electrode (hereinafter, for example, drain electrode 10), a second electrode (hereinafter, for example, source electrode 11), a plurality of third electrodes (hereinafter, for example, gate electrode 50), and a plurality of fourth electrodes. An electrode (hereinafter, for example, a gate electrode 52) and a contact region 35 are provided.

  Here, the direction from the drain electrode 10 to the source electrode 11 is, for example, the Z direction, the direction intersecting the Z direction is, for example, the X direction, and the direction intersecting the Z direction and the X direction is, for example, the Y direction. And In the embodiment, the direction in which the plurality of gate electrodes 50 are adjacent is, for example, the Y direction.

The semiconductor region 20 has an n-type drift region 21 and an n ⁺ -type drain region 22. The drift region 21 is provided on the drain region 22. The impurity concentration of the drain region 22 is higher than the impurity concentration of the drift region 21. The drift region 21 is, for example, an epitaxial growth layer.

  A drain electrode 10 is provided under the drain region 22. The drain electrode 10 is in contact with the drain region 22 of the semiconductor region 20. The drain electrode 10 is electrically connected to the drain region 22.

  The base region 30 is provided on the semiconductor region 20. The base region 30 is selectively provided on the surface of the drift region 21. The conductivity type of base region 30 is p-type. The base region 30 is provided in the element region 90 and a part of the termination region 91. In the termination region 91, an interlayer insulating film 70 is provided on the base region 30 and the semiconductor region 20.

The source region 40 is provided on the base region 30. The source region 40 is selectively provided on the surface of the base region 30. The conductivity type of the source region 40 is n ^{+ type} . The impurity concentration of the source region 40 is higher than the impurity concentration of the drift region 21.

  A source electrode 11 is provided on the source region 40. The source electrode 11 is in contact with the source region 40. The source electrode 11 is electrically connected to the source region 40.

The contact region 35 is selectively provided on the surface of the base region 30. The contact region 35 is in contact with the source electrode 11 and the source region 40. The contact region 35 has a p ^{+ type} conductivity. The impurity concentration of the contact region 35 is higher than the impurity concentration of the base region 30.

  In the semiconductor device 1A, the plurality of gate electrodes 50 face the drift region 21, the base region 30, and the source region 40 of the semiconductor region 20 via a first insulating film (hereinafter, for example, the insulating film 51). Is provided. The insulating film 51 in contact with the gate electrode 50 is referred to as a gate insulating film. The plurality of gate electrodes 50 are electrically connected to the gate pad 50p.

  In the semiconductor device 1 </ b> A, a plurality of gate electrodes 50 are provided in the element region 90. The plurality of gate electrodes 50 are arranged in the Y direction, for example. For example, each of the plurality of gate electrodes 50 extends in the X direction substantially in parallel. The upper end 50 u of the gate electrode 50 is located above the base region 30, and the lower end 50 d of the gate electrode 50 is located in the drift region 21. That is, the gate electrode 50 has a trench structure. The distance between each lower end 50d of the plurality of gate electrodes 50 and the upper surface 10u of the drain electrode 10 is substantially the same.

  In the semiconductor device 1 </ b> A, a plurality of gate electrodes 52 are provided in the element region 90. For example, the gate electrode 52 is provided closer to the termination region 91 than the gate electrode 50. A plurality of gate electrodes 52 are provided outside the outermost gate electrode 50 e arranged in the plurality of gate electrodes 50. The plurality of gate electrodes 52 are arranged in the element region 90 in the vicinity of the termination region 91. The plurality of gate electrodes 52 are provided so as to face the drift region 21, the base region 30, and the source region 40 of the semiconductor region 20 through a second insulating film (hereinafter, for example, an insulating film 53). The insulating film 53 in contact with the gate electrode 52 is referred to as a gate insulating film. The plurality of gate electrodes 52 are electrically connected to the gate pad 50p.

  The plurality of gate electrodes 52 are arranged in the Y direction, for example. Each of the plurality of gate electrodes 52 extends in the X direction substantially in parallel, for example. An upper end 52 u of the gate electrode 52 is located above the base region 30, and a lower end 52 d of the gate electrode 52 is located in the drift region 21. That is, the gate electrode 52 has a trench structure. The distances (first distances) between the lower ends 52d of the plurality of gate electrodes 52 and the upper surface 10u of the drain electrode 10 are substantially the same.

  However, the distance between the lower ends 52d of the plurality of gate electrodes 52 and the upper surface 10u of the drain electrode 10 is the distance between the lower ends 50d of the gate electrodes 50 and the upper surface 10u of the drain electrode 10 (first Longer than 2 distances). In the Y direction, the width W52 of each of the plurality of gate electrodes 52 is narrower than the width W50 of each of the plurality of gate electrodes 50.

  That is, the lower end 52d of the gate electrode 52 provided in the element region 90b near the termination region 91 is positioned closer to the source electrode 11 than the lower end 50d of the gate electrode 50 provided in the element region 90a other than the vicinity of the termination region 91. doing. The width W52 of the gate electrode 52 provided in the element region 90b near the termination region 91 is narrower than the width W50 of the gate electrode 50 provided in the element region 90a other than the vicinity of the termination region 91.

  Although the number of gate electrodes 52 is three in FIG. 1A, this number is not particularly limited.

  The main component of each semiconductor region provided between the drain electrode 10 and the source electrode 11 is, for example, silicon (Si). The main component of each semiconductor region may be silicon carbide (SiC), gallium nitride (GaN), or the like. For example, when the main component of each semiconductor region is silicon (Si), phosphorus (P), arsenic (As), or the like is applied as the n-type impurity element, for example. For example, boron (B) or the like is applied as the p-type impurity element. In the semiconductor device according to the embodiment, the same effect can be obtained even if the p-type and n-type conductivity types are switched.

  The material of the drain electrode 10 and the material of the source electrode 11 include, for example, at least one selected from the group of aluminum (Al), titanium (Ti), nickel (Ni), tungsten (W), gold (Au), and the like. It is a metal. The material of the gate electrodes 50 and 52 includes, for example, polysilicon, tungsten (W) or the like. In addition, the material of the insulating film according to the embodiment includes, for example, silicon oxide, silicon nitride, and the like.

  A manufacturing process of the semiconductor device 1A will be described.

  FIG. 2A to FIG. 4B are schematic cross-sectional views showing the manufacturing process of the main part of the semiconductor device according to the first embodiment.

  For example, as illustrated in FIG. 2A, a mask layer 80 is formed on the semiconductor region 20. Here, the mask layer 80 is provided with openings 80h1 and 80h2. The openings 80h1 and 80h2 are formed in the element region 90. In each of the openings 80h1 and 80h2, the upper surface 21u of the drift region 21 is exposed.

  However, the width W2 of the opening 80h2 provided in the element region 90b near the termination region 91 is narrower than the width W1 of the opening 80h1 provided in the element region 90a other than the vicinity of the termination region 91.

  Next, as shown in FIG. 2B, the drift region 21 exposed from the mask layer 80 is etched. Etching is, for example, RIE (Reactive Ion Etching). Thereby, trenches 21t1 and 21t2 are formed in the drift region 21.

  Here, the widths of the openings 80 h 1 and 80 h 2 of the mask layer 80 are transferred to the width of the trench formed in the drift region 21. That is, the width W2 of the trench 21t2 provided in the element region 90b near the termination region 91 is narrower than the width W1 of the trench 21t1 provided in the element region 90a other than the vicinity of the termination region 91.

  Furthermore, due to the loading effect, the depth of the narrow trench 21t2 becomes shallower than the depth of the wide trench 21t1. That is, the distance between each bottom portion 21b2 of the plurality of trenches 21t2 and the lower surface 22d of the drain region 22 is longer than the distance between each bottom portion 21b1 of the plurality of trenches 21t1 and the lower surface 22d of the drain region 22. ing.

  Next, as shown in FIG. 3A, an insulating film 51 is formed on the inner wall of the trench 21t1, and an insulating film 53 is formed on the inner wall of the trench 21t2. The insulating films 51 and 53 are formed by, for example, a thermal oxidation method, CVD (Chemical Vapor Deposition), or the like.

  Next, as shown in FIG. 3B, a conductive layer 55 is formed in the trench 21t1 via the insulating film 51, and a conductive layer 55 is formed in the trench 21t2 via the insulating film 53. To do. The conductive layer 55 is also provided on the upper surface 21 u of the drift region 21. For example, the conductive layer 55 is formed by CVD.

  Subsequently, the insulating film and the conductive layer 55 provided on the upper side from the upper surface 21u of the drift region 21 are removed by, for example, CMP (Chemical Vapor Deposition). As a result, the conductive layer 55 is separated into the gate electrode 50 and the gate electrode 52. This state is shown in FIG.

  Further, as shown in FIG. 4A, a p-type impurity element is selectively implanted into the upper surface 21 u side of the drift region 21 to form a base region 30 on the upper surface 21 u side of the drift region 21.

  Next, as shown in FIG. 4B, an n-type impurity element is selectively implanted into the upper surface side of the base region 30 to form the source region 40 on the upper surface side of the base region 30. Subsequently, a p-type impurity element is selectively implanted into the upper surface side of the source region 40 to form a contact region 35 on the upper surface side of the source region 40. Further, heat treatment is performed on the base region 30, the source region 40, and the contact region 35 in order to activate the implanted impurity element.

  Thereafter, as shown in FIG. 1A, the upper ends of the gate electrodes 50 and 52 are each covered with an insulating film, and the interlayer insulating film 70 is further formed on the base region 30 in the termination region 91 and on the drift region 21. Form. Further, the drain electrode 10 and the source electrode 11 are formed.

  The operation of the semiconductor device 1A will be described. Note that the element region 90 and the region where the source electrode 11 is disposed do not necessarily coincide with each other. In the present embodiment, the operation of the semiconductor device 1A will be described on the assumption that the region where the source electrode 11 is disposed substantially coincides with the element region 90.

  Before describing the operation of the semiconductor device 1A, the operation of the semiconductor device 100 according to the reference example will be described.

  FIG. 5A is a schematic cross-sectional view showing the main part of the semiconductor device according to the reference example, and FIG. 5B is a schematic plan view showing the semiconductor device according to the reference example.

  FIG. 5A shows a cross section in the YZ plane of the semiconductor device 100 according to the reference example. In the semiconductor device 100, the gate electrode 52 is not provided, and a plurality of gate electrodes 50 are provided as gates. In the semiconductor device 100, the distances between the lower ends 50d of the plurality of gate electrodes 50 and the upper surface 10u of the drain electrode 10 are all the same.

  In the semiconductor device 100, a higher potential is applied to the drain electrode 10 than to the source electrode 11 in an on / off state.

  When a potential equal to or higher than the threshold potential (Vth) is applied to the gate electrode 50, a channel (inversion layer) is formed in the base region 30 along the insulating film 51, which is a gate insulating film, and the source region 40, channel, drift An electron current flows through the region 21 and the drain region 22. That is, the semiconductor device 100 is in an on state.

  When a potential lower than the threshold potential is applied to the gate electrode 50, a channel is not formed in the base region 30 along the insulating film 51, and the above-described electron current does not flow. That is, the semiconductor device 100 is in an off state.

  However, when a surge voltage is applied between the source and the drain in the off state, the electric field concentrates in the vicinity of the corner 51c of the insulating film 51. An avalanche breakdown may occur in the drift region 21 near the corner 51c of the insulating film 51 due to the concentration of the electric field. The place where the avalanche breakdown occurs is called a hot spot. In FIGS. 5A and 5B, hot spots are schematically represented by stars.

  In the off state, the electric field is also concentrated near the corner portion 30 c of the base region 30 of the termination region 91. Therefore, a hot spot may be generated at the pn junction portion (p-type base region 30 / n-type drift region 21) of the termination region 91 by this concentrated electric field.

  Here, the resistance to avalanche breakdown depends on the extent of the depletion layer extending in the drift region 21. That is, the longer the depletion layer is, the higher its resistance is. The extent to which the depletion layer extends also depends on the temperature of the drift region 21. That is, the higher the temperature of the drift region 21, the easier the depletion layer extends.

  For example, a hot spot is preferentially generated in the element region 90 in which an electron current flows at the beginning of the operation of the semiconductor device 100. However, even if a hot spot preferentially occurs in the element region 90 at the beginning of operation, the temperature of the drift region 21 in the element region 90 relatively increases due to the breakdown current in the element region 90. Thereby, the tolerance of the drift region 21 in the element region 90 is relatively improved. As a result, hot spots are more likely to occur in the termination region 91 whose resistance is relatively lower than that of the element region 90.

  On the other hand, when hot spots continue to be generated in termination region 91, the temperature of drift region 21 in termination region 91 relatively increases. Thereby, the tolerance of the drift region 21 in the termination region 91 is relatively improved. That is, hot spots are more likely to occur in the element region 90 than in the termination region 91.

  That is, a phenomenon occurs in which the hot spots generated in the element region 90 and the hot spots generated in the termination region 91 are repeatedly moved between the element region 90 and the termination region 91 (FIGS. 5A and 5B). Arrow).

  Here, the semiconductor device 100 has a structure in which the distances between the lower ends 50d of the plurality of gate electrodes 50 and the upper surface 10u of the drain electrode 10 are all the same. Accordingly, it is considered that the hot spot is generated in the vicinity of the corner 51c of the arbitrary insulating film 51 at the beginning of the generation.

  However, the distance between the gate electrode 50 near the termination region 91 and the pn junction of the termination region 91 is between the gate electrode 50 in the center of the element region 90 and the pn junction of the termination region 91. Short compared to the distance.

  Therefore, repeated movement of the hot spot is likely to occur between the corner portion 51 c of the insulating film 51 in the vicinity of the termination region 91 and the pn junction portion of the termination region 91. That is, a breakdown current flows locally between the vicinity of the termination region 91 and the termination region 91. Then, the repetition of the movement of the hot spot continues between the same two locations, and when the drift region 21 deteriorates to an extent exceeding the critical breakdown voltage of the drift region 21 between the two locations, the drift region 21 is destroyed, that is, the element is destroyed. It will lead to. That is, the drift region 21 is preferentially destroyed between the element region 90 b near the termination region 91 and the termination region 91.

  In order to suppress this element breakdown, there is a method of relatively increasing the thickness of the drift region 21 in the element region 90 b near the termination region 91. According to this method, as the thickness of the drift region 21 in the element region 90b near the termination region 91 becomes relatively thick, the extension of the depletion layer in this portion is promoted, and the resistance in this portion is preferentially improved. .

  However, this method is a method of selectively increasing the film thickness of the epitaxial growth layer, for example, when the drift region 21 is an epitaxial growth layer. Therefore, the manufacturing process becomes complicated.

  On the other hand, there is a method of providing a dedicated field plate electrode that alleviates electric field concentration near the corner 51c of the insulating film 51 or near the corner 30c of the base region 30. For example, the field plate electrode is provided on the drift region 21 in the element region 90 b near the termination region 91 or on the pn junction of the termination region 91. However, this method requires a large number of manufacturing processes and a complicated manufacturing process.

  As described above, any method has a limit in reducing the cost of the semiconductor device.

  FIG. 6A is a schematic cross-sectional view showing the main part of the semiconductor device according to the first embodiment, and FIG. 6B is a schematic plan view showing the main part of the semiconductor device according to the first embodiment. FIG.

  Also in the semiconductor device 1A, hot spots are preferentially generated in the element region 90 at the beginning of the operation of the semiconductor device 1A. Even when a hot spot is preferentially generated in the element region 90 at the beginning of operation, the temperature of the drift region 21 in the element region 90 relatively increases due to the breakdown current in the element region 90. Thereby, the tolerance of the drift region 21 in the element region 90 is relatively improved. As a result, hot spots are more likely to occur in the termination region 91 whose resistance is relatively lower than that of the element region 90.

  On the other hand, when hot spots continue to be generated in termination region 91, the temperature of drift region 21 in termination region 91 relatively increases. Thereby, the tolerance of the drift region 21 in the termination region 91 is relatively improved. That is, hot spots are more likely to occur in the element region 90 than in the termination region 91. Therefore, in the semiconductor device 1A as well, it is conceivable that the hot spot is repeatedly moved between the element region 90b near the termination region 91 and the termination region 91 as in the reference example.

However, the semiconductor device 1 </ b> A includes a plurality of gate electrodes 52 outside the plurality of gate electrodes 50. Here, the lower end 52 d of the gate electrode 52 is located closer to the source electrode 11 than the lower end 50 d of the gate electrode 50. That is, the lower end 52 d of the gate electrode 52 is further away from the drain electrode 10 than the lower end 50 d of the gate electrode 50. In other words, in the semiconductor device 1A, the breakdown voltage of the drift region 21 in the element region 90b in the vicinity of the termination region 91 is relatively improved.
Therefore, the electric field concentrated on the corner portion 53 c of the insulating film 53 is relaxed compared to the electric field concentrated on the corner portion 51 c of the insulating film 51. Thereby, the avalanche breakdown is more likely to occur near the corner 51 c of the insulating film 51 in contact with the gate electrode 50 than near the corner 53 c of the insulating film 53.

  Here, the distance between the gate electrode 50 and the pn junction of the termination region 91 is longer than the distance between the gate electrode 52 and the pn junction of the termination region 91. Therefore, it is difficult for hot spots to go back and forth between the element region 90 a and the termination region 91.

  That is, according to the semiconductor device 1 </ b> A, the phenomenon of repeated hot spot movement is suppressed, and the drift region 21 is less likely to be destroyed. That is, the breakdown voltage of the semiconductor device 1A is improved as compared with the breakdown voltage of the semiconductor device 100.

  Further, according to the semiconductor device 1A, the breakdown voltage of the drift region 21 in the element region 90b in the vicinity of the termination region 91 is relatively improved. For this reason, it is not necessary to relatively increase the thickness of the drift region 21 in the element region 90b in the vicinity of the termination region 91. Furthermore, there is no need to provide a dedicated field plate electrode that alleviates electric field concentration near the corner 51c of the insulating film 51 or near the corner 30c of the base region 30. Therefore, according to the semiconductor device 1A, cost reduction is realized. Further, according to the semiconductor device 1A, the gate electrode 52 provided in the element region 90b functions as a control electrode for controlling energization. Therefore, at the time of ON, the ON resistance of the semiconductor device 1A is not reduced and a large current is ensured.

(Modification of the first embodiment)
FIG. 7 is a schematic cross-sectional view showing a main part of a semiconductor device according to a modification of the first embodiment.

  In the semiconductor device 1B, the distance between the lower end 52d of each of the plurality of gate electrodes 52 and the drain electrode 10 increases as the distance from the element region 90 toward the termination region 91 increases. For example, the distance between the lower end 52d of each of the plurality of gate electrodes 52 and the drain electrode 10 becomes longer in the direction from the plurality of gate electrodes 50 toward the plurality of gate electrodes 52 as the distance from the plurality of gate electrodes 50 increases. . For example, the distance between each of the lower ends 52 d 1 to 52 d 4 of the gate electrode 52 and the drain electrode 10 becomes longer as the distance from the outermost gate electrode 50 e in the plurality of gate electrodes 50 increases.

  Also in the semiconductor device 1B, the distance between the lower ends 52d of the plurality of gate electrodes 52 and the upper surface 10u of the drain electrode 10 is between the lower ends 50d of the plurality of gate electrodes 50 and the upper surface 10u of the drain electrode 10. It is longer than the distance. Therefore, the breakdown voltage of the semiconductor device 1B is improved as compared with the breakdown voltage of the semiconductor device 100.

  Further, in the semiconductor device 1B, the difference in height between the lower end 50d of the gate electrode 50e disposed at the outermost of the plurality of gate electrodes 50 and the lower end 52d1 of the gate electrode 52 adjacent to the gate electrode 50e is higher than that of the semiconductor device 1A. Is getting shorter.

  Therefore, the electric field concentration near the lower end 50d of the gate electrode 50e disposed at the outermost position among the plurality of gate electrodes 50 is reduced as compared with the semiconductor device 1A. That is, the breakdown voltage of the semiconductor device 1B is further improved as compared with the breakdown voltage of the semiconductor device 1A.

(Second Embodiment)
FIG. 8A is a schematic cross-sectional view showing the main part of the semiconductor device according to the second embodiment, and FIG. 8B is a schematic cross-section showing the main part of the semiconductor device according to the second embodiment. FIG. FIG. 8B corresponds to a schematic cross-sectional view at a position along the broken line B ″ in FIG.

  The semiconductor device 2A according to the second embodiment includes, for example, a semiconductor region 20, a base region 30, a source region 40, a drain electrode 10, a source electrode 11, a plurality of gate electrodes 50, and a plurality of gate electrodes 52. And a contact region 35. In addition, the semiconductor device 2A includes, for example, a plurality of fifth electrodes (hereinafter, for example, field plate electrodes 56) and a plurality of sixth electrodes (hereinafter, for example, field plate electrodes 57). The material of the field plate electrodes 56 and 57 is the same as the material of the gate electrodes 50 and 52, for example.

  In the semiconductor device 2 </ b> A, the field plate electrode 56 is provided below the gate electrode 50. Each of the plurality of field plate electrodes 56 is provided so as to face either the drift region 21 or the plurality of gate electrodes 50 of the semiconductor region 20 with the insulating film 51 interposed therebetween. Each of the plurality of field plate electrodes 56 is electrically connected to the source electrode 11. The insulating film 51 in contact with the field plate electrode 56 is referred to as a field plate insulating film.

  The field plate electrode 56 extends from the source electrode 11 side to the drain electrode 10 side, and has a trench structure. For example, the field plate electrodes 56 are periodically arranged in the Y direction. Further, the gate electrode 50 and the field plate electrode 56 of the semiconductor device 2A are arranged in the Z direction, for example. The field plate electrode 56 extends substantially in parallel with the gate electrode 50, for example, in the X direction.

  In the semiconductor device 2 </ b> A, the field plate electrode 57 is provided below the gate electrode 52. Each of the plurality of field plate electrodes 57 is provided so as to face either the drift region 21 or the plurality of gate electrodes 52 of the semiconductor region 20 with the insulating film 53 interposed therebetween. The plurality of field plate electrodes 57 are provided on the outer side of the outermost field plate electrode 56 e disposed in the plurality of field plate electrodes 56. Each of the plurality of field plate electrodes 57 is electrically connected to the source electrode 11. The insulating film 53 in contact with the field plate electrode 57 is referred to as a field plate insulating film.

  The field plate electrode 57 extends from the source electrode 11 side to the drain electrode 10 side and has a trench structure. For example, the field plate electrodes 57 are periodically arranged in the Y direction. Further, the gate electrode 52 and the field plate electrode 57 of the semiconductor device 2A are arranged in the Z direction, for example. The field plate electrode 57 extends substantially in parallel with the gate electrode 52, for example, in the X direction.

  In the semiconductor device 2 </ b> A, the distance (third distance) between the lower ends 57 d of the plurality of field plate electrodes 57 and the upper surface 10 u of the drain electrode 10 is the lower end 56 d of the plurality of field plate electrodes 56 and the drain electrode 10. It is shorter than the distance (fourth distance) between the upper surface 10u and the upper surface 10u.

  In the semiconductor device 2A, for example, the width W52 of each of the plurality of gate electrodes 52 is wider than the width W50 of each of the plurality of gate electrodes 50 in the Y direction. In the Y direction, for example, the width W57 of each of the plurality of field plate electrodes 57 is wider than the width W56 of each of the plurality of field plate electrodes 56.

  In the semiconductor device 2A, such field plate electrodes having different depths or widths are formed using the above-described loading effect.

The operation of the semiconductor device 2A will be described.
Also in the semiconductor device 2 </ b> A, the hot spot may repeatedly move between the element region 90 b near the termination region 91 and the termination region 91.

  However, the semiconductor device 2 </ b> A includes a plurality of field plate electrodes 57 outside the plurality of field plate electrodes 56. Here, the lower end 57 d of the field plate electrode 57 is located closer to the drain electrode 10 than the lower end 56 d of the field plate electrode 56. That is, in the semiconductor device 2 </ b> A, the depletion layer of the drift region 21 in the element region 90 b near the termination region 91 is easier to extend than the depletion layer in the drift region 21 in the element region 90 a other than the vicinity of the termination region 91.

  Therefore, in the semiconductor device 2 </ b> A, the breakdown voltage of the drift region 21 in the element region 90 b near the termination region 91 is higher than the breakdown voltage of the drift region 21 in the element region 90 a other than the vicinity of the termination region 91.

  Thereby, the avalanche breakdown is more likely to occur in the drift region 21 in the element region 90a other than the vicinity of the termination region 91 than in the drift region 21 in the element region 90b near the termination region 91. Furthermore, the distance between the gate electrode 50 and the pn junction of the termination region 91 is longer than the distance between the gate electrode 52 and the pn junction of the termination region 91. Therefore, also in the semiconductor device 2A, it is difficult for hot spots to travel between the element region 90a and the termination region 91.

  As described above, also in the semiconductor device 2A, the phenomenon of repeated hot spot movement is suppressed, and the drift region 21 is hardly broken. That is, the breakdown voltage of the semiconductor device 2A is improved as compared with the breakdown voltage of the semiconductor device 100.

  Further, according to the semiconductor device 2A, the breakdown voltage of the drift region 21 in the element region 90 near the termination region 91 is relatively improved. For this reason, it is not necessary to relatively increase the thickness of the drift region 21 in the element region 90 in the vicinity of the termination region 91. Further, there is no need to provide a dedicated field plate electrode for relaxing the electric field strength of the drift region 21 in the element region 90 near the termination region 91. Therefore, according to the semiconductor device 2A, cost reduction is realized.

(Modification of the second embodiment)
FIG. 9 is a schematic cross-sectional view showing a main part of a semiconductor device according to a modification of the second embodiment.

  In the semiconductor device 2B, the distance between each lower end 57d of the plurality of field plate electrodes 57 and the upper surface 10u of the drain electrode 10 becomes shorter as it goes from the element region 90 to the termination region 91. For example, as the distance between the respective lower ends 57d of the plurality of field plate electrodes 57 and the upper surface 10u of the drain electrode 10 moves away from the plurality of gate electrodes 50 in the direction from the plurality of gate electrodes 50 to the plurality of gate electrodes 52. It is getting shorter. For example, the distance between each of the lower ends 57 d 1 to 52 d 4 of the field plate electrode 57 and the drain electrode 10 becomes shorter as the distance from the outermost gate electrode 50 e in the plurality of gate electrodes 50 increases.

  Also in the semiconductor device 2B, the distance between the lower ends 57d of the plurality of field plate electrodes 57 and the upper surface 10u of the drain electrode 10 is the distance between the lower ends 56d of the field plate electrodes 56 and the upper surface 10u of the drain electrode 10. It is shorter than the distance between. Accordingly, the breakdown voltage of the semiconductor device 2B is improved as compared with the breakdown voltage of the semiconductor device 100.

  Further, in the semiconductor device 2B, the difference in height between the lower end 56d of the field plate electrode 56e arranged at the outermost of the plurality of field plate electrodes 56 and the lower end 57d1 of the field plate electrode 57 adjacent to the field plate electrode 56e is a semiconductor. It is shorter than the device 2A.

  Therefore, the electric field concentration near the lower end 50d of the field plate electrode 57 adjacent to the field plate electrode 56e is reduced as compared with the semiconductor device 2A. That is, the breakdown voltage of the semiconductor device 2B is further improved as compared with the breakdown voltage of the semiconductor device 2A.

(Third embodiment)
FIG. 10A is a schematic cross-sectional view showing a main part of the semiconductor device according to the first example of the third embodiment, and FIG. 10B is a semiconductor device according to the second example of the third embodiment. It is a typical sectional view showing the important section.

A semiconductor device 3A shown in FIG. 10A includes the same components as those of the semiconductor device 1A, and further, a p ^{+ -type} fourth semiconductor region (hereinafter referred to as a p ^{+ -type} fourth semiconductor region) between the drain region 22 and the drain electrode 10 of the semiconductor region 20. For example, a collector region 23) is provided.

10B includes the same components as those of the semiconductor device 2A, and a p ^{+ -type} collector region 23 is provided between the drain region 22 of the semiconductor region 20 and the drain electrode 10. The semiconductor device 3B shown in FIG. I have.

  That is, the semiconductor devices 3A and 3B are IGBTs (Insulated Gate Bipolar Transistors) having an upper and lower electrode structure. Here, in the third embodiment, the names used in the semiconductor devices 2A and 2B are read as “emitter”, “drain” as “collector”, and “drift” as “base”.

  In the semiconductor device 3 </ b> A, the distances between the lower ends 52 d of the plurality of gate electrodes 52 and the drain electrode 10 are from the plurality of gate electrodes 50 in the direction from the plurality of gate electrodes 50 to the plurality of gate electrodes 52. It may be longer as you move away.

  Further, in the semiconductor device 3B, the distance between the lower ends 57d of the plurality of field plate electrodes 57 and the upper surface 10u of the drain electrode 10 is set in the direction from the plurality of gate electrodes 50 to the plurality of gate electrodes 52. It may be shortened as the distance from the gate electrode 50 increases.

(Fourth embodiment)
FIG. 11A is a schematic cross-sectional view showing the main part of the semiconductor device according to the fourth embodiment. FIG. 11B is a schematic plan view at a position along the line CC ′ of FIG.

  FIG. 11A shows a cross section of the semiconductor device 4 in the XZ plane. The plurality of gate electrodes 50 extend in a direction (for example, the X direction) that intersects the direction in which the plurality of gate electrodes 50 are arranged (for example, the Y direction). In the gate electrode 50 of the semiconductor device 4, the length of the gate electrode 50 in the Z direction is selectively shortened at the end 50t. That is, in the plurality of gate electrodes 50, the distance between any one of them and the lower surface 20d of the semiconductor region 20 is selectively long at the end 50t (FIG. 11A).

  In the semiconductor device 4, the width of the gate electrode 50 in the Y direction is selectively narrowed at the end 50t (FIG. 11B). In the fourth embodiment, the trench formed before the gate electrode 50 is provided is selectively narrowed at the end 50t. Then, using the loading effect, the gate electrode 50 is formed so that the length of the gate electrode 50 in the Z direction is selectively shortened at the end 50t.

  According to the semiconductor device 4, the length of the gate electrode 50 in the Z direction is selectively shortened at the end 50t. Therefore, the electric field concentrated on the corner 51tc of the insulating film 51 in contact with the end 50t is relaxed compared to the electric field concentrated on the corner 51c of the insulating film 51 other than the end 50t. Thereby, the avalanche breakdown is more likely to occur in the vicinity of the corner portion 51 c than in the vicinity of the corner portion 51 tc of the insulating film 51. In other words, in the semiconductor device 4, the breakdown voltage of the drift region 21 in the element region 90b in the vicinity of the termination region 91 is relatively improved even in the XZ cut plane.

  Further, the distance between the gate electrode 50 other than the end portion 50t and the pn junction portion of the termination region 91 is the distance between the end portion 50t of the gate electrode 50 and the pn junction portion of the termination region 91. It is longer than that. Therefore, the hot spot is difficult to go back and forth between the element region 90a and the termination region 91 even on the XZ cut plane. That is, according to the semiconductor device 4, the phenomenon of repeated hot spot movement is suppressed even at the XZ cut plane, and the drift region 21 is not easily destroyed.

  Further, according to the semiconductor device 4, the breakdown voltage of the drift region 21 in the element region 90b in the vicinity of the termination region 91 is relatively improved in the XZ cut plane. For this reason, it is not necessary to relatively increase the thickness of the drift region 21 in the element region 90b in the vicinity of the termination region 91 in the XZ cut plane. Further, it is not necessary to provide a dedicated field plate electrode for relaxing the electric field concentration on the corner portion 51tc of the insulating film 51 in contact with the end portion 50t of the gate electrode 50 on the XZ cut plane. Therefore, according to the semiconductor device 4, cost reduction is realized.

Further, according to the semiconductor device 4, the end portion 50t of the gate electrode 50 provided in the element region 90b functions as a control electrode for controlling energization. Therefore, at the on time, the on resistance of the semiconductor device 4 is not reduced and a large current is ensured.
The semiconductor device 4 may be an IGBT by providing a p ^{+ -type} collector region 23 between the semiconductor region 20 and the drain electrode 10.

(Fifth embodiment)
FIG. 12A is a schematic cross-sectional view showing the main part of the semiconductor device according to the fifth embodiment. FIG. 12B is a schematic plan view at a position along the line CC ′ of FIG.

  FIG. 12A shows a cross section of the semiconductor device 5 in the XZ plane. The plurality of field plate electrodes 56 extend in a direction (for example, the X direction) that intersects the direction in which the plurality of field plate electrodes 56 are aligned (for example, the Y direction).

  In the field plate electrode 56 of the semiconductor device 5, the length of the field plate electrode 56 in the Z direction is selectively increased at the end 56t. That is, in the plurality of field plate electrodes 56, the distance between any one of the field plate electrodes 56 and the lower surface 20d of the semiconductor region 20 is selectively shortened at one end 56t of the plurality of field plate electrodes 56 (FIG. 12). (A)).

  In the semiconductor device 5, the width of the field plate electrode 56 in the Y direction is selectively widened at the end 56t (FIG. 12B). In the fifth embodiment, a trench formed before the field plate electrode 56 is provided is selectively formed wide at the end 56t. Then, using the loading effect, the field plate electrode 56 is formed so that the length of the field plate electrode 56 in the Z direction is selectively increased at the end 56t.

  In the semiconductor device 5, the length of the field plate electrode 56 in the Z direction is selectively increased at the end 56t. That is, in the semiconductor device 5, the depletion layer of the drift region 21 in the element region 90 b near the termination region 91 is easier to extend than the depletion layer in the drift region 21 in the element region 90 a other than the vicinity of the termination region 91 in the XZ section. It has become.

  Therefore, in the semiconductor device 5, the breakdown voltage of the drift region 21 in the element region 90 b near the termination region 91 is higher than the breakdown voltage of the drift region 21 in the element region 90 a other than the vicinity of the termination region 91 even at the XZ cut plane. Accordingly, the avalanche breakdown is more likely to occur in the drift region 21 in the element region 90 a other than the vicinity of the termination region 91 than in the drift region 21 in the element region 90 b near the termination region 91 in the XZ cut plane.

  Here, the distance between the field plate electrode 56 other than the end portion 56t and the pn junction portion of the termination region 91 is between the end portion 56t of the field plate electrode 56 and the pn junction portion of the termination region 91. Long compared to the distance. Therefore, in the semiconductor device 5, it is difficult for hot spots to travel between the element region 90 a and the termination region 91 even at the XZ cut plane. As described above, according to the semiconductor device 5, the phenomenon in which the movement of the hot spot repeatedly occurs is suppressed even at the XZ cut surface, and the drift region 21 is hardly destroyed.

  Further, according to the semiconductor device 5, the breakdown voltage of the drift region 21 in the element region 90 in the vicinity of the termination region 91 is relatively improved in the XZ cut plane. For this reason, it is not necessary to relatively increase the thickness of the drift region 21 in the element region 90 in the vicinity of the termination region 91 on the XZ cut plane. Furthermore, it is not necessary to provide a dedicated field plate electrode for relaxing the electric field strength of the drift region 21 in the element region 90 in the vicinity of the termination region 91 on the XZ cut plane. Therefore, according to the semiconductor device 5, cost reduction is realized.

  In the above embodiment, “above” in the case where “the part A is provided on the part B” means that the part A is in contact with the part B and the part A is the part B. In addition to the case where it is provided above, it may be used to mean that the part A does not contact the part B and the part A is provided above the part B. In addition, “part A is provided on part B” means that part A and part B are reversed and part A is located below part B, or part A and part B are placed sideways. It may also apply when lined up. This is because even if the semiconductor device according to the embodiment is rotated, the structure of the semiconductor device is not changed before and after the rotation.

  The embodiment has been described above with reference to specific examples. However, the embodiments are not limited to these specific examples. In other words, those specific examples that have been appropriately modified by those skilled in the art are also included in the scope of the embodiments as long as they include the features of the embodiments. Each element included in each of the specific examples described above and their arrangement, material, condition, shape, size, and the like are not limited to those illustrated, and can be appropriately changed.

  In addition, each element included in each of the above-described embodiments can be combined as long as technically possible, and combinations thereof are also included in the scope of the embodiment as long as they include the features of the embodiment. In addition, in the category of the idea of the embodiment, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the embodiment. .

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  1A, 1B, 2A, 2B, 3A, 3B, 4, 5, 100 Semiconductor device, 10 Drain electrode (first electrode), 10u, 21u top surface, 11 Source electrode (second electrode), 20 Semiconductor region (first semiconductor) Region), 20d bottom surface, 21 drift region, 21b bottom, 21t trench, 22 drain region, 22d bottom surface, 23 collector region (fourth semiconductor region), 30 base region (second semiconductor region), 30c, 51c, 53c corner , 35 contact region, 40 source region (third semiconductor region), 50, 50e gate electrode (third electrode), 50d, 52d, 56d, 57d lower end, 50p gate pad, 50u, 52u upper end, 50t, 56t end, 50tc corner, 51 insulating film (first insulating film), 52 gate electrode (first 4 electrode), 53 insulating film (second insulating film), 55 conductive layer, 56, 56e field plate electrode (fifth electrode), 57 field plate electrode (sixth electrode), 70 interlayer insulating film, 80 mask layer, 80h Opening, 90, 90a, 90b element region, 91 termination region

Claims (5)

An element region, and a termination region surrounding the element region,
A first semiconductor region of a first conductivity type;
A second semiconductor region of a second conductivity type provided on the first semiconductor region;
A third semiconductor region of a first conductivity type provided on the second semiconductor region;
A first electrode electrically connected to the first semiconductor region;
A second electrode electrically connected to the third semiconductor region;
A third electrode provided in the element region and facing the first semiconductor region, the second semiconductor region, and the third semiconductor region via a first insulating film;
Provided in the element region, wherein provided on the side of the end region than the third electrode, said first semiconductor region, the second semiconductor region, and a plurality of opposing via a second insulating film on the third semiconductor region A fourth electrode of
A fifth electrode facing the first semiconductor region and the third electrode through the first insulating film;
The first semiconductor region and the fourth electrode face each other via the second insulating film, and a first distance between a lower end and the first electrode is between the lower end of the fifth electrode and the first electrode. A plurality of sixth electrodes shorter than the second distance of
A semiconductor device.   The semiconductor device according to claim 1, comprising a plurality of the third electrodes and a plurality of the fifth electrodes. The semiconductor device according to claim 1, wherein the first distance is shorter toward a side closer to the termination region. Wherein at least one of the fifth electrode and said sixth electrode, according to the distance between the lower surface of the first semiconductor region is one of the selectively short claims 1 to 3 at the ends of the electrodes Semiconductor device. An element region, and a termination region surrounding the element region,
A first semiconductor region of a first conductivity type;
A second semiconductor region of a second conductivity type provided on the first semiconductor region;
A third semiconductor region of a first conductivity type provided on the second semiconductor region;
A first electrode electrically connected to the first semiconductor region;
A second electrode electrically connected to the third semiconductor region;
A plurality of third electrodes provided in the element region and facing the first semiconductor region, the second semiconductor region, and the third semiconductor region via a first insulating film;
Provided in the element region, provided closer to the termination region than the third electrode, and facing the first semiconductor region, the second semiconductor region, and the third semiconductor region via a second insulating film. 4 electrodes,
A plurality of fifth electrodes facing the first semiconductor region and the third electrode via the first insulating film;
The first semiconductor region and the fourth electrode face each other via the second insulating film, and a first distance between a lower end and the first electrode is between the lower end of the fifth electrode and the first electrode. A sixth electrode shorter than the second distance of
I have a,
At least one of the fifth electrode and the sixth electrode is a semiconductor device in which the distance between the end of the electrode and the lower surface of the first semiconductor region is selectively short .

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