JP6547465B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device.

  High electron mobility transistors have been proposed as semiconductor devices (see, for example, Patent Documents 1 to 3). Such a semiconductor device may be mounted on a spacecraft or the like for space use.

Unexamined-Japanese-Patent No. 01-235325 gazette Japanese Patent Application Laid-Open No. 2002-076328 Unexamined-Japanese-Patent No. 2012-023314

  When a heavy particle flying in the space is incident on a semiconductor device for space, a characteristic fluctuation (Single Event Transient) occurs rapidly, and there is a problem that element destruction occurs due to the worst event burnout (Single Event Burnout). This is because, among the electron-hole pairs generated by the incidence of a single particle, the hole of low mobility modulates the potential of the channel and the charge is trapped in the semiconductor device.

  The present invention has been made to solve the problems as described above, and an object thereof is to obtain a semiconductor device capable of suppressing element breakdown due to rapid characteristic fluctuation and burnout even when single particles are incident. It is a thing.

A semiconductor device according to the present invention comprises a substrate, a super lattice layer, a channel layer and a Schottky layer sequentially provided on the substrate, and a gate electrode, a source electrode and a drain electrode provided on the Schottky layer. The superlattice layer comprises a plurality of quantum wells, each quantum well having a plurality of sub-bands, wherein the energies of different sub-bands of adjacent quantum wells of the superlattice layer are matched to each other It features.

  In the present invention, a superlattice layer is provided between the substrate and the channel layer. Then, the energies of the adjacent quantum wells of the superlattice layer coincide with each other. This can cause resonant tunneling in the superlattice layer and allow holes and charges to escape from the channel layer to the substrate through the sub-bands of those quantum wells. Therefore, modulation of the potential of the channel by holes and trapping of charge in the semiconductor device can be suppressed. As a result, even if a single particle is incident, it is possible to suppress the element breakdown due to the rapid characteristic fluctuation and burnout.

FIG. 1 is a cross-sectional view showing a semiconductor device according to Embodiment 1 of the present invention. It is a sectional view showing a semiconductor device concerning a comparative example. It is a figure which shows the energy band of the semiconductor device which concerns on a comparative example. It is a figure which shows the energy band of the semiconductor device concerning Embodiment 1 of this invention. FIG. 5 is a cross-sectional view showing a semiconductor device in accordance with a second embodiment of the present invention. It is a top view which shows the quantum dot layer of the semiconductor device concerning Embodiment 2 of this invention. FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment of the present invention. FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment of the present invention. FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment of the present invention.

  A semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. The same or corresponding components may be assigned the same reference numerals and repetition of the description may be omitted.

Embodiment 1
FIG. 1 is a cross-sectional view showing a semiconductor device according to the first embodiment of the present invention. A superlattice layer 2, a channel layer 3 and a Schottky layer 4 are provided in order on a substrate 1. A gate electrode 5, a source electrode 6 and a drain electrode 7 are provided on the Schottky layer 4.

The substrate 1 is, for example, SiC or GaAs. The superlattice layer 2 is, for example, AlN, InN, SiC, BN, GaN or Al ₂ O ₃ . The channel layer 3 is, for example, GaN or GaAs. The Schottky layer 4 is, for example, AlGaN or AlGaAs. The gate electrode 5, the source electrode 6, and the drain electrode 7 are, for example, Au.

  By applying a voltage to the gate electrode 5, the depletion layer immediately below the gate electrode 5 is expanded or contracted. Thus, electrons flowing from the source electrode 6 to the drain electrode 7 are controlled. The electrons travel through the channel layer 3.

  Subsequently, the effect of the present embodiment will be described in comparison with a comparative example. FIG. 2 is a cross-sectional view showing a semiconductor device according to a comparative example. FIG. 3 is a diagram showing energy bands of the semiconductor device according to the comparative example. The superlattice layer 2 does not exist in the comparative example. When heavy particles flying in the space are incident on the semiconductor device according to the comparative example, characteristic variation occurs rapidly, and there is a problem that element destruction occurs due to the worst burnout.

  On the other hand, in the present embodiment, the superlattice layer 2 is provided between the substrate 1 and the channel layer 3. FIG. 4 is a diagram showing an energy band of the semiconductor device according to the first embodiment of the present invention. The superlattice layer 2 has a well potential consisting of a plurality of quantum wells 2a and 2b. The energy of the sub-bands of the adjacent quantum wells 2a and 2b of the superlattice layer 2 coincide with each other. Here, the energy of the sub-band E1 of the quantum well 2a and the energy of the sub-band E2 of the quantum well 2b coincide with each other. Here, "consistent energy" includes that the energy difference between each other is within ± 0.1 eV.

  As a result, a resonant tunneling phenomenon is generated in the superlattice layer 2, and holes and charges can be released from the channel layer 3 to the substrate 1 through the sub-band E1 of the quantum well 2a and the sub-band E2 of the quantum well 2b. Therefore, modulation of the potential of the channel by holes and trapping of charge in the semiconductor device can be suppressed. As a result, even if a single particle is incident, it is possible to suppress the element breakdown due to the rapid characteristic fluctuation and burnout.

Second Embodiment
FIG. 5 is a cross-sectional view showing a semiconductor device according to the second embodiment of the present invention. In the present embodiment, the quantum dot layer 8 is formed instead of the superlattice layer 2 of the first embodiment.

  FIG. 6 is a plan view showing a quantum dot layer of the semiconductor device according to the second embodiment of the present invention. The quantum dot layer 8 planarly disposed under the channel layer 3 has a well potential consisting of a plurality of quantum dots 8 a planarly spaced at equal intervals. The plurality of quantum dots 8 a are formed at a level of 0.05 eV or more which is not thermally excited even at 300 ° C. That is, the plurality of quantum dots 8a are formed in deep levels such that carriers can not move thermally.

  The plurality of quantum dots 8 a of the quantum dot layer 8 can capture generated holes and can increase the recombination probability of electron-hole pairs. Therefore, since holes generated in a single particle can be reduced, modulation of the potential of the channel by holes and trapping of charges in the semiconductor device can be suppressed. As a result, even if a single particle is incident, it is possible to suppress the element breakdown due to the rapid characteristic fluctuation and burnout.

  Also, the plurality of quantum dots 8a are cubic. Therefore, for example, since the carriers are less likely to move compared to the inverse regular polygonal pyramidal quantum dots, the above-mentioned effect becomes more remarkable.

  7 to 9 are cross-sectional views showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention. First, as shown in FIG. 7, a plurality of nuclei 8 b are formed on the substrate 1 by epitaxial growth. Next, as shown in FIG. 8, the embedded layer 8c which is the next layer is formed to embed between the plurality of nuclei 8b. Next, as shown in FIG. 9, the channel layer 3 and the Schottky layer 4 are formed in order. By growing the next layer when the nuclei 8 b grow in this manner, it is possible to form the plurality of quantum dots 8 a more easily than by patterning.

Reference Signs List 1 substrate, 2 super lattice layer, 2a, 2b quantum well, 3 channel layer, 4 Schottky layer, 5 gate electrode, 6 source electrode, 7 drain electrode, 8 quantum dot layer, 8a quantum dot, 8b nucleus, 8c buried layer

Claims (1)

A substrate,
A superlattice layer, a channel layer and a Schottky layer sequentially provided on the substrate;
A gate electrode, a source electrode and a drain electrode provided on the Schottky layer;
The superlattice layer comprises a plurality of quantum wells,
Each quantum well has multiple subbands,
A semiconductor device, wherein the energies of different sub-bands of adjacent quantum wells of the superlattice layer coincide with each other.

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