JP6483961B2 - Inkjet device - Google Patents

Description

The present invention generally relates to methods of fabricating electronic devices, such as organic light emitting diodes and organic thin film transistors, more particularly a substrate having a surface layer and a bank structure defining a well on the surface layer, and the substrate and well An electronic device comprising a bank structure defining a substrate, wherein the substrate has a surface layer.

PCT / GB2010 / 002235 (published on June 16, 2011 as International Publication No. 2011/070316 (Patent Document 1), inventor Crankshaw and Dowling) as a previous application of the present applicant. Methods for manufacturing electronic devices (solution processing), including depositing active components from, have been extensively studied. When the active ingredient is deposited from solution, one problem is how to include the active ingredient in the desired area of the substrate. One solution to this problem is to provide a substrate that includes a patterned bank layer that defines a well, in which active components can be deposited from solution. The well contains a solution while it is dried so that the active ingredient remains in the substrate area defined by the well.

These methods have been found to be particularly useful for the deposition of organic materials from solution. Organic materials are conductive, semiconducting, and / or photoelectric so that light can be emitted when current passes through them, or light can be detected by generating current when light collides with them. May be active. Devices that utilize these materials are known as organic electronic devices. If the organic material is a luminescent material, the device is known as an organic luminescent device (OLED). Furthermore, solution processing enables low cost, low temperature manufacturing of thin film transistors (TFTs) and especially organic thin film transistors (OTFTs). In such devices, it is particularly important to include the organic semiconductor (OSC) in the correct area, particularly in the channel of the device, and it is known to provide a bank that defines a well to contain the OSC.

Some devices may require more layers than a single solution deposition layer. Typical OLEDs, such as those used in displays, may have two layers of organic semiconductor material, one may be a layer of luminescent material, such as a light emitting polymer (LEP), and the other is hole transport. It may be a layer of a material, for example a polythiophene derivative or a polyaniline derivative.

A simple bank structure has a single material / layer designed to contain all of the deposited liquid in turn. In such devices, all layers may extend to (approximately) the same pinning point, resulting in an edge effect at that point, and / or the best properties for all the liquids in which the bank material is used (e.g. It does not necessarily show wetting behavior). Furthermore, for devices having a single bank material and a single pinning point for all deposited liquids, there is a risk of a leakage path or short circuit between the electrodes on either side of the solution deposited layer. As shown in FIGS. 1a and 1b, in an OLED structure including a HIL-IL-EL-cathode structure, this leakage path is caused by the cathode in direct contact with the hole injection layer (HIL) in the bank (FIG. 1a). It can be caused by the very thin device stack above (FIG. 1b) or by point contact at the pinning point. This can be seen in the corresponding device results in FIGS. 2a and 2b, where for a fully printed device (dashed curve) the JV curve (current density-voltage; FIG. 2a) is before turn-on (eg 1V) and When it is driven in the reverse direction (for example, −4 V), high leakage (high current) is shown. For those with a spin-processed intermediate layer (IL) and an electroluminescent layer (EL) (dark solid curve), the leakage is quite low because the HIL is completely covered by the spin-processed film on the top surface. The corresponding efficiency curve (FIG. 2b) reflects this and shows a much lower efficiency for the fully printed case.

In light of the above, a dual bank structure that provides two different pinning points for different liquids deposited in a well may be advantageous in certain situations. Figures 3a and 3b show a comparison between a dual bank arrangement with a single pinning point (Figure 3a) and a dual bank arrangement with a double pinning point (Figure 3b).

WO 2009/077738 (PCT / GB2008 / 004135, published on June 25, 2009, inventors Burrowhes and Dowing, applicant Cambridge Display Technology Ltd.) deposited in the well. A double bank structure is disclosed that provides two different pinning points for the different fluids, one at the edge of the first layer around the well and one at the second away from the well At the edge of the layer.

U.S. Patent No. 6,099,056 (discussed above) discloses a method of manufacturing an electronic device that includes a structure that defines a well in a double bank, allowing different fluids to be pinned separately in two banks and separately in the two banks. It aims at making it possible to contain. However, the method of Patent Document 1 requires an optical patterning step for partial removal of the first insulating layer.

Therefore, it would be desirable to provide improved structures and / or processes for making such structures so that different liquids can be pinned separately and contained within the wells. This improved structure can have the advantage, among other things, that it allows fabrication with a more compact device, reduced structural complexity and / or fewer processing steps, either of which allows time efficiency of device manufacturing. Or may result in improved cost efficiency, and / or improved device yield and / or reproducibility, and / or reduced requirements regarding volume and / or quantity of constituent materials, for example, leading to reduced costs.

International Publication No. 2011/070316 International Publication No. 2009/077738

According to a first aspect of the present invention, there is provided a method of fabricating an electronic device comprising a substrate having a surface layer and a bank structure defining a well on the surface layer, the method comprising: surface treating the surface layer Is selectively applied to change the surface energy of the first region or the second region of the surface layer, and the contact angle of the first solution when deposited in the first region Is a step of making the contact angle of the first solution larger when deposited in the second region, the first region surrounding and adjoining the second region Depositing a bank structure defining a well on the surface layer, the bank structure including an electrically insulating material and surrounding the first region; Depositing on a second region of the surface layer, Drying the deposited first solution to form a layer; and depositing a second solution over the layer formed by the first solution and on the first surface layer region. The first solution deposited here has a pinning point at the boundary between the first region and the second region of the surface layer, and the deposited second solution has another different pinning point. The process which has these.

Therefore, in an embodiment, the first outer surface layer region has low wettability with respect to the second inner surface layer region, and as a result, a pinning point at the boundary between the first region and the second region. Can bring (In embodiments, a pinning point can be considered a discontinuity that acts to stop the flow of solution beyond the pinning point, and the pinning point substantially represents an energy barrier to such flow. Such pinning points may correspond to, for example, a two-dimensional, eg linear discontinuity along the outer periphery of the second surface layer region).

Thus, the spread of liquid droplets deposited on the highly wettable inner surface layer region on the surface layer (eg device anode) can be limited. Thus, advantageously, the surface layer region having a large contact angle with respect to the first solution functions as an inner bank, and as a result, embodiments do not require multiple physical bank layers. In other words, embodiments may provide a single physical bank with double pinning points. This can be particularly advantageous when at least the first solution is deposited using inkjet technology.

In an embodiment, the surface energy contrast between the inner and outer regions may provide a pinning point for the first solution, while the first surface layer region and the walls that define the wells of the bank structure. The boundary can have a surface energy contrast as well and can provide a pinning point for the second solution.

The bank structure defining the well preferably includes at least one physical bank layer that defines a well for limiting the lateral extent of at least a portion of the second solution ("lateral extent"). Is in a plane substantially parallel to the surface layer).

With respect to any sequence of processing steps, the bank structure may be deposited before or after the surface treatment and there may be intervening steps. The first solution is preferably deposited after deposition of this bank structure.

Furthermore, a method can be provided in which the surface treatment increases the contact angle of the first solution in the first region (ie, the surface treatment reduces the wettability of the first region). (Additionally or alternatively, this treatment may reduce the contact angle of the first solution in the second region). The surface layer is preferably substantially hydrophilic before said surface treatment, and the first region with a large contact angle with the first solution becomes substantially hydrophobic after this surface treatment and / or The second region when surrounded by the first region with a large contact angle with the first solution remains substantially hydrophilic after the surface treatment. Preferably, different contact angles between the first and second regions and the first solution are provided on the planar surface layer.

Furthermore, a sacrificial layer region is provided in the first region or the second region of the surface layer, and the surface energy of the other of the first region and the second region during the surface treatment is increased. A method may be provided comprising the steps of preventing changes; applying the surface treatment; and at least partially removing the sacrificial layer region. However, it should be noted that this removal is not performed immediately after the surface treatment.

And providing the sacrificial layer region: depositing the sacrificial layer on the surface layer: performing photolithography to selectively cover the sacrificial layer region of the sacrificial layer with a photoresist; Selectively exposing other regions; removing an exposed region of the sacrificial layer such that removal of the sacrificial layer region is prevented by the selectively covering photoresist; After removing the region, a method may be provided that includes removing the selectively covering photoresist. Preferably, the sacrificial layer region is substantially (preferably completely) removed after the surface treatment. Preferably, the other exposed areas are on and / or cover the first area of the surface layer.

It should be noted that removal of the exposed areas of the sacrificial layer may further remove at least a portion of the remaining photoresist. Further, “after” may not exclude an intervening step, eg, removal of the selectively covering photoresist may not be performed immediately after removal of the exposed region of the sacrificial layer, and / or the sacrificial layer region. Removal may not be performed immediately after the surface treatment.

Further, the step of partially removing the sacrificial layer region is performed by at least one processing step, and the at least one processing step substantially removes the sacrificial layer region remaining after the surface treatment. A previously performed method may be provided. This partial removal of the sacrificial layer region can remove a thin layer (for example, 10 to 20 nm) from the thickness of the sacrificial layer, for example.

Furthermore, a method can be provided in which the initial deposited thickness of the sacrificial layer is in the range of 10-50 nm.

Furthermore, a method may be provided wherein the surface treatment comprises vapor exposure, preferably silane vapor exposure.

Furthermore, a method may be provided in which the sacrificial layer region comprises tungsten oxide. Such tungsten oxide may be referred to as WOx and may include, for example, tungsten trioxide. Alternatively, other metal oxides such as molybdenum oxide can be used.

Furthermore, the surface layer is made of an inorganic material such as indium tin oxide, such as ITO or tin-doped indium oxide, such as indium (III) oxide (In ₂ O ₃ ) and tin (IV) oxide (SnO ₂ ), such as 90 by weight. A method may further be provided that further comprises a solid solution of 10% by weight of In ₂ O ₃ , 10% by weight of SnO ₂ .

Further, the electronic device is a light emitting device, preferably an organic light emitting device, such as an OLED, and the first solution comprises a first organic semiconducting material and is provided for a hole injection layer (HIL). And / or the second solution comprises a second organic semiconducting material and can be provided a method provided to provide an intermediate layer (IL) or an emissive layer (EL). Alternatively, the device may be a light absorbing device such as a photovoltaic device. If the electronic device is a luminescent device, this method can be used to fabricate an electroluminescent display that includes a plurality of such devices.

Furthermore, the contact angle of the first solution when deposited on the first region of the surface layer is about 50 ° or more immediately after the surface treatment, for example, immediately before depositing the second solution ( More preferably, a method of greater than about 100 ° or about 150 ° may be provided. In addition or alternatively, when deposited on the second region of the surface layer, the contact angle of the first solution is about 10 ° after surface treatment, for example, immediately before deposition of the first solution. It is as follows. In certain embodiments, a first solution (eg, HIL) on a surface layer (eg, ITO) is <10 ° contact in an “inner bank” (eg, a second surface region surrounded by the first surface region). And / or have a contact angle of> 80 ° in the “outer bank” (eg physical bank structure) (but it should be noted that the HIL cannot reach the so-called outer bank). The second solution (eg IL) is preferably <20 ° contact angle for the dried first solution (eg HIL) and <25 ° contact angle for the inner bank (this is eg IL In the first surface layer region and / or for the outer bank, so that the inner bank is hydrophobic but is oleophilic so that it covers the inner bank area) It has a contact angle of> 60 °.

Preferably, a region of the bank structure adjacent to and surrounding the first surface layer region has a contact angle with the second solution of at least greater than about 90 °, more preferably greater than 100 °.

Preferably, during the deposition of the second solution, the contact angle of the second solution with respect to the first region is such that the bank structure, for example at least in the region of the bank structure along the outer periphery of the first region, 2 is smaller than the contact angle of the solution. This may be achieved by selective surface treatment of the first region or bank structure and / or by appropriate selection of materials such as bank structure materials.

Furthermore, a method may be provided in which the pinning point of the second solution is at the boundary between the first region of the surface layer and the bank structure.

According to a second aspect of the present invention there is provided an electronic device comprising a bank structure defining a substrate and a well, the substrate having a surface layer, wherein the bank structure defining the well is a surface layer. And the bank structure defining the well includes an electrically insulating material and surrounds the first region and the second region of the surface layer, and the device is disposed in: the second region of the surface layer A layer processable with a first solution; and processable with a second solution disposed on the first region of the surface layer and over the first solution processable layer The first region is between the second region and the bank structure and is adjacent to and surrounds the second region.

In an embodiment, the bank structure may not be in direct contact with the first region while surrounding the first region. For example, a gap of about 10 μm or more may exist.

Further, an electronic device can be provided in which the boundary between the first region and the second region defines an interface between the first layer and the second layer. During the deposition, preferably the solution for forming the first layer is pinned to the boundary between the first region and the second region, and after the first layer capable of solution processing is dried, A solution to form the second layer is deposited and pinned to different boundaries. In embodiments, the second layer in the first region may further be disposed on at least a portion of the bank structure; however, preferably, the boundary between the first region and the bank structure is the second layer. A pinning point may be provided for the solution to form the.

Preferably, the embodiment provides an inner pinning point (a boundary between the first region and the second region) and an outer (second) pinning point (eg, between the first region and the bank structure). With a minimum gap of at least about 10 μm, preferably greater than about 20 μm. However, the gap may vary within and between devices depending on, for example, the placement of the first region and the bank structure.

Furthermore, an electronic device can be provided in which the surface layer comprises indium tin oxide.

Further, an electronic device can be provided in which at least the solution for forming the first solution processable layer can be deposited by ink jet printing. (A solution processable layer is generally a layer formed by depositing a solution that is dried to form a layer).

Furthermore, an electronic device can be provided in which the electronic device is a luminescent device such as an OLED and the surface layer includes electrodes of the luminescent device. Furthermore, the electronic device wherein the first layer is a hole injection layer (HIL) and / or the second layer is an intermediate layer (IL) or emissive layer (EL) comprising eg a light emitting polymer (LEP) Can be provided. (As an alternative to a luminescent device, the device may be a light absorbing device, eg a photovoltaic device).

Further, an electroluminescent display can be provided that includes a plurality of such light emitting devices.

Further, the electronic device is a thin film transistor, such as an organic thin film transistor (OTFT), wherein the bank structure includes a source electrode and a drain electrode disposed thereon, and the channel region of the transistor is between the source electrode and the drain electrode. An electronic device can be provided as defined in FIG. Preferably, the surface layer includes a surface of the substrate, or the surface layer includes the source electrode and the drain electrode.

Further, the contact angle of the first solution for forming the first layer on the second region of the surface layer is such that the second solution for forming the second layer on the first region of the surface layer. An electronic device greater than the contact angle of the solution can be provided.

Preferred embodiments are defined in the dependent claims.

One or more of any of the above aspects of preferred embodiments and / or one or more of any of the above optional features may be arbitrarily rearranged and combined.

For a better understanding of the present invention and to show how they can be implemented, reference is made to the following accompanying drawings by way of example.

FIG. 3 shows a cross section of a known single bank substrate when fabricated into a device; can the cathode be in direct contact with a hole injection layer (HIL) on the bank (FIG. 1a) or a very thin device stack on the bank? It can have (FIG. 1b) or can be point contact at a pinning point. FIG. 2 shows a cross section of a known single bank substrate when device is manufactured; can the cathode be in direct contact with the hole injection layer (HIL) on the bank (FIG. 1a) or have a very thin device stack on the bank? (FIG. 1b) or point contact at a pinning point. Results are shown for the devices of FIGS. 1a and 1b. For a fully printed device (dashed line), the JV curve (FIG. 2a) shows high leakage (high current) before turn-on (eg 1V) and when driven in the reverse direction (eg -4V). Those with a spin-processed intermediate layer (IL) and an electroluminescent layer (EL) (dark solid line) have a much lower leakage since the HIL is completely covered by the film spun on the top surface. The efficiency curve (FIG. 2b) reflects this and shows a much lower efficiency for the fully printed case (dashed line). Results are shown for the devices of FIGS. 1a and 1b. For a fully printed device (dashed line), the JV curve (FIG. 2a) shows high leakage (high current) before turn-on (eg 1V) and when driven in the reverse direction (eg -4V). Those with a spin-processed intermediate layer (IL) and an electroluminescent layer (EL) (dark solid line) have a much lower leakage since the HIL is completely covered by the film spun on the top surface. The efficiency curve (FIG. 2b) reflects this and shows a much lower efficiency for the fully printed case (dashed line). Compare the dual bank arrangement with a single pinning point (FIG. 3a) with the dual bank arrangement with a double pinning point (FIG. 3b). Compare the dual bank arrangement with a single pinning point (FIG. 3a) with the dual bank arrangement with a double pinning point (FIG. 3b). For comparison, a dual bank double pinning point device structure (FIG. 4a) and an embodiment single bank dual pinning structure (FIG. 4b) are shown. For comparison, a dual bank double pinning point device structure (FIG. 4a) and an embodiment single bank dual pinning structure (FIG. 4b) are shown. FIG. 6 illustrates an embodiment manufacturing process where patterning of the sacrificial inner pixel is used to keep the ITO layer clean and wet and then removed as a final rinse step. Fig. 3 illustrates an embodiment pixel comprising a sacrificial inorganic material. FIG. 4 shows an example of a double pinning point structure of an embodiment, showing a plan view (no printing) before the final sacrificial WOx rinse. FIG. 4 shows an example of a dual pinning point structure of an embodiment, showing a plan view (single droplet of HIL) showing excellent wettability after sacrificial WOx is removed. FIG. 6 shows the results for a device that includes a dual bank double pinning point structure (dashed curve) and an embodiment device that includes a single bank double pinning point structure (solid curve).

Embodiments may be described at least conceptually to include a single bank, dual pinning point structure. The dual pinning point arrangement in such an embodiment includes an “inner” pinning point whose edge is set inside the “outer” bank and separated from the “outer” bank. For example, an inkjet device embodiment includes a physical bank structure for containing ink during inkjet printing, wherein the device includes a plurality of liquid pinning points for each ink within a single physical bank layer. (However, it should be noted that one or more additional physical bank layers may be provided for additional pinning points, for example, only for completeness.) Two such physically separated liquid pinning points are advantageously used so that subsequently deposited or printed layers do not share the same liquid pinning point, so the first Cover the layer completely. Thus, in this bank system, leakage to the first layer may be reduced (preferably reduced, minimized, or eliminated), thus providing an advantage in device performance.

For comparison, FIG. 4a shows a dual bank dual pinning point device structure, while FIG. 4b shows a single bank dual pinning point device structure of device embodiment (D1). 4a and 4b each show an OLED structure including an anode (surface layer A1). FIG. 4a shows a first (“inside”) bank in the form of a physical bank layer B2, while FIG. 4b has a first surface layer region A1o. In both figures, the first ink layer (eg, the first solution S1 of the hole injection layer (HIL)) is in contact with the anode (including at least the inner second surface layer region A1i in the embodiment of FIG. 4b). To do. An “outer” bank is provided in the form of physical bank B1 in each of FIGS. 4a and 4b, and has a second ink layer (eg, preferably having an intermediate layer (IL) between EL and HIL) A second solution S2) of the light emitting layer (EL), such as a polymer (LEP) layer, is in contact with the first ink layer. A cathode (not shown) is preferably provided over the second ink layer, optionally with an intervening layer such as an electron transport layer (ETL) and / or an electron injection layer (EIL) (however, FIG. 4b). It should be noted that the ink layer shown in can be flat as it dries.) It is desirable to reduce leakage between the cathode and anode, for example, by ensuring that the anode and / or HIL is sufficiently physically and / or electrically separated from the cathode. (For a cathode not shown in FIG. 4b, this can be conformal with the underlying layer, for example when deposited by vacuum evaporation. Furthermore, in this regard, embodiments can only be used with a single physical bank, for example. So that it can have a flatter profile, which can provide improved uniformity of the layer thickness in the well; thus this can improve the light emission uniformity of the light emitting device. And / or yield, reliability and / or lifetime can be improved.)).

In comparison with FIG. 4a, the embodiment omits the inner physical bank (B2) and consequently does not require an optical patterning step to fabricate the physical inner bank. Such photo-patterning may result in non-wetting pixel areas in inkjet printing methods and / or requires an additional photo-masking step to define the inner bank using reactive ion etching (RIE). .

Such embodiments can obtain double pinning points (eg, pinning points PP1 and PP2 in the arrangement of FIG. 4b) by selectively altering the surface properties of the anode surface at the bottom surface, eg, the bottom of the well. Thereby, the wet anode active pixel region (A1i) surrounded by the non-wetting area (A1o) of the anode is obtained by using a first liquid such as an HIL solution for wettability, for example. Can do. Thus, the spread of liquid droplets deposited on the wetted area on the anode surface can be limited. (Any one or more of the ink layers may include a polymer for crosslinking to a solid state during drying after being deposited in a liquid state). The wetting characteristics may ensure that the active pixel area of the anode is completely covered by the first liquid (eg S1 which may be a HIL solution such as a polar aqueous solvent), ie as a result in the area. There is no portion where the thickness of the first liquid becomes zero.

(Alternatively, device embodiment D1 of FIG. 4b surrounds and partially surrounds a substrate (not shown), a bank structure (B1) defining wells, a surface layer (A1); a first region (A1o) of the surface layer). The device may be further described as including a bank structure defining wells, provided to cover and thus surround the second region (A1i) of the surface layer, the device being further manufactured from solutions S1 and S2, respectively. A first ink layer and a second ink layer.

FIG. 5 shows a process for fabricating a device embodiment (D1), for example an OLED. A preferred transparent anode layer (A1, eg ITO, which can be formed by vacuum deposition on a glass substrate (not shown); however, alternative anode layer materials may also be suitable) is patterned and then the substrate is Be cleaned to make the substrate substantially free of defects and contaminants. A sacrificial layer (SL1), preferably an inorganic and / or aqueous soluble layer (and thus removable by washing with water) is then deposited over the anode (step St1). Deposition techniques can include, for example, sputtering or evaporation. In this example, the sacrificial layer includes WOx (tungsten oxide) and is therefore referred to using the term Sac-WOx; however, the sacrificial layer may include one or more alternative or additional materials.

Preferably, the sacrificial layer withstands the photolithographic patterning process, but it should be noted that in general the lithographic patterning process is essentially aqueous and therefore can remove some of the Sac-WOx. In this regard, the initial thickness of the sacrificial layer may range from 10 to 50 nm, and more preferably exceed 20 nm, depending on how aggressive the subsequent patterning process is. By providing a sufficient initial thickness to the deposited sacrificial layer, a thin layer (e.g., 10 to 10) is removed during one or more intermediate process steps, such as a photolithography process, before the sacrificial layer is finally removed. 20 nm) can be removed. However, such an intermediate removal of the thin layer may be advantageous to prevent the surface of the sacrificial layer from being excessively contaminated so that the sacrificial layer is removed in the final Sac-WOx removal step. Can remain soluble to a sufficient extent.

To define the pixels, a standard photoresist patterning process (usually positive tone) is used (processing step St2), and the photoresist pixel (PR1) acts as a mask for the sacrificial layer. A portion of the preferably soluble inorganic sacrificial layer is then removed via an aqueous rinse (eg, diluted TMAH (tetramethylammonium hydroxide), hot DI (deionized) water), and the photoresist pattern PR1 is then Stripped in standard manner, but using only cold DI rinse (eg, below room temperature so that the sacrificial layer underlying the photoresist to be stripped is not removed) (step St3). A pixel of sacrificial inorganic material (sacrificial layer region SR1) is provided by the above processing, which is shown in region A1i of FIG.

Region A1o, and preferably also A1i (see FIG. 6) then contains a reagent, eg silane, and / or (i) a hydrophobic head and attachment point or (ii) lyophilic or lyophobic To make the A1o (ITO) surface hydrophobic by a reagent that is exposed to the vapor priming step (St4), for example with a reagent containing a reactive head and a molecule with a point of attachment, for example by a reagent that binds to a hydroxyl group in region A1o Can do.

The substrate may be rinsed in an aqueous solution so that a part of the WOx layer (sacrificial layer region SR1) can be removed (but not completely removed) (continuation of St4). This keeps the WOx clean and allows for faster and more uniform removal in the subsequent final step of removing the Sac-WOx.

All regions are then cured (eg, 30-60 minutes at 200-250 ° C.) to strengthen the bond on the hydrophobic ITO surface A1o (continuation of St4).

A portion of region A1o is then photopatterned to form a hydrophobic and / or oleophobic bank, which may be referred to as a single (physical) “outer” bank (B1) (step St5). This patterning process and subsequent single bank development removes more Sac-WOx material and keeps it clean again before the final curing step of baking the physical bank.

After the physical bank B1 is cured, the final layer of Sac-WOx can then be substantially (preferably completely) removed with a final aqueous rinse (St6). The inner pixel of ITO (area A1i) is preferably very wet with water based ink such as HIL solution.

Regarding the method for making the surface of physical bank B1 hydrophobic, it should be noted that the use of a photoresist, such as SU-8, can make such a surface hydrophobic. Furthermore, the vapor priming process may use HMDS (hexamethyldisilazane), which may be considered an adhesion promoter and / or surface modifier (modification that reduces surface energy). Should. Alternatively, a surface modifier containing OTS (octadecyl-trichlorosilane) may be deposited. Alternatively, self-assembled monolayers may be deposited, for example, from the gas phase or solution, providing a collection of self-assembled molecules that bind to the surface and render the surface hydrophobic.

It should be noted that process embodiments may include some or all of the process steps described above and / or some or all of the steps shown in FIG. For example, in addition to or in addition to the above method for making the surface of A1o hydrophobic, any processing step is performed to make the surface of the ITO region A1o naturally hydrophobic over time. Instead, the device present immediately before that stage may simply be left for some time, for example two weeks. Therefore, processing for making the surface of A1o (ITO) hydrophobic may not be necessary in the embodiment.

The process as described above is preferably suitable for the associated liquid, in the inner A1i and outer A1o regions of the anode material (eg ITO) in the physical bank B1 and / or on the physical bank. A liquid contact angle (and thus a suitable surface energy) is produced. For example, since the HIL stays inside, the ITO region A1i can be in a wet state and the hydrophobic “inner pinning point region” can not be in a wet state. The IL fills the physical bank B1, but as it is contained, the "inner pinning point region" A1o can be wetted and the physical bank B1 can not be wetted. In this way, ITO can provide an “inner pinning point region” A1o that acts as an inner bank for the outer physical bank B1.

This can be achieved both in the process arrangement used to pattern them by selecting materials for anode (ITO) and single bank single vapor processing. For the specific device example above, a vapor phase silane (eg, HMDS) process is used to define the inner pinning point PP1, which results in a large contact angle for the HIL used and a small contact for the IL. Because it gives an angle. Two physical bank materials—Zeon polyacrylate with fluorinated additive from Solvay and fluorinated bank material from Nissan—has proven to be successful so far, both bank materials This is because a high contact angle is produced with respect to IL and LEP inks.

Process steps in embodiments include using sacrificial inner pixel patterning to keep the ITO clean and wet, and then removing the sacrificial inner pixel as a final rinse step, as shown in FIG. . The advantages of such an embodiment can be understood from the perspective of developing a dual bank system, which maintains a very small contact angle for the HIL on the ITO while maintaining a large for the HIL on the bank. It has been difficult to achieve a process step that maintains the contact angle while reducing the contact angle for IL on the bank.

The patterning process of FIG. 5 allows the ITO surface to be wetted or kept wet by the photopatterning process, which is advantageously compared to, for example, an RIE (rapid ion etching) process. Low cost and anode (ITO) pixels are protected from contaminants that can bond to the layer during bank cure by a slight simple rinse. This is advantageous because ITO wetting is a common problem with inkjet processes, and the ability to keep ITO hydrophilic requires UV-ozone exposure or O ₂ plasma patterning. There are things to do. These processes are complex (with respect to O ₂ -plasma patterning) or, in the case of UV-ozone, both ITO and the bank are wetted and cannot hold the ink.

The patterning of the ITO with the sacrificial layer can protect the ITO pixels from contamination during subsequent steps that make the double pinning area hydrophobic, such as, for example, a gas phase silane in the ITO and / or bank curing process. Vapor exposure. After the final rinse to remove Sac-WOx, the ITO can be very wet for hours. If the sacrificial layer is the hole injecting material itself, as in this example, whether the specific amount remains in the device when the HIL is printed is as long as the pixel (ITO) surface is wet. Is irrelevant.

An image of such a single bank dual pinning point structure produced using a processing step as described above is shown in FIGS. 7a and 7b, where FIG. 7a shows the final SAC-Wox rinse. FIG. 7b shows a plan view (single drop of HIL) showing excellent wetting after the sacrificial WOx has been removed. Such double pinning point arrangements preferably have a bank arrangement and a surface layer under the liquid, which surface layer preferably comprises ITO. The innermost region of the surface layer is preferably wet with a first liquid, such as an HIL solution. The innermost region may be hydrophilic and / or oleophobic. One or more other layers are printed over the first layer formed by the first liquid and preferably extend over the surface layer to reach the physical bank structure. Thus, the first layer may be completely covered by other layers, which is advantageous for low leakage as described above.

FIG. 8 was manufactured using a double bank double pinning point structure (dashed curve) and a single bank double pinning point structure (solid line) (eg, as shown in FIGS. 7a and 7b). The JV (current density vs. voltage) result of the device is shown. As shown, the solid curve of the single bank dual pinning point embodiment generally represents a low leakage.

The processing steps described above with reference to FIG. 5 may be similarly applied to thin film transistors, such as organic thin film transistors (OTFTs), and may contain ink between the source and drain of such devices. The device embodiment of the present invention may be a TFT, such as an OTFT.

Similar processing steps as described with reference to FIG. 5 may be applied to fabricate a photovoltaic device having a structure generally similar to a light emitting device as described above, eg, an OLED. Good. The device embodiment of the present invention may be a photovoltaic device.

For those skilled in the art, there are no doubts that many other useful changes can be recalled. It is understood that the present invention is not limited to the described embodiments, but encompasses modifications apparent to those skilled in the art that are within the spirit and scope of the claims appended hereto.

D1 ・ ・ ・ Device embodiment A1 ・ ・ ・ Surface layer A1o ・ ・ ・ First surface layer region A1i ・ ・ ・ Second surface layer region B1 ・ ・ ・ Physical bank B2 ・ ・ ・ Physical bank layer S1 .... First solution S2 ... Second solution SL1 ... Sacrificial layer PP1 ... Pinning point PP2 ... Pinning point PR1 ... Photoresist pattern

[Item 1]
A method of fabricating an electronic device comprising a substrate having a surface layer and a bank structure defining a well on the surface layer, the method comprising: selectively applying a surface treatment to the surface layer, the surface layer And changing the surface energy of the first region or the second region of the first region, wherein the contact angle of the first solution when deposited in the first region is deposited in the second region. A contact angle of the first solution in the case where the first region surrounds and adjoins the second region; and a well is defined in the surface layer Depositing a bank structure, the bank structure comprising an electrically insulating material and surrounding the first region; depositing the first solution on a second region of the surface layer; Drying the deposited first solution; Forming a layer; and depositing a second solution over the layer formed by the first solution and on the first surface layer region, wherein the deposited The method wherein the first solution has a pinning point at the boundary between the first and second regions of the surface layer, and the deposited second solution has another different pinning point.
[Item 2]
Item 2. The method according to Item 1, wherein the surface treatment reduces wettability of the first region.
[Item 3]
Providing a sacrificial layer region on the first region and the second region of the surface layer to prevent a change in the surface energy of the other of the first region and the second region during the surface treatment; 3. The method according to item 1 or 2, comprising: applying the surface treatment; and at least partially removing the sacrificial layer region.
[Item 4]
The method of item 3, wherein the step of providing the sacrificial layer region includes: depositing a sacrificial layer on the surface layer; performing photolithography, and exposing the sacrificial layer region of the sacrificial layer with a photoresist Selectively covering and selectively exposing other regions of the sacrificial layer; the exposed regions of the sacrificial layer such that removal of the sacrificial layer region is prevented by the selectively covering photoresist. And removing the selectively covering photoresist after removing the exposed areas of the sacrificial layer.
[Item 5]
The partial removal of the sacrificial layer region is performed by at least one processing step, and the at least one processing step is performed after the surface treatment and before removing the remaining sacrificial layer region. Item 5. The method according to any one of Items 3 and 4.
[Item 6]
6. A method according to any one of items 3 to 5, wherein the initial deposited thickness of the sacrificial layer is in the range of 10 to 50 nm.
[Item 7]
7. A method according to any one of items 1 to 6, wherein the surface treatment comprises vapor exposure, preferably silane vapor exposure.
[Item 8]
8. A method according to any one of items 1 to 7, wherein the sacrificial layer region comprises tungsten oxide.
[Item 9]
9. A method according to any one of items 1 to 8, wherein the surface layer comprises indium tin oxide.
[Item 10]
Item 10. The item 1-9, wherein the electronic device is a light emitting device, and the first solution includes a first organic semiconductor material and provides a hole injection layer (HIL). The method described in 1.
[Item 11]
From item 1, wherein the electronic device is a luminescent device and the second solution comprises a second organic semiconductor material and provides an intermediate layer (IL) or a luminescent layer (EL) The method according to any one of 10 above.
[Item 12]
12. The method according to any one of items 1 to 11, wherein a contact angle of the first solution is 50 ° or more when deposited on the first region of the surface layer.
[Item 13]
13. The method according to any one of items 1 to 12, wherein when deposited on the second region of the surface layer, a contact angle of the first solution is 10 ° or less.
[Item 14]
14. The method according to any one of items 1 to 13, wherein the pinning point of the second solution is a boundary between the first region of the surface layer and the bank structure.
[Item 15]
An electronic device comprising a bank structure defining a substrate and a well, wherein the substrate has a surface layer, the bank structure defining the well is disposed on the surface layer, and the bank structure defining the well A first solution processable layer comprising an electrically insulating material and surrounding the first region and the second region of the surface layer, the device being disposed in the second region of the surface layer; and A second solution processable layer disposed over and over the first solution processable layer of a surface layer, wherein the first region comprises the second solution processable layer; An electronic device between and adjacent to the second region.
[Item 16]
16. The electronic device of item 15, wherein a boundary between the first region and the second region defines an interface between the first layer and the second layer.
[Item 17]
Item 17. The electronic device according to any one of Items 15 and 16, wherein the surface layer includes indium tin oxide.
[Item 18]
18. The electronic device according to any one of items 15 to 17, wherein at least the first layer of the first layer and the second layer can be deposited by ink jet printing.
[Item 19]
The electronic device according to any one of items 15 to 18, wherein the electronic device is a luminescent device and the surface layer includes an electrode of the luminescent device.
[Item 20]
Item 20. The electronic device according to any one of Items 15 to 19, wherein the first layer is a hole injection layer (HIL).
[Item 21]
21. The electronic device according to any one of items 15 to 20, wherein the second layer is an intermediate layer (IL) or a light emitting layer (EL).
[Item 22]
Any of items 15 to 18, wherein the electronic device is an organic thin film transistor including a source electrode and a drain electrode on which the bank structure is disposed, and a channel region of the transistor is defined between the source electrode and the drain electrode. An electronic device according to claim 1.
[Item 23]
Item 23. The electronic device of item 22, wherein the surface layer includes a surface of the substrate or is a surface layer disposed on the substrate, and preferably includes the source electrode and the drain electrode.
[Item 24]
The contact angle of the first solution for forming the first layer on the second region of the surface layer is equal to the second angle for forming the second layer on the first region of the surface layer. 24. The electronic device according to any one of items 15 to 23, wherein the electronic device is larger than a contact angle of the solution.
[Item 25]
An electronic device as described and / or exemplified herein.

Claims (23)

A method of fabricating an electronic device comprising a substrate having a surface layer and a bank structure defining a well on the surface layer, the method comprising:
A step of selectively applying a surface treatment to the surface layer to change the surface energy of the first region or the second region of the surface layer, wherein the surface energy is deposited in the first region. The contact angle of the first solution is larger than the contact angle of the first solution when deposited in the second region, and the first region has the second region Enclosing and adjoining; and depositing a bank structure defining a well in the surface layer, the bank structure including an electrically insulating material and surrounding the first region;
Depositing the first solution on a second region of the surface layer and drying the deposited first solution to form a layer; and a layer formed by the first solution; overlying, and includes a step of depositing a second solution on the first realm of the surface layer,
Here, the deposited first solution has a pinning point at the boundary between the first region and the second region of the surface layer, and the deposited second solution has another different pinning point. Having a method.   The method of claim 1, wherein the surface treatment reduces wettability of the first region. Providing a sacrificial layer region on the first region and the second region of the surface layer to prevent a change in the surface energy of the other of the first region and the second region during the surface treatment; The step of:
3. The method of claim 1 or 2, comprising: applying the surface treatment; and at least partially removing the sacrificial layer region. The method of claim 3, wherein providing the sacrificial layer region comprises:
Depositing a sacrificial layer on the surface layer;
Performing photolithography, selectively covering the sacrificial layer region of the sacrificial layer with a photoresist, and selectively exposing other regions of the sacrificial layer;
Removing the exposed region of the sacrificial layer such that removal of the sacrificial layer region is prevented by the selectively covering photoresist; and after removing the exposed region of the sacrificial layer, the selection Removing the photoresist to cover.   The partial removal of the sacrificial layer region is performed by at least one processing step, and the at least one processing step is performed after the surface treatment and before removing the remaining sacrificial layer region. 5. A method according to any one of claims 3 and 4. Initial thickness deposited of the sacrificial layer is in the range of 10 to 50 nm, The method of claim 5, citing claim 4 or claim 4.   7. A method according to any one of claims 1 to 6, wherein the surface treatment comprises vapor exposure, preferably silane vapor exposure. The method according to any one of claims 3 to 6, or any one of claims 3 to 6, wherein the sacrificial layer region comprises tungsten oxide.   9. A method according to any one of claims 1 to 8, wherein the surface layer comprises indium tin oxide.   10. The electronic device according to any one of claims 1 to 9, wherein the electronic device is a luminescent device and the first solution comprises a first organic semiconductor material and provides a hole injection layer (HIL). The method according to item.   The electronic device is a luminescent device, and the second solution includes a second organic semiconductor material and provides an intermediate layer (IL) or a luminescent layer (EL). The method according to any one of 1 to 10.   The method according to any one of claims 1 to 11, wherein a contact angle of the first solution is 50 ° or more when deposited on the first region of the surface layer.   The method according to claim 1, wherein the contact angle of the first solution is 10 ° or less when deposited on the second region of the surface layer.   The method according to claim 1, wherein the pinning point of the second solution is a boundary between the first region of the surface layer and the bank structure. An electronic device comprising a bank structure defining a substrate and a well, the substrate having a surface layer,
A bank structure defining the well is disposed on the surface layer, the bank structure defining the well includes an electrically insulating material, surrounds the first region and the second region of the surface layer, and the electron The device is:
A first solution processable layer disposed in the second region of the surface layer; and over the first solution processable layer of the surface layer and disposed on the first region. A second solution processable layer,
It said first region is located between the bank structure and the second region, enclose adjacent to the second region,
The contact angle of the first solution for forming the first solution processable layer on the second region of the surface layer is such that the second solution processing on the first region of the surface layer. An electronic device that is greater than the contact angle of the second solution to form a processable layer . 16. A boundary between the first region and the second region defines an interface between the first solution processable layer and the second solution processable layer. Electronic devices.   The electronic device according to claim 15, wherein the surface layer comprises indium tin oxide.   The electronic device according to any one of claims 15 to 17, wherein at least the first layer of the first layer and the second layer can be deposited by ink jet printing.   The electronic device according to claim 15, wherein the electronic device is a luminescent device, and the surface layer includes an electrode of the luminescent device.   The electronic device according to any one of claims 15 to 19, wherein the first layer is a hole injection layer (HIL).   21. The electronic device according to any one of claims 15 to 20, wherein the second layer is an intermediate layer (IL) or a light emitting layer (EL).   19. The electronic device of claim 15 to 18, wherein the electronic device is an organic thin film transistor including a source electrode and a drain electrode on which the bank structure is disposed, and a channel region of the transistor is defined between the source electrode and the drain electrode. The electronic device as described in any one.   23. The electronic device according to claim 22, wherein the surface layer comprises a surface of the substrate or is a surface layer disposed on the substrate, preferably comprising the source and drain electrodes.

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