JP6465948B1 - Substrate processing apparatus and film forming apparatus - Google Patents

Substrate processing apparatus and film forming apparatus Download PDF

Info

Publication number
JP6465948B1
JP6465948B1 JP2017211800A JP2017211800A JP6465948B1 JP 6465948 B1 JP6465948 B1 JP 6465948B1 JP 2017211800 A JP2017211800 A JP 2017211800A JP 2017211800 A JP2017211800 A JP 2017211800A JP 6465948 B1 JP6465948 B1 JP 6465948B1
Authority
JP
Japan
Prior art keywords
substrate
substrate holder
processing apparatus
chamber
holder support
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017211800A
Other languages
Japanese (ja)
Other versions
JP2019085591A (en
Inventor
可子 阿部
可子 阿部
新 渡部
新 渡部
大和 阿部
大和 阿部
崇 竹見
崇 竹見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Tokki Corp
Original Assignee
Canon Tokki Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Tokki Corp filed Critical Canon Tokki Corp
Priority to JP2017211800A priority Critical patent/JP6465948B1/en
Priority to KR1020180073360A priority patent/KR102018987B1/en
Priority to CN201811273183.9A priority patent/CN109755154B/en
Priority to TW107138490A priority patent/TWI681068B/en
Application granted granted Critical
Publication of JP6465948B1 publication Critical patent/JP6465948B1/en
Publication of JP2019085591A publication Critical patent/JP2019085591A/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/3244Gas supply means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Chemical & Material Sciences (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Analytical Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

【課題】逆スパッタリング原理を用いた基板表面処理において被処理面全域の均一な処理を可能とする技術を提供する。
【解決手段】基板2が配置されるとともに放電ガスが導入されるチャンバ41と、基板2をチャンバ41内で保持する基板ホルダ42と、基板ホルダ42をチャンバ41内で支持する基板ホルダ支持部43と、基板ホルダ42をカソードとし、少なくともチャンバ41及び基板ホルダ支持部43をアノードとして、基板2に電圧を印加する電圧印加手段44と、を備え、電圧印加手段44の電圧印加により発生する放電によってチャンバ41内に発生させたイオン又は電子を基板2の表面に照射することで、基板2の表面処理を行う基板処理装置14において、基板ホルダ42と基板ホルダ支持部43が、基板ホルダ42及び基板ホルダ支持部43に対して電気的に絶縁されたフローティング部50を介して、連結されている。
【選択図】図1
The present invention provides a technique that enables uniform processing over the entire surface to be processed in substrate surface processing using the reverse sputtering principle.
A chamber in which a substrate is disposed and discharge gas is introduced, a substrate holder that holds the substrate in the chamber, and a substrate holder support that supports the substrate holder in the chamber are provided. And a voltage applying means 44 for applying a voltage to the substrate 2 using at least the chamber 41 and the substrate holder support 43 as an anode, and a discharge generated by the voltage application of the voltage applying means 44. In the substrate processing apparatus 14 that performs surface treatment of the substrate 2 by irradiating the surface of the substrate 2 with ions or electrons generated in the chamber 41, the substrate holder 42 and the substrate holder support portion 43 are connected to the substrate holder 42 and the substrate. It is connected via a floating part 50 that is electrically insulated from the holder support part 43.
[Selection] Figure 1

Description

本発明は、基板処理装置及び成膜装置に関する。   The present invention relates to a substrate processing apparatus and a film forming apparatus.

半導体デバイスの成膜処理では、スパッタリングに先立って、基板表面をクリーニングするための前処理やエッチング処理として、逆スパッタリング原理を用いた基板表面処理が行われる(特許文献1)。逆スパッタリングによる表面処理は、基板が配置されたチャンバ内にArガス等の放電ガスを導入し、チャンバ内を所定の真空圧に維持しつつ、基板に所定の高周波電圧を印加することで行われる。電圧印加により基板の被処理面に生じた放電によってプラズマが発生し、プラズマ中のイオンが基板の被処理面に衝突することで、被処理面上に形成された酸化膜等が除去される。   In a film formation process for a semiconductor device, a substrate surface process using a reverse sputtering principle is performed as a pre-process or an etching process for cleaning the substrate surface prior to sputtering (Patent Document 1). Surface treatment by reverse sputtering is performed by introducing a discharge gas such as Ar gas into the chamber in which the substrate is disposed, and applying a predetermined high-frequency voltage to the substrate while maintaining the chamber at a predetermined vacuum pressure. . Plasma is generated by a discharge generated on the surface to be processed of the substrate by applying a voltage, and ions in the plasma collide with the surface to be processed of the substrate, whereby an oxide film or the like formed on the surface to be processed is removed.

特開2012−132053号公報JP 2012-132053 A

逆スパッタリング処理における基板への電圧印加では、基板ホルダの基板載置部をカソードとし、チャンバ等の基板ホルダ以外の装置構成がアノードとなる。基板の被処理面全域に均一な処理を行うためには、プラズマ領域が被処理面よりも広範囲に形成されることが必要となる。しかしながら、装置構成によっては、カソードとなる基板ホルダの基板載置部とアノードとが近接する領域において、電子の帯電が妨げられ、プラズマの広がりが妨げられる場合がある。その結果、基板の被処理面の処理分布に影響がでる場合がある。   In the voltage application to the substrate in the reverse sputtering process, the substrate mounting portion of the substrate holder is used as the cathode, and the apparatus configuration other than the substrate holder such as the chamber is the anode. In order to perform uniform processing over the entire surface to be processed of the substrate, the plasma region needs to be formed in a wider area than the surface to be processed. However, depending on the configuration of the apparatus, in a region where the substrate mounting portion of the substrate holder serving as the cathode and the anode are close to each other, charging of electrons may be hindered and plasma spreading may be hindered. As a result, the processing distribution on the target surface of the substrate may be affected.

本発明は、逆スパッタリング原理を用いた基板表面処理において被処理面全域の均一な処理を可能とする技術を提供することを目的とする。   An object of this invention is to provide the technique which enables the uniform process of the to-be-processed surface whole region in the substrate surface process using the reverse sputtering principle.

上記目的を達成するため、本発明の基板処理装置は、
基板が配置されるとともに放電ガスが導入されるチャンバと、
前記基板を前記チャンバ内で保持する基板ホルダと、
前記基板ホルダを前記チャンバ内で支持する基板ホルダ支持部と、
前記基板ホルダをカソードとし、少なくとも前記チャンバ及び前記基板ホルダ支持部をアノードとして、前記基板に電圧を印加する電圧印加手段と、
を備え、
前記電圧印加手段の電圧印加により発生する放電によって前記チャンバ内に発生させたイオン又は電子を前記基板の表面に照射することで、前記基板の表面処理を行う基板処理装置において、
前記基板ホルダと前記基板ホルダ支持部が、前記基板ホルダ及び前記基板ホルダ支持部に対して電気的に絶縁されたフローティング部を介して、連結されていることを特徴とする。
上記目的を達成するため、本発明の成膜装置は、
上記基板処理装置と、
前記基板処理装置によって表面処理が施された基板の表面に成膜処理を行う成膜処理部と、
を備えることを特徴とする。
In order to achieve the above object, a substrate processing apparatus of the present invention comprises:
A chamber in which a substrate is placed and a discharge gas is introduced;
A substrate holder for holding the substrate in the chamber;
A substrate holder support for supporting the substrate holder in the chamber;
A voltage applying means for applying a voltage to the substrate with the substrate holder as a cathode and at least the chamber and the substrate holder support as an anode;
With
In the substrate processing apparatus for performing surface treatment of the substrate by irradiating the surface of the substrate with ions or electrons generated in the chamber by discharge generated by voltage application of the voltage applying means,
The substrate holder and the substrate holder support part are connected via a floating part that is electrically insulated from the substrate holder and the substrate holder support part.
In order to achieve the above object, the film forming apparatus of the present invention comprises:
The substrate processing apparatus;
A film forming unit that performs film forming on the surface of the substrate that has been surface-treated by the substrate processing apparatus;
It is characterized by providing.

本発明によれば、逆スパッタリング原理を用いた基板表面処理において被処理面全域の均一な処理が可能となる。   According to the present invention, uniform processing can be performed over the entire surface to be processed in substrate surface processing using the reverse sputtering principle.

本発明の実施例に係る基板処理装置の概略図Schematic of a substrate processing apparatus according to an embodiment of the present invention 本発明の実施例と比較例との比較説明図Comparison explanatory drawing of the Example of this invention and a comparative example 比較例におけるプラズマ領域の説明図Illustration of the plasma region in the comparative example 本発明の実施例に係る成膜装置の概略図Schematic of a film forming apparatus according to an embodiment of the present invention 成膜処理のフローチャートFlow chart of film formation process

以下、図面を参照しつつ本発明の好適な実施形態及び実施例を説明する。ただし、以下の実施形態及び実施例は本発明の好ましい構成を例示的に示すものにすぎず、本発明の範囲をそれらの構成に限定されない。また、以下の説明における、装置のハードウェア構成及びソフトウェア構成、処理フロー、製造条件、寸法、材質、形状などは、特に特定的な記載がないかぎりは、本発明の範囲をそれらのみに限定する趣旨のものではない。   Hereinafter, preferred embodiments and examples of the present invention will be described with reference to the drawings. However, the following embodiments and examples are merely illustrative of preferred configurations of the present invention, and the scope of the present invention is not limited to these configurations. In the following description, the hardware configuration and software configuration of the apparatus, processing flow, manufacturing conditions, dimensions, materials, shapes, and the like limit the scope of the present invention only to those unless otherwise specified. It is not intended.

(実施例1)
<成膜装置の全体構成>
図4は、本発明の実施例に係る成膜装置1の全体構成を概略的に示した模式図である。成膜装置1は、成膜処理される基板2が収容されるストッカ室11と、基板2の加熱処理を行う加熱室12と、基板2の被処理面に成膜処理を行う成膜室13と、を備える。成膜室13には、成膜処理に先立って基板2の被処理面の洗浄等の前処理やエッチング処理を行うための基板処理装置14と、基板2の被処理面に成膜処理を行う成膜処理部としてのスパッタ装置15と、を備える。本実施例の成膜装置1では、基板2を縦にした状態(被処理面が垂直となる姿勢)で各室間を搬送する構成となっている(図1参照)。
Example 1
<Overall configuration of film forming apparatus>
FIG. 4 is a schematic diagram schematically showing the overall configuration of the film forming apparatus 1 according to the embodiment of the present invention. The film formation apparatus 1 includes a stocker chamber 11 in which a substrate 2 to be subjected to film formation is accommodated, a heating chamber 12 that performs a heat treatment of the substrate 2, and a film formation chamber 13 that performs a film formation process on a processing target surface of the substrate 2. And comprising. In the film forming chamber 13, prior to the film forming process, a pre-processing such as cleaning of the surface to be processed of the substrate 2 and an etching process are performed, and a film forming process is performed on the surface to be processed of the substrate 2. And a sputtering apparatus 15 as a film forming unit. The film forming apparatus 1 of the present embodiment is configured to transfer between the chambers in a state where the substrate 2 is in a vertical state (an attitude in which the surface to be processed is vertical) (see FIG. 1).

図5は、成膜処理のフローチャートである。基板2は、ストッカ室11から加熱室12へ(S101)、加熱室12から成膜室13の基板処理装置14へ(S103)、基板処理装置14からスパッタ装置15へ(S105)、順次搬送され、成膜処理が施される。基板2は、加熱室12でヒータ121により加熱処理された後(S102)、先ず、成膜室13の基板処理装置14による表面処理を施される(S104)。表面処理が施された基板2は、次に、スパッタ装置15による各種異なる材料からなるターゲット151、152、153を用いてスパッタリング処理が施され(S106)、成膜処理が終了する。   FIG. 5 is a flowchart of the film forming process. The substrate 2 is sequentially transferred from the stocker chamber 11 to the heating chamber 12 (S101), from the heating chamber 12 to the substrate processing apparatus 14 in the film forming chamber 13 (S103), and from the substrate processing apparatus 14 to the sputtering apparatus 15 (S105). Then, a film forming process is performed. The substrate 2 is heated by the heater 121 in the heating chamber 12 (S102), and is first subjected to surface treatment by the substrate processing apparatus 14 in the film forming chamber 13 (S104). Next, the substrate 2 that has been subjected to the surface treatment is subjected to the sputtering treatment using the targets 151, 152, and 153 made of various materials by the sputtering apparatus 15 (S106), and the film formation treatment is completed.

本実施例に係る成膜装置1は、例えば、前処理を伴う種々の電極形成に適用可能である。具体例としては、例えば、FC−BGA(Flip−Chip Ball Grid Array)実装基板向けのメッキシード膜や、SAW(Surface Acoustic Wave)デバイス向けのメタル積層膜の成膜が挙げられる。また、LEDのボンディング部における導電性硬質膜、MLCC(Multi−Layered Ceramic Capacitor)の端子部膜の成膜なども挙げられる。その他、電子部品パッケージにおける電磁シールド膜やチップ抵抗器の端子部膜の成膜にも適用可能である。処理基板2のサイズは、50mm×50mm〜600mm×600mm程度の範囲のものが例示できる。基板2の材質としては、ガラス、アルミナ、セラミック、LTCC(Low
Temperature Co−fired Ceramics:低温同時焼成セラミックス)等が挙げられる。
The film forming apparatus 1 according to the present embodiment can be applied to various electrode formations involving pretreatment, for example. Specific examples include, for example, the formation of a plating seed film for an FC-BGA (Flip-Chip Ball Grid Array) mounting substrate and a metal laminated film for a SAW (Surface Acoustic Wave) device. In addition, a conductive hard film in the bonding part of the LED, a film formation of a terminal part film of MLCC (Multi-Layered Ceramic Capacitor), and the like are also included. In addition, the present invention can be applied to the formation of an electromagnetic shielding film in an electronic component package and a terminal film of a chip resistor. Examples of the size of the processing substrate 2 include a range of about 50 mm × 50 mm to 600 mm × 600 mm. The material of the substrate 2 is glass, alumina, ceramic, LTCC (Low
(Temperature Co-fired Ceramics).

<基板処理装置>
図1は、本実施例に係る基板処理装置14の全体構成を概略的に示す模式図である。図1(a)は、基板処理装置14の構成を基板2の搬送方向に見た構成図を含む概略図、図1(b)は、基板ホルダ及び基板ホルダ支持部の構成を基板2の被処理面21と対向する方向に見た模式図である。基板処理装置14は、成膜室13を構成するチャンバ41と、基板ホルダ42と、基板ホルダ支持部43と、電圧印加手段としてのマッチングボックス44及び高周波電源45と、圧力調整手段46と、ガス供給手段47と、を備える。
<Substrate processing equipment>
FIG. 1 is a schematic diagram schematically showing an overall configuration of a substrate processing apparatus 14 according to the present embodiment. FIG. 1A is a schematic diagram including a configuration diagram in which the configuration of the substrate processing apparatus 14 is viewed in the transport direction of the substrate 2, and FIG. 1B illustrates the configuration of the substrate holder and the substrate holder support portion. It is the schematic diagram seen in the direction facing the processing surface. The substrate processing apparatus 14 includes a chamber 41 constituting the film forming chamber 13, a substrate holder 42, a substrate holder support 43, a matching box 44 and a high frequency power source 45 as voltage applying means, a pressure adjusting means 46, a gas Supply means 47.

基板2は、上述したように、垂直に立てた状態で成膜装置1の各室間を搬送され、チャンバ41内においても、被処理面21が垂直となる(被処理面21が水平方向に向いた)姿勢で設置される。図1に示すように、基板2は、被処理面21の周縁部が押圧枠体421により押圧されることで、被処理面21とは反対側の面が基板ホルダ42に押し付けられ、押圧枠体421と基板ホルダ42との間で挟持された状態で保持される。押圧枠体421は、基板2を基板ホルダ42との間で挟持した状態が維持されるように、基板ホルダ42に対してねじ等の締結具423により固定されている。以上のように基板2を保持する基板ホルダ42は、基板ホルダ支持部43により支持されている。基板ホルダ支持部43は、搬送手段としての車輪431を下方に備え、基板ホルダ42を支持した状態でチャンバ41内をチャンバ41の底面に敷設されたレール432に乗って移動可能に構成されている。   As described above, the substrate 2 is transported between the chambers of the film forming apparatus 1 in a vertically standing state, and the processing surface 21 is vertical in the chamber 41 (the processing surface 21 is in the horizontal direction). It is installed in the posture). As shown in FIG. 1, the substrate 2 is pressed against the substrate holder 42 by pressing the peripheral portion of the surface 21 to be processed by the pressing frame body 421, and the pressing frame is pressed against the substrate holder 42. The body 421 and the substrate holder 42 are held in a sandwiched state. The pressing frame 421 is fixed to the substrate holder 42 with a fastener 423 such as a screw so that the state in which the substrate 2 is sandwiched between the pressing frame body 421 and the substrate holder 42 is maintained. As described above, the substrate holder 42 that holds the substrate 2 is supported by the substrate holder support portion 43. The substrate holder support portion 43 is provided with a wheel 431 as a conveying means below, and is configured to be movable on the rail 432 laid on the bottom surface of the chamber 41 while supporting the substrate holder 42. .

基板ホルダ42と基板ホルダ支持部43は、連結部材として、両者に対して電気的に絶縁されたフローティング部50を介して連結されている。フローティング部50は、SUS(ステンレス鋼)等の金属製の板状部材であり、基板2の略真下の位置において、基板2と平行に、かつ基板2の下端辺よりも前後に長く基板2の延びる方向(基板2の搬送方向)に沿った姿勢で設けられている。フローティング部50の材質としては、SUS以外にもアルミ等の成膜装置のチャンバに一般的に使用される金属を用いることができる。   The substrate holder 42 and the substrate holder support portion 43 are connected as a connecting member via a floating portion 50 that is electrically insulated from both. The floating portion 50 is a metal plate-like member such as SUS (stainless steel), and is substantially parallel to the substrate 2 at a position almost directly below the substrate 2 and longer than the lower end side of the substrate 2. It is provided in a posture along the extending direction (the conveyance direction of the substrate 2). As a material of the floating part 50, a metal generally used in a chamber of a film forming apparatus such as aluminum can be used besides SUS.

フローティング部50は、絶縁機構として、基板ホルダ42に対しては第1の絶縁部材501を介して、基板ホルダ支持部43に対しては第2の絶縁部材502を介して、それぞれ連結されている。絶縁部材501、502は、PEEK(Poly Ether Ether Ketone:ポリエーテルエーテルケトン樹脂)からなるが、セラミックやテフロン(登録商標)等の絶縁性の樹脂を用いてもよい。   The floating part 50 is connected to the substrate holder 42 via a first insulating member 501 and to the substrate holder support part 43 via a second insulating member 502 as an insulating mechanism. . The insulating members 501 and 502 are made of PEEK (Poly Ether Ether Ketone), but may be made of an insulating resin such as ceramic or Teflon (registered trademark).

チャンバ41の内壁のうち側壁面及び上面と、基板ホルダ支持部43の外面は、防着板481(SUSやアルミ等の金属板)で覆われている。また、基板ホルダ42の基板載置面側とは反対側にも防着板482が設けられている。防着板481、482は、チャンバ41の内壁及び基板ホルダ支持部43や基板ホルダ42の外面に、成膜時に飛散する材料が付着することを防ぐ。防着板481、482を配置し、取り外し可能とすることで、洗浄や交換等のメンテナンスを容易に行うことができる。防着板481は、チャンバ41あるいは基板ホルダ支持部43に接続されており、それらはGND電位(アノード)となっている。また、防着板482は、基板ホルダ42と同様に電位がかけられ、カソードの一部となる。   Of the inner wall of the chamber 41, the side wall surface and the upper surface and the outer surface of the substrate holder support portion 43 are covered with a deposition preventing plate 481 (a metal plate such as SUS or aluminum). Further, a deposition preventing plate 482 is provided on the opposite side of the substrate holder 42 from the substrate placement surface side. The adhesion prevention plates 481 and 482 prevent the material scattered during film formation from adhering to the inner wall of the chamber 41 and the outer surfaces of the substrate holder support 43 and the substrate holder 42. By arranging the attachment prevention plates 481 and 482 and making them removable, maintenance such as cleaning and replacement can be easily performed. The deposition preventing plate 481 is connected to the chamber 41 or the substrate holder support portion 43, and they are at the GND potential (anode). Further, the deposition preventing plate 482 is applied with a potential in the same manner as the substrate holder 42 and becomes a part of the cathode.

<逆スパッタ原理を用いた基板表面処理>
チャンバ41内に基板2が設置された状態において、ガス供給手段47によりチャンバ41内に放電ガスが供給されるとともに、真空ポンプ461等を備えた圧力調整手段46により、チャンバ41内の圧力が所定の圧力(例えば、0.3〜1.2Pa)に維持される。放電ガスとしては、例えば、O、N、Ar、CF、NFおよびこれらの混合ガスや、大気などが挙げられる。基板ホルダ42は、給電部46を介してマッチングボックス44及び高周波電源45に接続されており、マッチングボックス44によりインピーダンス整合された所定の高周波電圧(例えば、50〜400W/210mm×320mm
(トレイ面積)=0.07〜0.60W/cm(駆動パワー))が印加される。
<Substrate surface treatment using reverse sputtering principle>
In a state where the substrate 2 is installed in the chamber 41, the discharge gas is supplied into the chamber 41 by the gas supply means 47, and the pressure in the chamber 41 is set to a predetermined value by the pressure adjusting means 46 including the vacuum pump 461 and the like. At a pressure of 0.3 to 1.2 Pa, for example. Examples of the discharge gas include O 2 , N 2 , Ar, CF 3 , NF 3, a mixed gas thereof, and the atmosphere. The substrate holder 42 is connected to the matching box 44 and the high-frequency power source 45 via the power supply unit 46, and a predetermined high-frequency voltage (for example, 50 to 400 W / 210 mm × 320 mm) impedance-matched by the matching box 44.
(Tray area) = 0.07-0.60 W / cm 2 (driving power)) is applied.

上記電圧印加により、基板2の被処理面21及び基板ホルダ42近傍にプラズマPが形成される。そして、プラズマP中のイオン又は電子が基板2の被処理面21に照射・衝突し、その表面がエッチングされる。これにより、例えば、後の成膜処理(スパッタリング)の前処理として、被処理面21上に形成された自然酸化膜や有機物等の汚れ等を除去することができ、クリーニング効果や基板表面活性効果が得られる。   By the voltage application, plasma P is formed in the vicinity of the surface 21 to be processed and the substrate holder 42 of the substrate 2. Then, ions or electrons in the plasma P irradiate and collide with the surface 21 to be processed of the substrate 2, and the surface is etched. As a result, for example, as a pretreatment for the subsequent film formation process (sputtering), dirt such as a natural oxide film or an organic substance formed on the processing target surface 21 can be removed, and a cleaning effect or a substrate surface activation effect can be obtained. Is obtained.

<本実施例の優れた点>
図1〜図3を参照して、本実施例の優れた点について説明する。図2は、本実施例に係る基板処理装置14の特徴を、比較例と比較して説明するための模式図である。図2(a)は、本実施例に係る基板処理装置14の基板ホルダ42と基板ホルダ支持部43との連結部分の構成を示す模式図(図1(a)のフローティング部50周辺の拡大図)である。図2(b)は、本実施例に係る基板処理装置14の回路構成を模式的に示した回路図である。図2(c)は、比較例における基板ホルダ42と基板ホルダ支持部43との連結部分の構成を示す模式図である。図2(d)は、比較例における基板処理装置14の回路構成を模式的に示した回路図である。図3、比較例において形成されるプラズマ領域を示す模式図である(本実施例の図1(b)と比較するための図)。
<Excellent points of this embodiment>
With reference to FIGS. 1-3, the outstanding point of a present Example is demonstrated. FIG. 2 is a schematic diagram for explaining the features of the substrate processing apparatus 14 according to the present embodiment in comparison with the comparative example. FIG. 2A is a schematic diagram showing a configuration of a connection portion between the substrate holder 42 and the substrate holder support portion 43 of the substrate processing apparatus 14 according to the present embodiment (an enlarged view around the floating portion 50 in FIG. 1A). ). FIG. 2B is a circuit diagram schematically showing a circuit configuration of the substrate processing apparatus 14 according to the present embodiment. FIG. 2C is a schematic diagram illustrating a configuration of a connection portion between the substrate holder 42 and the substrate holder support portion 43 in the comparative example. FIG. 2D is a circuit diagram schematically showing a circuit configuration of the substrate processing apparatus 14 in the comparative example. FIG. 3 is a schematic diagram showing a plasma region formed in a comparative example (a diagram for comparison with FIG. 1B of this example).

図1に示すように、基板ホルダ支持部43は、チャンバ41を介してGND電位に接続されており、電圧印加手段による基板2への電圧印加において、基板ホルダ42がカソードとなり、基板ホルダ支持部43やチャンバ41はアノードとなる。ここで、図2(a)、(b)に示すように、本実施例では、カソードとなる基板ホルダ42とアノードとなる基板ホルダ支持部43との間に、電気的に絶縁されたフローティング部50が設けられている。   As shown in FIG. 1, the substrate holder support portion 43 is connected to the GND potential via the chamber 41, and the substrate holder 42 serves as a cathode when the voltage is applied to the substrate 2 by the voltage applying means, and the substrate holder support portion. 43 and the chamber 41 become anodes. Here, as shown in FIGS. 2A and 2B, in this embodiment, an electrically insulated floating portion is provided between a substrate holder 42 serving as a cathode and a substrate holder supporting portion 43 serving as an anode. 50 is provided.

ここで、エッチング効果を基板2の被処理面21の全域に渡って均一に得るためには、プラズマPが、被処理面21よりも広い範囲で形成される必要がある。すなわち、図1(b)に示すように、基板2の被処理面21の上端辺よりも上方の領域A1、被処理面の左右の側端辺よりも左右外側の領域A2、A3、被処理面21の下端辺よりも下方の領域A4のそれぞれまで広範囲に広がるプラズマPが形成されることで、被処理面21の周縁まで十分なエッチング効果を得ることが可能となる。   Here, in order to obtain the etching effect uniformly over the entire surface 21 of the substrate 2, the plasma P needs to be formed in a wider range than the surface 21 to be processed. That is, as shown in FIG. 1B, a region A1 above the upper end side of the processing surface 21 of the substrate 2, regions A2 and A3 outside the left and right sides of the left and right side edges of the processing surface, By forming the plasma P that spreads over a wide area up to each of the regions A4 below the lower end side of the surface 21, a sufficient etching effect can be obtained up to the periphery of the surface 21 to be processed.

比較例では、図2(c)、(d)に示すように、基板ホルダ42と基板ホルダ支持部43とを連結する連結部49が、基板ホルダ42に対しては絶縁部材491を介して連結されているのに対し、基板ホルダ支持部43に対しては金属部材492を介して連結されており絶縁されていない。そのため、連結部49は基板ホルダ支持部43と同電位となっている。したがって、比較例では、図2(c)、図3に示すように、アノード領域が、カソードである基板ホルダ42と、プラズマPを形成すべき領域A4との間を遮るように延在する構成となる。そのため、領域A4において電子がGND電位に落ち、プラズマPが基板2の下端縁22から下方の領域A4まで広がらず、基板2の被処理面21の下端辺周辺の領域(領域A4と近接する領域)においてプラズマの密度が低くなる。その結果、被処理面21の下端辺周辺の領域においてエッチング分布が悪くなってしまう場合がある。   In the comparative example, as shown in FIGS. 2C and 2D, the connecting portion 49 that connects the substrate holder 42 and the substrate holder support portion 43 is connected to the substrate holder 42 via an insulating member 491. On the other hand, it is connected to the substrate holder support portion 43 via the metal member 492 and is not insulated. Therefore, the connecting portion 49 has the same potential as the substrate holder support portion 43. Therefore, in the comparative example, as shown in FIGS. 2C and 3, the anode region extends so as to block between the substrate holder 42 serving as the cathode and the region A <b> 4 where the plasma P is to be formed. It becomes. Therefore, electrons fall to the GND potential in the region A4, and the plasma P does not spread from the lower end edge 22 of the substrate 2 to the lower region A4, and is a region around the lower end side of the processing target surface 21 of the substrate 2 (region adjacent to the region A4 ) The plasma density is lowered. As a result, the etching distribution may deteriorate in a region around the lower end side of the surface 21 to be processed.

これに対し、本実施例では、カソードである基板ホルダ42とアノードである基板ホルダ支持部43との間に介在する連結部としてのフローティング部50は、カソード及びアノードに対して電気的に絶縁されており、領域A4における電子の帯電を妨げることがない。その結果、図1(b)、図2(a)に示すように、プラズマPが領域A4まで広がり、基板2の被処理面21の下端辺周辺の領域(領域A4と近接する領域)において十分なエッチング効果を得ることができる。   On the other hand, in this embodiment, the floating portion 50 as a connecting portion interposed between the substrate holder 42 serving as the cathode and the substrate holder supporting portion 43 serving as the anode is electrically insulated from the cathode and the anode. Thus, charging of electrons in the region A4 is not hindered. As a result, as shown in FIGS. 1B and 2A, the plasma P spreads to the region A4 and is sufficient in the region around the lower end side of the surface to be processed 21 of the substrate 2 (region close to the region A4). Etching effect can be obtained.

<その他>
本実施例で示した、カソード及びアノードに対して電気的に絶縁したフローティング部の設置箇所は、あくまで一例であり、フローティング部の好適な設置個所は装置構成によって異なるものである。すなわち、本実施例では、基板を縦にして搬送する装置構成となっており、アノードとなる基板ホルダ支持構成部との近傍領域となる基板下端部周辺にフローティング部を設ける必要があった。例えば、基板を平置きにして逆スパッタリング処理を行う装置構成においては、基板の周縁を囲むようにフローティング部を設けるようにしてもよい。あるいは、基板外周に沿った領域のうち必要な領域にのみ設ける、すなわち、アノードに連結された構成部のうち基板周縁に近接する一部分のみをフローティング部に変更する構成としてもよい。
<Others>
The installation location of the floating portion that is electrically insulated from the cathode and the anode shown in the present embodiment is merely an example, and a suitable installation location of the floating portion varies depending on the apparatus configuration. That is, in this embodiment, the apparatus is configured to convey the substrate vertically, and it is necessary to provide a floating portion around the lower end of the substrate, which is in the vicinity of the substrate holder supporting component serving as the anode. For example, in an apparatus configuration in which the substrate is placed flat and the reverse sputtering process is performed, a floating portion may be provided so as to surround the periphery of the substrate. Or it is good also as a structure which provides only in a required area | region among the area | regions along a board | substrate outer periphery, ie, changes only a part close | similar to the board | substrate periphery among the structural parts connected with the anode to a floating part.

なお、本実施例では、チャンバ41内壁における基板ホルダ支持部43の設置面が水平面であることを前提として上下左右の方向を規定した説明としているが、該設置面の方向が変われば、上下左右方向の規定もそれに合わせて変化することは言うまでもない。   In the present embodiment, the description is given with respect to the vertical and horizontal directions on the assumption that the installation surface of the substrate holder support portion 43 on the inner wall of the chamber 41 is a horizontal plane. However, if the direction of the installation surface changes, the vertical and horizontal directions are changed. It goes without saying that the direction rules change accordingly.

1…成膜装置、2…基板、21…被処理面、14…基板処理装置、41…チャンバ、42…基板ホルダ、43…基板ホルダ支持部、44…マッチングボックス、45…高周波電源、46…圧力調整手段、47…ガス供給手段、48…防着板、50…フローティング部、501、502…絶縁部材、P…プラズマ   DESCRIPTION OF SYMBOLS 1 ... Film-forming apparatus, 2 ... Substrate, 21 ... Surface to be processed, 14 ... Substrate processing apparatus, 41 ... Chamber, 42 ... Substrate holder, 43 ... Substrate holder support, 44 ... Matching box, 45 ... High frequency power supply, 46 ... Pressure adjusting means, 47 ... gas supply means, 48 ... deposition preventing plate, 50 ... floating portion, 501 and 502 ... insulating member, P ... plasma

Claims (10)

基板が配置されるとともに放電ガスが導入されるチャンバと、
前記基板を前記チャンバ内で保持する基板ホルダと、
前記基板ホルダを前記チャンバ内で支持する基板ホルダ支持部と、
前記基板ホルダをカソードとし、少なくとも前記チャンバ及び前記基板ホルダ支持部をアノードとして、前記基板に電圧を印加する電圧印加手段と、
を備え、
前記電圧印加手段の電圧印加により発生する放電によって前記チャンバ内に発生させたイオン又は電子を前記基板の表面に照射することで、前記基板の表面処理を行う基板処理装置において、
前記基板ホルダと前記基板ホルダ支持部が、前記基板ホルダ及び前記基板ホルダ支持部に対して電気的に絶縁されたフローティング部を介して、連結されていることを特徴とする基板処理装置。
A chamber in which a substrate is placed and a discharge gas is introduced;
A substrate holder for holding the substrate in the chamber;
A substrate holder support for supporting the substrate holder in the chamber;
A voltage applying means for applying a voltage to the substrate with the substrate holder as a cathode and at least the chamber and the substrate holder support as an anode;
With
In the substrate processing apparatus for performing surface treatment of the substrate by irradiating the surface of the substrate with ions or electrons generated in the chamber by discharge generated by voltage application of the voltage applying means,
The substrate processing apparatus, wherein the substrate holder and the substrate holder support part are connected via a floating part electrically insulated from the substrate holder and the substrate holder support part.
前記フローティング部は、基板の外周に沿った領域の少なくとも一部に配置されることを特徴とする請求項1に記載の基板処理装置。   The substrate processing apparatus according to claim 1, wherein the floating part is disposed in at least a part of a region along an outer periphery of the substrate. 前記フローティング部は、前記基板ホルダ支持部と、前記基板の周縁のうち前記基板ホルダ支持部に近い部分と、の間に配置されることを特徴とする請求項1または2に記載の基板処理装置。   3. The substrate processing apparatus according to claim 1, wherein the floating portion is disposed between the substrate holder support portion and a portion of the peripheral edge of the substrate that is close to the substrate holder support portion. . 前記基板ホルダは、前記基板を被処理面が垂直となるように保持し、
前記フローティング部は、前記基板の下端部の下方に配置されることを特徴とする請求項1〜3のいずれか1項に記載の基板処理装置。
The substrate holder holds the substrate so that the surface to be processed is vertical,
The substrate processing apparatus according to claim 1, wherein the floating portion is disposed below a lower end portion of the substrate.
前記フローティング部は、前記基板の下端部に対してその全域に渡って近接する部分を有することを特徴とする請求項4に記載の基板処理装置。   The substrate processing apparatus according to claim 4, wherein the floating portion has a portion that is close to the lower end portion of the substrate over the entire area. 前記フローティング部は、前記基板ホルダ及び前記基板ホルダ支持部に対して絶縁部材を介して連結されていることを特徴とする請求項1〜5のいずれか1項に記載の基板処理装置。   The substrate processing apparatus according to claim 1, wherein the floating part is connected to the substrate holder and the substrate holder support part via an insulating member. 前記フローティング部は、金属製の板状部材であり、基板の被処理面と平行に配置されることを特徴とする請求項1〜6のいずれか1項に記載の基板処理装置。   The substrate processing apparatus according to claim 1, wherein the floating portion is a metal plate-like member and is disposed in parallel with a surface to be processed of the substrate. 前記チャンバ内に配置される防着板をさらに備え、
前記防着板は、前記アノードに含まれることを特徴とする請求項1〜7のいずれか1項に記載の基板処理装置。
Further comprising a deposition plate disposed in the chamber;
The substrate processing apparatus according to claim 1, wherein the deposition preventing plate is included in the anode.
前記基板ホルダ支持部は、前記チャンバ内を移動可能に構成されていることを特徴とする請求項1〜8のいずれか1項に記載の基板処理装置。   The substrate processing apparatus according to claim 1, wherein the substrate holder support portion is configured to be movable in the chamber. 請求項1〜9のいずれか1項に記載の基板処理装置と、
前記基板処理装置によって表面処理が施された基板の表面に成膜処理を行う成膜処理部と、
を備えることを特徴とする成膜装置。
The substrate processing apparatus according to any one of claims 1 to 9,
A film forming unit that performs film forming on the surface of the substrate that has been surface-treated by the substrate processing apparatus;
A film forming apparatus comprising:
JP2017211800A 2017-11-01 2017-11-01 Substrate processing apparatus and film forming apparatus Active JP6465948B1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2017211800A JP6465948B1 (en) 2017-11-01 2017-11-01 Substrate processing apparatus and film forming apparatus
KR1020180073360A KR102018987B1 (en) 2017-11-01 2018-06-26 Substrate processing apparatus and film-forming apparatus
CN201811273183.9A CN109755154B (en) 2017-11-01 2018-10-30 Substrate processing apparatus and film forming apparatus
TW107138490A TWI681068B (en) 2017-11-01 2018-10-31 Substrate processing device and film forming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017211800A JP6465948B1 (en) 2017-11-01 2017-11-01 Substrate processing apparatus and film forming apparatus

Publications (2)

Publication Number Publication Date
JP6465948B1 true JP6465948B1 (en) 2019-02-06
JP2019085591A JP2019085591A (en) 2019-06-06

Family

ID=65270498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017211800A Active JP6465948B1 (en) 2017-11-01 2017-11-01 Substrate processing apparatus and film forming apparatus

Country Status (4)

Country Link
JP (1) JP6465948B1 (en)
KR (1) KR102018987B1 (en)
CN (1) CN109755154B (en)
TW (1) TWI681068B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246392A (en) * 2009-07-27 2009-10-22 Canon Anelva Corp Substrate processing apparatus
JP2011068918A (en) * 2009-09-24 2011-04-07 Tokyo Electron Ltd Structure of mounting table, and plasma film-forming apparatus
JP2018076561A (en) * 2016-11-10 2018-05-17 株式会社アルバック Film deposition method and film deposition apparatus

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4364335B2 (en) * 1999-02-01 2009-11-18 キヤノンアネルバ株式会社 Sputtering equipment
JP2006083459A (en) * 2004-09-17 2006-03-30 Alps Electric Co Ltd Sputtering system and sputtering method
CN100539000C (en) * 2004-12-03 2009-09-09 东京毅力科创株式会社 Capacitive coupling plasma processing apparatus
JP5064707B2 (en) * 2006-03-30 2012-10-31 東京エレクトロン株式会社 Plasma processing equipment
JP2012132053A (en) 2010-12-21 2012-07-12 Panasonic Corp Sputtering apparatus and sputtering method
WO2013099061A1 (en) * 2011-12-27 2013-07-04 キヤノンアネルバ株式会社 Sputtering device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246392A (en) * 2009-07-27 2009-10-22 Canon Anelva Corp Substrate processing apparatus
JP2011068918A (en) * 2009-09-24 2011-04-07 Tokyo Electron Ltd Structure of mounting table, and plasma film-forming apparatus
JP2018076561A (en) * 2016-11-10 2018-05-17 株式会社アルバック Film deposition method and film deposition apparatus

Also Published As

Publication number Publication date
KR20190049407A (en) 2019-05-09
KR102018987B1 (en) 2019-09-05
JP2019085591A (en) 2019-06-06
CN109755154B (en) 2023-06-09
CN109755154A (en) 2019-05-14
TWI681068B (en) 2020-01-01
TW201918575A (en) 2019-05-16

Similar Documents

Publication Publication Date Title
CN110770891B (en) Electrostatic chuck and method of manufacturing the same
TWI754077B (en) Plasma processing device
US8284538B2 (en) Electrostatic chuck device
JP5580760B2 (en) Physical vapor deposition apparatus and method using multi-point clamp
US20120028057A1 (en) Ceramic-metal bonded body and method of producing the same
JP3374033B2 (en) Vacuum processing equipment
KR102353796B1 (en) Electrostatic chuck, placing table, plasma processing apparatus, and method of manufacturing electrostatic chuck
JP2017147278A (en) Substrate mounting table and substrate processing apparatus
JP2010153490A (en) Substrate temperature control fixing apparatus
JP6416261B2 (en) Substrate processing apparatus and substrate processing method
TWI421975B (en) Substrate mounting stand for plasma processing device, plasma processing device, and insulating coating deposition method
TWI643286B (en) Substrate processing apparatus
JP6465948B1 (en) Substrate processing apparatus and film forming apparatus
JP4491363B2 (en) Deposition equipment
US9518326B2 (en) Method for forming an electrostatic chuck using film printing technology
JP2006319192A (en) Electrode and plasma process unit employing it
US10861683B2 (en) Vacuum device
CN104517797B (en) Plasma processing apparatus
KR101128826B1 (en) Atmospheric pressure plasma appartus without cooling system
CN109957752B (en) Substrate processing apparatus, method of controlling the same, film forming apparatus, and method of manufacturing electronic component
JP6708887B2 (en) Plasma processing apparatus, method for manufacturing antenna conductor and/or conductive member
KR20210120291A (en) Focus ring, chuck assembly for securing a substrate and plasma treatment apparatus having the same
JP7017274B2 (en) Manufacturing methods and equipment for electronic components
JP6824520B2 (en) Manufacturing methods and equipment for electronic components
JP6573164B2 (en) Plasma processing equipment

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20171101

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20180910

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20181109

A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20181108

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20181211

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190108

R150 Certificate of patent or registration of utility model

Ref document number: 6465948

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250