JP6446975B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine.

  A gaming machine such as a pachinko machine is provided with a main control device for overall management of games, a sub-control device for controlling sound output based on signals from the main control device, and the like. These control devices have a circuit board provided with a predetermined wiring pattern, and electronic components such as a CPU, a ROM, and a RAM are mounted on the circuit board by surface mounting or the like. As a configuration in which an electronic component is surface-mounted on a circuit board, there is a configuration in which the electronic component is mounted on a socket attached to the circuit board (see, for example, Patent Document 1).

JP 2009-268548 A

  However, when the electronic component is not properly mounted on the socket, there is a concern that the electronic component does not operate normally.

  The present invention has been made in view of the above-described circumstances and the like, and an object thereof is to provide a gaming machine capable of suitably managing a mounting state of an electronic component with respect to a socket.

  Hereinafter, means for solving the above problems will be described.

The present invention
An electronic component having a package is mounted on the circuit board by being mounted on a socket attached to the circuit board,
A gaming machine in which a plurality of sets of socket terminals of the socket and package terminals of the package that are in contact with the socket terminals so as to be energized are provided, and a plurality of the package terminals are arranged along the plate surface of the package. And
Is configured and the package terminals and a pair of the socket terminals as one component, the component is formed by being more connected, the socket terminal and the package terminals at each of said components It is energized when in contact, an arrangement energized when said package terminal and the socket terminal in at least one of the components is not in contact is interrupted, the electronic against the socket by the state of the energizing With a means that can detect abnormalities in the mounting state of parts,
Storage means for storing information about sound output from sound output means in the electronic component;
When the abnormality is detected and sound is output from the sound output means, abnormality notification is executed, and when the abnormality is detected and sound is not output from the sound output means In addition, notification means for performing abnormality notification in a mode different from the abnormality notification;
Characterized in that it comprises a.

  ADVANTAGE OF THE INVENTION According to this invention, the mounting state of the electronic component with respect to a socket can be managed suitably.

It is a front view which shows the pachinko machine in 1st Embodiment. It is a perspective view which expands and shows the main structures of a pachinko machine. It is a perspective view which expands and shows the main structures of a pachinko machine. It is a front view which shows the structure of a game board. (A), (b) It is explanatory drawing for demonstrating the display content on the display surface of a symbol display apparatus. It is a block diagram which shows the electric constitution of a pachinko machine. It is explanatory drawing for demonstrating the content of the various counters used for a success or failure lottery. It is a flowchart which shows the main process performed in main MPU. It is a flowchart which shows the timer interruption process performed in main MPU. It is a block diagram which shows the electrical structure which concerns on execution control of production. (A) is explanatory drawing for demonstrating the data structure of direct ROM, (b) is explanatory drawing for demonstrating the data structure of common ROM. FIG. 3 is a perspective view around a common ROM. It is a figure which shows common ROM and a socket. It is a figure which shows a 1st detection circuit and a 2nd detection circuit. It is a figure which shows each circuit of common ROM and a circuit board about a 1st detection circuit and a 2nd detection circuit. It is a figure in case a common ROM is in an appropriate position. It is a figure in case a common ROM exists in a 1st detachment position. It is a figure in case a common ROM exists in a 2nd removal position. It is a flowchart which shows the presentation control process performed in sub MPU. It is a flowchart which shows operation | movement in the sound data processing part provided in sound output LSI. It is a flowchart which shows the ROM position shift corresponding | compatible process performed by sub MPU. It is a figure which shows common ROM and socket in 2nd Embodiment. It is a figure which shows a 3rd detection circuit and a 4th detection circuit. It is a figure which shows the circuit of a circuit board about a 3rd detection circuit and a 4th detection circuit. It is a figure in case a common ROM is in an appropriate position. It is a figure in case a common ROM is in an allowable position. It is a figure in case a common ROM is in a non-permitted position. It is a figure when illegal ROM is forcibly installed in the socket. It is a figure when illegal ROM is forcibly installed in the socket. It is a flowchart which shows the ROM position shift corresponding | compatible process performed by sub MPU. It is a figure which shows common ROM and socket in 3rd Embodiment. It is a figure which shows each circuit of common ROM and a circuit board about a 5th detection circuit. It is a figure in case a common ROM is in an appropriate position. It is a figure in case ROM for common exists in the 3rd separation position. It is a figure which shows common ROM and socket in 4th Embodiment. It is a figure which shows each circuit of common ROM and a circuit board about a 6th detection circuit. It is a figure in case a common ROM is in an appropriate position. It is a figure in case a common ROM is in an allowable position. It is a figure when illegal ROM is forcibly installed in the socket.

<First Embodiment>
Hereinafter, a first embodiment of a pachinko gaming machine (hereinafter referred to as “pachinko machine”), which is a type of gaming machine, will be described in detail with reference to the drawings. FIG. 1 is a front view of the pachinko machine 10, and FIGS. 2 and 3 are perspective views showing an unfolded main configuration of the pachinko machine 10. In FIG. 2, the configuration in the game area of the pachinko machine 10 is omitted for convenience.

  The pachinko machine 10 includes an outer frame 11 that forms an outer shell of the pachinko machine 10, and a gaming machine main body 12 that is attached to the outer frame 11 so as to be rotatable forward. The outer frame 11 is configured by connecting wooden plates to four sides and has a rectangular frame shape. The pachinko machine 10 is installed in the game hall by attaching and fixing the outer frame 11 to the island facility.

  The gaming machine main body 12 includes an inner frame 13, a front door frame 14 disposed in front of the inner frame 13, and a back pack unit 15 disposed behind the inner frame 13. The inner frame 13 of the gaming machine main body 12 is supported so as to be rotatable with respect to the outer frame 11. Specifically, the inner frame 13 can be rotated forward with the left side as a rotation base end side and the right side as a rotation front end side in front view.

  As shown in FIG. 2, the front door frame 14 is rotatably supported on the inner frame 13, and can be rotated forward with the left side as a rotation base end side and the right side as a rotation front end side in a front view. It is said that. Further, as shown in FIG. 3, a backpack unit 15 is rotatably supported on the inner frame 13, and when viewed from the front, the left side is the rotation base end side and the right side is the rotation front end side. It is possible to move.

  As shown in FIG. 3, the gaming machine main body 12 is provided with a locking device 16 at its rotating tip, and the gaming machine main body 12 is locked to the outer frame 11 so that it cannot be opened. And has a function of locking the front door frame 14 to the inner frame 13 so that the front door frame 14 cannot be opened. Each of these locked states is released by performing an unlocking operation using the unlocking key on the cylinder lock 17 that is exposed on the front surface of the pachinko machine 10.

  Next, the configuration of the front side of the gaming machine body 12 will be described.

  The inner frame 13 is mainly composed of a resin base 21 whose outer shape is substantially the same as that of the outer frame 11. A substantially elliptical window hole 23 is formed at the center of the resin base 21. A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and a game area formed on the front surface of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 of the resin base 21.

  Here, the structure of the game board 24 is demonstrated based on FIG. FIG. 4 is a front view of the game board 24.

  The game board 24 is formed with a plurality of large and small openings penetrating in the front-rear direction by being subjected to router processing. Each opening is provided with a general winning port 31, a variable winning device 32, an upper operating port 33, a lower operating port 34, a through gate 35, a variable display unit 36, a main display unit 43, an accessory display unit 44, and the like. ing.

  When a ball enters the general winning port 31, the variable winning device 32, the upper operating port 33, and the lower operating port 34, it is detected by a detection sensor (not shown) disposed on the back side of the game board 24, Based on the detection result, a predetermined number of prize balls are paid out. In this case, when a ball enters the upper working port 33 and when a ball enters the lower working port 34, the payout of three prize balls is executed. When it occurs, 10 prize balls are paid out, and when a prize is entered into the variable winning device 32, 15 prize balls are paid out. However, the number of these prize balls is arbitrary. For example, the number of prize balls in both the operation holes 33, 34 is larger than the number of prize balls in the lower action opening 34 than the number of prize balls in the upper action opening 33. It may be different. Further, the number of winning balls related to the variable winning device 32 is not limited to a configuration that is larger than the number of other winning balls, and may be configured to be smaller than the number of winning balls related to the general winning opening 31, for example.

  In addition, an out port 37 is provided at the lowermost part of the game board 24, and game balls that have not entered various winning ports etc. are discharged from the game area through the out port 37. In addition, the game board 24 is provided with a large number of nails 38 and various members such as a windmill in order to appropriately distribute and adjust the falling direction of the game ball.

  Here, the entry ball means that the game ball passes through a predetermined opening, and is not only a mode of being discharged from the game area after passing through the opening, but is discharged from the game area after passing through the opening. Embodiments that are not included are also included. However, in the following description, in order to clearly distinguish the game ball from entering the out port 37, the general winning port 31, the variable winning device 32, the upper operating port 33, the lower operating port 34, or the through gate 35 are entered. The entry of a game ball is also expressed as a prize.

  The upper operating port 33 and the lower operating port 34 are unitized as an operating port device and are installed in the game board 24. Both the upper working port 33 and the lower working port 34 are opened upward. Further, both the operation ports 33 and 34 are arranged in the vertical direction so that the upper operation port 33 is on the upper side. The lower working port 34 is provided with an electric accessory 34a as a guide piece made up of a pair of left and right movable pieces.

  The electric combination 34a is connected to an electric combination driving unit 34b mounted on the back side of the game board 24, and is driven by the electric combination driving unit 34b and arranged in either a closed state or an open state. . In the closed state of the electric accessory 34a, the game ball cannot be won in the lower operation port 34, and when the electric accessory 34a is in the open state, it is possible to win the lower operation port 34.

  However, the present invention is not limited to this, and there is a motorized state in which a winning of a game ball to the lower working port 34 is likely to occur and a state in which a winning is less likely to occur than a state in which winning is not impossible but is likely to occur. It is good also as a structure by which the accessory 34a is switched. Further, the electric accessory 34a may be omitted, and switching between a state in which a winning is likely to occur and a state in which a winning is less likely to occur is performed by the displacement of the lower operation port 34 itself.

  The variable winning device 32 is provided with a large winning opening (not shown) that leads to the back side of the game board 24 and an open / close door 32a that opens and closes the large winning opening. The open / close door 32a is connected to a variable prize driving unit 32b provided integrally as the variable prize device 32, and is driven by the variable prize driving unit 32b to be arranged in either a closed state or an open state. Specifically, the game ball is normally closed so that it cannot win, and the game ball can be switched to an open state in which the game ball can win when it is elected to shift to the opening / closing execution mode in the internal lottery. By the way, the opening / closing execution mode is a mode that is shifted to when a big win or a special loss occurs. Note that, in the closed state, winning may not be impossible, but it may be configured such that winning is less likely to occur than in the open state.

  In the main display unit 43, the display of the variation of the picture is performed with the winning at the upper working port 33 or the lower working port 34 as a trigger, and as a result of stopping the variation display, the winning to the upper working port 33 or the lower working port 34 is achieved. The result of the internal lottery performed based on the display is clearly shown. In other words, in this pachinko machine 10, the winning to the upper working port 33 and the winning to the lower working port 34 are not distinguished in the internal lottery, and are performed based on the winning to the upper working port 33 or the lower working port 34. The result of the internal lottery is displayed on the main display unit 43 which is a common display area. When the result of the internal lottery based on the winning to the upper operating port 33 or the lower operating port 34 is a winning result corresponding to the shift to the opening / closing execution mode, a predetermined stop result is displayed on the main display unit 43. After the display and the change display are stopped, the mode shifts to the opening / closing execution mode.

  The main display unit 43 is configured by a segment display in which a plurality of segment light emitting units are arranged in a predetermined manner, but is not limited to this, and is not limited to a liquid crystal display device, an organic EL display device, You may be comprised by other types of display apparatuses, such as CRT or a dot matrix display. In addition, as a pattern variably displayed on the main display unit 43, a configuration in which a plurality of types of characters are variably displayed, a configuration in which a plurality of types of symbols are variably displayed, a configuration in which a plurality of types of characters are variably displayed, or a plurality A configuration in which the color of the seed is switched and displayed can be considered.

  In the accessory display unit 44, the display of the variation of the picture is performed with the winning to the through gate 35 as a trigger, and the result of the internal lottery performed based on the winning to the through gate 35 is displayed as a result of stopping the variation display. Explicit by display. If the result of the internal lottery based on the winning to the through gate 35 is a winning result corresponding to the transition to the state where the electric role is opened, a predetermined stop result is displayed on the accessory display unit 44 and displayed in a variable manner. After is stopped, it shifts to the electric utility open state. In the electric combination open state, the electric combination 34a provided in the lower working port 34 is opened in a predetermined manner.

  The variable display unit 36 is provided with a symbol display device 41 for variably displaying a symbol which is a kind of symbol, and a center frame 42 is provided so as to surround the symbol display device 41. The symbol display device 41 is configured as a liquid crystal display device including a liquid crystal display, and display contents are controlled by a display control device described later. The symbol display device 41 is not limited to a liquid crystal display device, and may be another display device having a display screen such as a plasma display device, an organic EL display device, or a CRT, and a dot matrix display. It may be a vessel.

  In the symbol display device 41, the variation display of the symbol is started based on winning in the upper working port 33 or the lower working port 34. That is, when variable display is performed on the main display unit 43, variable display is performed on the symbol display device 41 accordingly.

  The display contents of the symbol display device 41 will be described in detail with reference to FIG. FIG. 5 is a diagram showing the display surface G of the symbol display device 41.

  Although illustration is omitted, a symbol which is a kind of symbol is composed of nine types of main symbols each having numerals “1” to “9” and sub-patterns composed of shell-shaped symbols. . More specifically, the main symbols are configured by attaching numbers “1” to “9” to nine types of character symbols such as octopus.

  As shown in FIG. 5A, on the display surface G of the symbol display device 41, three symbol rows Z1, Z2, and Z3 of an upper stage, a middle stage, and a lower stage are set as a plurality of display areas. Each of the symbol rows Z1 to Z3 includes a main symbol and a sub symbol arranged in a predetermined order. Specifically, nine types of main symbols “1” to “9” are arranged in descending order of numbers in the upper symbol row Z1, and one sub symbol is arranged between each main symbol. . In the lower symbol row Z3, nine types of main symbols “1” to “9” are arranged in ascending numerical order, and one sub symbol is arranged between the main symbols.

  That is, the upper symbol row Z1 and the lower symbol row Z3 are composed of 18 symbols. On the other hand, in the middle symbol row Z2, nine types of main symbols “1” to “9” are arranged in ascending numerical order, and then between the main symbol “9” and the main symbol “1”. In addition, a main symbol “4” is additionally arranged, and one sub symbol is arranged between each main symbol. In other words, only the middle symbol row Z2 is composed of 20 symbols by arranging 10 main symbols.

  As shown in FIG. 5B, on the display surface G, three symbols are stopped and displayed for each symbol row, and as a result, a total of nine symbols of 3 × 3 are stopped and displayed. It is like that. On the display surface G, five effective lines, that is, a left line L1, a middle line L2, a right line L3, a right lowering line L4, and a right uppering line L5 are set.

  When a game-turning effect is performed on the display surface G based on winning at the upper operating port 33 or the lower operating port 34, the symbols in the symbol rows Z1 to Z3 are scrolled in a predetermined direction with periodicity. The variable display is started. Then, the display is switched from the variable display to the standby display in the order of the upper symbol row Z1 → the lower symbol row Z3 → the middle symbol row Z2, and finally the game is used in a state where a predetermined symbol is statically displayed in each of the symbol rows Z1 to Z3. The production of is ended.

  In addition, when the effect for the game round ends, if it is a game round corresponding to the occurrence of a highly accurate big hit result, which will be described later, a combination of symbols in which the same odd number is attached to any active line is formed. In the game times corresponding to the occurrence of a low probability winning result to be described later, a combination of symbols in which the same even number is attached to any one of the active lines is formed. The contents of each jackpot result will be described later.

  In addition, based on the winning in one of the operation ports 33 and 34, the main display unit 43 and the symbol display device 41 start the variable display, until a predetermined stop result is displayed and the variable display is stopped. It corresponds to one game time.

  Further, the variation display mode of the symbol in the symbol display device 41 is not limited to the above, and is arbitrary, such as the number of symbol columns, the direction of symbol variation display in the symbol column, the number of symbols in each symbol column, etc. Can be appropriately changed. Also, the pattern that is variably displayed on the symbol display device 41 is not limited to the above-described pattern, and for example, only numbers may be variably displayed as the pattern.

  As shown in FIG. 4, a first hold light emitting portion (first hold lamp portion) 45 corresponding to the main display portion 43 and the symbol display device 41 is provided in the upper left portion on the front side of the center frame 42. The maximum number of game balls won in the upper operating port 33 or the lower operating port 34 is reserved, and the reserved number is displayed when the first holding light emitting unit 45 is turned on.

  In the upper right part of the center frame 42, a second reserved light emitting unit (second reserved lamp unit) 46 corresponding to the accessory display unit 44 is provided. The number of times that the game ball has passed through the through gate 35 is held up to 4 times, and the number of the held balls is displayed by turning on the second holding light emitting unit 46. In addition, it is good also as a structure by which the function of each holding | maintenance light emission part 45 and 46 is fulfill | performed by the display in the one part area | region of the symbol display apparatus 41. FIG.

  An inner rail portion 48 and an outer rail portion 49 are attached to the game board 24, and a guide rail is constituted by the inner rail portion 48 and the outer rail portion 49, and a game launched from the game ball launching mechanism 51. A ball is guided to the upper part of the game area. As shown in FIG. 2, the game ball launching mechanism 51 is attached below the window hole 23 in the resin base 21, and is stored in a launch rail 52 extending toward the guide rail and an upper plate 61a described later. A ball feeding device 53 that supplies game balls onto the launch rail 52 and a solenoid 54 that is an electric actuator that launches the game balls supplied onto the launch rail 52 toward the guide rail are provided. By operating a firing handle 55 provided on the front door frame 14, the solenoid 54 is driven and controlled, and a game ball is launched.

  A front door frame 14 is provided so as to cover the entire front side of the inner frame 13. As shown in FIG. 1, the front door frame 14 is formed with a window portion 56 so that almost the entire gaming area can be viewed from the front. The window part 56 has a substantially elliptical shape, and a window panel 57 is fitted therein. The window panel 57 is colorless and transparent formed of glass, but is not limited thereto, and may be formed colorless and transparent of synthetic resin, and the game area is visually recognized through the window panel 57 from the front of the pachinko machine 10. If possible, it may be colored and transparent.

  Around the window portion 56, light emitting means such as various lamp portions are provided. A display lamp part 58 is provided above the window part 56 as a part of various lamp parts.

  Below the window portion 56 in the front door frame 14, an upper bulging portion 61 and a lower bulging portion 62 bulging toward the front side are arranged in parallel. An upper plate 61 a that opens upward is provided inside the upper bulging portion 61, and a lower plate 62 a that also opens upward is provided inside the lower bulging portion 62. The upper plate 61a has a function of temporarily storing game balls paid out from a payout device described later and guiding them to the game ball launching mechanism 51 side while aligning them in a line. In addition, the lower tray 62a has a function of storing game balls that become surplus in the upper tray 61a.

  The pachinko machine 10 includes a speaker unit 90 provided on the upper part of the pachinko machine 10. The speaker unit 90 can output sounds such as production sounds and notification sounds (audible sounds including voice messages). The effect sound is a sound that can enhance the effect during the game, and examples of the effect sound include a melody according to the effect and a sound effect according to the game state. Examples of the notification sound include a guidance sound that informs the player of the state of the pachinko machine 10, and a fraud occurrence sound that informs the hall manager of the fraud.

  One speaker unit 90 is provided at each corner near the upper side of the front door frame 14. Each speaker unit 90 includes a speaker 91 (see FIG. 2) as sound output means for outputting sound when a sound signal is input, and a speaker cover 92 that covers the speaker 91 from the front side of the pachinko machine. Yes. The speaker cover 92 forms part of the front surface of the front door frame 14, and each speaker 91 is disposed on the back surface side of the speaker cover 92. In this case, the right speaker 91 and the left speaker 91 are paired.

  A plurality of holes (not shown) penetrating in the thickness direction are formed in the speaker cover 92, and sound output from the speaker 91 is transmitted to the front of the pachinko machine 10 through the holes of the speaker cover 92. Note that the speaker cover 92 may be configured to transmit sound even if the speaker cover 92 does not have a hole for transmitting sound.

  Next, the configuration on the back side of the gaming machine main body 12 will be described.

  As shown in FIG. 3, on the back of the inner frame 13 (specifically, the game board 24), a main control device 71 for controlling the main game, and voice and lamp display and a display control device (not shown) are controlled. An informing / production control device 72 is installed.

  In addition, you may provide the trace structure for giving the trace means for leaving the trace of the opening | release to the board | substrate box 71a of the main control apparatus 71, or leaving the trace of the open | release. As the trace means, a plurality of case bodies constituting the substrate box 71a are unseparably coupled, and a configuration of a coupling portion (caulking portion) that requires destruction of a predetermined part at the time of separation, or an adhesive layer is bonded when peeled off A configuration is conceivable in which a seal seal that leaves a trace of being peeled off by being left is attached so as to straddle the boundary between a plurality of case bodies. Moreover, as a trace structure, the structure which apply | coats an adhesive agent with respect to the boundary between the some case bodies which comprise the board | substrate box 71a can be considered. In addition, you may provide such a trace structure in the board | substrate box of the payout control apparatus 78 mentioned later.

  The back pack unit 15 is installed so as to cover the back side of the inner frame 13 including the main control device 71 and the notification / production control device 72. The back pack unit 15 includes a back pack 73 formed of a synthetic resin having transparency, and a payout mechanism 74 and a control device assembly unit 75 are attached to the back pack 73.

  The payout mechanism unit 74 includes a tank 76 in which game balls supplied from island facilities of the game hall are sequentially replenished, and a payout device 77 for paying out game balls stored in the tank 76. The game balls paid out from the payout device 77 are discharged to the upper plate 61a or the lower plate 62a through a payout passage provided on the downstream side of the payout device 77. The payout mechanism 74 is provided with a back pack substrate having a power switch for turning on and off the power supply, for example, while supplying a main power of AC 24 volts.

  The control device assembly unit 75 generates and outputs a predetermined power required by a payout control device 78 having a function of controlling the payout device 77 and various control devices and the like, and a game associated with the operation of the launch handle 55 by the player A power supply and launch control device 79 for controlling the launch of the ball. The payout control device 78 and the power supply / launch control device 79 are arranged so as to overlap each other so that the payout control device 78 is located behind the pachinko machine 10.

  The back pack 73 is provided with an external terminal plate 81 in addition to the payout mechanism 74 and the control device assembly unit 75. The external terminal plate 81 is installed at the upper corner of the back pack unit 15 on the back side of the pachinko machine 10 and on the upper corner. The external terminal board 81 is a board for outputting a predetermined signal so that the management computer of the game hall recognizes the state of the pachinko machine 10.

<Electrical configuration>
Next, the electrical configuration of the pachinko machine 10 will be described based on the block diagram of FIG.

  The main control device 71 includes a main control board 121 that manages the main control of the game, and a power failure monitoring board (power interruption monitoring board) 125 that monitors the power supply. A main MPU 122 is mounted on the main control board 121. The main MPU 122 includes a ROM 123 and an RWM 124 in addition to a CPU that is a central processing unit including a control unit and a calculation unit.

  The ROM 123 is configured to use, as a read-only memory, a memory that does not require external power supply for storing and holding, such as a NOR flash memory and a NAND flash memory. The ROM 123 stores various control programs executed by the main MPU 122 and fixed value data.

  The RWM 124 is configured to use a memory (that is, a volatile storage unit) that requires an external power supply for storage and holding, such as SRAM and DRAM, for both reading and writing. The time required for reading is faster than that of the ROM 123 when compared with the data capacity. The RWM 124 temporarily stores various data and the like when executing the control program stored in the ROM 123.

  The main MPU 122 or the main control board 121 is provided with an interrupt circuit, a timer circuit, a data input / output circuit, and the like. Note that it is not essential that the ROM 123 and the RWM 124 are made into one chip with respect to the main MPU 122, and each may be made into a chip individually.

  The main MPU 122 is provided with an input port and an output port. On the input side of the main MPU 122, a power failure monitoring board 125, a payout control device 78, various winning detection sensors 126a to 126h, and the like are connected. A power supply and launch control device 79 is connected to the power failure monitoring board 125, and power is supplied to the main MPU 122 via the power failure monitoring board 125.

  Further, the various winning detection sensors 126a to 126h are provided one-to-one with respect to the winning-corresponding winning portions such as the general winning port 31, the variable winning device 32, the upper operating port 33, the lower operating port 34, and the through gate 35. The main MPU 122 makes a winning determination (speech determination) for each winning portion based on the detection results of the various winning detection sensors 126a to 126h. In addition, the main MPU 122 executes a lottery lottery based on a winning at the upper working port 33 or the lower working port 34 and also executes a support lottery based on a winning at the through gate 35.

  On the output side of the main MPU 122, a power failure monitoring board 125, a payout control device 78, and a notification / production control device 72 are connected. For example, a prize ball command is output to the payout control device 78 based on the winning determination result for the above-mentioned winning part. Various commands such as a change command, a type command, a final stop command, an opening command, and an ending command are output to the notification / production control device 72.

  Further, on the output side of the main MPU 122, a variable prize driving unit 32b for opening / closing the opening / closing door 32a of the variable prize winning device 32, an electric combination driving unit 34b for opening / closing the electric combination 34a of the lower working port 34, a main display. The unit 43 and the accessory display unit 44 are connected. The main control board 121 is provided with various driver circuits, and the main MPU 122 executes drive control of various drive units through the driver circuits. Although not shown in the figure, the main MPU 122 also performs light emission control of the first reserved light emitting unit 45 and the second reserved light emitting unit 46.

  The power failure monitoring board 125 relays between the main control board 121 and the power supply and launch control device 79, and monitors a DC stable voltage of 24 volts, which is the maximum voltage output from the power supply and launch control device 79. The payout control device 78 performs payout control of prize balls and rental balls by the payout device 77 based on the prize ball command input from the main control device 71.

  The power source and launch control device 79 is connected to, for example, a commercial power source (external power source) in a game hall or the like. Based on the external power supplied from the commercial power supply, necessary operating power is generated for each of the main control board 121 and the payout controller 78 and the generated operating power is supplied through a predetermined power path. To do. The power supply and launch control device 79 is responsible for launch control of the game ball launch mechanism 51, and drives the game ball launch mechanism 51 based on specifying a predetermined launch operation on the launch handle 55.

  A display lamp unit 58 and a display control device 128 are connected to the notification / production control device 72, and the notification / production control device 72 is based on various commands input from the main control device 71. The display lamp unit 58 and the speaker 91 provided in the display are driven and controlled, and the display control device 128 is controlled. The display control device 128 executes display control of the symbol display device 41 based on the command input from the notification / production control device 72.

<Electrical configuration for performing various lotteries in the main MPU 122>
Next, an electrical configuration for performing various lotteries in the main MPU 122 will be described with reference to FIG.

  In the game, the main MPU 122 uses various counter information to perform jackpot occurrence lottery, setting of display of the main display unit 43, setting of symbol display of the symbol display device 41, setting of display of the accessory display unit 44, etc. Specifically, as shown in FIG. 7, the jackpot random number counter C1 used for the lottery in which the jackpot is generated, the jackpot type counter C2 used for determining the jackpot type, and the symbol display device 41 fluctuate. Reach random number counter C3 used for reach generation lottery, random number initial value counter CINI used for initial value setting of jackpot random number counter C1, and variation type for determining display continuation time in main display unit 43 and symbol display device 41 The counter CS is used. Furthermore, the electric accessory release counter C4 used for the lottery to determine whether or not the electric accessory 34a of the lower working port 34 is in the electric utility open state is used. The counters C1 to C3, CINI, CS, and C4 are provided in the lottery counter area 137a of the RWM 124.

  Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter that adds 1 to the previous value every time it is updated and returns to 0 after reaching the maximum value. Each counter is updated at short intervals. Information corresponding to the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 is stored in a holding storage area 137b as an acquisition information storage means when a winning to the upper working port 33 or the lower working port 34 occurs. Is done.

  The holding storage area 137b includes a holding area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4, and matches the winning history to the upper operating port 33 or the lower operating port 34. The numerical information of the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 is stored in one of the holding areas RE1 to RE4 as holding information.

  In this case, in the first reservation area RE1 to the fourth reservation area RE4, when the winning to the upper operation port 33 or the lower operation port 34 is continuously generated a plurality of times, the first reservation area RE1 → the second reservation area. Each numerical information is stored in time series in the order of RE2 → third reserved area RE3 → fourth reserved area RE4. By providing the four holding areas RE1 to RE4 as described above, up to four game balls winning histories to the upper operating port 33 or the lower operating port 34 are stored on hold.

  Note that the number that can be reserved and stored is not limited to four, but may be any other number such as two, three, or five or more.

  The execution area AE is an area for moving each value stored in the first holding area RE1 of the holding area RE when starting the variable display on the main display unit 43, and at the start of one game round. Based on various numerical information stored in the execution area AE, determination of whether or not is made is performed.

  Each of the counters will be described in detail.

  The jackpot random number counter C1 is configured such that one by one is added in order within a range of 0 to 599, for example, and after reaching the maximum value, returns to 0. In particular, when the jackpot random number counter C1 makes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the jackpot random number counter C1. The random number initial value counter CINI is a loop counter similar to the jackpot random number counter C1 (value = 0 to 599). The big hit random number counter C1 is periodically updated and stored in the holding storage area 137b at the timing when the game ball wins the upper operation port 33 or the lower operation port 34.

  The value of the random number for winning the jackpot is stored as a success / failure table (award / failure information group) in a success / failure table storage area as a success / failure information group storage means in the ROM 123. As the success / failure table, a success / failure table for the low probability mode (low probability success / failure information group) and a high probability mode's success / failure table (high probability success / failure information group) are set. That is, in the present pachinko machine 10, a low probability mode (low probability state) and a high probability mode (high probability state) are set as the lottery mode in the winning lottery means.

  In the gaming state in which the winning / failing table for the low probability mode is referred to at the time of the lottery, the number of random numbers that win the jackpot is two. On the other hand, in the gaming state in which the winning / failing table for the high probability mode is referred to at the time of the lottery, the number of random numbers that will win the jackpot is 20. If the winning probability in the high probability mode is higher than that in the low probability mode, the number of random numbers to be won is arbitrary.

  The jackpot type counter C2 is configured so that 1 is added in order within a range of 0 to 29, and after reaching the maximum value, it returns to 0. The big hit type counter C2 is periodically updated and stored in the holding storage area 137b at the timing when the game ball wins the upper operation port 33 or the lower operation port 34.

  In the pachinko machine 10, a plurality of jackpot results are set. The plurality of jackpot results are (1) a mode of opening / closing control of the variable winning device 32 in the opening / closing execution mode, (2) a lottery mode in the winning lottery means after the opening / closing execution mode ends, and (3) A plurality of jackpot results are set by providing a difference in the three conditions of the support mode in the electric accessory 34a of the operating port 34.

  As an aspect of the opening / closing control of the variable prize winning device 32 in the opening / closing execution mode, it is possible to increase the occurrence frequency of winning in the variable prize winning device 32 between the start and end of the opening / closing execution mode relatively high. A frequency winning mode and a low frequency winning mode are set. Specifically, in any of the high-frequency winning mode and the low-frequency winning mode, the game is executed with a predetermined number of round games as an upper limit.

  Here, the round game means that a predetermined upper limit duration (upper limit duration) elapses or that a predetermined upper limit number of game balls wins a big winning opening of the variable winning device 32. A game that continues until one of these conditions is met. In addition, the number of round games in the opening / closing execution mode triggered by the jackpot result is the same for a fixed number of rounds regardless of the type of jackpot result triggered by the transition. Specifically, the upper limit number of round games is set to 15 rounds (15R) regardless of which jackpot result is obtained.

  In the pachinko machine 10, a plurality of types of opening modes of the variable winning device 32 are set with different opening durations (opening durations) from when the big winning opening is opened until it is closed. ing. Specifically, a long-time mode (long-term mode) set to 29 seconds, which is a long open duration, and a short time set to 0.06 sec, which is a short time shorter than the above-mentioned long time, A mode (short-term mode) is set.

  In the pachinko machine 10, in a situation where the launch handle 55 is operated by the player, the game ball launching mechanism 51 is driven and controlled so that one game ball is launched toward the game area in 0.6 sec. . In the round game, the upper limit number of end conditions is set to nine. Then, in the long time mode among the above open modes, the open duration time is set longer than the product of the game ball firing period and one round game. On the other hand, in the short-time mode, an opening continuation time is set that is shorter than the product of the game ball launch cycle and one round game, more specifically, shorter than the game ball launch cycle. Therefore, when the variable winning device 32 is opened once in a long-time manner, it is expected that the maximum number of winnings in one round game will be generated at the big winning opening. When the variable winning device 32 is opened once in the time mode, it is expected that no winning in the big winning opening occurs or even if a winning occurs.

  In the high-frequency winning mode, the big winning opening is opened once in a round manner in each round game. On the other hand, in the low-frequency winning mode, the large winning opening is opened once in a short time mode in each round game.

  In addition, the number of times of opening / closing the big prize opening in the high frequency winning mode and the low frequency winning mode, the number of round games, the opening duration for one opening, and the upper limit number in one round game are higher in the high frequency winning mode. If the occurrence frequency of winning in the variable winning device 32 is higher than that in the low-frequency winning mode until the opening / closing execution mode starts and ends, the value is not limited to the above value and is arbitrary. is there.

  As a support mode for the electric combination 34a of the lower working port 34, the electric combination 34a of the lower working port 34 is compared when the game ball is continuously being fired in the same manner with respect to the game area. High frequency support mode (high frequency support state or high frequency guide state) and low frequency support mode (low frequency support state or low frequency guide state) so that the frequency of the open state per unit time is relatively high or low. And are set.

  Specifically, in the low-frequency support mode and the high-frequency support mode, the probability of winning the power combination open state in the electric combination release lottery using the electric combination release counter C4 is the same (for example, both 4/5) However, in the high-frequency support mode, the number of times that the electric accessory 34a is opened when the electrified open state is won is set more than in the low-frequency support mode, and one more release is performed. The time is set longer. In this case, in the high frequency support mode, when the electrified open state is selected and the open state of the electric accessory 34a occurs a plurality of times, the closure from the end of one open state until the start of the next open state is performed. The time is set shorter than one opening time. Furthermore, in the high frequency support mode, a shorter time is secured as a minimum secured time after the next electric character opening lottery is performed after the electric character object opening lottery is performed than in the low frequency support mode. Is set to be selected.

  As described above, in the high frequency support mode, there is a higher probability of winning a prize for the lower working port 34 than in the low frequency support mode. In other words, in the low frequency support mode, there is a higher probability that a prize will be given to the upper working port 33 than to the lower working port 34, but in the high frequency support mode, the lower working port 34 is connected to the lower working port 34. The probability of winning a prize increases. When a winning is made to the lower working port 34, a predetermined number of game balls are paid out. Therefore, in the high frequency support mode, the player plays a game while not reducing the number of possessed balls so much. be able to.

  The configuration for increasing the frequency at which the high frequency support mode is set to the power release state per unit time as compared with the low frequency support mode is not limited to the above-described configuration, for example, the electric component release lottery It is good also as a structure which makes high the probability that it will be elected in the electric character open state in. In addition, a secured time (e.g., on the display part 44 for an accessory based on a winning to the through gate 35) that is secured after the next electric character opening lottery is performed after the electric character releasing lottery is performed once. In the configuration in which multiple types of variable display time) are prepared, the short support time is more easily selected in the high frequency support mode or the average secure time is shorter than in the low frequency support mode. May be. Further, the number of times of opening is increased, the opening time is lengthened, and the secured time that is secured when the next electric winning combination opening lottery is performed after the first electric winning combination releasing lottery is shortened (that is, , Shorten the one time variable display time in the display 44 for an accessory), shorten the average time of the reserved time and increase the winning probability, apply any one condition or any combination of conditions Thus, the advantage of the high frequency support mode over the low frequency support mode may be increased.

  The game result distribution destination for the big hit type counter C2 is stored as a distribution table (distribution information group) in a distribution table storage area as a distribution information group storage means in the ROM 123. Then, as such distribution destinations, a low-probability jackpot result (low-probability-specific special game result), a low-winning high-probability jackpot result (explicit high-probability-corresponding game result or a result that becomes suddenly probable), and the most advantageous jackpot result ( High-probability special game result) is set.

  The low probability big hit result is a big hit result in which the open / close execution mode becomes the high-frequency winning mode, and after the open / close execution mode ends, the win / fail lottery mode becomes the low probability mode and the support mode becomes the high frequency support mode. However, the high-frequency support mode shifts to the low-frequency support mode when the number of games reaches the end reference number (specifically, 100 times) after the shift.

  The low-winning high-probability jackpot result is a jackpot result in which the opening / closing execution mode becomes the low-frequency winning mode, and after the opening / closing execution mode ends, the success / failure lottery mode becomes the high probability mode and the support mode becomes the high-frequency support mode. is there. These high-probability mode and high-frequency support mode are continued until the lottery result in the success / failure lottery becomes a big hit state win and shifts to the big win state by that.

  The most advantageous jackpot result is a jackpot result in which the opening / closing execution mode becomes the high-frequency winning mode, and after the opening / closing execution mode ends, the winning / raising lottery mode becomes the high probability mode and the support mode becomes the high-frequency support mode. These high-probability mode and high-frequency support mode are continued until the lottery result in the success / failure lottery becomes a big hit state win and shifts to the big win state by that.

  It should be noted that the normal gaming state in relation to the above gaming states is not the open / close execution mode (special gaming state), but also the state in which the winning / losing lottery mode is the low probability mode and the support mode is the low frequency support mode. . Moreover, it is good also as a structure in which the low prize-winning high probability hit result is not set as a game result.

  In the distribution table, among the values of the big hit type counter C2 of “0 to 29”, “0 to 9” corresponds to the low probability big hit result, and “10 to 14” corresponds to the low winning high probability big hit result. “15 to 29” corresponds to the most favorable jackpot result.

  As a kind of high-accuracy big hit result, the open / close execution mode becomes the low-frequency winning mode, and after the open / close execution mode ends, the winning lottery mode becomes the high probability mode, and the support mode is maintained in the previous mode. An implicit low winning high probability jackpot result (a game result corresponding to an implicit high probability or a result of a latent probability changing state) may be included. In this case, the jackpot result can be further diversified.

  Furthermore, as a kind of losing result in the winning / losing lottery, there may be included a special losing result that shifts to the opening / closing execution mode of the low-frequency winning mode and that does not shift to the winning / losing lottery mode and the support mode after the completion. . In the configuration in which both the above-mentioned non-explicit low winning high probability winning result and the special outlier result are set, the opening / closing execution mode shifts to the low frequency winning mode, and the support mode is changed to the previous mode. It is common to be maintained in the mode, but the transition mode of the winning / failing lottery mode is different, so that, for example, in the normal gaming state, one of the unclear low winning high probability winning result or the special outage result When it occurs, it is possible to make the player predict which result it actually corresponds to.

  For example, the reach random number counter C3 is incremented one by one within a range of 0 to 238, for example, and reaches a maximum value and then returns to 0. The reach random number counter C3 is periodically updated and stored in the holding storage area 137b at the timing when the game ball wins the upper operation port 33 or the lower operation port 34.

  Here, in the pachinko machine 10, reach display is set as a kind of display effect in the symbol display device 41. The reach display includes a symbol display device 41 capable of performing variable display (or variable display) of symbols (patterns), and variable display in game times in which the opening / closing execution mode of the variable winning device 32 is the high-frequency winning mode. In the gaming machine in which the subsequent stop display result is a special display result, the stage before the stop display result is derived and displayed after the variable display (or variable display) of the symbol (picture) in the symbol display device 41 is started, This means a display state for making the player think that a variable display state is likely to result in a special display result.

  In the reach display, a combination of jackpot symbols corresponding to the occurrence of the high-frequency winning mode is obtained by stopping and displaying symbols for some of the symbol rows displayed on the display screen of the symbol display device 41. A display state is displayed in which combinations of reach symbols that may be established are displayed, and in that state, symbols in the remaining symbol rows are displayed in a variable manner. In addition, in the state where the combination of reach symbols is displayed as described above, the variation display of symbols is performed in the remaining symbol columns, and a reach effect is performed by displaying a predetermined character or the like as a moving image in the background image. In addition, there are those that perform a reach effect by displaying a predetermined character or the like as a moving image on substantially the entire display screen after reducing or not displaying a combination of reach symbols.

  The reach display is executed regardless of the value of the reach random number counter C3 in the game times that shift to the opening / closing execution mode that becomes the high-frequency winning mode. In the game times that do not shift to the opening / closing execution mode, the reach random number counter C3 obtained at a predetermined timing is referred to the reach table stored in the reach table storage area of the ROM 123 in response to the occurrence of the reach display. It is executed when

  The variation type counter CS is, for example, incremented by 1 within a range of 0 to 198, and returns to 0 after reaching the maximum value. The variation type counter CS is used when the main MPU 122 determines the variation display time (display duration) on the main display unit 43 and the symbol variation display time (display duration) on the symbol display device 41. The variation type counter CS is updated in each of a main process and a timer interrupt process, which will be described later. The variation type counter CS is used for determining a variation pattern at the start of variation display in the main display unit 43 and at the time of variation variation of the symbol by the symbol display device 41. The value of CS is acquired. In determining the variable display time, the variable display time table (variable display time information group) stored in advance in the variable display time table storage area (variable display time information storage means) of the ROM 123 is referred to.

  The electric accessory release counter C4 is, for example, configured to increment one by one within a range of 0 to 250 and return to 0 after reaching the maximum value. The electric accessory release counter C4 is periodically updated and stored in an electric accessory reservation area 137c provided in the RWM 124 at a timing when a game ball wins the through gate 35. Then, at a predetermined timing, a lottery is performed as to whether or not to control the electric accessory 34a to the open state based on the value of the stored electric accessory release counter C4.

<Various types of processing executed by the main MPU 122>
Next, each process performed in order to advance a game in main MPU122 is demonstrated. The processing of the main MPU 122 is roughly classified into main processing that is started when the power is turned on and timer interrupt processing that is periodically started.

<Main processing>
First, the main process will be described with reference to the flowchart of FIG.

  First, in step S101, power-on wait processing is executed. In the power-on wait process, for example, the process waits without progressing to the next process until 1 sec elapses after the main process is activated. In the subsequent step S102, access to the RWM 124 is permitted, and in step S103, the internal function register of the main MPU 122 is set.

  Thereafter, in step S104, it is determined whether or not the RWM deletion switch provided in the power supply and launch control device 79 is manually operated. In subsequent step S105, whether or not the power failure flag of the RWM 124 is set to “1” is determined. Determine whether. In step S106, a checksum calculation process for calculating a checksum is executed. In subsequent step S107, whether or not the checksum matches the checksum stored when the power is turned off, that is, the validity of the stored data is checked. judge.

  In the pachinko machine 10, for example, when the RWM data is initialized when the power is turned on, such as when the game hall is started, the power is turned on while the RWM erase switch is pressed. Therefore, if the RWM erase switch is pressed, the process proceeds to step S108. Similarly, when the information on occurrence of power shutdown is not set, or when an abnormality of data stored and held is confirmed by the checksum, the process proceeds to step S108. In step S108, the RWM 124 is cleared as initialization of the RWM 124. Thereafter, the process proceeds to step S109.

  On the other hand, if the RWM erase switch has not been pressed, “1” is set in the power failure flag and the checksum is normal, and the process of step S109 is not executed without executing the process of step S108. Proceed to In step S109, a power-on setting process is executed. In the power-on setting process, a predetermined area of the RWM 124 such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current gaming state is notified to the notification / production control device 72 in order to recognize the current gaming state. Send. Also, a payout initialization command indicating that the RWM initialization of the payout control device 78 should be executed is transmitted to the payout control device 78. Furthermore, an interrupt permission is set to permit the generation of timer interrupt processing.

  Then, it progresses to the residual process of step S110-step S113. That is, the main MPU 122 is configured to periodically execute the timer interrupt process, but a remaining time is generated between one timer interrupt process and the next timer interrupt process. The remaining time varies depending on the processing completion time of each timer interrupt process, but the remaining processes in steps S110 to S113 are repeatedly executed using such irregular time. In this regard, it can be said that the remaining processes in steps S110 to S113 are non-periodic processes that are performed irregularly.

  In the remaining process, first, in step S110, an interrupt prohibition setting is performed to prohibit the generation of the timer interrupt process. In the subsequent step S111, a random number initial value update process for updating the random number initial value counter CINI is executed, and a fluctuation counter update process for updating the fluctuation type counter is executed in step S112. In these update processes, the current numerical information is read from the corresponding counter of the RWM 124, the process of adding 1 to the read numerical information is executed, and then the process of overwriting the reading source counter is executed. In this case, each counter value is cleared to “0” when it reaches the maximum value. Thereafter, in step S113, an interrupt permission setting for switching from a state in which the generation of the timer interrupt process is prohibited to a state in which the timer interrupt process is permitted is performed. If the process of step S113 is performed, it will return to step S110 and will repeat the process of step S110-step S113.

<Timer interrupt processing>
Next, timer interrupt processing will be described with reference to the flowchart of FIG.

  Here, a hardware configuration for periodically executing timer interrupt processing in the main MPU 122 will be described. The main control board 121 is provided with a clock circuit as pulse signal output means for outputting a pulse signal at a predetermined cycle, and further divided so as to exist in the middle of the signal path between the clock circuit and the main MPU 122. A circuit is provided.

  The frequency dividing circuit functions as frequency changing means for changing the cycle of the pulse signal from the clock circuit, and is configured to output a pulse signal for specifying the start timing of the timer interrupt processing by the main MPU 122. In other words, the pulse signal is supplied from the frequency dividing circuit to the main MPU 122 at intervals of a 4 msec period which is a specific period. The main MPU 122 executes a process for confirming the occurrence of a specific signal form such as the rise or fall of the pulse signal, and activates the timer interrupt process with at least one condition confirming the occurrence of the specific signal form. Run.

  In this case, when the occurrence of the specific signal form is confirmed in the situation where the start of timer interrupt processing is prohibited, the timer is changed when the interrupt is permitted from the state where the interrupt is prohibited. Interrupt processing is started. That is, depending on the execution status of the process in the main MPU 122, the next timer interrupt process may start after 4.1 msec from the start of the previous timer interrupt process. This timer interrupt process is started after 3.9 msec from the start of the immediately preceding timer interrupt process.

  However, since the output of the pulse signal from the frequency dividing circuit is performed at a specific cycle of 4 msec regardless of the progress of processing in the main MPU 122, the timer interrupt processing is basically started at a specific cycle. Furthermore, the processing configuration of the main MPU 122 is such that the timer interrupt process at a predetermined timing is started after a period exceeding a specific period since the previous timer interrupt process was started. The timer interrupt process at the timing absorbs the part exceeding the specific period, and the timer interrupt process at the next timing is set to be started at the timing when the input of the pulse signal is confirmed.

  In the timer interrupt process, first, a power failure information storage process is executed in step S201. In the power outage information storage process, it is monitored whether or not a power outage signal corresponding to the occurrence of power interruption is received from the power outage monitoring board 125, and when the occurrence of a power outage is specified, the process during power outage is executed.

  In subsequent step S202, a lottery random number update process is executed. In the lottery random number update process, the big hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the electric accessory release counter C4 are updated. Specifically, after executing the process of sequentially reading the current numerical information from the jackpot random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the electric accessory release counter C4, and adding 1 to each of the read numerical information Then, a process of overwriting the reading source counter is executed. In this case, each counter value is cleared to “0” when it reaches the maximum value.

  Thereafter, in step S203, the random number initial value update process is executed in the same manner as in step S111, and in step S204, the variation counter update process is executed in the same manner as in step S112. In a succeeding step S205, a game stop determination process is executed. In the game stop determination process, it is monitored whether or not the progress of the game is to be stopped. If the progress of the game is to be stopped, the execution of the process for progressing the game is stopped.

  Thereafter, in step S206, it is determined whether or not the progress of the game is stopped, and the processing after step S207 is executed on the condition that the progress of the game is not stopped.

  In step S207, port output processing is executed. In the port output process, when output information is set in the previous timer interrupt process, a process for performing output corresponding to the output information to the various drive units 32b and 34b is executed. For example, when the information for switching the large winning opening of the variable winning device 32 to the open state is set, the output of the drive signal to the variable winning drive unit 32b is started and the information to be switched to the closed state is set. If so, output of the drive signal is stopped. When the information for switching the electric accessory 34a of the lower working port 34 to the open state is set, the output of the drive signal to the electric accessory driving unit 34b is started, and the information to be switched to the closed state is set. If so, the output of the drive signal is stopped.

  In a succeeding step S208, a reading process is executed. In the reading process, signals other than the power failure signal and the winning signal are read, and the read information is stored for use in future processing.

  In subsequent step S209, a winning detection process is executed. In the winning detection process, signals received from the winning detection sensors 126a to 126h are read, and the general winning port 31, the large winning port of the variable winning device 32, the upper operating port 33, the lower operating port 34, and the through gate 35 are displayed. A process for specifying whether or not a prize has been won is executed.

  In the subsequent step S210, timer update processing for updating the numerical information of a plurality of types of timer counters provided in the RWM 124 is executed. In this case, the timer counter that is updated by subtracting the stored numerical information is handled in an integrated manner. However, both the updating of the subtracting timer counter and the updating of the adding timer counter are performed collectively. It is good also as a structure.

  In subsequent step S211, a fraud detection process for monitoring whether or not a predetermined event set as a fraud monitoring target has occurred is executed. In the fraud detection process, by monitoring the occurrence of a plurality of types of events and confirming that a predetermined event has occurred, the game stop setting is made in step S205 in the next timer interrupt process, An affirmative determination is made in step S206.

  In the subsequent step S212, a launch control process for controlling the launch of the game ball is executed. In a situation where the launch operation is continued for the launch handle 55, as described above, one game ball is launched at a predetermined launch period of 0.6 sec.

  In the subsequent step S213, as the input state monitoring process, based on the information read in the reading process in step S208, the disconnection confirmation of the winning detection sensors 126a to 126h and the opening confirmation of the gaming machine main body 12 and the front door frame 14 are confirmed. Do.

  In the subsequent step S214, special figure special electric control processing for performing execution control of game times and execution control of the opening / closing execution mode is executed. In the special figure special electric power control process, when a winning to the upper operating port 33 or the lower operating port 34 occurs in a situation where the number of the holding information stored in the holding storage area 137b is less than the upper limit number, A process of storing the numerical information of the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 as hold information in the hold storage area 137b in time series is executed. Also, in the special figure special electric control process, whether or not the hold information corresponds to the big win is determined on the condition that the hold information is not stored during the game rotation and the opening / closing execution mode and is stored. If it corresponds to the process and the jackpot winning, a distribution determination process for determining which jackpot result the hold information corresponds to is executed. In addition, in the special figure special power control process, not only the success / failure determination process and the distribution determination process, but if the hold information does not correspond to the big win, whether the hold information corresponds to the occurrence of reach. A reach determination process is performed, and a duration selection process for selecting the duration of the game times using the numerical information of the variation type counter CS at that time is executed. Then, the variation command including the duration information according to the result of each process and the type command including the game result information are transmitted to the notification / production control device 72, and the pattern on the main display unit 43 is displayed. Start the variable display. As a result, one game is started, and an effect for the game is started on the main display unit 43 and the symbol display device 41.

  Also, in the special figure special electric control process, during the execution of one game round, it is determined whether or not it is the end timing of the game round. If it is the end timing, the display corresponding to the game result is performed. Then, the process of ending the game round is executed. In this case, a final stop command (or a confirmation command) indicating that the game round should be ended is transmitted to the notification / production control device 72. Further, in the special figure special electric control process, when the result of the game times is a result corresponding to the transition to the opening / closing execution mode, a process for starting the opening / closing execution mode is executed. At the start, an opening command indicating that the opening / closing execution mode is started is transmitted to the notification / production control device 72. In the special figure special electric control process, a process for starting each round game and a process for ending each round game are executed. In each of these processes, an open command indicating that a round game is started (or that the variable winning device 32 is in an open state) is transmitted to the notification / production control device 72 and the round game is ended (or A closing command indicating that the variable winning device 32 is in the closed state is transmitted to the notification / production control device 72. Further, in the special figure special electric control process, when the opening / closing execution mode is ended, an ending command indicating that is transmitted to the notification / production control device 72, and the success / failure lottery mode and the support mode after the opening / closing execution mode are set. Execute the process.

  After executing the special figure special power control process of step S214 in the timer interruption process, the normal figure normal power control process is executed in step S215. In the ordinary map / electric power control process, when a winning to the through gate 35 is generated, a process for acquiring the retained information on the ordinary map side is executed and the retained information on the ordinary map side is stored. In addition, a release determination is performed on the hold information, and a process for performing an effect for a normal diagram is executed using the release determination as a trigger. Moreover, the process which opens and closes the electrically-driven accessory 34a of the lower working port 34 based on the result of opening determination is performed.

  In subsequent step S216, based on the processing results of immediately preceding step S214 and step S215, setting of output information for reflecting the increase / decrease number of the hold information related to the main display unit 43 in the first hold light emitting unit 45, and The output information for reflecting the increase / decrease number of the hold information related to the accessory display unit 44 to the second hold light emitting unit 46 is set. In step S216, the output information for updating the display content of the main display unit 43 is set based on the processing results of the immediately preceding steps S214 and S215, and the display content of the accessory display unit 44 is set. Set the output information to be updated.

  In the subsequent step S217, a demonstration display process is performed to make the display content of the symbol display device 41 for standby display in a situation where neither the game times nor the opening / closing execution mode is executed, and in step S218, Then, the contents of the command and signal received from the payout control device 78 are confirmed, and a payout state receiving process for performing a process corresponding to the confirmation result is executed. In step S219, a payout output process for setting a prize ball command as an output target is executed.

  In subsequent step S220, an external information setting process for controlling the start and end of the output of the external signal in accordance with the processing results of the various processes executed in the current timer interrupt process is executed. In step S221, a process for editing the test fire test information is executed.

  When an affirmative determination is made in step S206, or after the processing of steps S207 to S221 is executed, the process proceeds to step S222. In step S222, an interrupt end declaration is set. In the main MPU 122, once timer interrupt processing is started, it is stipulated that an interrupt end declaration is set as one of the conditions for starting the next timer interrupt processing. Set the interrupt end declaration to enable execution of timer interrupt processing. In step S223, interrupt permission is set. In the main MPU 122, once the timer interrupt processing is started, the interrupt is disabled. Therefore, in step S223, interrupt permission is set to enable execution of the next timer interrupt processing. Thereafter, the timer interrupt process is terminated.

<Electrical configuration related to production execution control>
Next, an electrical configuration relating to the execution control of the effect will be described with reference to the block diagram of FIG.

  As already described, the notification / production control device 72 and the display control device 128 are provided as control devices for controlling the execution of the production based on the instruction from the main control device 71. As shown in FIG. 24, the notification / production control device 72 includes a notification / production control board 141 on which a sub MPU 142 is mounted. In addition to the CPU 143 which is a central processing unit including a control unit and a calculation unit, the sub MPU 142 incorporates a direct ROM 144 and a RWM 145. The CPU 143, the direct ROM 144, and the RWM 145 are connected to each other via a bus.

  The direct ROM 144 is configured to use, as a read-only memory, a memory that does not require external power supply (ie, a nonvolatile storage unit) such as a NOR flash memory or a NAND flash memory. The direct ROM 144 stores various control programs and fixed value data used when executing processes corresponding to the programs. The CPU 143 executes processes according to the control programs stored in the direct ROM 144. Thus, the execution of the effect based on the instruction from the main control device 71 is controlled. Since the direct ROM 144 is connected to the CPU 143 via the internal bus in the sub MPU 142, it is relatively difficult to increase the data capacity.

  The RWM 145 is configured to use a memory (that is, a volatile storage unit) that requires external power supply for storage and storage, such as SRAM and DRAM, for both reading and writing. When compared with the data capacity, the time required for reading is faster than that of the direct ROM 144. The RWM 145 temporarily stores various data when executing the control program stored in the direct ROM 144, and has various flag storage areas and various counter storage areas. It is not essential that the direct ROM 144 and the RWM 145 are integrated into one chip with respect to the sub MPU 142, and each may be configured as a separate chip.

  The sub MPU 142 determines the content of the effect in a predetermined period based on the instruction from the main control device 71, and transmits a command corresponding to the determined content of the effect to the display control device 128. Such a command uses a signal path provided to connect the sub MPU 142 and the display MPU 162.

  The display control device 128 includes a display MPU 162, a display control board 161 on which a VDP 163 provided as a drawing LSI and an image ROM 164 are mounted. In the display MPU 162, a display effect in a predetermined period according to a command received from the sub MPU 142. The internal command corresponding to the content of the determined display effect is periodically transmitted to the VDP 163.

  In the VDP 163, image data is read from the image ROM 164 in accordance with the internal command received from the display MPU 162, and drawing data at the update timing of each image is created using the read image data. Then, by outputting a drawing signal corresponding to the created drawing data to the symbol display device 41, an image corresponding to each update timing is displayed on the display surface G of the symbol display device 41.

  Returning to the description of the notification / production control device 72, the sub-MPU 142 executes the light emission control of the display lamp unit 58 as well as the display control device 128 when the content of the production in the predetermined period is determined. In this case, in FIG. 24, the sub MPU 142 and the display lamp unit 58 are described as being directly connected, but the present invention is not limited to this, and the sub MPU 142 and the display lamp unit 58 are driven between them. A circuit may be interposed, and a relay board may be interposed.

  The sub MPU 142 performs drive control of the speaker 91 when the content of the effect in the predetermined period is determined. For the drive control of the speaker 91, the sound output LSI 146 and the common ROM 147 are used.

  The common ROM 147 is configured to use, as a read-only memory, that does not require external power supply for storing and holding, such as a NOR flash memory or a NAND flash memory, It is mounted on the notification / production control board 141. Since the common ROM 147 is not directly connected to the CPU 143 but is externally attached to the sound output LSI 146, it is easier to increase the data capacity than the direct ROM 144. The data capacity is arbitrarily set.

  The sound output LSI 146 includes an I / F 151, a register 152, a sound data processing unit 153, a DAC 154, and a data transfer unit 155, and outputs sound from the speaker 91 according to data transmitted from the sub MPU 142. Control for.

  The I / F 151 is an interface for the sound output LSI 146 to communicate with the sub MPU 142 via the bus B1 provided as a signal path group for bidirectional communication. The bus B1 connected to the I / F 151 includes eight signal paths J1 to J8, and data is transmitted and received between the sub MPU 142 and the sound output LSI 146 via the signal paths J1 to J8. Is called.

  The register 152 has a function as a storage means for temporarily storing various data used in the sound output LSI 146, and uses a memory that requires external power supply for storage and storage for both reading and writing. Is configured to do. In addition, random access is possible, and when compared with the same data capacity, the time required for reading is faster than that of the direct ROM 144 and the common ROM 147.

  The register 152 has a data capacity of a large number of bytes so that a plurality of data can be stored and held simultaneously.

  The register 152 is provided with a plurality of parameter areas and a sequence data area. The parameter area stores parameter data necessary for outputting melody and sound effects, and parameter data necessary for outputting sound. By providing a plurality of parameter areas, a plurality of sounds can be simultaneously output from the speaker 91. Sequence data is stored in the sequence data area.

  The sound data processing unit 153 converts the sequence data and parameter data transmitted from the sub MPU 142 and stored in the register 152 so that they can be used for sound output, and the content of the conversion result and the common ROM 147 The digital music sound data is created using the sound data read out from. By the way, the sequence data includes time data indicating the output start timing and output order of a series of sounds, and the parameter data includes data that defines the pitch, volume and tone color of the sound at a predetermined timing. It is.

  The sound data processing unit 153 has a function of a plurality of sound generation channels so that a plurality of different sounds can be output simultaneously. The sound data processing unit 153 synthesizes digital music sound data created for each sound generation channel to generate digital synthesized music sound data. It has a function to create. In addition, although it has a function for 16 channels as a plurality of sound generation channels, the number of channels is arbitrary. Further, by using virtual tracks, a larger number of tracks (for example, 64 tracks) than the actual number of sounding channels can be used. However, a configuration in which such virtual tracks are not used may be used.

  The DAC 154 is a digital / analog converter. The DAC 154 has a function of outputting a sound signal obtained by converting the digital musical tone data or digital synthesized musical tone data created by the sound data processing unit 153 into an analog signal to the speaker 91 as an analog audio signal. That is, it has a function of generating a sound signal from sound data.

  The data transfer unit 155 is connected to the common ROM 147 via a bus B2 provided as a signal path group for bidirectional communication, and has a function of transferring data read from the common ROM 147 to the register 152. ing. The bus B2 provided between the data transfer unit 155 and the common ROM 147 is composed of 16 signal paths, and the number of signal paths is larger than that of the bus B1 between the sub MPU 142 and the I / F 151. It is a large number. The data communication speed between the data transfer unit 155 and the common ROM 147 is faster than the data communication speed between the sub MPU 142 and the I / F 151. The data transfer unit 155 reads out sound data necessary for sound output from the common ROM 147 based on the data converted from the sequence data and parameter data in the sound data processing unit 153 and stores it in the register 152.

  Here, the data transfer unit 155 not only has a function of transferring necessary sound data to the register 152 in the sound data processing unit 153 but also reads out necessary data from the common ROM 147 and stores it in the register 152 in the sub MPU 142. It has a function of transferring data stored in the register 152 to the sub MPU 142. A configuration related to such data transfer will be described below.

<Data Structure of Direct ROM 144 and Common ROM 147>
First, the data structures of the direct ROM 144 and the common ROM 147 will be described with reference to FIG. FIG. 11A is an explanatory diagram for explaining the data configuration of the direct ROM 144, and FIG. 11B is an explanatory diagram for explaining the data configuration of the common ROM 147.

  As shown in FIG. 11A, the direct ROM 144 has a program and processing data (1), a program and a process for the CPU 143 of the sub MPU 142 to execute the effect control process and the notification control process. Data (2),..., A program and processing data (P) are stored in advance. These programs and processing data include a data table used for executing each effect and notification, sequence data and parameter data for providing to the sound output LSI 146. All the programs and processing data necessary for the CPU 143 to execute the effect control process and the notification control process are directly stored in the ROM 144.

  The direct ROM 144 performs not only the program and processing data (1), the program and processing data (2),..., The program and processing data (P), but also the light emission control of the display lamp unit 58. The light emission data (1), light emission data (2),..., Light emission data (Q) used in the above are stored in advance. In each of the light emission data, information on the type, lighting period, and lighting order of the light emitting unit to be turned on in the display lamp unit 58 in a predetermined production period is set, and the contents of these light emitting patterns are set. It differs depending on the type of each light emission data. Each light emission data stored in the direct ROM 144 has a different light emission control period and a different light emission pattern content.

  On the other hand, as shown in FIG. 11B, the common ROM 147 stores sound data (1), sound data (2),..., Sound data used for outputting a predetermined sound from the speaker 91. (S) is stored in advance. Each of these sound data includes melody actually generated by an instrument corresponding to various timbres and waveform data obtained by sampling the sound. For melody with lyrics, the melody with lyrics is recorded by an instrument corresponding to various timbres. It includes waveform data obtained by sampling the melody and voice that are pronounced. In addition, production sound and notification sound are formed by these sound data, and these sound data are all stored in the common ROM 147.

  In the common ROM 147, not only sound data (1), sound data (2),..., Sound data (S), but also light emission data (Q + 1), light emission data (Q + 2),. ) Is stored in advance. These light emission data have different light emission control periods and the contents of the light emission patterns.

  As described above, the light emission data used by the sub MPU 142 is not only stored in the direct ROM 144 directly connected to the CPU 143 of the sub MPU 142 via the bus, but also in the common ROM 147 connected to the sound output LSI 146. It is remembered. In other words, the light emission data is distributed and stored in the direct ROM 144 and the common ROM 147.

<Common ROM 147>
The notification / production control board 141 has a circuit board 168 such as a printed circuit board provided with a predetermined wiring pattern, and the common ROM 147 is surface-mounted on the circuit board 168 so that the notification / production control board. 141. Here, the configuration of the common ROM 147 will be described with reference to FIGS. FIG. 12 is a perspective view of the periphery of the common ROM 147, and FIG. 13 is a diagram showing the common ROM 147 and the socket 174. 12A shows a state in which the common ROM 147 is attached to the socket 174, and FIG. 12B shows a state in which the common ROM 147 is not attached to the socket 174. In FIG. 13, (a) shows the surface of the common ROM 147, and (b) shows a plan view of the socket 174.

  As shown in FIGS. 12B and 13A, the common ROM 147 includes a package 171 containing a plurality of IC chips on which an integrated circuit (IC) is formed, and a package connected to the integrated circuit. Terminal 172 and corresponds to an electronic component. In the common ROM 147, various data are stored in each chip.

  The package 171 is formed in a rectangular plate shape as a whole, and a plurality of (for example, 88) package terminals 172 are provided in a matrix in a plurality of rows along the back surface of the package 171. For example, m rows (for example, 4 rows) are arranged along the long side of the package 171, and n pieces (for example, 22 pieces) are arranged along the short side of the package 171 in each row. In the package 171, the interval between the package terminals 172 arranged in the long side direction is set larger than the interval between the package terminals 172 arranged in the short side direction.

  The package terminal 172 is a rectangular plate-shaped electrode pad, and is provided in a state where the flat surface is exposed on the back surface side of the package 171. The package terminal 172 has a long side extending parallel to the long side of the package 171 and a short side extending parallel to the short side of the package 171.

  As shown in FIGS. 12A, 12B, and 13B, the circuit board 168 is provided with a socket 174 in which a common ROM 147 is mounted. The socket 174 has a socket body 175 attached to the circuit board 168 and socket terminals 176 connected to the wiring pattern of the circuit board 168. The socket body 175 has a recess 177 that is recessed toward the circuit board 168, and the common ROM 147 is in the recess 177.

  The socket terminal 176 is provided at the bottom of the recess 177, extends toward the open side (the common ROM 147 side) of the recess 177, and its tip is in contact with the plate surface of the package terminal 172 so that the package The terminal 172 is electrically connected. A plurality of socket terminals 176 are provided so as to correspond to each package terminal 172 on a one-to-one basis. When the common ROM 147 is properly attached to the socket 174, the socket terminal corresponding to each package terminal 172 is provided. 176 is in contact with each other so as to be energized. The socket terminals 176 are arranged at a predetermined interval along the bottom surface (circuit board 168) of the recess 177 in accordance with the arrangement of the package terminals 172. In this case, a plurality of sets of package terminals 172 and socket terminals 176 are provided.

  The socket terminal 176 can be moved in and out of the recess 177. For example, the socket terminal 176 is made of an elastically deformable conductive material, and protrudes into the recess 177 when the common ROM 147 is not attached to the socket 174, while the common ROM 147 is attached. In the state, it is pushed into the circuit board 168 side by being pushed by the common ROM 147. This ensures that the package terminal 172 contacts the socket terminal 176 reliably.

  The contact portion (tip portion) of the socket terminal 176 with respect to the package terminal 172 moves obliquely with respect to the thickness direction of the socket 174 as the socket terminal 176 protrudes and protrudes. For example, the socket terminal 176 extends obliquely with respect to the thickness direction of the socket 174. In this case, the contact portion of the socket terminal 176 and the package terminal 172 is cleaned by moving the tip of the socket terminal 176 along the plate surface while contacting the plate surface of the package terminal 172. . For this reason, the situation where it does not energize even if the socket terminal 176 and the package terminal 172 are in contact can be avoided.

  A pressing member 179 that pushes the common ROM 147 into the recess 177 against the elastic force of the socket terminal 176 is attached to the socket 174. The common ROM 147 is sandwiched between the pressing member 179 and the socket 174, whereby the state in which the package terminal 172 and the socket terminal 176 are in contact with each other is maintained. The pressing member 179 has a hook portion that is hooked on the socket 174, and the attachment state of the pressing member 179 to the socket 174 is held by the hook portion.

<Detection circuits 181 and 182>
Here, when the hooking state of the holding member 179 with respect to the socket 174 is not appropriate, or when the common ROM 147 enters the recess 177 of the socket 174, the mounting state of the common ROM 147 with respect to the socket 174 becomes appropriate. I am concerned that it is not. On the other hand, the notification / production control device 72 is provided with detection circuits 181 and 182 for detecting that the mounting state of the common ROM 147 with respect to the socket 174 is not appropriate. The detection circuits 181 and 182 can also be referred to as position shift detection circuits that detect that the common ROM 147 mounted on the socket 174 is shifted from an appropriate position.

  The detection circuits 181 and 182 will be described with reference to FIGS. FIG. 14 is a diagram showing the detection circuits 181 and 182, FIG. 15 is a diagram showing each circuit of the common ROM 147 and the circuit board 168 for the detection circuits 181 and 182, and FIG. 16 is a diagram when the common ROM 147 is at the appropriate position N0. It is. In FIG. 15, (a) shows the circuit of the common ROM 147, and (b) shows the circuit of the circuit board 168. In FIG. 16, (a) shows the position of the common ROM 147, (b) shows the state of the first detection circuit 181 and (c) shows the state of the second detection circuit 182.

  As shown in FIG. 14, the common ROM 147 inputs / outputs data to / from the A terminals such as A1, A2,... Where addresses are input and the D terminals such as D1, D2,. A CE terminal for selecting a chip, an OE terminal that enables data output, a WE terminal that enables data input, and a VCC that is supplied with operating power of the common ROM 147 by applying a predetermined voltage (+ V) A terminal and a VSS terminal serving as a reference potential, and these terminals are assigned to any of the package terminals 172.

  The VSS terminal is grounded by being connected to the ground line, whereby the reference voltage is set to 0V. The VCC terminal is connected to the ground line via the bypass capacitor C, whereby the voltage applied to the VCC terminal is stabilized and the generation of noise is suppressed. Further, the VCC terminal is connected to the power supply line so that a power supply voltage is applied as a predetermined voltage (+ V).

  Note that a plurality of VCC terminals and VSS terminals are set, so that a large amount of power can be supplied to the common ROM 147. Further, due to the common ROM 147 having a plurality of chips, a plurality of CE terminals are also provided.

  In addition to the A terminal and the like, the common ROM 147 has T1 to T8 terminals as test terminals that are not used for data input / output. These T1 to T8 terminals are assigned to package terminals 172 different from the A terminals and the like, and are included in the detection circuits 181 and 182. Of the detection circuits 181 and 182, the first detection circuit 181 can detect a relatively small displacement of the common ROM 147 with respect to the socket 174, and includes a T1 terminal to a T4 terminal. It has become. On the other hand, the second detection circuit 182 can detect a relatively large misalignment, and is configured to include T5 to T8 terminals.

  The first detection circuit 181 includes a series path 181a formed by connecting the T1 terminal to the T4 terminal in series. In the series path 181a, the T1 terminal is disposed on the most upstream side, the T2 terminal is disposed on the most downstream side, and the T3 terminal and the T4 terminal are disposed between the T1 terminal and the T2 terminal. Terminals, T3 terminals, T4 terminals, and T2 terminals are arranged in this order. The series path 181a is grounded by connecting the T2 terminal to the ground line.

  Similarly, the second detection circuit 182 has a series path 182a formed by connecting the T5 to T8 terminals in series. In the series path 182a, the T5 terminal is disposed on the most upstream side, the T6 terminal is disposed on the most downstream side, and the T7 terminal and the T8 terminal are disposed between the T5 terminal and the T6 terminal. Terminals, T7 terminals, T8 terminals, and T6 terminals are arranged in this order. The series path 182a is grounded by connecting the T6 terminal to the ground line.

  In series paths 181a and 182a, a path connecting T1 terminal and T3 terminal, a path connecting T3 terminal and T4 terminal, a path connecting T5 terminal and T7 terminal, and a connection between T7 terminal and T8 terminal. The routes to be performed are provided inside the common ROM 147 and are not shown in FIG. 14, but details of these routes will be described later.

  The sub MPU 142 has a TEST1 terminal and a TEST2 terminal as detection terminals to which detection signals from the detection circuits 181 and 182 are input. The first detection circuit 181 is connected to the TEST1 terminal, and the first terminal is connected to the TEST2 terminal. 2 detection circuit 182 is connected. The detection circuits 181 and 182 have output paths 181b and 182b for outputting a detection signal toward the sub MPU 142. In the first detection circuit 181, the output path 181b is connected to the T1 terminal, so that the series path 181a and the TEST1 terminal are connected via the output path 181b. In the second detection circuit 182, since the output path 182b is connected to the T5 terminal, the series path 182a and the TEST2 terminal are connected via the output path 182b.

  The detection circuits 181 and 182 have ground paths 181c and 182c that connect the series paths 181a and 182a and the ground line. In the common ROM 147, the ground path 181c of the first detection circuit 181 is connected to the T2 terminal, and the ground path 182c of the second detection circuit 182 is connected to the T6 terminal.

  The output paths 181b and 182b are connected to a voltage terminal Vt to which a predetermined voltage (for example, 3.3 V) is applied via a pull-up resistor R, respectively. Therefore, in the detection circuits 181 and 182, when the series paths 181a and 182a are energized, the predetermined voltage of the voltage terminal Vt is not applied to the TEST1 terminal and the TEST2 terminal, and the energization signal is transmitted from the series paths 181a and 182a. 0V (LOW level) is input. On the other hand, when the series paths 181a and 182a are in the cutoff state, the predetermined voltage of the voltage terminal Vt is applied to the TEST1 terminal and the TEST2 terminal, and a predetermined voltage (HI level) is generated as a cutoff signal from the series paths 181a and 182a. Entered.

  Next, the arrangement and connection configuration of the T1 to T8 terminals in the common ROM 147 will be described.

  In the common ROM 147, the T1 terminal to T8 terminal are assigned to predetermined package terminals 172, while other terminals such as the A terminal and the CE terminal are different from the T1 terminal to T8 terminal. Arbitrarily assigned.

  As shown in FIG. 13A, the plurality of package terminals 172 include package terminals 172a to 172d arranged at the corner positions of the matrix arrangement, and these package terminals 172a to 172d include T1 terminals. ˜T4 terminal is assigned. In this case, the package terminals 172a to 172d are arranged at positions closest to the four corners of the package 171 by being arranged at the respective end portions of the outer two rows of the four rows. These package terminals 172a to 172d are arranged in two rows in two rows along the two directions of the package 171 in the longitudinal direction and the short direction.

  The plurality of package terminals 172 include package terminals 172e to 172h arranged at the respective end portions of the inner two rows of the four rows, and these package terminals 172e to 172h include T5 terminals to T8. A terminal is assigned. Similarly to the package terminals 172a to 172d, two package terminals 172e to 172h are arranged in two rows along the two directions of the package 171 in the longitudinal direction and the short direction.

  Of the D terminals and the OE terminals, the terminals necessary for outputting the notification sound are assigned to the package terminals 172 arranged at positions near the center in the inner two rows of the plurality of package terminals 172. . In this case, even if the common ROM 147 is displaced with respect to the socket 174, the conductive state between the package terminal 172 and the socket terminal 176 necessary for outputting the notification sound is easily maintained.

  In the socket 174, as shown in FIG. 13B, among the plurality of socket terminals 176, the ones corresponding to the package terminals 172a to 172d of the package 171 are the socket terminals 176a to 176d, and the package terminals 172e to 172h are Corresponding ones are socket terminals 176e to 176h.

  In the detection circuits 181 and 182, an opening / closing portion that opens and closes a path when the common ROM 147 is attached to and detached from the socket 174 is formed by the package terminal 172 and the socket terminal 176 corresponding to each other. As shown in FIGS. 16B and 16C, in the first detection circuit 181, corner opening / closing portions 185a to 185d are formed by the package terminals 172a to 172d and the socket terminals 176a to 176d. Opening / closing portions 185a to 185d are connected in series. Thereby, T1 terminal-T4 terminal are connected in series, and the serial path 181a is formed.

  In addition, in the series path 181a of the first detection circuit 181, between the corner opening / closing parts 185a to 185d, the upstream opening / closing part 185a arranged on the most upstream side and the downstream opening / closing part 185b arranged on the most downstream side. Further, intermediate opening / closing portions 185c and 185d are arranged. Of the intermediate opening / closing portions 185c and 185d, the first intermediate opening / closing portion 185c is disposed on the upstream opening / closing portion 185a side, and the second intermediate opening / closing portion 185d is disposed on the downstream opening / closing portion 185b side.

  In the second detection circuit 182, inner opening / closing portions 186a to 186d are formed by package terminals 172e to 172h and socket terminals 176e to 176h, and these inner opening / closing portions 186a to 186d are connected in series. Thereby, T5 terminal-T8 terminal are connected in series, and the serial path 182a is formed.

  Further, in the series path 182a of the second detection circuit 182, the upstream opening / closing part 186a arranged on the most upstream side among the inner opening / closing parts 186a to 186d and the downstream opening / closing part 186b arranged on the most downstream side. Intermediate opening / closing portions 186c and 186d are disposed. Of the intermediate opening / closing portions 186c, 186d, the first intermediate opening / closing portion 186c is disposed on the upstream opening / closing portion 186a side, and the second intermediate opening / closing portion 186d is disposed on the downstream opening / closing portion 186b side.

  As shown in FIG. 16A, when the mounting state of the common ROM 147 with respect to the socket 174 is appropriate, the common ROM 147 is in the appropriate position N0, and each package terminal 172 contacts the corresponding socket terminal 176. doing. In this case, the package terminals 172a to 172d and the package terminals 172e to 172h are in contact with the socket terminals 176a to 176h, respectively, and the series paths 181a and 182a are both energized.

  As shown in FIGS. 15A, 15 </ b> B, and 16 </ b> B, the series path 181 a of the first detection circuit 181 is connected to the first connection path 191 and the second connection path 192 provided in the common ROM 147. And a third connection path 193 provided on the circuit board 168 side.

  The first connection path 191 connects the package terminal 172a of the upstream opening / closing part 185a and the package terminal 172c of the first intermediate opening / closing part 185c, and the second connection path 192 connects with the package terminal 172b of the downstream opening / closing part 185b. 2 The package terminal 172d of the intermediate opening / closing part 185d is connected. Each of the first connection path 191 and the second connection path 192 extends along the long side of the package 171. The third connection path 193 connects the socket terminal 176c of the first intermediate opening / closing part 185c and the socket terminal 176d of the second intermediate opening / closing part 185d. The first connection path 191 and the second connection path 192 correspond to the package side connection path provided on the package 171 side, and the third connection path 193 corresponds to the board side connection path provided on the circuit board 168 side. .

  In the first detection circuit 181, the output path 181b is connected to the socket terminal 176a of the upstream opening / closing part 185a, and the grounding path 181c is connected to the socket terminal 176b of the downstream opening / closing part 185b. The paths 181c are all provided on the circuit board 168 side.

  In other words, in the first detection circuit 181, the output path 181b, the first connection path 191, the third connection path 193, the second connection path 192, and the ground path 181c are arranged in this order from the upstream side, and from the upstream side. They are alternately arranged on the circuit board 168 side and the common ROM 147 side. As a result, even if one of the connection portions (corner opening / closing sections 185a to 185d) of these paths is cut off, a cut-off signal is input to the TEST1 terminal of the sub MPU 142.

  Similarly to the first detection circuit 181, as shown in FIGS. 15A, 15B, and 16C, the series path 182a of the second detection circuit 182 is a first connection provided in the common ROM 147. It has a path 195 and a second connection path 196, and a third connection path 197 provided on the circuit board 168 side.

  The first connection path 195 connects the package terminal 172e of the upstream opening / closing part 186a and the package terminal 172g of the first intermediate opening / closing part 186c, and the second connection path 196 is connected to the package terminal 172f of the downstream opening / closing part 186b. 2 The package terminal 172h of the intermediate opening / closing part 186d is connected. The first connection path 195 and the second connection path 196 extend along the long side of the package 171. The third connection path 197 connects the socket terminal 176f of the first intermediate opening / closing part 186c and the socket terminal 176g of the second intermediate opening / closing part 186d. The first connection path 195 and the second connection path 196 correspond to a package side connection path provided on the package 171 side, and the third connection path 197 corresponds to a board side connection path provided on the circuit board 168 side. .

  In the second detection circuit 182, the output path 182b is connected to the socket terminal 176e of the upstream opening / closing part 186a, and the grounding path 182c is connected to the socket terminal 176h of the downstream opening / closing part 186b. The paths 182c are all provided on the circuit board 168 side.

  That is, in the second detection circuit 182, the output path 182b, the first connection path 195, the third connection path 197, the second connection path 196, and the ground path 182c are arranged in this order from the upstream side, and from the upstream side. They are alternately arranged on the circuit board 168 side and the common ROM 147 side. Thereby, even if one of the connection parts (inner opening / closing parts 186a to 186d) of these paths is blocked, a blocking signal is input to the TEST2 terminal of the sub MPU 142.

<Worn state of common ROM 147>
Next, the mounting state of the common ROM 147 to the socket 174 will be described with reference to FIGS. FIG. 17 is a diagram when the common ROM 147 is at the first separation position N1, and FIG. 18 is a diagram when the common ROM 147 is at the second separation position N2. 17 and 18, (a) shows the position of the common ROM 147, (b) shows the state of the first detection circuit 181, and (c) shows the state of the second detection circuit 182.

  As shown in FIG. 16A, when the common ROM 147 is properly mounted in the socket 174, the common ROM 147 is in the proper position N0, and the package terminals 172a to 172h and the socket terminals 176a to 176h are in contact with each other. Therefore, as shown in FIGS. 16B and 16C, all of the open / close sections 185a to 185d and 186a to 186d of the detection circuits 181 and 182 are closed, and the TEST1 terminal and the TEST2 terminal of the sub MPU 142 A LOW level is input to each of them as an energization signal.

  Here, in the configuration in which the package terminals 172a to 172d of the corner opening / closing sections 185a to 185d are arranged at the corner positions, when the package terminals 172a to 172d and the socket terminals 176a to 176d are in contact, The package terminal 172 is in contact with the socket terminal 176. Therefore, when the energization signal is input to the TEST1 terminal because the corner opening / closing part 185a of the first detection circuit 181 is in the closed state, it is determined that the common ROM 147 is mounted on the socket 174 in an appropriate state. It will be good.

  On the other hand, as shown in FIG. 17A, when the common ROM 147 is displaced from the socket 174 and is in the first removal position N1 separated from the appropriate position N0, the package terminals 172c to 172h The socket terminals 176c to 176h are in contact with each other, but the package terminals 172a and 172b are not in contact with the socket terminals 176a and 176b. In the drawing, only a part of the package terminals 172e and 172f is overlapped with the socket terminals 176e and 176f. However, in this state, the package terminals 172e and 172f and the socket terminals 176e and 176f are mutually connected. It shall be in contact and conducting.

  In this case, as shown in FIG. 17B, in the first detection circuit 181, although the intermediate opening / closing portions 185c and 185d are closed, the upstream opening / closing portion 185a and the downstream opening / closing portion 185b are opened. Therefore, the series path 181a is interrupted, the TEST1 terminal becomes HI level, and an interrupt signal is input. Therefore, it may be determined that the common ROM 147 is not properly attached to the socket 174.

  On the other hand, as shown in FIG. 17C, in the second detection circuit 182, since the inner opening / closing parts 186a to 186d are all closed, the series path 182a is not blocked and the TEST2 terminal is LOW. The energization signal is input while maintaining the level. In this case, not all the package terminals 172 of the common ROM 147 are electrically connected to the socket terminals 176, and it may be determined that some package terminals 172 are electrically connected to the socket terminals 176.

  As shown in FIG. 18A, when the common ROM 147 is separated from the first separation position N1 and is in the second separation position N2, the package terminals 172a, 172b, 172e, 172f and the socket terminals 176a, 176b, 176e and 176f are in contact with each other, but the package terminals 172c, 172d, 172g, and 172h are not in contact with the socket terminals 176c, 176d, 176g, and 176h.

  In this case, as shown in FIG. 18B, in the first detection circuit 181, the upstream opening / closing part 185a and the downstream opening / closing part 185b are closed, but the intermediate opening / closing parts 185c, 185d are opened. ing. In this case, as in the case where the common ROM 147 is at the first separation position N1, the series path 181a is cut off, the TEST1 terminal becomes HI level, and a cut-off signal is input, so the common ROM 147 is connected to the socket 174. Therefore, it may be judged that it is not properly installed.

  As shown in FIG. 18C, in the second detection circuit 182, the upstream opening / closing portion 186a and the downstream opening / closing portion 186b are closed, but the intermediate opening / closing portions 186c and 186d are opened. Therefore, unlike the case where the common ROM 147 is at the first separation position N1, the series path 182a is cut off, the TEST2 terminal is also at the HI level, and a cut-off signal is input. In this case, compared with the case where the common ROM 147 is at the first separation position N1, the position deviation of the common ROM 147 is large, so that the number of package terminals 172 not conducting to the socket terminal 176 in the common ROM 147 is large. It can be determined that the number of package terminals 172 that are conducting is small.

<Various processes executed by the sub MPU 142>
Next, processing executed by the sub MPU 142 based on a program will be described.

  The sub MPU 142 repeatedly executes the effect control process shown in the flowchart of FIG. 19 at a predetermined cycle (for example, 2 msec). Incidentally, a program for executing the effect and the effect control process is directly read from the ROM 144 in a stage before the effect control process is executed.

  In the effect control process, first, in step S301, it is determined whether or not a notification command or an effect command is received from the main control device 71. Examples of the notification system command include the magnet detection command, the illegal winning command, the radio wave detection command, the tank ball no command, and the lower pan full command, which have already been described. A combination with a type command, a final stop command, an opening command, an open command, a close command, and an ending command are listed. If a notification command or a production command has been received, the process proceeds to step S302.

  In step S302, a data table read process is executed. In the reading process, the data table corresponding to the notification command or the production command received this time is directly read from the ROM 144. As already described in the description of FIG. 25A, the data table is stored as a program and processing data in the direct ROM 144, and a plurality of types are set according to the type of notification or effect. Then, the sub MPU 142 executes light emission control and sound output control corresponding to the type of the notification system command or the production system command by executing the processing determined therewith while referring to this data table.

  Specifically, in the data table, an outline of the corresponding notification command or effect command is determined in accordance with the passage of time, and the sub MPU 142 refers to the data table to determine the emission data to be read. The type information, the type and content information of the light emission data to be executed, the sequence data to be output and the type of parameter data are grasped. Incidentally, the sub MPU 142 specifies information to be referred to in the data table at each processing timing by using the update of the pointer of the data table.

  In the subsequent step S303, display system command output processing is executed. In the output process, a display command corresponding to the data table read in step S302 is directly read from the ROM 144, and the read display command is output to the display control device 128. As a result, the display control device 128 can display an image corresponding to the notification related to the current execution instruction on the symbol display device 41. The display commands are stored in the direct ROM 144 as programs and processing data.

  If a negative determination is made in step S301, or if the process of step S303 is executed, the process proceeds to step S304. In step S304, based on the information in the data table, it is determined whether it is the execution timing of the sound output control. If it is the execution timing of the sound output control, the sequence data and parameter data of the current sound output control target are read out directly from the program and processing data in the ROM 144 in step S305, and are read out in the subsequent step S306. The sequence data and parameter data thus transmitted are transmitted to the sound output LSI 146 via the bus B1. In this case, the parameter data and sequence data transmitted to the sound output LSI 146 are stored in the register 152 of the sound output LSI 146.

  If a negative determination is made in step S304, or if the process of step S306 is executed, the process proceeds to step S307, where it is determined whether the mounting state of the common ROM 147 with respect to the socket 174 is appropriate. Here, it is determined whether or not an energization signal is input from the first detection circuit 181 to the TEST1 terminal, and it is assumed that the mounting state of the common ROM 147 is appropriate when the energization signal is input. On the other hand, when the energization signal is not input to the TEST1 terminal, that is, when the interruption signal is input, the mounting state of the common ROM 147 is not appropriate, and the common ROM 147 is positioned from the proper position N0. It will be shifted.

  Here, in the common ROM 147, the package terminals 172a to 172d of the corner opening / closing parts 185a to 185d are arranged outside the package terminals 172e to 172h of the inner opening / closing parts 186a to 186d (positions close to the corners of the package 171). As a result, the situation that the inner opening / closing portions 186a to 186d are in the open state even though the corner opening / closing portions 185a to 185d are in the closed state is that the common ROM 147 is positioned from the proper position N0. It does not occur just by shifting. For this reason, even if the detection signal of the second detection circuit 182 is not used for determining whether or not the common ROM 147 is displaced from the appropriate position N0, the determination accuracy does not decrease for that reason. Incidentally, the detection signal of the second detection circuit 182 may be used for this determination.

  If the mounting state of the common ROM 147 is appropriate, the effect control process is terminated as it is. If the mounting state of the common ROM 147 is not appropriate, the common ROM 147 is assumed to be displaced from the appropriate position N0. Proceeding to S308, a ROM misalignment handling process is performed.

<Operation in Sound Data Processing Unit 153 of Sound Output LSI 146>
Next, the operation of the sound data processing unit 153 of the sound output LSI 146 will be described with reference to the flowchart of FIG.

  The sound data processing unit 153 is provided as a dedicated circuit that operates independently of the sub MPU 142 and the data transfer unit 155, creates digital musical tone data based on the sequence data and parameter data transmitted from the sub MPU 142, By supplying the created digital musical sound data to the DAC 154, a notification sound and a production sound are output from the speaker 91. Digital musical sound data includes data for outputting notification sounds such as messages as guidance sounds and warning sounds as fraudulent sounds (bell sound, buzzer sound, siren sound, etc.), and melody without lyrics and with lyrics Data for outputting effect sounds such as melody, sound effect, and voice are included.

  The operation will be described in detail. First, it is determined whether or not the processing target sequence data and parameter data are stored in each parameter area and sequence data area in the register 152 (step S401). In this determination, for example, the sequence data area and the parameter area are set to “1” when the sequence data and the parameter data are newly set by the signal output from the sub MPU 142, and the sound An area is set in which “0” is set when processing is performed in the data processing unit 153. In the sound data processing unit 153, whether sequence data and parameter data to be processed exist based on the data in the area. Determine whether or not.

  If there is processing target sequence data and parameter data (step S401: YES), each parameter data is set for each tone generation channel provided in the register 152 in accordance with the time data included in the processing target sequence data. Are written in the corresponding areas determined by the sequence data (step S402). Incidentally, the sound data processing unit 153 can access an area for each parameter and an area for sequence data.

  The sequence data and each parameter data set at one time are set as data capable of generating digital musical tone data for a plurality of consecutive samples for a plurality of sound generation channels. Then, according to the time data included in the sequence data, the corresponding parameter data for a plurality of samples is written in time series for each sound generation channel area.

  In addition, in the parameter data to be written here, the address of the sound data necessary for the corresponding sound generation channel and the corresponding output timing is set. The data transfer unit 155 can access the area for each tone generation channel, reads out the sound data at the address set in the parameter data for the most recent sample from the common ROM 147 and writes it in the register 152.

  The multiple samples may be all or part of a series of sounds (for example, from the start to the end of a melody), but are part of the amount of data transferred at a time. Is preferred. In addition, the sound data processing unit 153 stops the output based on the instruction from the sub MPU 142 even during the output of a series of sounds in accordance with the sequence data and parameter data already received, and generates a new series of sounds. It is good also as a structure which can start an output.

  The sound data processing unit 153 determines whether it is the creation timing of the digital musical sound data based on a signal input from a clock circuit (not shown) provided in the sound output LSI 146 (step S403). The signal output period from the clock circuit corresponds to the sampling period.

  If it is the creation timing (step S403: YES), the digital musical tone data is obtained for each tone generation channel based on the parameter data of the corresponding sample and the sound data already transferred to the register 152 by the data transfer unit 155. Create (step S404). In addition, the digital musical tone data created for each of the tone generation channels is synthesized to create digital synthesized musical tone data (step S405). Incidentally, among the parameter data written in the area for each tone generation channel, the data for which digital musical tone data has been created is deleted, and the parameter data for the most recent sample is updated.

  In the sound data processing unit 153, the output timing of the digital synthesized musical sound data is based on the signal input from the clock circuit (not shown) provided in the sound output LSI 146 and outputting the signal at a timing different from that in step S403. It is determined whether or not (step S406). The signal output period from the clock circuit corresponds to the sampling period. In addition, when it is the output timing of the digital synthetic musical sound data for outputting the notification sound, the digital musical sound data for outputting the production sound is not output. Thereby, when the notification sound is output from the speaker 91, the effect sound is not output.

  If it is the output timing (step S406: YES), the generated digital synthesized musical tone data corresponding to the current output is supplied to the DAC 154 (step S407). The DAC 154 converts the digital synthesized musical sound data supplied from the sound data processing unit 153 into an analog signal and outputs it as an analog musical signal to the speaker 91. Thereby, a predetermined sound is output from the speaker 91. In some cases, a plurality of types of sounds may not be output at the same time. In this case, digital synthesized musical tone data is not created, and single digital musical tone data is supplied to the DAC 154, and a corresponding single tone is output to the speaker. 91.

  In the sound data processing unit 153, whether or not the sound data is transferred from the data transfer unit 155 to the register 152 as necessary, and whether or not the analog musical sound signal is output from the DAC 154 to the speaker 91 is determined. It is determined whether or not sound is being output through such monitoring (step S408). If the sound is being output (step S408: YES), a sound output in-progress signal is output via the bus B1 connecting the sub MPU 142 and the sound output LSI 146 (step S409). In this case, the signal path used in the bus B1 is the eighth signal path J8 used when the sub MPU 142 accesses the selector area, and the sub MPU 142 performs signal output via the eighth signal path J8. The sound output signal is output at a timing that is not present.

<ROM misalignment handling processing>
Next, the ROM misalignment handling process executed in step S308 of the effect control process (FIG. 19) will be described with reference to the flowchart of FIG.

  In the ROM misalignment handling process, in step S501, the misalignment level is specified based on the detection signals of the detection circuits 181 and 182. Here, in addition to the first detection circuit 181, it is determined whether or not a cutoff signal is input from the second detection circuit 182, and if the cutoff signal is not input from the second detection circuit 182, it is common. Assuming that the ROM 147 is at the first removal position N1, the position shift level is set to Lv1. When the cutoff signal is input from the second detection circuit 182, the level of misalignment is set to Lv2, assuming that the common ROM 147 is at the second separation position N2.

  In step S502, it is determined whether a sound output signal is received. The sound output in-progress signal is a signal periodically output from the sound output LSI 146 via the bus B1 in a state in which the sound output LSI 146 can execute the output of the sound according to the output instruction from the sub MPU 142. The sound output signal is periodically monitored by a process different from the notification and effect control process. If the sound output signal is not received in a situation that should have been received, it is determined in step S502 that the sound output signal is not received.

  If the sound output signal is not received, it is determined that the cause of not receiving the sound output signal is the position shift of the common ROM 147, and the process proceeds to step S503, where the position shift level of the common ROM 147 is set to Lv3. To do. In this case, the misregistration level is set to Lv3 regardless of whether the common ROM 147 is at the separation position N1 or N2.

  Incidentally, as a case where the sound output signal is not received, the package terminal 172 necessary for outputting the notification sound and the socket terminal 176 corresponding to the package terminal 172 may be in a non-conductive state. is assumed. For this reason, when the misalignment level is set to L3, the notification sound cannot be output. On the other hand, when the position shift level is set to Lv1 or Lv2, although the position shift of the common ROM 147 has occurred, the notification sound can be output.

  In step S504, a process of notifying that the position deviation level is Lv3, that is, a situation where sound output cannot be performed satisfactorily, is executed. Here, a light emission process for causing the display lamp unit 58 to emit light in a predetermined manner and a display process for displaying on the symbol display device 41 that the sound is not properly output due to the positional deviation of the common ROM 147 are executed. In this display process, an error command is output to the display control device 128. This notification process is executed regardless of the current gaming state.

  In step S505, external output processing is executed when the misregistration level is Lv3. Here, by outputting an error command to the main MPU 122 of the main control device 71, the main MPU 122 performs an external output process for abnormality. The error command output to the main MPU 122 is a command for causing the main MPU 122 and the game hall management computer to recognize that the sound is not properly output due to the positional deviation of the common ROM 147. Since the hole manager knows that the position deviation of the common ROM 147 is recognized by the management computer or the like, the hole manager can perform the work corresponding to the position deviation of the common ROM 147. It becomes possible.

  If a sound output signal is received (if YES in step S502), it is determined in step S506 whether or not the current gaming state is the normal gaming state, and in step S507, the position is shifted. It is determined whether or not the level is Lv2. These determination processes are processes for setting the position error handling process of the common ROM 147 to different contents according to the current gaming state and the height of the position error level.

  If the current gaming state is the normal gaming state and the positional deviation level is Lv2, the process proceeds to step S508 to notify that the positional deviation level is Lv2, that is, the positional deviation of the common ROM 147 is relatively large. Execute the process. Here, a light emission process for causing the display lamp unit 58 to emit light in a mode different from the case where the position shift level is Lv3, a display process for displaying that the position shift of the common ROM 147 has occurred on the symbol display device 41, and so on. The voice processing for outputting the voice from the speaker 91 is executed.

  Even when the common ROM 147 is at the separation positions N1 and N2, the terminals required for data input / output such as the A terminal and the D terminal among the plurality of package terminals 172 are in contact with the socket terminal 176. It is assumed that a situation in which sound is output satisfactorily occurs. When a sound output signal is received (when the determination in step S502 is YES), this situation is met, and therefore it is possible to perform notification of misalignment with the sound from the speaker 91. it is conceivable that.

  In step S509, external output processing is executed when the misregistration level is Lv2. Here, the error command output to the main MPU 122 is different from the notification process in the case where the position shift level is Lv3, but the sound is output well, but the common ROM 147 is greatly displaced. It is a command for the management computer to recognize.

  If the current gaming state is not the normal gaming state (when NO is determined in step S506), or if the misregistration level is not Lv2 (when NO is determined in step S507), the process proceeds to step S510, and a demonstration is being displayed. Determine whether or not. Here, the demonstration display refers to a start waiting effect displayed on the display surface G of the symbol display device 41 when a predetermined start waiting period has elapsed. In the demonstration display, a maker name, a model name, or a moving image with a predetermined character is displayed, but the present invention is not limited to this and can be arbitrarily changed. However, in the demonstration display, the intensity of light from the display surface G is set to be displayed at an intensity lower than a predetermined value. Therefore, the power consumption during the start waiting is displayed by performing the demonstration display. The amount is controlled.

  When the demonstration is being displayed, the process proceeds to step S511, and a process of notifying that the position deviation level is L1, that is, the position deviation of the common ROM 147 is relatively small is executed. Here, a light emission process for causing the display lamp unit 58 to emit light in a mode different from that in the case where the position deviation level is Lv2 or Lv3, or that the position deviation of the common ROM 147 has occurred is displayed on the symbol display device 41 during the demonstration display. Display processing to be performed, and voice processing to output that effect from the speaker 91 by voice.

  In step S512, external output processing is executed when the misregistration level is Lv1. Here, unlike the notification process in which the error command output to the main MPU 122 is in the position shift level Lv2 and Lv3, the sound is output satisfactorily, but the common ROM 147 is slightly shifted in position. This is a command for causing the management computer to recognize the fact.

  When the demonstration is not being displayed (when NO is determined in step S510), the process proceeds to step S513 without performing the notification processes such as steps S504, S508, and S511, and the external output process is performed when the notification process is not performed. Here, the error command output to the main MPU 122 indicates that the sound is output well but the common ROM 147 is misaligned, and that the notification process for the player is not executed, etc. It is a command to make it recognize.

  Since the hall manager knows that the positional deviation of the common ROM 147 is recognized by the management computer or the like, the hall manager can detect that the abnormality notification is not executed in the pachinko machine 10, It becomes possible to perform work corresponding to the positional deviation of the common ROM 147.

  Here, the case where the demonstration is not being displayed includes a case where the game state is not the normal game state (when NO is determined in step S506), and the case where the game state is not the normal game state includes the open / close execution mode (special game state) or high frequency. For example, in the winning mode. By not performing the notification process in these cases, it is possible to prevent the player from interrupting the game due to the notification process at the timing in the opening / closing execution mode or the high-frequency winning mode. That is, it can be suppressed that the profit of the player is hindered by executing the notification process. If the sound is being output satisfactorily, even if the common ROM 147 is misaligned, the player's profit is given priority over improving the misalignment.

  Further, when the demonstration is not being displayed, a case where the position shift level is Lv1 even when in the normal gaming state (when step S507 is NO) is included. In the normal gaming state, it is assumed that the player ends the game with a trivial trigger, and it is considered that the notification process can be the trivial trigger. For this reason, if the positional deviation of the common ROM 147 is small (Lv1) and the sound is output satisfactorily, the small positional deviation of the common ROM 147 can be improved by not performing the notification process. It is possible to give priority to the player to continue playing the game. Thereby, it can suppress that a player's profit is inhibited, the operating rate of this pachinko machine 10 falls, etc.

  According to the first embodiment described in detail above, the following excellent effects are achieved.

  Since the serial path 181a of the first detection circuit 181 is in the cut-off state when any one of the corner opening / closing sections 185a to 185d is opened, the positional deviation of the common ROM 147 can be detected with high accuracy. In particular, since the package terminals 172a to 172d of the first detection circuit 181 are disposed at positions close to the four corners of the package 171, among the package terminals 172 of the package 171, corresponding socket terminals 176a to 176d. It is easy to move away from the most. For this reason, the first detection circuit 181 can detect a small displacement (a state at the first separation position N1) of the common ROM 147 that cannot be detected by the second detection circuit 182.

  Since the serial path 182a of the second detection circuit 182 is cut off when any one of the inner opening / closing parts 186a is opened, similarly to the serial path 181a of the first detection circuit 181, the position of the common ROM 147 The deviation can be detected with high accuracy. In addition, since the package terminals 172e to 172h of the second detection circuit 182 are arranged inside the package relative to the package terminals 172a to 172d of the first detection circuit 181, the position of the common ROM 147 is larger than that of the first detection circuit 181. A shift (a state at the second separation position N2) can be detected.

  In the series paths 181 a and 182 a of the detection circuits 181 and 182, since the first connection paths 191 and 195 and the second connection paths 192 and 196 are provided in the common ROM 147, the power is supplied from the circuit board 168 side. By energizing these connection paths 191, 192, 195, 196, it is detected that the corner opening / closing parts 185a to 185d and the inner opening / closing parts 186a to 186d are closed. Therefore, the mounting state of the common ROM 147 can be detected with an easy configuration in which a voltage is applied to the series paths 181a and 182a.

  Here, if the common ROM 147 is replaced with an illegal ROM, there is a concern that an illegal acter may illegally gain profits. For example, if the common ROM 147 is replaced with an illegal ROM and no abnormal alarm sound is output, even if the game ball is paid out illegally, the hall manager does not notice that. It is possible. On the other hand, since the common ROM 147 is provided with connection paths 191, 192, 195 and 196 as connection paths on the package side, when the common ROM 147 is replaced with an unauthorized ROM, the connection paths 191 and 192 are provided. , 195, 196 no longer exist, the serial paths 181 a, 182 a are cut off, and the detection circuits 181, 182 detect the misalignment of the common ROM 147. As described above, even when an illegal act on the common ROM 147 is performed, the act can be detected by the detection circuits 181 and 182.

  Since the package terminals 172a to 172d of the first detection circuit 181 and the package terminals 172e to 172h of the second detection circuit 182 are each arranged in two rows, the displacement of the common ROM 147 with respect to the appropriate position N0 is shifted. It is possible to detect not only in one direction but also in two directions. In addition, in these detection circuits 181 and 182, the first connection paths 191 and 195 and the second connection paths 192 and 196 extend in parallel, so that the connection paths 191, 192, 195 and 196 in the common ROM 147 are connected to the detection circuits 181 and 182. The arrangement area can be made as small as possible. Accordingly, it is possible to prevent the arrangement of other wiring patterns in the common ROM 147 from being restricted by the connection paths 191, 192, 195, 196.

  The detection accuracy of the misalignment of the common ROM 147 by the detection circuits 181 and 182 is too high depending on which of the package terminals 172 of the package 171 is assigned to the package terminals 172a to 172h included in the detection circuits 181 and 182. It can be set moderately without being too low. For this reason, even though the position deviation detection accuracy is too high and the player's game is excessively interrupted, or the position deviation detection accuracy is too low and the position deviation of the common ROM 147 is not detected. It can be suppressed that output of sound from the speaker 91 is stopped.

  In the detection circuits 181 and 182, the output paths 181b and 182b are connected to the voltage terminal Vt via the pull-up resistor R, so that the TEST1 terminal and the TEST2 terminal are LOW when the common ROM 147 is at the appropriate position N0. Since the level is input, even when the output from the output paths 181b and 182b becomes the LOW level due to other reasons such as a power failure, it is possible to determine whether or not the common ROM 147 is not properly mounted.

  In the common ROM 147, since the package terminals 172a to 172h (T1 terminal to T8 terminal) included in the detection circuits 181 and 182 are test terminals, the common ROM 147 is independent of the operation of the detection circuits 181 and 182. Data is input / output from / to. Therefore, it can be avoided that the detection accuracy of the detection circuits 181 and 182 is lowered and the reliability of the operation of the common ROM 147 is lowered.

<Second Embodiment>
In the first embodiment, the connection paths 191, 192, 195 and 196 of the detection circuits 181 and 182 are provided in the common ROM 147. However, in the second embodiment, these connection paths are connected to the common ROM 147. Not provided. In the second embodiment, the configuration of the detection circuit will be mainly described with a focus on differences from the first embodiment.

  In the present embodiment, the notification / production control device 72 includes a third detection circuit 201 and a fourth detection circuit 202, and the configuration of the detection circuits 201 and 202 will be described with reference to FIGS. .

  22A and 22B are diagrams showing the common ROM 147 and the socket 174. FIG. 22A shows the surface of the common ROM 147, and FIG. 22B shows a plan view of the socket 174. FIG. 23 is a diagram showing the detection circuits 201 and 202, FIG. 24 is a diagram showing the circuits of the common ROM 147 and the circuit board 168 with respect to the detection circuits 201 and 202, and FIG. 25 is a diagram when the common ROM 147 is at the appropriate position N0. is there. 24A shows the package terminals 172i and 172j of the common ROM 147, and FIG. 24B shows the circuit of the circuit board 168. In FIG. 25, (a) shows the position of the common ROM 147, (b) shows the state of the third detection circuit 201, and (c) shows the state of the fourth detection circuit 202.

  As shown in FIGS. 22A and 23, in the common ROM 147, the plurality of package terminals 172 include package terminals 172i and 172j arranged at the corner positions of the matrix arrangement. 172i and 172j are arranged at diagonal positions. The common ROM 147 has a T9 terminal and a T10 terminal as test terminals, and the T9 terminal and the T10 terminal are assigned to the package terminals 172i and 172j, respectively. Of the package terminals 172i and 172j, the first package terminal 172i (T9 terminal) is included in the third detection circuit 201, and the second package terminal 172j (T10 terminal) is included in the fourth detection circuit 202.

  In the second embodiment, since each of the detection circuits 201 and 202 has one test terminal of the common ROM 147, unlike the first embodiment, a connection path for connecting a plurality of test terminals is provided. There is no need to provide the common ROM 147. For this reason, a commercially available ROM can be incorporated in the detection circuits 201 and 202 as they are.

  As shown in FIG. 22B, the socket terminals 176 of the socket 174 are basically arranged in a matrix in a plurality of rows so as to be in one-to-one contact with the package terminals 172. A plurality of socket terminals 176i to 176n are arranged in contact with the package terminals 172i and 172j, respectively. In this case, the socket terminals 176 i to 176 k are in contact with the first package terminal 172 i, and these socket terminals 176 i to 176 k are included in the third detection circuit 201. Further, socket terminals 176 l to 176 n are in contact with the second package terminal 172 j, and these socket terminals 176 l to 176 n are included in the fourth detection circuit 202.

  In the socket 174, the plurality of socket terminals 176 include a plurality of standard socket terminals arranged in a matrix and an attached socket terminal provided attached to the standard socket terminal. In this case, the socket terminals 176i, 176l are provided as standard socket terminals, and the socket terminals 176j, 176k, 176m, 176n are provided as attached socket terminals.

  Returning to the description of FIG. 23, the sub MPU 142 has a TEST3a terminal, a TEST3b terminal, a TEST4a terminal, and a TEST4b terminal as detection terminals to which detection signals from the detection circuits 201 and 202 are input. A third detection circuit 201 is connected to the TEST3a and 3b terminals, and a fourth detection circuit 202 is connected to the TEST4a and 4b terminals.

  As shown in FIGS. 23, 24A, and 24B, the detection circuits 201 and 202 each have two output paths. The third detection circuit 201 has a first output path 201a connected to the TEST3a terminal and a second output path 201b connected to the TEST3b terminal, and the fourth detection circuit 202 is connected to the TEST4a terminal. The first output path 202a and the second output path 202b connected to the TEST4b terminal. The first output paths 201a and 202a are connected to the voltage terminal Vt via the first pull-up resistors R1a and R2a, and the second output paths 201b and 202b are connected to the voltage via the second pull-up resistors R1b and R2b. It is connected to the terminal Vt.

  The detection circuits 201 and 202 have ground paths 201c and 202c connected to the ground line, respectively. In the detection circuits 201 and 202, the first output paths 201a and 202a and the second output paths 201b and 202b are connected to the ground paths 201c and 202c via the package terminals 172i and 172j.

  In the third detection circuit 201, the ground path 201c is connected to the socket terminal 176i, the first output path 201a is connected to the socket terminal 176j, and the second output path 201b is connected to the socket terminal 176k. Therefore, when all of the socket terminals 176i to 176k are in contact with the first package terminal 172i, both the output paths 201a and 201b are energized, and the LOW level is input to each of the TEST3a terminal and the TEST3b terminal. .

  In the fourth detection circuit 202, the ground path 202c is connected to the socket terminal 176l, the first output path 202a is connected to the socket terminal 176m, and the second output path 202b is connected to the socket terminal 176n. For this reason, when all of the socket terminals 176l to 176n are in contact with the second package terminal 172j, both the output paths 202a and 202b are energized, and the LOW level is input to each of the TEST4a terminal and the TEST4b terminal. .

  Here, in the detection circuits 201 and 202, the socket terminals 176i and 176l are referred to as ground socket terminals 176i and 176l connected to the ground paths 201c and 202c, and the socket terminals 176j and 176m are connected to the first output paths 201a and 202a. The connected first socket terminals 176j and 176m are referred to as the socket terminals 176k and 176n, and the second socket terminals 176k and 176n are connected to the second output paths 201b and 202b.

  The first package terminal 172i and the second package terminal 172j correspond to connection package terminals that connect the output paths 201a, 202a, 201b, and 202b to the ground paths 201c and 202c. The first output paths 201a and 202a correspond to the first upstream path, the second output paths 201b and 202b correspond to the second upstream path, and the ground paths 201c and 202c correspond to the downstream path. Furthermore, the ground socket terminals 176i and 176l correspond to the downstream socket terminals, and the first socket terminals 176j and 176m and the second socket terminals 176k and 176n correspond to the upstream socket terminals.

  As shown in FIGS. 22 and 24B, the ground socket terminals 176i and 176l are arranged in the direction in which the row of socket terminals 176 (standard socket terminals) are arranged (longitudinal direction of the socket 174). , 176m and the second socket terminals 176k, 176n. In this case, the ground socket terminals 176i and 176l, the first socket terminals 176j and 176m, and the second socket terminals 176k and 176n are arranged linearly in the longitudinal direction of the socket 174, and the ground socket terminals 176i and 176l are the first socket terminals 176i and 176l. The socket terminals 176j and 176m and the second socket terminals 176k and 176n are arranged at the center position.

  The arrangement order of the ground socket terminals 176i and 176l, the first socket terminals 176j and 176m, and the second socket terminals 176k and 176n is the same in the third detection circuit 201 and the fourth detection circuit 202. In this case, in FIG. 24B, the first socket terminals 176j and 176m are arranged on the right side with respect to the ground socket terminals 176i and 176l, and the second socket terminals 176k and 176n are arranged on the left side.

  The ground socket terminal 176i of the third detection circuit 201 is disposed at the upper right corner position, and the ground socket terminal 176l of the fourth detection circuit 202 is disposed at the lower left corner position. In this case, in the third detection circuit 201, the first socket terminal 176j is disposed on the outer peripheral side of the socket 174, and the second socket terminal 176k is disposed on the inner side of the socket 174. On the other hand, in the fourth detection circuit 202, the first socket terminal 176m is disposed on the outer peripheral side of the socket 174, and the second socket terminal 176n is disposed on the inner side of the socket 174.

<Worn state of common ROM 147>
Next, the mounting state of the common ROM 147 in the socket 174 will be described with reference to FIGS. 26 is a diagram when the common ROM 147 is in the allowable position P, FIG. 27 is a diagram when the common ROM 147 is in the non-permitted position Q, and FIG. 28 is a case where the illegal ROM 1 is forcibly installed in the socket 174. FIG. 29 is a diagram when the illegal ROM 2 is forcibly installed in the socket 174. 26 to 29, (a) shows the positions of the common ROM 147, illegal ROM 1, and illegal ROM 2, (b) shows the state of the third detection circuit 201, and (c) shows the fourth detection circuit. 202 shows the state.

  As shown in FIG. 25A, when the common ROM 147 is in the proper position N0, the ground socket terminal 176i, the first socket terminal 176j, and the second socket terminal 176k are in contact with the first package terminal 172i, respectively. In addition, the ground socket terminal 176l, the first socket terminal 176m, and the second socket terminal 176n are in contact with the second package terminal 172j. In this case, as shown in FIGS. 25B and 25C, the first output paths 201a and 202a and the second output paths 201b and 202b are packaged in both the third detection circuit 201 and the fourth detection circuit 202. By being connected to the ground paths 201c and 202c via the terminals 172i and 172j, energization signals are output from the first output paths 201a and 202a and the second output paths 201b and 202b. That is, each of the TEST3a terminal, the TEST3b terminal, the TEST4a terminal, and the TEST4b terminal becomes the LOW level.

  Here, in the common ROM 147, the first package terminal 172i and the second package terminal 172j are arranged at the diagonal positions of the corners, so that the ground socket terminals 176i and 176l are in contact with the package terminals 172i and 172j, respectively. In this state, each standard socket terminal is in contact with the package terminal 172, and it is assumed that the common ROM 147 operates normally. In this case, assuming that the displacement of the common ROM 147 is within the allowable range, the position of the common ROM 147 in this case is referred to as an allowable position.

  Further, if the ground socket terminals 176i and 176l are not in contact with at least one of the package terminals 172i and 172j, a part or all of the standard socket terminals are not in contact with the package terminal 172. There is a possibility that the ROM 147 does not operate normally. In this case, assuming that the position shift of the common ROM 147 is not within the allowable range, the position of the common ROM 147 in this case is referred to as a non-permissible position.

  The appropriate position N0 corresponds to a reference position serving as a reference for the allowable position and the non-allowable position. In this case, both the allowable position and the non-permissible position are included in the non-reference position that is not the reference position.

  As shown in FIG. 26 (a), when the common ROM 147 is shifted to the right and is in the allowable position P, the package terminals 172i and 172j include the ground socket terminals 176i and 176l and the first socket terminals 176j and 176m. Are in contact with each other, but the second socket terminals 176k and 176n are not in contact with each other.

  In this case, as shown in FIGS. 26B and 26C, in both the third detection circuit 201 and the fourth detection circuit 202, the first output paths 201a and 202a are energized, while the second The energization of the output paths 201b and 202b is stopped. For this reason, the energization signal (LOW level) is input to the TEST3a terminal and the TEST4a terminal, while the blocking signal (HI level) is input to the TEST3b terminal and the TEST4b terminal. As described above, in both of the detection circuits 201 and 202, when at least one of the first output path and the second output path is energized, the common ROM 147 is in the allowable position.

  As shown in FIG. 27A, when the common ROM 147 is in the non-permitted position Q due to the rotation, the first socket terminal 172k is in contact with the first socket terminal 172i, while the ground socket The terminal 176i and the first socket terminal 176j are not in contact. Further, the ground socket terminal 176l and the second socket terminal 176n are in contact with the second package terminal 172j, while the first socket terminal 176m is not in contact. The non-permitted position Q is a position corresponding to the separation position in the first embodiment.

  In this case, as shown in FIG. 27B, in the third detection circuit 201, energization of both the first output path 201a and the second output path 201b is stopped. For this reason, the cutoff signal is input to each of the TEST3a terminal and the TEST3b terminal. In the third detection circuit 201, energization of the first output path 202a is stopped, while the second output path 202b is energized. For this reason, an interruption signal is input to the TEST4a terminal, while an energization signal is input to the TEST4b terminal. As described above, in at least one of the third detection circuit 201 and the fourth detection circuit 202, when the energization of both the first output path and the second output path is interrupted, the common ROM 147 is brought into the non-permitted position. There will be.

  Here, the socket terminals 176i to 176n of the detection circuits 201 and 202 are sockets arranged outside the ground socket terminals 176i and 176l even if the common ROM 147 is displaced in the direction of rotation along the plate surface. The terminals 176j and 176n are in contact with the package terminals 172i and 172j, while the socket terminals 176k and 176m arranged on the inner side do not come into contact with each other. In this case, the socket terminals 176j and 176n arranged outside the ground socket terminals 176i and 176l are not in contact with the package terminals 172i and 172j, while the socket terminals 176k and 176m arranged inside are in contact. This situation is not to occur.

  If an unauthorized ROM other than the common ROM 147 is installed in the socket 174, there is a concern that the unauthorized person may gain profits illegally. For example, when sound data for notifying the occurrence of an abnormality is stored in the common ROM 147, it is replaced with an illegal ROM that does not store the sound data, so that the notification sound is not output from the speaker 91 and the pachinko machine is not output. An illegal act of illegally paying out game balls from the machine 10 can be considered.

  In the state in which the illegal ROM is mounted in the socket 174, although each package terminal of the illegal ROM is in contact with the socket terminal 176 because the illegal ROM is not compatible with the socket 174, etc., The contact position of the socket terminal 176 with respect to the package terminal is considered to be different from the case where the regular common ROM 147 is mounted on the socket 174. That is, if the detection circuit 201 or 202 obtains a detection result that cannot be generated when the regular common ROM 147 is mounted in the socket 174, the illegal ROM may be forcibly mounted in the socket 174. There seems to be a possibility.

  As shown in FIG. 28A, when the illegal ROM 1 having a large interval between the package terminals is forcibly installed in the socket 174, the package terminal X1 included in the third detection circuit 201 in the illegal ROM 1 is connected to the ground. Although it contacts the socket terminal 176i and the second socket terminal 176k, it does not contact the first socket terminal 176j. On the other hand, the package terminal X2 included in the fourth detection circuit 202 is in contact with the ground socket terminal 176l and the first socket terminal 176m, but not in contact with the second socket terminal 176n.

  In this case, as shown in FIGS. 28B and 28C, in the third detection circuit 201, a cutoff signal is output from the first output path 201a to the TEST3a terminal, and the second output path 201b is energized to the TEST3b terminal. A signal is output. On the other hand, in the fourth detection circuit 202, an energization signal is output from the first output path 202a to the TEST4a terminal, and a cutoff signal is output from the second output path 202b to the TEST4b terminal.

  As described above, in the detection circuits 201 and 202, energization of the socket terminals 176j and 176n arranged outside the ground socket terminals 176i and 176l is stopped, and the socket terminals 176k and 176m arranged inside are energized. Since the situation cannot occur when the regular common ROM 147 is installed in the socket 174, there can be a suspicion that the illegal ROM 1 is forcibly installed in the socket 174.

  In addition, as shown in FIG. 29A, when the illegal ROM 2 having a small package terminal interval is forcibly installed in the socket 174, the package terminal X3 included in the third detection circuit 201 in the illegal ROM 2 is Although they are in contact with the ground socket terminal 176i and the first socket terminal 176j, they are not in contact with the second socket terminal 176k. On the other hand, the package terminal X4 included in the fourth detection circuit 202 is in contact with the ground socket terminal 176l and the second socket terminal 176n, but not in contact with the first socket terminal 176m.

  In this case, as shown in FIGS. 29B and 29C, in the third detection circuit 201, an energization signal is output from the first output path 201a to the TEST3a terminal, and from the second output path 201b to the TEST3b terminal. A shut-off signal is output. On the other hand, in the fourth detection circuit 202, a cutoff signal is output from the first output path 202a to the TEST4a terminal, and an energization signal is output from the second output path 202b to the TEST4b terminal.

  As described above, in the detection circuits 201 and 202, the socket terminals 176j and 176n arranged outside the ground socket terminals 176i and 176l are energized, and the energization of the socket terminals 176k and 176m arranged inside is stopped. Since the situation cannot occur when the regular common ROM 147 is installed in the socket 174, the unauthorized ROM 2 is forcibly installed in the socket 174 as well as the suspicion that the unauthorized ROM 1 is forcibly installed. You can have a suspicion that

  In the second embodiment, the content of the ROM misalignment handling process executed in step S308 of the effect control process is different from that of the first embodiment. Here, the ROM misalignment handling process is shown in FIG. This will be described with reference to the flowchart of FIG.

  Note that, unlike the first embodiment, in step S307 of the effect control process, it is determined whether or not the common ROM 147 is at the appropriate position N0. That is, it is determined whether the energization signal is input to all of the TEST3a terminal, the TEST3b terminal, the TEST4a terminal, and the TEST4b terminal of the sub MPU 142. If energization signals are input to all of these terminals, the effect control process is terminated as it is, and if there is at least one terminal to which a cut-off signal is input, it is determined that the common ROM 147 is not at the appropriate position N0, step S308. Then, the ROM position deviation corresponding process is performed.

  In the ROM misalignment handling process, in step S601, it is determined whether a sound output signal is received. If not received, the process proceeds to step S602 to notify that the common ROM 147 is not at the proper position N0 and that the sound output from the speaker 91 is abnormal. In step S603, these facts are indicated. An external output process for notifying the management computer or the like is executed.

  When the sound output signal is received, the process proceeds to step S604, and it is determined whether or not the ROM positional deviation detected by the detection circuits 201 and 202 is abnormal. Here, it is determined whether one of the energization signal and the cutoff signal is input to each of the TEST3a terminal and the TEST4b terminal and the other signal is input to each of the TEST3b terminal and the TEST4a terminal. When the determination is affirmative, it is assumed that the ROM misalignment mode is abnormal.

  If the ROM misregistration mode is not abnormal, the process proceeds to step S605 to notify that the common ROM 147 is not at the appropriate position N0 and that there is no abnormality in the sound output from the speaker 91 regardless of the current gaming state. In step S606, an external output process for notifying the management computer or the like is executed. When the common ROM 147 is at the allowable position P, the notification process indicating the positional deviation may not be executed, but the notification is performed when the common ROM 147 is displaced from the appropriate position N0 to the allowable position P. Therefore, it is possible to prevent the output sound from being abnormal due to the positional deviation of the common ROM 147.

  If the ROM misregistration mode is abnormal, the process proceeds to step S607 to notify the possibility that the regular common ROM 147 has been replaced with an illegal ROM. In step S608, an external output is sent to notify the management computer or the like. Execute the process. Note that if the illegal ROM is actually illegally installed in the socket 174, there is a possibility that the fraudulent person is playing a game on the pachinko machine 10 as a player. This notification may not be performed by the pachinko machine 10 but may be notified only to the management computer or the like.

  According to the second embodiment described in detail above, the following excellent effects are achieved.

  In each of the detection circuits 201 and 202, since the contact of the plurality of socket terminals 176i to 176n with respect to one package terminal 172i and 172j is detected, even if a dedicated wiring is not provided to the common ROM 147, the appropriate position N0 can be detected. Whether or not the common ROM 147 is misaligned can be determined.

  In addition, if the ground socket terminals 176i and 176l are in contact with the package terminals 172i and 172j, the common ROM 147 even if the first socket terminals 176j and 176m and the second socket terminals 176k and 176n are not in contact with each other. Therefore, it is determined whether the mounting state of the common ROM 147 is far from inappropriate (state at the appropriate position N0) or close to inappropriate (state at the allowable position P). It becomes possible. Therefore, the detection accuracy by the detection circuits 201 and 202 can be increased with respect to the mounting state of the common ROM 147.

  The effect of the third detection circuit 201 will be described. Since the socket terminals 176i to 176k of the third detection circuit 201 extend in the direction in which the sockets 174 are arranged in the socket 174, the interval between the socket terminals 176i to 176k is appropriately set. Can be secured. For example, in the configuration in which the socket terminals 176i to 176k are arranged along the direction in which the row of the socket terminals 176 extends, the first socket terminal 176j and the second socket terminal 176k are connected to the ground socket terminal 176i and the adjacent standard socket terminal. Therefore, the socket terminals 176i to 176k are too close to each other.

  Since the socket terminals 176i to 176k are moderately separated, it can be avoided that the common ROM 147 is detected as having moved to the allowable position P only by being slightly displaced from the appropriate position N0. Therefore, it can be suppressed that the detection accuracy of the detection circuits 201 and 202 becomes too high and the abnormality detection is performed for the mounting state even though the mounting state of the common ROM 147 is appropriate.

  Since the third detection circuit 201 has two output paths, the first output path 201a and the second output path 201b, the four positions of the common ROM 147 are detected from the output results of these output paths 201a and 201b. It becomes possible.

  In addition, since the ground socket terminal 176i is disposed between the first socket terminal 176j and the second socket terminal 176k, even when the common ROM 147 is displaced, the first output path 201a and the second output path 201b Is not easily short-circuited without passing through the grounding path 201c. Thereby, it is possible to suppress an unstable voltage from being applied to the first socket terminal 176j and the second socket terminal 176k of the common ROM 147 and the TEST3a terminal and the TEST3b terminal of the sub MPU 142.

  Since the applied voltages from the voltage terminal Vt to the first output path 201a and the second output path 201b are set to the same value, the output paths 201a and 201b are changed depending on the contact state of the socket terminals 176i to 176k with respect to the first package terminal 172i. It can be suppressed that the output voltage of the output fluctuates in an unstable manner.

  These effects on the third detection circuit 201 can be similarly achieved in the fourth detection circuit 202.

  Since the ground socket terminal 176i of the third detection circuit 201 and the ground socket terminal 176l of the fourth detection circuit 202 are disposed at positions separated from each other in the direction in which the row of the socket 174 extends, the detection circuits 201 and 202 It is possible to properly detect that the common ROM 147 has moved in the direction in which the sockets 174 are arranged in a plurality of rows.

  In addition, since the ground socket terminals 176i and 176l are separated in the arrangement direction of the plurality of rows of the sockets 174, the direction in which the common ROM 147 is displaced in the arrangement direction can be specified. In addition, in the detection circuits 201 and 202, one of the energization signal and the cutoff signal is output from the socket terminals 176j and 176n arranged on the outer periphery side of the socket with respect to the ground socket terminals 176i and 176l, and the other is on the inner side. Since the output from the socket terminals 176k and 176m arranged in the socket cannot occur when the common ROM 147 is mounted on the socket 174, the presence of the illegal ROM can be detected.

<Third Embodiment>
In the first embodiment, the detection circuits 181 and 182 are energized when the common ROM 147 is in the proper position N0. In the third embodiment, the common ROM 147 is in the proper position N0. In this case, the detection circuit is cut off. In the third embodiment, the configuration of the detection circuit will be mainly described with a focus on differences from the first embodiment.

  In the present embodiment, the notification / production control device 72 includes a fifth detection circuit 211, and the configuration of the fifth detection circuit 211 will be described with reference to FIGS.

  FIG. 31 is a diagram showing the common ROM 147 and the socket 174, (a) shows the surface of the common ROM 147, and (b) shows a plan view of the socket 174. FIG. 32 is a diagram showing the circuits of the common ROM 147 and the circuit board 168 for the fifth detection circuit 211, FIG. 33 is a diagram when the common ROM 147 is at the appropriate position N0, and FIG. 34 is the third separation position N3. FIG. In FIG. 32, (a) shows the circuit of the common ROM 147, and (b) shows the circuit of the circuit board 168. 33 and 34, (a) shows the position of the common ROM 147, and (b) shows the state of the fifth detection circuit 211.

  As shown in FIGS. 31A and 31B, package terminals 172a to 172d are arranged in the common ROM 147, and socket terminals 176a to 176d are arranged in the socket 174. In addition to the standard socket terminals such as the socket terminals 176a to 176d, the socket 174 is provided with socket terminals 176o to 176q that do not contact any of the package terminals 172 when the common ROM 147 is at the appropriate position N0. These socket terminals 176 o to 176 q are included in the fifth detection circuit 211. Here, in the socket 174, the socket terminals 176 provided one-to-one with respect to the package terminal 172 are standard socket terminals, and the socket terminals 176o to 176q are disconnect terminals provided separately from these standard socket terminals. It corresponds to.

  As shown in FIG. 33B, the fifth detection circuit 211 includes a first connection path 191 connecting the package terminals 172a and 172c, a first output path 211a connecting the outer socket terminal 176o to the TEST5a terminal, It has the 2nd output path | route 211b which connected the inner side socket terminal 176p to the TEST5b terminal, and the grounding path | route 211c connected to the grounding line. The socket terminal 176o is referred to as a first socket terminal 176o, the socket terminal 176p is referred to as a second socket terminal 176p, and the socket terminal 176q is referred to as a ground socket terminal 176q.

  Returning to the description of FIGS. 31A and 31B, the first socket terminal 176o and the second socket terminal 176p are connected to the socket terminal 176a within a range in which the common ROM 147 is not in contact with the package terminal 172a when the common ROM 147 is in the proper position N0. Closely arranged side by side. The socket terminals 176o and 176p are arranged in the longitudinal direction of the socket 174, and the socket terminal 176a is disposed at an intermediate position between the socket terminals 176o and 176p. In this case, the first socket terminal 176o is disposed outside the socket terminal 176a, and the second socket terminal 176p is disposed inside the socket terminal 176a. The distance between the socket terminals 176o and 176p and the socket terminal 176a is slightly larger than the length of the package terminal 172a in the longitudinal direction of the package 171.

  The ground socket terminals 176q are arranged side by side close to the socket terminals 176c in a range where the common ROM 147 is not in contact with the package terminals 172c in a state where the common ROM 147 is at the appropriate position N0. The ground socket terminal 176q is disposed outside the socket terminal 176c in the short direction of the socket 174, and the distance between the socket terminals 176q and 176c is larger than the length dimension of the package terminal 172c in the short direction of the package 171. It is also slightly larger.

  As shown in FIGS. 32A and 32B, the first connection path 191 is provided in the common ROM 147, and the output paths 211 a and 211 b and the ground path 211 c are provided in the circuit board 168. The output paths 211a and 211b are both connected to the voltage terminal Vt via the pull-up resistor R. The TEST5a terminal and the TEST5b terminal are provided in the sub MPU 142.

  As shown in FIG. 33A, when the common ROM 147 is at the proper position N0, neither the first socket terminal 176o nor the second socket terminal 176p is in contact with the package terminal 172a, and the ground socket terminal 176q is also It is not in contact with the package terminal 172c. In this case, as shown in FIG. 33B, in the fifth detection circuit 211, neither the first output path 211a nor the second output path 211b is connected to the first connection path 191 (the ground path 211c). The HI level is input to both the TEST5a terminal and the TEST5b terminal. In the second embodiment, the HI level input to the TEST5a terminal and the TEST5b terminal is a proper signal indicating that the common ROM 147 is in the proper position N0, and the LOW level is changed from the proper position N0 to the common ROM 147. This is a departure signal indicating that the vehicle has left. The separation signal corresponds to an abnormality signal indicating that an abnormality has occurred in the mounting state of the common ROM 147 with respect to the socket 174.

  As shown in FIG. 34 (a), when the common ROM 147 is rotated and is in the third removal position N3, the package terminal 172a contacts the second socket terminal 176p and the package terminal 172c is the ground socket terminal 176q. Touching. In this case, the second output path 211b is connected to the ground path 211c via the first connection path 191, and the LOW level is input to the TEST5b terminal by energizing the second output path 211b. That is, a separation signal indicating that the common ROM 147 is at the third separation position N3 is input to the TEST5b terminal.

  On the other hand, the package terminal 172a is not in contact with the first socket terminal 176o, and the first output path 211a is not energized. In this case, the HI level is continuously input to the TEST5a terminal. Therefore, the sub MPU 142 can specify the position shift mode (rotation direction) of the common ROM 147 with respect to the appropriate position N0 by inputting different signals to the TEST5a terminal and the TEST5b terminal.

  According to the third embodiment described in detail above, the following excellent effects are achieved.

  In the fifth detection circuit 211, the socket terminals 176o to 176q that are disconnect terminals are arranged at positions that do not contact the package terminals 172a and 172c when the common ROM 147 is at the appropriate position N0. As in the embodiment, the degree of freedom regarding the relative positions of the socket terminals 176o to 176q with respect to the package terminals 172a and 172c can be increased as compared with the configuration in which the package terminals 172a and 172c are in contact with each other.

  Further, the distance between the first socket terminal 176o and the second socket terminal 176p with respect to the socket terminal 176a is made larger than the longitudinal dimension of the package terminal 172a, or the distance between the ground socket terminal 176q with respect to the socket terminal 176c is set as the package terminal 172c. It becomes possible to make it larger than the longitudinal dimension. Further, when the common ROM 147 is designed, it is possible to prevent the installation position of the standard socket terminals such as the socket terminal 176a from being limited by the presence of the socket terminals 176o to 176q which are out-of-line terminals.

  When the package terminal 172a contacts the first socket terminal 176o or the second socket terminal 176p, the package terminal 172a does not contact the socket terminal 176a, and the package terminal 172c contacts the ground socket terminal 176q. In this case, since the package terminal 172c does not come into contact with the socket terminal 176c, the fifth detection circuit 211 reliably detects that the common ROM 147 has left the proper position N0 outside the allowable range. it can. Therefore, it can be prevented that the common ROM 147 is detected as being inappropriate even though the mounting state of the common ROM 147 is appropriate.

<Fourth Embodiment>
In the second embodiment, the detection circuits 201 and 202 are energized when the common ROM 147 is in the proper position N0. In the fourth embodiment, the common ROM 147 is in the proper position N0. In this case, the detection circuit is cut off. In the fourth embodiment, the configuration of the detection circuit will be mainly described focusing on the differences from the second embodiment.

  In the present embodiment, the notification / production control device 72 includes a sixth detection circuit 215, and the configuration of the third detection circuit 201 will be described with reference to FIGS. The sixth detection circuit 215 corresponds to the third detection circuit 201 of the second embodiment, and is different from the third detection circuit 201 only in the arrangement of the socket terminals 176j and 176k.

  FIG. 35 shows the common ROM 147 and the socket 174. FIG. 35A shows the surface of the common ROM 147, and FIG. 35B shows a plan view of the socket 174. FIG. 36 shows a circuit of the common ROM 147 and the circuit board 168 for the sixth detection circuit 215, FIG. 37 is a diagram when the common ROM 147 is at the proper position N0, and FIG. 38 shows the common ROM 147 at the allowable position P1. FIG. 39 is a diagram when the illegal ROM 3 is forcibly installed in the socket 174. 36A shows a package terminal 172i of the common ROM 147, and FIG. 36B shows a circuit of the circuit board 168. 37 to 39, (a) shows the position of the common ROM 147, and (b) shows the state of the sixth detection circuit 215.

  As shown in FIGS. 35A and 35B, the first package terminal 172i is arranged in the common ROM 147, and the socket terminals 176i to 176k are arranged in the socket 174 in accordance with the first package terminal 172i. Has been. In the fourth embodiment, unlike the second embodiment, the first socket terminal 176j and the second socket terminal 176k are not in contact with the first package terminal 172i when the common ROM 147 is in the proper position N0. (See FIG. 37 (a)). In this case, the first socket terminal 176j and the second socket terminal 176k correspond to disconnect terminals not included in the standard socket terminal.

  The relative positions of the socket terminals 176j and 176k with respect to the ground socket terminal 176i are the same as the relative arrangement of the socket terminals 176o and 176p with respect to the ground socket terminal 176q in the third embodiment. However, in the longitudinal direction of the socket 174, the distance between the ground socket terminal 176i and the socket terminals 176j and 176k is smaller than the length of the first package terminal 172i, and the first package terminal 172i is the first socket terminal. It is possible to simultaneously contact one of the 176j and the second socket terminal 176k and the ground socket terminal 176i.

  The distance between the first socket terminal 176j and the second socket terminal 176k is larger than the length of the first package terminal 172i, and the first package terminal 172i is the first socket terminal 176j and the second socket terminal. 176k is not touched at the same time.

  As shown in FIGS. 36A, 36B, and 37B, the sixth detection circuit 215 has a first output path 215a, a second output path 215b, and a ground path 215c. 215a to 215c are all provided on the circuit board 168.

  As shown in FIG. 37A, when the common ROM 147 is in the proper position N0, the first socket terminal 176j and the second socket are in contact with the first package terminal 172i while the ground socket terminal 176i is in contact therewith. None of the terminals 176k are in contact. In this case, as shown in FIG. 37B, in the sixth detection circuit 215, neither the first output path 215a nor the second output path 215b is connected to the ground path 215c, and the TEST3a terminal and the TEST3b terminal The HI level is input to any of these.

  In the fourth embodiment, as in the second embodiment, the HI level input to the TEST3a terminal and the TEST3b terminal is an appropriate signal, and the LOW level is a disconnection signal (abnormal signal). However, since the sixth detection circuit 215 can detect that the displacement of the common ROM 147 is within the allowable range, the separation signal can also be referred to as a displacement signal.

  As shown in FIG. 38A, when the common ROM 147 is displaced to the right and is in the allowable position P1, the first socket terminal 176j contacts the first package terminal 172i in addition to the ground socket terminal 176i. On the other hand, the second socket terminal 176k is not in contact. In this case, the first output path 215a is connected to the ground path 215c via the first package terminal 172i, and the LOW level is input to the TEST3a terminal when the first output path 215a is energized. The second output path 215b is not in contact with the ground path 215c, and the second output path 215b is not energized, so that the HI level is input to the TEST3b terminal.

  As described above, when the misalignment signal is input to the TEST3a terminal by the sixth detection circuit 215 and the proper signal is input to the TEST3b terminal, the sub MPU 142 allows the common ROM 147 to be displaced from the proper position N0 to the right side. Identify P1.

  As described above, no matter how the common ROM 147 is displaced, both the first socket terminal 176j and the second socket terminal 176k do not contact the first package terminal 172i at the same time, so the TEST3a terminal And the situation that a position shift signal is simultaneously input to both the TEST3b terminals is prevented.

  However, when the illegal ROM is forcibly installed in the socket 174, the misalignment signal is simultaneously applied to both the TEST3a terminal and the TEST3b terminal because the package terminal of the illegal ROM is larger than the first package terminal 172i. It is assumed that it will be entered.

  As shown in FIG. 39A, when the illegal ROM 3 having a large package terminal length is forcibly attached to the socket 174, the package terminal X5 included in the sixth detection circuit 215 in the illegal ROM 3 Both the first socket terminal 176j and the second socket terminal 176k are in contact with each other. As a result, as shown in FIG. 39B, in the sixth detection circuit 215, energization signals are output from both the first output path 215a and the second output path 215b, and are positioned at both the TEST3a terminal and the TEST3b terminal. A shift signal (LOW level) is input simultaneously.

  In this case, the sub MPU 142 does not cause the misalignment of the common ROM 147 based on the detection signals input from the sixth detection circuit 215 to each of the TEST3a terminal and the TEST3b terminal. It is determined that it is attached.

  According to the fourth embodiment described in detail above, the following excellent effects are obtained.

  In the sixth detection circuit 215, the first socket terminal 176j and the second socket terminal 176k, which are disconnect terminals, are arranged at positions that do not contact the first package terminal 172i when the common ROM 147 is at the appropriate position N0. For example, as in the second embodiment, the relative positions of the first socket terminal 176j and the second socket terminal 176k with respect to the first package terminal 172i as compared with the configuration arranged at a position in contact with the first package terminal 172i. Can increase the degree of freedom.

  Since the first package terminal 172i can be in contact with one of the first socket terminal 176j and the second socket terminal 176k and the ground socket terminal 176i at the same time, it is common to the socket 174. Even when the mounting state of the ROM for ROM 147 is included in the appropriate range, the sixth detection circuit 215 can detect the displacement of the common ROM 147 with respect to the appropriate position N0. As a result, the detection accuracy of the sixth detection circuit 215 can be increased with respect to the mounting state of the common ROM 147.

  In the sixth detection circuit 215, the first package terminal 172i is in contact with one of the first socket terminal 176j and the second socket terminal 176k at the same time as the ground socket terminal 176i, thereby detecting the misalignment of the common ROM 147. Therefore, unlike the first and third embodiments, there is no need to provide a dedicated path that configures the detection circuit in the common ROM 147. In this case, since a general-purpose IC chip can be used as the common ROM 147, the cost burden can be reduced. In this case, it can be detected that the illegal ROM is forcibly attached to the socket 174.

<Other embodiments>
In addition, it is not limited to the description content of each embodiment mentioned above, A various deformation | transformation improvement is possible within the range which does not deviate from the meaning of this invention. For example, you may change as follows. Incidentally, the configurations of the following different forms may be applied individually or in combination to the configurations of the above embodiments.

  (A1) In the first embodiment, the first connection paths 191 and 195 and the second connection paths 192 and 196 connect the adjacent package terminals 172 in the common ROM 147, but these connection paths 191 and 192 195 and 196 may be connected to package terminals 172 arranged at diagonal positions in the package 171. For example, in the first detection circuit 181, the package terminal 172a of the upstream opening / closing part 185a and the package terminal 172c of the first intermediate opening / closing part 185c are arranged at diagonal positions in the package 171, and the package terminals 172a and 172c are connected. The first connection path 191 is arranged so as to extend along the diagonal line of the package 171.

  (A2) In the first embodiment, the package terminals 172a to 172d of the corner opening / closing portions 185a to 185d are provided to the four corners of the package 171, but these package terminals 172a to 172d are the same as the package terminals 172. You may arrange | position inside the corner position of an arrangement | sequence. Even in this case, it is preferable that the package terminals 172a to 172d are disposed outside the package terminals 172e to 172h of the inner opening / closing portions 186a to 186d.

  (A3) In the first embodiment, the package terminals 172a to 172h are arranged in two orthogonal directions along the plate surface of the package 171, but the arrangement of the package terminals 172a to 172h is limited to this. Absent. For example, the package terminals 172a to 172d may be arranged at the vertices of the virtual trapezoid, and the package terminals 172e to 172h may be arranged at the vertices of the virtual rhombus.

  (A4) In the first embodiment, each of the detection circuits 181 and 182 has four opening / closing sections. However, if there are a plurality of opening / closing sections, two or three may be used. For example, the first detection circuit 181 includes two opening / closing portions, that is, an upstream opening / closing portion 185a and a downstream opening / closing portion 185b. In this configuration, the common ROM 147 is provided with a connection path for connecting the package terminals 172a and 172d of the opening / closing sections 185a and 185d. The package terminals 172a and 172d are preferably arranged at diagonal positions in the package 171. Thus, even if the common ROM 147 is misaligned so that a part of all the package terminals 172 of the common ROM 147 is separated from the socket terminal 176, the part of the package terminals 172 that are separated from each other are the package terminals 172a, A configuration of 172d can be realized. In addition, since the number of package terminals 172a and 172d included in the first detection circuit 181 is only two, the circuit related to the common ROM 147 is compared with the configuration in which four package terminals are included in the first detection circuit 181. Design constraints can be reduced.

  In addition, the number of open / close sections (package terminals) is different for each detection circuit, such as four open / close sections of the first detection circuit 181 and the second detection circuit 182 and two open / close sections. May be.

  (A5) In the first embodiment, in the common ROM 147, the package terminals 172e to 172h of the second detection circuit 182 are arranged inside the package terminals 172a to 172d of the first detection circuit 181. The package terminal of the second detection circuit 182 may be arranged outside the package terminal of the first detection circuit 181. In addition, the package terminals may be arranged side by side in the first detection circuit 181 and the second detection circuit 182. In this case, it is possible to determine that the direction of the positional deviation of the common ROM 147 is different between the case where only the first detection circuit 181 outputs the cutoff signal and the case where only the second detection circuit 182 outputs the cutoff signal. It becomes. Further, when both the first detection circuit 181 and the second detection circuit 182 output the cutoff signal, the position shift level of the common ROM 147 is higher than when only one of them outputs the cutoff signal. It becomes possible to judge.

  (A6) In the first embodiment, when the common ROM 147 is misaligned, the notification process according to the gaming state is performed as a countermeasure process. However, the notification process is executed regardless of the gaming state. Also good. Further, as a countermeasure process, a process of interrupting the game may be performed.

  (B1) In the second embodiment, the ground socket terminals 176i and 176l, the first socket terminals 176j and 176m, and the second socket terminals 176k and 176n are linearly arranged, but the ground socket terminal is the first socket. As long as it is arrange | positioned between a terminal and the 2nd socket terminal, these socket terminals do not need to be located in a line.

  (B2) In the second embodiment, the ground socket terminals 176i and 176l are provided as standard socket terminals. However, the first socket terminals 176j and 176m or the second socket terminals 176k and 176n are provided as standard socket terminals. It may be. Further, any of the socket terminals included in the detection circuits 201 and 202 may be arranged at a position different from the standard socket terminal. For example, in the third detection circuit 201, a virtual triangle is assumed centering on a position where the standard socket terminal is to be grounded, and a ground socket terminal 176i, a first socket terminal 176j, and a second socket terminal are arranged at each vertex of the virtual triangle. It is assumed that 176k is arranged.

  (B3) In the second embodiment, the detection circuits 201 and 202 are provided with a plurality of output paths and one ground path. However, one output path and one ground path are provided. Alternatively, only a plurality of ground paths may be provided. That is, one each of the upstream socket terminal and the downstream socket terminal may be provided, or a plurality of the downstream socket terminals may be provided.

  A plurality of output paths and ground paths may be provided. In this case, the output voltage from the output path is unstable due to the combination of the output path and the ground path that are energized through the package terminals 172i and 172j. Therefore, it is preferable to provide only one of the output path and the ground path.

  (B4) In the second embodiment, the ground socket terminal 176i of the third detection circuit 201 and the ground socket terminal 176l of the fourth detection circuit 202 are arranged at diagonal positions in the socket 174. The socket terminals 176i and 176l may be arranged so that the arrangement direction thereof is parallel to the arrangement direction of the rows of socket terminals 176, or arranged so as to be parallel to the direction in which the rows of socket terminals 176 extend. It may be.

  (C1) The socket terminals 176o to 176q, 176j, and 176k as disconnect terminals are arranged at positions that do not contact any of the package terminals 172 when the common ROM 147 is at the appropriate position N0. It does not need to be arranged at the position in the fourth embodiment.

  (C2) In the third and fourth embodiments, the detection circuits 211 and 215 include at least one of the package terminal 172 and the socket terminal 176. However, the package terminal 172 and the socket terminal 176 One by one may be included. For example, the detection circuit is configured to detect that one package terminal is in contact with one socket terminal as a disconnect terminal. As this structure, the structure by which the contact sensor was provided in the package terminal with high possibility of contacting with a detached terminal is mentioned. In this case, the package terminals included in the detection circuits 211 and 215 can be terminals used for the operation of the common ROM 147 when the common ROM 147 is in an appropriate position. That is, it is not necessary to use a test terminal.

  (C3) In the third and fourth embodiments, the disconnect terminals are provided in the socket 174 as the socket terminals 176o to 176q, 176j, and 176k. However, the disconnect terminal is provided in the package 171 as the package terminal 172. Also good. In this case, it is not necessary to provide the disconnect terminal in the socket 174.

  (C4) In the third embodiment, the socket terminals 176o to 176q which are disconnect terminals are arranged so that the package terminals 172a and 172c do not contact the plurality of socket terminals 176 even when the common ROM 147 is displaced. However, the disconnect terminals may be arranged so that the package terminals 172a and 172c contact the plurality of socket terminals 176 when the common ROM 147 is displaced. For example, in the longitudinal direction of the socket 174, the distance between the socket terminals 176o and 176p with respect to the socket terminal 176a is set to be smaller than the length dimension of the package terminal 172a.

  (D1) In the first and second embodiments, the LOW level output from the detection circuits 181, 182, 201, and 202 is the energization signal and the HI level is the cutoff signal. It may be a signal, and the HI level may be an energization signal. For example, in the first embodiment, the pull-up resistor R is not connected to the output path 181b, and the ground path 181c of the first detection circuit 181 is provided with a pull-down resistor.

  (D2) In each of the above embodiments, the ground path of the detection circuit may be connected to the sub MPU 142 as an output path. For example, in the first embodiment, the output path 181b of the first detection circuit 181 is connected to the voltage terminal Vt, but is not connected to the TEST1 terminal, and the ground path 181c is connected to the TEST1 terminal. And Even in this case, the LOW level is input to the TEST1 terminal when the common ROM 147 is at the proper position N0, and the HI level is input when the common ROM 147 is displaced to the first separation position N1 or the like.

  (D3) In the first and second embodiments, the package terminals 172a to 172j included in the detection circuits 181, 182, 201, and 202 are the test terminals, but these package terminals 172 a to 172 j are the VCC terminals. Or an OE terminal or a CE terminal. For example, in the first detection circuit 181 of the first embodiment, in the configuration in which the VCC terminal is assigned to the package terminal 172a, the package terminal 172a is connected to the voltage terminal Vt without passing through the pull-up resistor R, and the output path 181b. A pull-down resistor is provided. According to this configuration, when the common ROM 147 is displaced and the energization of the series path 181a is stopped, there is a concern that the power supply to the VCC terminal is stopped and the operation of the common ROM 147 is stopped. When the ROM 147 is in the proper position N0, the common ROM 147 can be normally operated by applying a predetermined voltage from the voltage terminal Vt to the package terminal 172a (VCC terminal).

  (D4) In each of the above embodiments, the package terminals 172 and the socket terminals 176 are each provided in four rows, but may be provided in other multiple rows such as two rows or three rows, and provided in one row. It may be.

  (D5) In each of the above embodiments, the electronic component mounted in the socket is the common ROM 147 of the notification / production control device 72, but this electronic component is the CPU 143 of the notification / production control device 72 or the display control device 128. The display MPU 162 and the RWM 124 of the main controller 71 may be used. In either case, the mounting state of the electronic component with respect to the socket can be detected.

  (D6) Instead of the configuration in which the display control device 128 is controlled by the notification / production control device 72 based on the command output from the main control device 71, the display is performed based on the command output from the main control device 71. The control device 128 may be configured to control the notification / production control device 72. In addition, instead of the configuration in which the notification / production control device 72 and the display control device 128 are separately provided, both control devices may be provided as one control device, and one of the two control devices may be provided. The functions may be integrated into the main control device 71, and both functions of these two control devices may be integrated into the main control device 71. The configuration of commands output from the main control device 71 to the notification / effect control device 72 and the configuration of commands output from the notification / effect control device 72 to the display control device 128 are also arbitrary.

  (D7) The device for executing the effect for game times is not limited to the symbol display device 41, and the effect for effect for game times is executed by operating a decorative member provided in a movable manner. It is also possible to have a configuration in which an effect for game times is executed by turning on a predetermined light emitting unit, or a configuration in which an effect for game times is executed by a combination of all or a part of the above aspects. Good.

  (D8) In each of the above-described embodiments, one game turn in the main display unit 43 is started based on whether the main controller 71 determines whether or not the game is successful. However, the present invention is not limited to this. Based on the fact that when the condition for determining whether or not the main control device 71 is determined is satisfied, the game time is started at a timing before the timing at which the determination is actually made, and the determination is made thereafter. It is good also as a structure by which the subsequent display mode, display continuation time, and stop result in the game time are determined. In this case, the main control device 71 first transmits a variation command when the game turn start timing is reached, and then determines whether or not the game is correct, determines the display duration, and determines the type. The configuration may be such that commands are transmitted, and the transmission timing of these time commands and type commands may be shifted.

  (D9) In each of the above embodiments, a stop result corresponding to each game result is displayed on the main display unit 43. However, instead of this, the main display unit 43 may be omitted, and any game Even if it is a result, it is good also as a structure by which a common stop result is displayed in the main display part 43, and since a stop result is displayed in the main display part 43 at random, from the display of the main display part 43 as a result It is good also as a structure which cannot identify which game result it is.

  (D10) Other types of pachinko machines different from the above-described embodiments, such as pachinko machines that release a predetermined number of times when a game ball enters a specific area of a special device, or game balls in a specific area of a special device The present invention can also be applied to a pachinko machine that generates a right if a player enters, a pachinko machine equipped with other objects, an arrangement ball machine, a sparrow ball, and other gaming machines.

  Also, a non-ball-type gaming machine, for example, a plurality of reels with a plurality of types of symbols attached in the circumferential direction, starts rotation of the reel by inserting a medal and operating a start lever, and a stop switch is operated. If a specific symbol or a combination of specific symbols is established on the effective line visible from the display window after the reel has stopped after a predetermined time has passed, a privilege such as paying out medals is given to the player The present invention can also be applied to a slot machine.

  In addition, the gaming machine main body that is supported by the outer frame so as to be openable and closable is provided with a storage unit and a capture device, and the start lever is operated after a predetermined number of game balls stored in the storage unit are captured by the capture device. Thus, the present invention can also be applied to a gaming machine in which a pachinko machine and a slot machine are fused, which starts rotating the reel.

<Invention Group Extracted from Each Embodiment>
Hereinafter, the characteristics of the invention group extracted from each of the above-described embodiments will be described while showing effects and the like as necessary. In the following, for easy understanding, the corresponding configuration in each of the above embodiments is appropriately shown in parentheses, but is not limited to the specific configuration shown in parentheses.

<Feature A group>
The invention of the following feature group A is effective for the following problems.

  A gaming machine such as a pachinko machine is provided with a main control device for overall management of games, a sub-control device for controlling sound output based on signals from the main control device, and the like. These control devices have a circuit board provided with a predetermined wiring pattern, and electronic components such as a CPU, a ROM, and a RAM are mounted on the circuit board by surface mounting or the like. As a configuration in which the electronic component is surface-mounted on the circuit board, there is a configuration in which the electronic component is mounted on a socket attached to the circuit board (see, for example, Japanese Patent Application Laid-Open No. 2009-268548). Each of the electronic component and the socket has a plurality of electrodes, and these electrodes are in contact with each other as terminals, so that the electronic component is operable in the control device.

  However, in the configuration in which the electronic component is mounted on the socket, the terminal of the electronic component and the terminal of the socket are not soldered, unlike through-hole mounting in which the terminal of the electronic component is soldered to the circuit board, for example. . For this reason, when the mounting state of the electronic component to the socket is not appropriate, there is a concern that the electronic component does not operate normally.

  Here, when the mounting state of the electronic component is not appropriate, not only all the terminals of the electronic component are not in contact with the socket terminal, but only some of the terminals of the electronic component are in contact with the socket terminal. In this case, it is assumed that the contact between the terminals is in an unstable state. Therefore, even if the electronic components are operating normally, the terminals may be affected by slight vibrations. It is considered that the normal operation of the electronic component is stopped due to a contact failure between the two.

Feature A1. An electronic component (common ROM 147) having a package (package 171) is mounted on the circuit board by being mounted on a socket (socket 174) attached to the circuit board (circuit board 168).
A plurality of sets of socket terminals (socket terminals 176) of the socket and package terminals (package terminals 172) of the package that are in contact with the socket terminals so as to be energized are provided, and the package terminals are provided on the plate surface of the package. A plurality of gaming machines arranged along the way,
A detection circuit (a first detection circuit 181 and a second detection circuit 182) for detecting improper mounting state of the electronic component with respect to the socket;
The detection circuit includes:
One set of the socket terminal and the package terminal is formed as one opening / closing part (corner opening / closing parts 185a to 185d, inner opening / closing parts 186a to 186d), and a plurality of the opening / closing parts are connected in series, A series that is energized when the socket terminal and the package terminal are in contact with each opening / closing portion, and that is de-energized when the socket terminal and the package terminal are not in contact with each other at least one opening / closing portion. A gaming machine having a path (series paths 181a, 182a), and detecting an inappropriate state of the wearing state by detecting an energized state of the series path.

  According to the feature A1, when the series path is not energized, the package terminal and the socket terminal are not in contact with each other in at least one opening / closing part due to an inappropriate mounting state of the electronic component with respect to the socket. Become. That is, it is in an open state. For this reason, even if not all of the open / close sections are in the open state, if even one of them is in the open state, the inappropriateness of the electronic component mounting state is detected, so that the detection accuracy can be improved. In this case, the electronic component is suppressed from being detected as being inappropriate even though the mounting state of the electronic component is inappropriate, or from being detected as inappropriate even though the mounting state is appropriate. Can be suitably managed.

Feature A2. The series path connects the package terminals of the open / close sections adjacent to each other in the series path, thereby connecting the open / close sections in series (first connection paths 191, 195, second Connecting paths 192, 196),
The gaming machine according to Feature A1, wherein the package side connection path is provided in the electronic component.

  According to the feature A2, in the series path of the detection circuit, since the package-side connection path connecting the two open / close portions is provided in the electronic component, at least two packages can be detected by detecting the energization state of the series path. The contact state of the terminals with the socket terminals can be detected collectively. Therefore, for example, the procedure for detecting the contact state between the package terminal and the socket terminal is complicated compared to a configuration in which predetermined data is read from the electronic component in order to detect the contact state between the package terminal and the socket terminal. Can be suppressed.

Feature A3. The plurality of package terminals are provided in a plurality of rows along the plate surface of the package,
The series path includes a first connection path (first connection paths 191 and 195) connecting the two package terminals as the package side connection path, and two package terminals different from the first connection path. The second connection path (second connection paths 192, 196) connecting the two is provided in the electronic component, and thus has four opening / closing parts,
The gaming machine according to Feature A2, wherein each of the package terminals of the four opening / closing portions is arranged in two of the plurality of rows.

  According to the feature A3, the four package terminals included in the series path are arranged along two directions intersecting each other along the plate surface of the package. It is possible to detect not only in two directions.

  Feature A4. The arrangement direction of the two package terminals connected by the first connection path is the same as the arrangement direction of the two package terminals connected by the second connection path. Game machines.

  According to the feature A4, by arranging the first connection path and the second connection path in a state extending in parallel with each other, each of the connection paths can connect two package terminals. For this reason, the length dimension and arrangement | positioning area | region of a 1st connection path and a 2nd connection path can be made small compared with the structure arrange | positioned in the state where the 1st connection path and the 2nd connection path crossed, for example. For this reason, in an electronic component, it can suppress that arrangement | positioning of the other wiring pattern of an electronic component is restrict | limited by presence of a 1st connection path and a 2nd connection path.

Feature A5. Each package terminal in each of the plurality of rows is arranged in a direction in which one side of the rectangular package extends,
Each of the package terminals of the four opening / closing sections is arranged at a corner position among the plurality of package terminals arranged in the plurality of rows. The gaming machine according to A3 or A4,

  When an electronic component is displaced, the displacement of the corner portion of the package is larger than the displacement of the central portion of the package, regardless of whether the displacement direction is the direction in which the plate surface of the package extends or the thickness direction of the package. Become. Therefore, as shown in the feature A5, each of the package terminals of the four open / close portions is arranged at a corner position closest to each of the four corners of the package, so that a part of all the package terminals of the electronic component is a socket terminal. Even when the position of the electronic component is shifted to such a degree as to be separated from the package, a configuration in which some of the separated package terminals are included in the detection circuit can be realized. Thereby, the detection accuracy of the positional deviation of the electronic component can be increased.

Feature A6. The plurality of packages are provided in a plurality of rows along the plate surface of the package,
Each package terminal in each of the plurality of rows is arranged in a direction in which one side of the rectangular package extends,
The two package terminals connected by the package side connection path are arranged at a corner position and a diagonal position among the plurality of package terminals arranged in the plurality of rows. The gaming machine according to Feature A2.

  As described above, when the electronic component is displaced, the amount of displacement of the corner portion of the package is equal to that of the central portion of the package regardless of whether the displacement direction is the direction in which the plate surface of the package extends or the thickness direction of the package. It becomes larger than the displacement. Therefore, as shown in feature A6, each package terminal of the two open / close portions is disposed at a corner position closest to each of a pair of opposing corners of the four corners of the package, so that all the package terminals of the electronic component are arranged. Even if the positional deviation of the electronic component is such that a part thereof is separated from the socket terminal, it is possible to realize a configuration in which some of the separated package terminals are included in the detection circuit.

  Moreover, since this configuration can be realized by one series path and two package terminals, the number of package terminals included in the detection circuit can be reduced as much as possible. As a result, it is possible to suppress an increase in the circuit design constraint on the electronic component in order to secure the package terminal of the detection circuit while increasing the detection accuracy of the positional deviation of the electronic component.

Feature A7. As the detection circuit,
A first detection circuit (first detection circuit 181) having a predetermined package terminal among the plurality of package terminals;
A second detection circuit (second detection circuit 182) having a package terminal different from the first detection circuit;
With
Based on the detection results of the first detection circuit and the second detection circuit, the manner of detaching the electronic component from the appropriate position (appropriate position N0) when the mounting state is appropriate is specified as the position shift level. The gaming machine according to any one of features A1 to A6, wherein a specifying unit (a function of executing the process of step S501) is provided.

  According to the feature A7, the magnitude of the positional deviation of the electronic component can be specified as the positional deviation level by the two detection circuits. In this case, it is possible to determine whether the manner in which the electronic component is removed from the appropriate position is such that gaming may be prioritized or whether it is better to improve the mounting state. It is possible to finely set the handling process when a positional deviation occurs in accordance with the positional deviation level.

  Feature A8. The specifying means has a higher misalignment level when the second detection circuit detects an inappropriateness of the mounting state than when the first detection circuit detects an inappropriateness of the mounting state. The gaming machine according to Feature A7, characterized in that

  According to the feature A8, when the electronic component is displaced, the arrangement of the package terminals is set for these detection circuits so that the first detection circuit and the second detection circuit can be detected in different positions. As a result, the misregistration level can be identified without the identification means making a complicated determination. Thereby, it is possible to save the trouble that the specifying means sets the determination process for specifying the misregistration level individually for each gaming machine.

Feature A9. In the package, each package terminal of the second detection circuit is disposed at a position where a separation distance from a peripheral portion of a plate surface of the package is larger than each package terminal of the first detection circuit,
The specifying means has a higher misalignment level when the second detection circuit detects an inappropriateness of the mounting state than when the first detection circuit detects an inappropriateness of the mounting state. The gaming machine according to Feature A7 or A8, characterized in that

  As described above, when the electronic component is displaced, the displacement amount of the peripheral portion of the package is the center portion of the package regardless of whether the displacement direction is the direction in which the plate surface of the package extends or the thickness direction of the package. It becomes larger than the displacement. Therefore, as in feature A9, in the configuration in which each package terminal of the second detection circuit is disposed inside the package with respect to each package terminal of the first detection circuit, the second detection circuit is more electronic than the first detection circuit. A large misalignment of parts can be detected. In this case, for example, the designer can determine which package terminal is included in the detection circuit after visually confirming the arrangement of all package terminals of the package. Can be set appropriately without being too high and not too low.

Feature A10. Means for shifting the gaming state to another gaming state having a different expected game media acquisition value from the normal gaming state when the predetermined transition condition is satisfied (function to execute the process of step S214);
Means for shifting the gaming machine to a standby state when the game is not being performed (function to execute the process of step S217);
Means for notifying the occurrence of abnormality when the first detection circuit of the first detection circuit and the second detection circuit detects that the wearing state is inappropriate and the gaming state is the normal gaming state (S511) Processing function), and
Means for notifying the occurrence of an abnormality when the inappropriateness of the wearing state is detected by both the first detection circuit and the second detection circuit and the gaming machine is in the standby state (function of executing the processing of S508) When,
The gaming machine according to Feature A9, comprising:

  According to the feature A10, when the inappropriateness of the mounting state of the electronic component is detected only by the first detection circuit, the game machine is notified at the timing when it is in the standby state, and the notification ends the game for the player. It is possible to suppress triggering and hindering the player's profit. Each package terminal of the first detection circuit is preferably arranged at a position where a slight positional shift of the electronic component can be detected.

  In addition, when both the first detection circuit and the second detection circuit detect that the electronic component is not properly mounted, the gaming state is notified at the timing when the gaming state is in the normal gaming state. It is possible to suppress the inhibition of the player's profit as compared with the case where the expected value of acquisition is notified at the timing of the special game state higher than the normal game state.

Feature A11. Means for determining whether to notify of the occurrence of an abnormality based on the state of the gaming machine (function to execute the processing of steps S506 and S510) when the detection circuit detects that the wearing state is inappropriate ,
An external notification means (a function for executing the processing of step S513) for notifying the management device outside the gaming machine of the occurrence of an abnormality when the notification is not performed;
A gaming machine according to any one of features A1 to A10, wherein:

  According to the feature A11, even when the detection circuit detects that the electronic component is not properly mounted, the player's profit is not notified when the gaming state is in the special gaming state. Can be inhibited. On the other hand, since the occurrence of an abnormality is notified to the management device, the hall manager or the like can perform a work to cope with the occurrence of the displacement of the electronic component.

Feature A12. The electronic component is a gaming machine that is a storage unit that stores information about sound output from a sound output unit (speaker 91),
Means for determining whether or not sound is output from the sound output means (function to execute the process of step S408);
Means for notifying the occurrence of abnormality when the inappropriateness of the wearing state is detected by the detection circuit and the sound output from the sound output means is being performed (the processing of steps S508 and S511 is executed) Function)
Means for notifying occurrence of abnormality when the detection circuit detects that the wearing state is inappropriate and the sound output means is not outputting sound (a function of executing the process of step S505);
A gaming machine according to any one of features A1 to A11, wherein:

  Even if the mounting state of the electronic component is not suitable, if the package terminal used for sound data input / output is in conduction with the socket terminal, the electronic component operates normally and the sound output means Is assumed to be output. On the other hand, according to the feature A12, even when the mounting state of the electronic component is inappropriate, the notification is performed in a different manner depending on whether the sound is output from the sound output unit or not. It becomes possible. Therefore, if the game is not hindered by the sound being output from the sound output means, it is possible to have the player continue the game without notification. On the other hand, if no sound is output from the sound output means, the state of the electronic component is improved so that the sound is output properly by notifying that there is a high possibility that the game will be hindered. It becomes possible to do.

Feature A13. The detection circuit includes:
It has an output path (output path 181b, 182b) that is connected to the upstream end of the series path and outputs a detection signal of the detection circuit,
A power supply unit that applies a predetermined voltage to the output path is connected to the output path via a pull-up resistor (pull-up resistor R). Any one of features A1 to A12, Game machines.

  According to feature A13, when the mounting state of the electronic component is appropriate, when the series path is energized, 0 V (LOW level) is output as an energization signal from the output path, and the mounting state is inappropriate In addition, when the energization of the series path is interrupted, a predetermined voltage (HI level) higher than the LOW level is output as an interruption signal from the output path. For this reason, even if the output from the output path becomes the LOW level due to other causes such as instability of the power supply voltage, it is possible to appropriately determine the case and the inappropriateness of the mounting state of the electronic component.

  On the other hand, for example, in the configuration in which the HI level is output as the energization signal and the LOW level is output as the cutoff signal (configuration in which the pull-down resistor is provided), when the output from the output path becomes the LOW level, It becomes difficult to determine whether the cause is inappropriate in the mounting state of the electronic component or other causes such as unstable power supply voltage. In this configuration, since the output path is connected to the power supply unit without going through the pull-up resistor, if the socket terminal of the opening / closing unit to which the output path is connected comes into contact with another package terminal, the package There is a concern that a large current will flow through the terminals, causing abnormalities in electronic components. According to the feature A13, these concerns can be eliminated.

  Feature A14. The gaming machine according to any one of features A1 to A13, wherein the package terminal included in the series path is a test terminal that does not function when the electronic component operates.

  According to the feature A14, in the detection circuit, since the test terminal of the electronic component is included in the opening / closing part, the inappropriate detection of the mounting state of the electronic component and the operation of the electronic component are performed independently of each other. become. Therefore, it is possible to avoid a decrease in detection accuracy of the detection circuit and a decrease in reliability of the operation of the electronic component.

<Feature B group>
The invention of the following feature group B is effective for the following problems.

  A gaming machine such as a pachinko machine is provided with a main control device for overall management of games, a sub-control device for controlling sound output based on signals from the main control device, and the like. These control devices have a circuit board provided with a predetermined wiring pattern, and electronic components such as a CPU, a ROM, and a RAM are mounted on the circuit board by surface mounting or the like. As a configuration in which the electronic component is surface-mounted on the circuit board, there is a configuration in which the electronic component is mounted on a socket attached to the circuit board (see, for example, Japanese Patent Application Laid-Open No. 2009-268548). Each of the electronic component and the socket has a plurality of electrodes, and these electrodes are in contact with each other as terminals, so that the electronic component is operable in the control device.

  However, in the configuration in which the electronic component is mounted on the socket, the terminal of the electronic component and the terminal of the socket are not soldered, unlike through-hole mounting in which the terminal of the electronic component is soldered to the circuit board, for example. . For this reason, when the mounting state of the electronic component to the socket is not appropriate, there is a concern that the electronic component does not operate normally.

  Here, the case where the electronic component is not properly mounted includes not only the case where the regular electronic component is displaced from the appropriate position but also the case where an unauthorized electronic component is forcibly mounted on the socket. In this case, even if all the terminals of the electronic component are in contact with the terminals of the socket, the contact state is considered to be unstable compared to the case where the regular electronic component is mounted in the socket. However, there is a concern that fraudulent persons can gain profits illegally by operating unauthorized electronic components even in this state.

Feature B1. An electronic component (common ROM 147) having a package (package 171) is mounted on the circuit board by being mounted on a socket (socket 174) attached to the circuit board (circuit board 168).
A plurality of sets of socket terminals (socket terminals 176) of the socket and package terminals (package terminals 172) of the package that are in contact with the socket terminals so as to be energized are provided, and the plurality of package terminals are plates of the package. A plurality of gaming machines arranged along a plane,
A detection circuit (a third detection circuit 201, a fourth detection circuit 202) for detecting a mounting state of the electronic component in the socket;
The detection circuit includes:
An upstream path (first output path 201a, 202a, second output path 201b, 202b) to which a predetermined voltage is applied, a downstream path (grounding path 201c, 202c) provided downstream of the upstream path, and these upstream paths A connection package terminal (first package terminal 172i, second package terminal 172j) which is one of the package terminals connecting the path and the downstream path, and the upstream package path and the downstream path are the connection package terminals. When energized through, the energization signal is output, and when the energization between the upstream path and the downstream path is interrupted, the interruption signal is output.
The plurality of socket terminals include upstream socket terminals (first socket terminals 176j and 176m, second socket terminals 176k and 1767n) to which the upstream path is connected, and downstream socket terminals (ground sockets) to which the downstream path is connected. Terminals 176i, 176l), and
The upstream path and the downstream path are energized when both the upstream socket terminal and the downstream socket terminal are in contact with the connection package terminal, and at least one of the upstream socket terminal and the downstream socket terminal is the A gaming machine characterized in that energization is cut off when it is not in contact with a connection package terminal.

  According to the characteristic B1, in the detection circuit, when both the upstream socket terminal and the downstream socket terminal are in contact with the connection package terminal, an energization signal is output, and at least one of these socket terminals is in contact with the connection package terminal. If not, a shutoff signal is output. For this reason, not only when the energization signal is output, but also when the cutoff signal is output, if the mounting state of the electronic component is within the appropriate range, the appropriate level of the mounting state of the electronic component Can be specified. In other words, if the mounting state of an electronic component is appropriate, specify whether the electronic component is in a state far from inappropriate (a state where the appropriate level is high) or near (a state where the appropriate level is low). Is possible. Therefore, the detection accuracy by the detection circuit can be increased with respect to the mounting state of the electronic component.

  Moreover, since both the upstream socket terminal and the downstream socket terminal are in contact with one connection package terminal, it is not necessary to provide a dedicated path for connecting a plurality of package terminals in the electronic component. For this reason, even when a commercially available product is used as an electronic component, a detection circuit can be constructed with the electronic component.

  As described above, the mounting state of the electronic component with respect to the socket can be suitably managed.

  Even if the mounting state of the electronic component is within the appropriate range, if the appropriate level is low, there is a concern that an unauthorized electronic component is forcibly mounted in the socket instead of a regular electronic component. Is done. On the other hand, according to this feature, the detection circuit can detect that the appropriate level of the mounting state of the electronic component is low, that is, that the unauthorized electronic component is forcibly mounted on the socket. Thereby, deterrence can be demonstrated with respect to a fraudulent person gaining a profit illegally.

Feature B2. The plurality of package terminals are provided in a plurality of rows along the plate surface of the package,
The gaming machine according to Feature B1, wherein the upstream socket terminal and the downstream socket terminal are provided side by side in a direction that intersects an arrangement direction of the package terminals in each row.

  The position of the electronic component when both the upstream socket terminal and the downstream socket terminal are in contact with the connection package terminal is referred to as the reference position, and the position when only one of them is in contact with the connection package terminal is the non-reference position. In other words, if the separation distance between the upstream socket terminal and the downstream socket terminal is too small, the reference position and the non-reference position become substantially the same position. In this case, since a slight difference in the position (mounted state) of the electronic component is detected by the detection circuit, the detection accuracy is improved, but the electronic component is in two different states: a state far from being inappropriate and a state close to it. Cannot be detected.

  On the other hand, according to the feature B2, since the upstream socket terminal and the downstream socket terminal are arranged in a direction different from the direction in which the row of package terminals extends, for example, these socket terminals are the same as the row of package terminals. Compared with the configuration arranged in the direction, a large separation distance between the upstream socket terminal and the downstream socket terminal can be secured. In this case, since the electronic circuit can detect two different states, that is, a distant state and a close state, from an inappropriate state, the detection circuit can detect the two different states, so that it is unnecessary to improve the mounting state of the electronic component. Can be avoided.

Feature B3. The detection circuit includes, as the upstream path, a first upstream path (first output paths 201a and 202a) and a second upstream path (second output paths 201b and 202b) different from the first upstream path. And
As the upstream socket terminal, a first socket terminal (first socket terminals 176j, 176m) connected to the first upstream path, and a second socket terminal different from the first socket terminal and connected to the second upstream path. The gaming machine according to the feature B1 or B2, characterized in that socket terminals (second socket terminals 176k, 176n) are included.

  According to feature B3, since two upstream socket terminals are provided, it is possible to evaluate the mounting state of the electronic component in four states by detecting the energization state of three terminals including the downstream socket terminal. Is possible. For this reason, regarding the position of the electronic component, a position where all three terminals are in contact with the connection package terminal is referred to as a reference position, and a position where two of the three terminals are in contact with the connection package terminal is referred to as an allowable position. In other words, by specifying the combination of two terminals that are in contact with the connection package terminals, it is possible to determine the direction in which the electronic component is displaced from the reference position. Further, if a position where at least two of the three terminals are separated from the connection package terminal is referred to as a separation position, it is possible to determine whether or not the electronic component is in a non-reference position. As described above, since it is possible to specify which of the four positions the electronic component is, it is possible to improve the detection accuracy for the position of the electronic component.

Feature B4. The plurality of socket terminals include a plurality of standard socket terminals (ground socket terminals 176i, 176l) arranged in a plurality of rows along the plate surface of the circuit board,
The plurality of standard socket terminals include the downstream socket terminal, whereas the first socket terminal and the second socket terminal are not included.
The first socket terminal and the second socket terminal are provided side by side with the downstream socket terminal in the arrangement direction of the plurality of rows,
The gaming machine according to Feature B3, wherein the first socket terminal is disposed on the opposite side of the second socket terminal across the downstream socket terminal in the arrangement direction of the plurality of rows.

  According to the feature B4, the direction of misalignment of the electronic component can be specified in the arrangement direction of a plurality of rows of standard socket terminals (direction intersecting the arrangement direction of the standard socket terminals in each row). Here, in a state where the electronic component is in the allowable position, only the first upstream path is energized to the downstream path via the connection package terminal, and only the second upstream path is downstream via the connection package terminal. The position when the path is energized is a position shifted to the opposite side with respect to the reference position. For this reason, in the arrangement direction of the plurality of rows of the standard socket terminals, it can be specified whether the electronic component is displaced from the first socket terminal side or the second socket terminal side. Therefore, the detection accuracy for the position of the electronic component can be further increased.

  Note that when the first upstream path and the second upstream path are not connected to the downstream path and are short-circuited through the connection package terminal, there is a concern that an unstable voltage is output from the detection circuit. On the other hand, according to this feature, the downstream socket terminal is arranged between the first socket terminal and the second socket terminal in the arrangement direction of the plurality of rows of the standard socket terminals. When the position of the first upstream path and the second upstream path is shifted in the arrangement direction, the detection circuit is prevented from being unstable because the first upstream path and the second upstream path are not connected to the downstream path and are short-circuited through the connection package terminal. it can.

Feature B5. As the detection circuit,
A first detection circuit (third detection circuit 201) having a first package terminal (first package terminal 172i) as the connection package terminal;
A second detection circuit (fourth detection circuit 202) having a second package terminal (second package terminal 172j) different from the first package terminal as the connection package terminal;
With
The downstream socket terminal of the first detection circuit and the downstream socket terminal of the second detection circuit are spaced apart in the direction in which the row of the standard socket terminals extends,
In each of the first detection circuit and the second detection circuit, the first socket terminal, the second socket terminal, and the downstream socket terminal are provided in the same arrangement order in the arrangement direction of the plurality of rows. The gaming machine according to Feature B4.

  According to the feature B5, when the first detection circuit and the second detection circuit detect that only the respective first socket terminals are in contact with the connection package terminals (only energization of the first upstream path), The component is displaced to the first socket terminal side. Further, when it is detected that only each second socket terminal is in contact with the connection package terminal (only energization of the second upstream path), the electronic component is displaced toward the second socket terminal. Become. Therefore, it is possible to specify the direction of displacement of the electronic component based on the detection results of the first detection circuit and the second detection circuit.

Feature B6. As the detection circuit,
A first detection circuit (third detection circuit 201) having a first package terminal (first package terminal 172i) as the connection package terminal;
A second detection circuit (fourth detection circuit 202) having a second package terminal (second package terminal 172j) different from the first package terminal as the connection package terminal;
With
In the plurality of rows, the downstream socket terminal of the first detection circuit and the downstream socket terminal of the second detection circuit are arranged in different rows,
In each of the first detection circuit and the second detection circuit, the first socket terminal, the second socket terminal, and the downstream socket terminal are provided in the same arrangement order in the arrangement direction of the plurality of rows. The gaming machine according to Feature B4.

  According to the feature B6, in the first detection circuit and the second detection circuit, when each of the terminals arranged outside the first socket terminal and the second socket terminal is not in contact with the connection package terminal, the package terminal There is a possibility that an illegal electronic component having a separation distance between the rows of the first and second rows is forcibly attached to the socket. Moreover, when each terminal arranged inside the first socket terminal and the second socket terminal is not in contact with the connection package terminal, the distance between the rows of the package terminals is larger than that of the regular electronic component. There is a possibility that an electronic component is forcibly attached to the socket. Therefore, even if an unauthorized electronic component is forcibly attached to the socket, this can be detected by the first detection circuit and the second detection circuit.

Feature B7. As the detection circuit,
A first detection circuit (third detection circuit 201) having a first package terminal (first package terminal 172i) as the connection package terminal;
A second detection circuit (fourth detection circuit 202) having a second package terminal (second package terminal 172j) different from the first package terminal as the connection package terminal;
With
Each package terminal in each of the plurality of rows is arranged in a direction in which one side of the rectangular package extends,
The downstream socket terminal of the first detection circuit and the downstream socket terminal of the second detection circuit are arranged at corner positions and diagonal positions among the plurality of standard socket terminals arranged in the plurality of rows. Has been
In each of the first detection circuit and the second detection circuit, the first socket terminal, the second socket terminal, and the downstream socket terminal are provided in the same arrangement order in the arrangement direction of the plurality of rows. The gaming machine according to Feature B4.

  When an electronic component is displaced, the displacement of the corner portion of the package is larger than the displacement of the central portion of the package, regardless of whether the displacement direction is the direction in which the plate surface of the package extends or the thickness direction of the package. Become. Therefore, as in the feature B7, each downstream socket terminal of the first detection circuit and the second detection circuit is arranged at a corner position closest to each of the pair of opposing angles among the four corners of the package, so that the electronic component A small misalignment can be detected by the first detection circuit and the second detection circuit.

  In addition, in the configuration in which the first package terminal and the second package terminal are arranged at diagonal positions, the first package terminal and the second package terminal are arranged in two directions (column arrangement direction, column extension direction). Since both are separated from each other, both the effect obtained by the feature B5 (detection of positional deviation of the electronic components in the row direction) and the effect obtained by the feature B6 (discovery of illegal electronic components) Can be played.

Feature B8. The detection circuit includes:
When the first upstream path and the downstream path are energized through the connection package terminal, a first energization signal is output, and when the energization between the first upstream path and the downstream path is interrupted, the first cutoff is performed. A signal is output, and when the second upstream path and the downstream path are energized through the connection package terminal, a second energization signal is output, and the energization between the second upstream path and the downstream path is interrupted. The game machine according to any one of features B3 to B7, wherein the game machine outputs a second shut-off signal.

  According to the feature B8, since a signal corresponding to the position of the electronic component is output by the detection circuit, it is possible to suppress the determination process and the like for specifying the position of the electronic component from being complicated.

  Feature B9. The gaming machine according to any one of features B3 to B8, wherein each voltage applied to the first upstream path and the second upstream path has the same voltage value.

  According to the feature B9, the voltage value output from the detection circuit can be the same when the first upstream path and the second upstream path are not energized. On the other hand, for example, in the configuration in which each voltage value applied to the first upstream path and the second upstream path is different, when both the first upstream path and the second upstream path are energized, The larger applied voltage among the voltage values becomes the output voltage value for each of the first upstream path and the second upstream path, while only the path with the smaller voltage value among the first upstream path and the second upstream path. When is energized, the output voltage value for the path becomes small. For this reason, there is a concern that the determination accuracy of whether the output voltage from the detection circuit is the energization signal or the cutoff signal is lowered. In this regard, according to this feature, since the output voltage from the detection circuit during energization is constant, it is possible to prevent the determination accuracy from being lowered.

Feature B10. The first upstream path and the second upstream path are output paths that output detection signals of the detection circuit, respectively.
A power supply unit (voltage terminal Vt) for applying a predetermined voltage to each of the first upstream path and the second upstream path has a first pull-up resistor (first pull-up resistors R1a, R2a) on the first upstream path. And the second upstream path is connected via a second pull-up resistor (second pull-up resistors R1b, R1b). The gaming machine according to Feature B9,

  According to the feature B10, when the electronic component is at the reference position, the first upstream path and the second upstream path are individually energized, so that 0 V (LOW level) is individually output as an energization signal. When in the non-reference position, a path that is not energized among the first upstream path and the second upstream path outputs a predetermined voltage (HI level) higher than the LOW level as a cutoff signal. For this reason, even if the output from the first upstream path or the second upstream path becomes a LOW level due to other causes such as power supply voltage instability, the case and the case where the electronic component is in the non-reference position are appropriate. Can be determined.

  On the other hand, for the first upstream path and the second upstream path, for example, in the configuration in which the HI level is output as the energization signal and the LOW level is output as the cutoff signal (configuration in which the pull-down resistor is provided), When the output of the output becomes LOW level, it may be difficult to determine whether the cause is that the electronic component is in a non-reference position or other causes such as unstable power supply voltage. . In this configuration, since the first upstream path and the second upstream path are connected to the power supply unit without going through the pull-up resistor, the first socket terminal and the second socket terminal to which these upstream paths are connected If it comes into contact with the package terminal, there is a concern that a large current flows through the package terminal and an abnormality occurs in the electronic component. According to the feature B10, these concerns can be solved.

  Feature B11. The gaming machine according to any one of features B1 to B10, wherein the connection package terminal is a test terminal that does not function when the electronic component operates.

  According to the feature B11, in the detection circuit, since the test terminal of the electronic component is a connection package terminal, the position detection of the electronic component and the operation of the electronic component are performed independently of each other. Therefore, it is possible to avoid a decrease in detection accuracy of the detection circuit and a decrease in reliability of the operation of the electronic component.

<Feature C group>
The invention of the following feature group C is effective for the following problems.

  A gaming machine such as a pachinko machine is provided with a main control device for overall management of games, a sub-control device for controlling sound output based on signals from the main control device, and the like. These control devices have a circuit board provided with a predetermined wiring pattern, and electronic components such as a CPU, a ROM, and a RAM are mounted on the circuit board by surface mounting or the like. As a configuration in which the electronic component is surface-mounted on the circuit board, there is a configuration in which the electronic component is mounted on a socket attached to the circuit board (see, for example, Japanese Patent Application Laid-Open No. 2009-268548). Each of the electronic component and the socket has a plurality of electrodes, and these electrodes are in contact with each other as terminals, so that the electronic component is operable in the control device.

  However, in the configuration in which the electronic component is mounted on the socket, the terminal of the electronic component and the terminal of the socket are not soldered, unlike through-hole mounting in which the terminal of the electronic component is soldered to the circuit board, for example. . For this reason, when the mounting state of the electronic component to the socket is not appropriate, there is a concern that the electronic component does not operate normally.

  Here, when the mounting state of the electronic component is not appropriate, not only all the terminals of the electronic component are not in contact with the socket terminal, but only some of the terminals of the electronic component are in contact with the socket terminal. In this case, it is assumed that the contact between the terminals is in an unstable state. Therefore, even if the electronic components are operating normally, the terminals may be affected by slight vibrations. It is considered that the normal operation of the electronic component is stopped due to a contact failure between the two.

Feature C1. An electronic component (common ROM 147) having a package (package 171) is mounted on the circuit board by being mounted on a socket (socket 174) attached to the circuit board (circuit board 168).
A plurality of sets of socket terminals (socket terminals 176) of the socket and package terminals (package terminals 172) of the package that are in contact with the socket terminals so as to be energized are provided, and the plurality of package terminals are plates of the package. A plurality of gaming machines arranged along a plane,
A detection circuit (fifth detection circuit 211, sixth detection circuit 215) for detecting the mounting state of the electronic component in the socket;
If the mounting state is not included in the plurality of sets and the mounting state is appropriate, disconnect terminals (socket terminals 176o to 176q, 176j, 176k) that do not contact either the package terminal or the socket terminal are the package or the socket. In the side of the package terminal or the socket terminal,
The detection circuit includes:
The mounting state of the electronic component is detected by detecting the presence / absence of the contact of the detachment terminal with respect to the terminal of the package terminal and the socket terminal where the detachment terminal is not arranged side by side. A gaming machine.

  According to the feature C1, when the disconnect terminal is not in contact with either the package terminal or the socket terminal, it is detected that the mounting state of the electronic component is appropriate, and the disconnect terminal contacts the package terminal or the socket terminal. If it is, it can be detected that the mounting state of the electronic component is inappropriate.

  Moreover, since the disengagement terminal is disposed at a position where it does not come into contact with either the package terminal or the socket terminal when the mounting state of the electronic component is appropriate, for example, it is disposed at a position where it comes into contact with the package terminal or the socket terminal. Compared to the configuration, the degree of freedom regarding the installation position of the disconnect terminal can be increased. In this case, by arbitrarily setting the installation position of the release terminal, the mounting state of the electronic component is completely unsuitable, and even if the electronic component is displaced, the mounting state is included in the appropriate range It can also be detected. Further, in this case, it can be suppressed that the installation positions of the package terminal and the socket terminal are limited by the presence of the detached terminal.

  As described above, the mounting state of the electronic component with respect to the socket can be suitably managed.

  Feature C2. The disconnecting terminal is arranged at a position where the terminal that is not side by side with respect to the disconnecting terminal of the package terminal and the socket terminal does not straddle the terminal that is side by side and the disconnecting terminal. The gaming machine according to Feature C1, wherein the gaming machine is characterized in that:

  According to the feature C2, when one terminal out of a pair of package terminal and socket terminal comes into contact with the detached terminal, the one terminal does not contact the other terminal. For this reason, only when the mounting state of the electronic component is inappropriate, the contact of the other terminal to the detached terminal is detected by the detection circuit. Therefore, it can be suppressed that the electronic component is detected as being inappropriate even though the mounting state of the electronic component is appropriate.

  Feature C3. The detachable terminal is located at a position where the terminal that is not arranged side by side with respect to the detachable terminal of the package terminal and the socket terminal can be in a state straddling the terminal that is arranged side by side and the detachable terminal. The gaming machine according to Feature C1, wherein the gaming machine is arranged.

  According to the feature C3, when one terminal of the package terminal and the socket terminal in a set comes in contact with the disengaged terminal, the one terminal can also contact the other terminal. . For this reason, even when the mounting state of the electronic component is included in the appropriate range, the detection circuit can detect that the electronic component is displaced from the appropriate position. Therefore, the detection accuracy by the detection circuit can be increased with respect to the mounting state of the electronic component.

  Feature C4. The disconnect terminal is provided in the socket of the package and the socket, the socket terminal is a terminal side by side with respect to the disconnect terminal, and the package terminal is not side by side with respect to the disconnect terminal The gaming machine according to any one of features C1 to C3, wherein the gaming machine is a terminal.

  According to the feature C4, since the disconnect terminal is provided in the socket, it is not necessary to provide a dedicated path in the electronic component for constructing the detection circuit. For this reason, even when a commercially available product is used as an electronic component, a detection circuit can be constructed with the electronic component.

  Moreover, as a case where another terminal is in contact with the detached terminal, it is assumed that an unauthorized electronic component is forcibly attached to the socket in addition to the case where the electronic component is displaced from the proper position. In this case, since it is possible to detect that an unauthorized electronic component is forcibly attached to the socket by the detection circuit including the disconnect terminal, it is possible to exert a deterrent against an illegal acter gaining profit.

  The basic configuration of the gaming machine to which the above features can be applied is shown below.

  Pachinko gaming machine: operation means operated by a player, game ball launching means for launching a game ball based on the operation of the operation means, a ball path for guiding the launched game ball to a predetermined game area, and a game A gaming machine that includes each gaming component arranged in an area, and gives a bonus to a player when a gaming ball passes through a predetermined passing portion of each gaming component.

  Revolving type gaming machine such as a slot machine: equipped with a picture display device for variably displaying a plurality of pictures, variably starting display of the plurality of pictures due to the operation of the start operation means, and due to the operation of the stop operation means In addition, the game machine is configured such that the variable display of the plurality of patterns is stopped when a predetermined time elapses and a privilege is given to the player according to the pattern after the stop.

DESCRIPTION OF SYMBOLS 10 ... Pachinko machine as a game machine, 91 ... Speaker as sound output means, 147 ... ROM for common use as electronic parts, 168 ... Circuit board, 171 ... Package, 172 ... Package terminal, 172i ... First as connection package terminal 1 package terminal, 172j ... 2nd package terminal as connection package terminal, 174 ... socket, 176 ... socket terminal, 176i ... ground socket terminal as downstream socket terminal and standard socket terminal, 176j ... first socket as upstream socket terminal Terminal, 176k, second socket terminal as upstream socket terminal, 176l, ground socket terminal as downstream socket terminal and standard socket terminal, 176m, first socket terminal as upstream socket terminal, 176n, second socket as upstream socket terminal Socket end 181 ... first detection circuit, 181a ... series path, 181b ... output path, 182 ... second detection circuit, 182a ... series path, 182b ... output path, 185a ... upstream opening / closing section, 185b ... downstream opening / closing section, 185c ... first 1 intermediate opening / closing section, 185d ... second intermediate opening / closing section, 186a ... upstream opening / closing section, 186b ... downstream opening / closing section, 186c ... first intermediate opening / closing section, 186d ... second intermediate opening / closing section, 191 ... second as a package side connection path 1 connection path, 192: second connection path as a package side connection path, 195: first connection path as a package side connection path, 196: second connection path as a package side connection path, 201: as a first detection circuit , A third output circuit as a first upstream path, 201b as a second output path as a second upstream path, and 201c as a downstream path. 202a, a fourth detection circuit as a second detection circuit, 202a, a first output path as a first upstream path, 202b, a second output path as a second upstream path, 202c, a ground path as a downstream path, N0 ... proper position,
R: pull-up resistor, R1a: first pull-up resistor, R1b: second pull-up resistor, R2a: first pull-up resistor, R2b: second pull-up resistor, Vt: voltage terminal Vt as a power supply unit.

Claims (1)

An electronic component having a package is mounted on the circuit board by being mounted on a socket attached to the circuit board,
A gaming machine in which a plurality of sets of socket terminals of the socket and package terminals of the package that are in contact with the socket terminals so as to be energized are provided, and a plurality of the package terminals are arranged along the plate surface of the package. And
Is configured and the package terminals and a pair of the socket terminals as one component, the component is formed by being more connected, the socket terminal and the package terminals at each of said components It is energized when in contact, an arrangement energized when said package terminal and the socket terminal in at least one of the components is not in contact is interrupted, the electronic against the socket by the state of the energizing With a means that can detect abnormalities in the mounting state of parts,
Storage means for storing information about sound output from sound output means in the electronic component;
When the abnormality is detected and sound is output from the sound output means, abnormality notification is executed, and when the abnormality is detected and sound is not output from the sound output means In addition, notification means for performing abnormality notification in a mode different from the abnormality notification,
Gaming machine, characterized in that it comprises.

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