JP6375771B2 - Communication apparatus, communication method, and image forming apparatus - Google Patents

Description

  The present invention relates to a communication device, a communication method, and an image forming apparatus.

Conventionally, in an image forming apparatus or the like, when a control unit accesses a memory such as an EEPROM (Electrically Erasable Programmable Read-Only Memory), serial communication using I ² C (Inter-Integrated Circuit) may be performed. Communication using I ² C requires only two connection lines, SDA (Serial Data Line) and SCL (Serial Clock Line), and can be mounted with fewer wires and pins compared to parallel communication. It is.

Patent Document 1 discloses a configuration in which a plurality of I ² C devices are connected in a daisy chain, and a switch is provided on the daisy chain so that the I ² C device can be disconnected.

In addition, the control unit and the module are installed in order to access the memory from the control unit (master) by mounting the memory as a slave on a module to be controlled by the control unit, which is arranged away from the board on which the control unit is mounted. In general, communication with I2C is performed using I ² C. In this case, since the capacity of the memory to be accessed by the control unit is relatively small and serial communication is possible, the connection between the control unit and the module on which the memory is mounted is connected to a harness that bundles a plurality of wires ( It is generally performed to connect using a wire harness.

For example, in an example of an image forming apparatus, a toner cartridge that supplies toner of each color of C (Cyan), M (Magenta), Y (Yellow), and K (Black) generally has a cartridge status and identification information. A module including a memory to be written is provided. When the control unit communicates with this module using I ² C, the control unit and each module are connected to each other by two wires, SDA and SCL. At this time, it is preferable to connect the SDA and SCL in parallel from the control unit to each module because the maintainability of each toner cartridge is improved.

  By the way, in recent years, the size of image forming apparatuses has been increasing due to the widespread use of production printing systems. Therefore, for example, the distance between the control unit and the module described above may reach several meters. In this case, the length of the wire connecting the control unit and the module becomes long, and the influence of the stray capacitance of the wire cannot be ignored.

Here, as described above, in order to access each module of the C, M, Y, and K toner cartridges from the control unit, consider the case where SDA and SCL are connected in parallel to each module. In this case, each of SDA and SCL is a star wiring connected to each module with a common control unit, and the stray capacitance is larger according to the total length of connection distances from the control unit to each module. Become. For example, when the distance from the control unit to each module is 2 m, the stray capacitance of each SDA and SCL corresponds to the stray capacitance of a 2 m × 4 wire. For this reason, the rise and fall of communication in the SDA and SCL are dull due to the influence of the stray capacitance, so that the communication characteristics may be deteriorated, and the I ² C communication standard may not be satisfied.

Further, according to the technique of Patent Document 1 described above, since the connection beyond the switch is disconnected from the control unit (I ² C bus unit) by the switch on the daisy chain, the stray capacitance of the wire can be suppressed. However, in this case, the I ² C device beyond the switch becomes unusable.

  The present invention has been made in view of the above, and an object of the present invention is to improve communication characteristics when the distance between a master and a slave is long in serial communication.

In order to solve the above-described problems and achieve the object, the present invention provides a plurality of communication lines each including a switch unit that opens and closes a path, and a plurality of connection destinations connected to each of the plurality of communication lines. A communication unit that transmits address information designating a connection destination to a plurality of communication lines and performs serial communication with the connection destination designated by the address information, a communication control unit that controls each switch unit of the plurality of communication lines, and a plurality of A switch control unit that simultaneously controls an open state at a timing indicated by the control signal, and a first voltage between the switch unit and the communication unit for each of the plurality of communication lines. A second voltage is supplied between the switch unit and a connection destination corresponding to the switch unit among the plurality of connection destinations for each of the first voltage supply unit and the plurality of communication lines. Predetermined time delays and a second voltage supply unit to cut off the supply of the second voltage, the switch unit communication line is provided corresponding to the destination specified by the address information is in a closed state with respect to At least one of the switch units included in the communication line corresponding to the connection destination not specified by the address information is in an open state.

  According to the present invention, it is possible to improve communication characteristics when the distance between a master and a slave is long in serial communication.

FIG. 1 is a diagram schematically illustrating an appearance of an example of an image forming apparatus applicable to the embodiment. FIG. 2 is a block diagram illustrating an example configuration for accessing a memory included in each module of each toner cartridge from the control unit in the image forming apparatus according to the embodiment. FIG. 3 is a block diagram schematically illustrating an exemplary configuration of the toner ID substrate. FIG. 4 is a diagram showing a method of bit transfer on the I ² C bus. FIG. 5 is a diagram showing a start condition (start condition) and a stop condition (stop condition). FIG. 6 is a diagram showing data transfer on the I ² C bus. FIG. 7 is a diagram showing a format of data transfer by the I ² C bus. FIG. 8 is a diagram for explaining an existing communication method. FIG. 9 is a diagram illustrating an example of a waveform on each communication line in an existing communication method. FIG. 10 is a diagram illustrating a configuration of an example of a control unit according to the embodiment. FIG. 11 is a circuit diagram illustrating an example of a switch circuit using an analog switch applicable to the embodiment. FIG. 12 is a diagram illustrating an example of a signal waveform when only the enable signal Enable (Y) is set to the value “0”. FIG. 13 is a diagram illustrating an example of a change in each communication line signal when the unit power OFF signal changes from the value “0” to the value “1”. FIG. 14 is a diagram illustrating a configuration of an example of a control unit according to a modification of the embodiment. FIG. 15 is a diagram illustrating an example of a change in each communication line signal when the unit power OFF signal changes from the value “0” to the value “1” according to the modification of the embodiment.

  Hereinafter, embodiments of a communication device, a communication method, and an image forming apparatus will be described in detail with reference to the accompanying drawings.

(Configuration applicable to the embodiment)
FIG. 1 schematically shows an appearance of an example of an image forming apparatus 1 applicable to the embodiment. FIG. 1A is a view of the image forming apparatus 1 viewed from the side, and FIG. 1B is a view of the image forming apparatus 1 viewed from the top. The image forming apparatus 1 includes a main body 2 that controls an image forming operation, a large-capacity paper feeding unit 3 that accommodates a large amount of paper to be supplied to the main body 2, and sorting, punching, binding, and the like on the printed paper. It mainly includes a finisher 4 to be applied and a paper discharge unit 5 that discharges paper that has been printed or sorted.

  The main body 2 has an automatic document feeder 6 at the top, and a document set on the automatic document feeder 6 is scanned by a scanner unit (not shown). In addition, on the upper part of the main body 2, an operation unit 9 is provided in which an interface for presenting various information to the user and receiving an operation input from the user is arranged. A door 7 is provided at the center of the front surface of the main body 2 to cover the toner stored in the main body 2. When the door 7 is opened, the drive system and the like are stopped in order to ensure safety during operation by the user.

  In the image forming apparatus 1, for example, a toner cartridge that supplies toner of each color Y (Yellow), M (Magenta), C (cyan), K (Black), and S (Special) is detachably provided. Note that the S color is a color that is difficult to express using, for example, Y, M, C, and K colors. Each toner cartridge can be detached from the main body 2 and attached to the main body 2 by opening the door 7, for example.

  In the example of FIG. 1, the image forming apparatus 1 is configured to be relatively large with an overall length excluding protrusions of about 3000 mm, a height of about 1200 mm, and a width (depth) of about 900 mm. The main body 2 has a total length of about 1500 mm and a height and a width of about 1200 mm and 900 mm, respectively.

  For example, the image forming apparatus 1 forms an image using toner of each color of Y, M, C, K, and S according to image data supplied from an external computer or the like on paper supplied from the large-capacity paper feeding unit 3. . As an example, a photosensitive drum uniformly charged by a charger is exposed by irradiating a laser beam to form an electrostatic latent image according to image data, and a toner cartridge is formed on the electrostatic latent image. The toner supplied from is attached. By transferring the toner from the photosensitive drum to the paper, and fixing the toner on the paper with a fixing device, an image according to the image data is formed on the paper. The paper on which the image is formed is subjected to a predetermined process by the finisher 4 as necessary, and is discharged to the paper discharge unit 5. The image forming apparatus 1 can also form an image on a medium accommodated in a paper feed unit 8 provided at the lower part of the main body unit 2.

  The modules included in each toner cartridge each have a memory and a driver for reading / writing data from / to the memory. In each module, information such as toner identification information and toner remaining amount is written in the memory. For example, a control unit (not shown) provided in the main body 2 communicates with a driver included in each module, reads information from the memory, and manages each module. The control unit can also display information read from the memory of each module on the screen of the operation unit 9.

  FIG. 2 illustrates an exemplary configuration for accessing the memory of each module included in each toner cartridge from the control unit in the image forming apparatus 1 according to the embodiment. In FIG. 2, the control unit 10 is provided in the main body 2 and includes a CPU (Central Processing Unit) 11 and toner cartridges 20Y, 20M, 20C, 20K, and 20S for Y, M, C, K, and S colors. And the communication lines 30Y, 30M, 30C, 30K and 30S. In the control unit 10, the CPU 11 communicates with each of the toner cartridges 20 </ b> Y to 20 </ b> S via the communication lines 30 </ b> Y to 30 </ b> S in accordance with, for example, a command 40 from the upper control unit.

  The communication lines 30Y, 30M, 30C, 30K, and 30S are bundled in, for example, one harness and routed around the main body 2. In the example of FIG. 1, the size of the main body 2 is approximately 1500 mm × 900 mm × 1200 mm, and the wiring length between the control unit 10 and each of the toner cartridges 20Y to 20S is the other parts in the main body 2. By taking into account the arrangement and the like of the case, it may be about 2000 mm.

  Each of the toner cartridges 20Y to 20S includes a toner ID substrate on which a memory and a driver for controlling the memory are mounted. FIG. 3 schematically illustrates an exemplary configuration of a toner ID substrate 200Y provided in the toner cartridge 20Y. Note that the toner ID substrates included in the other toner cartridges 20M, 20C, 20K, and 20S can be realized with the same configuration as the toner ID substrate 200Y. Therefore, here, the toner ID substrate 200Y will be described as an example.

  In FIG. 3, the toner ID substrate 200Y includes a driver 201Y and a memory 202Y. The memory 202Y is, for example, an EEPROM (Electrically Erasable Programmable Read-Only Memory), and can store the written data in a nonvolatile manner. The driver 201Y controls reading and writing of data with respect to the memory 202Y according to a signal transmitted from the control unit 10.

Here, when communication between the control unit 10 and the driver 201Y (toner ID substrate 200Y) is performed using I ² C, the control unit 10 and the driver 201Y include an SDA (Serial Data Line) for transmitting data, It is connected by two communication lines 31Y and 32Y of SCL (Serial Clock Line) for transmitting a clock. That is, the communication line 30Y shown in FIG. 2 includes these two communication lines 31Y and 32Y.

  Similarly for toner cartridges 20M, 20C, 20K and 20S, each communication line 30M, 30C, 30K and 30S includes two communication lines SDA and SCL, respectively.

Here, a communication method using the I ² C bus will be schematically described. The I ² C bus performs communication using two bus lines of SDA that serially transmits data and SCL that serially transmits a clock. Each device connected to the bus has at least a unique address in the bus, and each device can be specified using this address. In addition, a simple relationship of master and slave is always established between the devices connected by the I ² C bus.

Furthermore, if the I ² C bus has a bus capacitance of 400 pF or less, a plurality of devices can be connected on one bus. This means that when the upper limit value of the capacitance of the I ² C bus is 400 pF and the capacitance exceeds 400 pF, normal communication is not guaranteed.

FIG. 4 shows a method of bit transfer on the I ² C bus. While the SCL clock signal is in the high state, the SDA state must be constant. The SDA can be changed between the high state and the low state only when the clock signal of the SCL is in the low state.

  FIG. 5 shows a start condition (start condition) and a stop condition (stop condition). The change of SDA from a high state to a low state when SCL is in a high state is called a start condition, and the bus becomes busy. On the other hand, when the SCL is in the high state, the SDA changing from the low state to the high state is called a stop condition. For a while after the stop condition, the bus becomes free. If a start condition is generated repeatedly instead of a stop condition, the bus busy state is maintained. The start condition and the stop condition are always generated by the master.

FIG. 6 shows data transfer on the I ² C bus. On the I ² C bus, data is output in units of 1 byte (8 bits) with respect to SDA. A 1-bit acknowledge bit is output after the 8-bit data. Each bit is output for each SCL clock. There is no limit to the number of bytes that can be transmitted in one transfer. Also, 1-byte data is transmitted in order from the most significant bit (MSB).

FIG. 7 shows a format of data transfer by the I ² C bus. The 8-bit data transferred immediately after the start condition includes 7-bit address information and 1-bit data direction bit. The address information indicates the address of the transfer destination slave. The address information is valid until a stop condition is output or until the next address information is transferred after the repeated start condition is output.

For a device connected as a slave to the I ² C bus, address information is stored in advance in a nonvolatile memory, for example. For example, when the address information detected from the signal transmitted via I ² C matches the address information stored in the slave device, the slave device receives the data included in the signal.

  The data direction bit indicates transmission (data write) when the value is “0”, and indicates a data request (read) when the value is “1”.

  After the address information and the data direction bit are transferred, the transfer data is transferred in units of 8 bits.

  In the above example, the CPU 11 is a master, and the toner ID substrates 200Y, 200M, 200C, 200K, and 200S (drivers 201Y, 201M, 201C, 201K, and 201S) are slaves.

(Existing communication method)
Next, a communication method according to the embodiment will be described. First, an existing communication method will be described with reference to FIG. In FIG. 8, the same reference numerals are given to the portions common to FIGS. 2 and 3 described above, and detailed description thereof is omitted.

  In FIG. 8, the communication line by SDA and SCL is derived | led-out from CPU11. In the example of FIG. 8, the CPU 11 and the toner ID substrates 200Y, 200M, 200C, 200K, and 200S are connected by a star wiring that shares the CPU 11 side. That is, each of the communication lines 32Y, 32M, 32C, 32K, and 32S shares one end, and the one end that is shared is connected to a communication line by SDA that is derived from the CPU 11. Similarly, each of the communication lines 31Y, 31M, 31C, 31K, and 31S shares one end, and the one end that is shared is connected to a communication line by SCL that is derived from the CPU 11.

  As described above, by connecting the toner ID substrates 200Y, 200M, 200C, 200K, and 200S in parallel to the CPU 11, any one of the toner ID substrates 200Y, 200M, 200C, 200K, and 200S due to the pinching of the harness or the like. Even when a communication failure occurs, it is easy to identify a communication failure location and improve maintainability.

  The toner ID substrates 200Y, 200M, 200C, 200K, and 200S are provided at positions away from the control unit 10. For example, it is assumed that the distance between each toner ID substrate 200Y, 200M, 200C, 200K, and 200S and the control unit 10 is about 2000 mm.

Each toner ID substrate 200Y, 200M, 200C, 200K, and 200S is connected to each memory 202Y, 202M, 202C, 202K, and 202S on the I ² C bus of each toner ID substrate 200Y, 200M, 200C, 200K, and 200S. Address information indicating addresses is stored. For example, in the toner ID substrate 200Y, when the driver 201Y receives the address information transmitted from the SDA communication line 32Y, the driver 201Y compares the received address information with the address information stored in the memory 202Y, and accesses the driver 201Y. It is determined whether or not.

In I ² C bus communication, it is generally necessary to use an open output. Therefore, in the example of FIG. 8, the SDA and SCL communication lines derived from the CPU 11 are respectively connected between the CPU 11 and the branch points to the toner ID substrates 200Y, 200M, 200C, 200K, and 200S. And 51 are connected to a power supply voltage of + 5V.

  For example, when the CPU 11 wants to communicate with the toner ID substrate 200Y, after the start condition, the address information of the toner ID substrate 200Y is set as serial data and transmitted to the communication line by SDA, and the format shown in FIG. The data is transmitted following the address information. The transmitted address information and data are transferred to the toner ID substrates 200Y, 200M, 200C, 200K, and 200S via the communication lines 32Y, 32M, 32C, 32K, and 32S, respectively.

  Among the toner ID substrates 200Y, 200M, 200C, 200K, and 200S, the toner ID substrate 200Y specified by the address information receives data transmitted following the address information. On the other hand, among the toner ID substrates 200Y, 200M, 200C, 200K, and 200S, the toner IDs 200M, 200C, 200K, and 200S that are not specified by the address information ignore, for example, data transmitted following the address information.

Here, in the example of FIG. 8, for example, the communication line by SDA has a configuration in which five communication lines 32Y, 32M, 32C, 32K, and 32S are connected in parallel. Therefore, the capacitance of the communication line based on SDA viewed from the CPU 11 is the total of the capacitances of the five communication lines. On the other hand, as described above, since there is an upper limit on the capacitance that can be connected to the I ² C bus, the communication lines 32Y, 32M, 32C, 32K, and 32S, and the toner ID substrates 200Y, 200M, 200C, and 200K. Depending on the capacitance specifications of 200S and 200S, there is a possibility that the upper limit of the capacitance defined for the I ² C bus may be exceeded.

  Actually, the electrostatic capacity related to the communication line by SDA further includes the electrostatic capacity by each toner ID substrate 200Y, 200M, 200C, 200K, and 200S.

  FIG. 9 shows examples of waveforms in the communication lines 31Y, 31M, 31C, 31K and 31S and 32Y, 32M, 32C, 32K and 32S in the example of FIG. In FIG. 9, signals SDA (Y), SDA (M), SDA (C), SDA (K) and SDA (S) correspond to signals on the communication lines 32Y, 32M, 32C, 32K and 32S, respectively. , SCL (Y), SCL (M), SCL (C), SCL (K), and SCL (S) correspond to signals on the communication lines 31Y, 31M, 31C, 31K, and 31S, respectively.

  Communication lines derived from, for example, SDA derived from the CPU 11 are connected in parallel to the communication lines 32Y, 32M, 32C, 32K, and 32S. Therefore, a signal transmitted from the CPU 11 to the communication line by SDA is transferred to each of the communication lines 32Y, 32M, 32C, 32K, and 32S. The same applies to communication lines using SCL.

Here, as described above, the harness for connecting the control unit 10 and each of the toner ID substrates 200Y, 200M, 200C, 200K, and 200S is long, and the capacitance of the communication line by the SDA and SCL is the I ² C bus. Let us consider the case where the upper limit of the capacitance specified in the above is exceeded.

In this case, due to the time constant of the communication line, the signal rise and fall times (shown as time t _{0 in the} figure) become longer than the time specified for the I ² C bus. That is, the waveform of the signal transmitted through the communication line by SDA and SCL becomes dull with respect to the prescribed waveform. As a result, the time when the communication is confirmed, that is, the time when the signal is flat becomes shorter than the specified time, so that the communication characteristics may deteriorate and normal communication may not be performed. This becomes conspicuous when trying to perform higher-speed communication.

As a countermeasure against the deterioration of the communication characteristics, a method of increasing the rise time by reducing the pull-up resistance constant and increasing the current flowing through the pull-up resistor can be considered. However, the lower the pull-up resistance, the more the signal low level offsets. In the I ² C bus, the low level of the signal is also defined, and it is difficult to set the pull-up resistance to a value below a certain level.

(Communication method according to the embodiment)
Next, a communication method according to the embodiment will be described. Access from the control unit 10 to the toner ID substrates 200Y, 200M, 200C, 200K, and 200S is performed exclusively for the toner ID substrates 200Y, 200M, 200C, 200K, and 200S. Therefore, in the embodiment, among the toner ID substrates 200Y, 200M, 200C, 200K, and 200S, the communication line connected to the toner ID substrate accessed by the control unit 10 is set to the connection state and connected to the other toner ID substrates. Set the communication line to be disconnected. In the embodiment, this makes it possible to suppress signal dullness when the harness connecting the control unit 10 and each toner ID substrate 200Y, 200M, 200C, 200K, and 200S is long.

  FIG. 10 shows an exemplary configuration of the control unit 10 according to the embodiment. In FIG. 10, the same reference numerals are given to the portions common to FIG. 8 described above, and detailed description thereof is omitted.

  In FIG. 10, switch units 70Y, 70M, 70C, 70K, and 70S are provided on the paths of communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S, respectively. Each switch unit 70Y, 70M, 70C, 70K and 70S includes two switch circuits 71Y and 72Y, 71M and 72M, 71C and 72C, 71K and 72K, and 71S and 72S, respectively.

  More specifically, in the switch unit 70Y, the switch circuit 71Y is provided on the path of the communication line 31Y, and the switch circuit 72Y is provided on the path of the communication line 32Y. Similarly, in switch unit 70M, switch circuits 71M and 72M are provided on the paths of communication lines 31M and 32M, respectively. In switch unit 70C, switch circuits 71C and 72C are on the paths of communication lines 31C and 32C, respectively. Is provided. In the switch unit 70K, the switch circuits 71K and 72K are provided on the paths of the communication lines 31K and 32K, respectively. In the switch unit 70S, the switch circuits 71S and 72S are provided on the paths of the communication lines 31S and 32S, respectively. It is done.

  In the switch unit 70Y, the switch circuits 71Y and 72Y are commonly controlled by the state of the control terminal 73Y. The control terminal 73Y takes one of the values “1” and “0”. In the example of FIG. 10, the switch circuits 71Y and 72Y are each in the on state (closed) when the control terminal 73Y is in the value “1”. State), and the control terminal 73Y is in the off state (open state) when the value is “0”.

  The same applies to the other switch units 70M, 70C, 70K, and 70S. That is, in the switch unit 70M, the switch circuits 71M and 72M are controlled in common by the state of the control terminal 73M. In the switch unit 70C, the switch circuits 71C and 72C are controlled in common by the state of the control terminal 73C. In the switch unit 70K, the switch circuits 71K and 72K are controlled in common by the state of the control terminal 73K. In the switch unit 70S, the switch circuits 71S and 72S are controlled in common by the state of the control terminal 73S.

  In the following description, for example, “the switch circuits 71Y and 72Y are turned on or off” is described as “the switch unit 70 is turned on or off” unless otherwise specified. The same applies to the other switch circuits 71M and 72M, 71C and 72C, 71K and 72K, and 71S and 72S.

  In the embodiment, analog switches are used as the switch circuits 71Y and 72Y, 71M and 72M, 71C and 72C, 71K and 72K, and 71S and 72S. The analog switch is capable of bidirectional conduction in the on state, and transmits the state of one end to the other end. In other words, the analog switches have the same potential at both ends in the on state.

  FIG. 11 shows an exemplary circuit of a switch circuit 71Y using an analog switch applicable to the embodiment. In the example of FIG. 11, the switch circuit 71 </ b> Y is configured by connecting an element 710 made up of a P-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and an element 711 made up of an N-channel MOSFET in parallel. The control terminal 73Y is connected to the gate of the element 711 and is connected to the gate of the element 710 via the inverter 712. When the control terminal 73Y is in a state of value “1”, the sources and drains of the elements 710 and 711 are bidirectionally connected. Further, when the control terminal 73Y is in a state of value “0”, the source and drain of the elements 710 and 711 are cut off.

  The other switch circuits 72Y, 71M and 72M, 71C and 72C, 71K and 72K, and 71S and 72S can be realized with the same configuration as the switch circuit 71Y, and thus the description thereof is omitted here.

  Note that the switch circuit 71Y is not limited to a configuration in which the elements 710 and 711 shown in FIG. 11 are connected in parallel. That is, the switch circuit 71Y may have another circuit configuration as long as it can conduct bidirectionally in the on state and can transmit the state of one end to the other end. The switch circuit 71Y may be a circuit that mechanically opens and closes contacts, such as a relay.

  Returning to the description of FIG. 10, a unit power OFF signal supplied from the outside of the control unit 10 is input to the gate of the switch element 62. In the switch element 62, the gate and the source are turned on when the value is “0” (for example, + 5V), and the source and the drain are turned off when the gate is the value “1” (for example, 0V). The switch element 62 has a source connected to a power supply voltage of +5 V, and a drain commonly connected to one end of each pull-up resistor included in the pull-up resistor group 52. The other end of each pull-up resistor is connected to communication lines 31Y, 32Y, 31M, 32M, 31C, 32C, 31K, 32K, 31S and 32S, respectively.

  Note that the unit power OFF signal is a signal for stopping the drive system and the like to ensure safety when operated by the user, for example, when the door 7 is opened. For example, the unit power OFF signal is a value “0” during normal operation of the image forming apparatus 1 and a value “1” under a predetermined condition such as when the door 7 is opened.

  The CPU 11 enables the enable signals Enable (Y), Enable (M), Enable (C), Enable (K), and Enable that take values of one of the values “1” (for example, +5 V) and “0” (for example, 0 V), respectively. Output (S). The enable signals Enable (Y), Enable (M), Enable (C), Enable (K), and Enable (S) are respectively used for the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S. And 32S are signals for setting the validity and invalidity of communication. The enable signals Enable (Y), Enable (M), Enable (C), Enable (K), and Enable (S) are input to the switch control circuit 60.

  The switch control circuit 60 includes AND circuits 61Y, 61M, 61C, 61K and 61S in which each of the two input terminals is an inverting input. Each enable signal Enable (Y), Enable (M), Enable (C), Enable (K) and Enable (S) is input to one inverting input terminal of the AND circuits 61Y, 61M, 61C, 61K and 61S. . A unit power OFF signal is commonly input to the other inverting input terminals of the AND circuits 61Y, 61M, 61C, 61K and 61S.

  For example, the AND circuit 61Y outputs the value “1” when the enable signal Enable (Y) is the value “0”, the unit power OFF signal is the value “0”, the value of the enable signal Enable (Y) and the unit power supply In other combinations with the value of the OFF signal, the value “0” is output. The same applies to the AND circuits 61M, 61C, 61K and 61S.

  Therefore, each of the AND circuits 61Y, 61M, 61C, 61K, and 61S has the enable signals Enable (Y), Enable (M), Enable (C), Enable ( When K) and Enable (S) are “0”, the value “1” is output, and when the value “1” is “0”, the value “0” is output. Each AND circuit 61Y, 61M, 61C, 61K, and 61S has each enable signal Enable (Y), Enable (M), Enable (C), Enable (K) when the unit power OFF signal is a value “1”. ) And “0” are output regardless of the values of Enable (S).

  The output terminals of the AND circuits 61Y, 61M, 61C, 61K and 61S are connected to the control terminals 73Y, 73M, 73C, 73K and 73S of the switch units 70Y, 70M, 70C, 70K and 70S, respectively. When the unit power OFF signal is the value “0”, the output of the AND circuit whose enable signal Enable is “0” among the AND circuits 61Y, 61M, 61C, 61K and 61S is the value “1”. " Thereby, among the switch units 70Y, 70M, 70C, 70K, and 70S, the switch unit to which the output of the AND circuit is connected is turned on, and the other switch units are turned off.

Here, it is assumed that the CPU 11 is instructed to select and access one of the toner ID substrates 200Y, 200M, 200C, 200K, and 200S by an instruction 40 from the outside. In this case, the CPU 11 transmits address information indicating the instructed access destination to the communication line based on SDA according to the I ² C bus specification. Further, in response to the transmission of the address information, the CPU 11 sets the value of the enable signal Enable corresponding to the access destination indicated by the address information to “0”.

As an example, it is assumed that the external command 40 is an access request to the toner ID substrate 200Y. The CPU 11 selects the toner ID substrate 200Y from the toner ID substrates 200Y, 200M, 200C, 200K, and 200S according to the command 40. The CPU 11 generates a signal indicating the address information of the selected toner ID substrate 200Y according to the specification of the I ² C bus, and transmits a signal indicating the generated address information from the communication line by SDA.

  Further, the CPU 11 outputs an enable signal Enable (Y) corresponding to the selected toner ID substrate 200Y among the enable signals Enable (Y), Enable (M), Enable (C), Enable (K), and Enable (S). The value “0” is set, and other enable signals Enable (M), Enable (C), Enable (K), and Enable (S) are set to the value “1”. As described above, since the unit power supply OFF signal has the value “0”, the output of the AND circuit 61Y to which the enable signal Enable (Y) is input has the value “1”. Further, the outputs of the AND circuits 61M, 61C, 61K, and 61S to which other enable signals Enable (M), Enable (C), Enable (K), and Enable (S) are input have a value “0”.

  The on / off states of the switch units 70Y, 70M, 70C, 70K and 70S are controlled according to the outputs of the AND circuits 61Y, 61M, 61C, 61K and 61S. In this example in which the toner ID substrate 200Y is selected, the control terminal 73Y is set to the value “1”, and the switch unit 70Y is turned on. On the other hand, the control terminals 73M, 73C, 73K, and 73S are each set to the value “0”, and the switch units 70M, 70C, 70K, and 70S are respectively turned off.

  Accordingly, only the communication lines 31Y and 32Y among the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S are included in the communication lines derived from the CPU 11 by SCL and SDA. Will be connected. Therefore, the capacitance related to the communication line by SDA, for example, viewed from the CPU 11 is the capacitance of one communication line 32Y.

  In the example of FIG. 8 based on the existing communication method described above, the capacitance of the communication line by the SDA viewed from the CPU 11 is the capacitance of five communication lines 32Y, 32M, 32C, 32K, and 32S. . As described above, in the communication method according to the embodiment, the capacitance of the communication line by the SDA viewed from the CPU 11 can be significantly reduced compared to the existing communication method.

  FIG. 12 shows a case where only the enable signal Enable (Y) is set to the value “0” among the enable signals Enable (Y), Enable (M), Enable (C), Enable (K), and Enable (S). The example of the waveform of the signal transmitted with the communication line by SDA and SCL is shown. In FIG. 12, signals SDA (Y), SDA (M), SDA (C), SDA (K) and SDA (S) correspond to signals on the communication lines 32Y, 32M, 32C, 32K and 32S, respectively. , SCL (Y), SCL (M), SCL (C), SCL (K), and SCL (S) correspond to signals on the communication lines 31Y, 31M, 31C, 31K, and 31S, respectively.

  When the enable signal Enable (Y) becomes the value “0”, the switch unit 70Y is turned on. As a result, as indicated by solid lines in the signals SDA (Y) and SCL (Y), signal waveforms of the communication lines by SDA and SCL derived from the CPU 11 appear in the communication lines 31Y and 32Y.

  Here, the waveforms of the signals SDA (Y) and SCL (Y) shown in FIG. 9 are superimposed on the waveforms of the signals SDA (Y) and SCL (Y) of FIG. Show. For example, when attention is paid to part A in FIG. 12, it can be seen that the waveform according to the embodiment indicated by the solid line has a sharper rise and fall than the waveform according to the existing communication method indicated by the broken line.

Thus, the capacitance of the communication line can be reduced by turning on only the communication line selected according to the address information and turning off the other communication lines. As a result, even when communication lines are connected in parallel, the capacitance of the communication lines can be kept within a value defined by the I ² C bus, and good communication characteristics can be obtained.

  In FIG. 12, other signals SDA (M) and SCL (M), signals SDA (C) and SCL (C), signals SDA (K) and SCL (K), and signals SDA (S) and SCL (S) shows that the corresponding enable signals Enable (M), Enable (C), Enable (K), and Enable (S) are set to the value “1”, and the switch units 70M, 70C, 70K, and 70S are in the OFF state. Even if it is, it is in a high state. This is because the unit power supply OFF signal is set to the value “0” and the switch element 62 is in the ON state, so that the communication lines 31M and 32M, 31C and 32C, 31K and 32K, and This is because 31S and 32S are pulled up.

  In the above description, each of the switch units 70M, 70C, 70K, and 70S is in the closed state by the enable signals Enable (M), Enable (C), Enable (K), and Enable (S) output from the CPU 11, respectively. The open state is controlled. And, it has been explained that the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S are connected and cut off. It is not limited. For example, the CPU 11 sets the switch units 70M, 70C, 70K, and 70S to one of the open state and the closed state as the enable signals Enable (M), Enable (C), Enable (K), and Enable (S). Only the signal to be controlled is output, and the other states of the switch units 70M, 70C, 70K and 70S are the respective communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S. A configuration in which the automatic operation is performed according to the voltage level of the pull-up voltage is conceivable.

Furthermore, in the above description, only the communication line selected according to the address information is turned on and the other communication lines are turned off, but this is not limited to this example. That is, it is only necessary that the capacitance of the communication line viewed from the CPU 11 is equal to or less than the capacity specified for the I ² C bus. As an example, taking communication lines 32Y, 32M, 32C, 32K and 32S by SDA as an example, when communication line 32Y is selected according to address information, for example, each of other communication lines 32M, 32C, 32K and Among the 32S, it is conceivable to control one or more communication lines in which the electrostatic capacity as viewed from the CPU 11 is equal to or less than the specified capacity.

(Modification of the embodiment)
Next, a modification of the embodiment will be described. The modification of the embodiment relates to an operation according to the unit power OFF signal. As described above, the unit power OFF signal is input in common to the inverting input terminals of the AND circuits 61Y, 61M, 61C, 61K, and 61S. Therefore, when the unit power OFF signal changes from the value “0” to the value “1”, each of the switch units 70Y, 70M, 70C, 70K, and 70S is turned off.

  The unit power OFF signal is also input to the switch element 62 and controls the supply of pull-up voltages to the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S. That is, when the unit power supply OFF signal changes from the value “0” to the value “1”, the pull-up voltages for the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S are changed. Supply is stopped.

  Using FIG. 13, the communication power lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S when the unit power OFF signal changes from the value “0” to the value “1”. An example of signal change is shown.

In FIG. 13 and FIG. 15 described later, signals SDA (Y), b ₁₁ , SCL (Y), b ₂₁ , SDA (M), b ₁₂ , SCL (M), b ₂₂ , SDA (C), b ₁₃ , SCL (C), b ₂₃ , SDA (K), b ₁₄ , SCL (K), b ₂₄ , SDA (S), b ₁₅ , and SCL (S), b ₂₅ are positions in FIG. b _11, showing an example of a _{b 21, b 12, b 22} , b 13, b 23, b 14, b 24, the signal at b ₁₅ and b _25.

In FIG. 13 and FIG. 15 to be described later, signals SDA (Y), a ₁₁ , SCL (Y), a ₂₁ , SDA (M), a ₁₂ , SCL (M), a ₂₂ , SDA (C), a ₁₃ , SCL (C), a ₂₃ , SDA (K), a ₁₄ , SCL (K), a ₂₄ , SDA (S), a ₁₅ , and SCL (S), a ₂₅ are positions in FIG. the signal at _{a 11, a 21, a 12} , a 22, a 13, a 23, a 14, a 24, a 15 and a _25, shows an example seen from the CPU11 side. Further, in FIG. 13 and FIG. 15 described later, the signal (+ 5VDly) indicates the voltage immediately before the drain of the switch element 62, that is, the pull-up resistor group 52 toward the switch element 62.

When the unit power OFF signal changes from the value “0” to the value “1”, each of the switch units 70Y, 70M, 70C, 70K, and 70S is turned off, and the pull-up voltage is supplied from the pull-up resistor group 52. Is also stopped. Therefore, the signal of the position b ₁₁ ~b ₂₅ falls, the low state. On the other hand, the communication lines of SCL and SDA derived from the CPU 11 are maintained in the high state because the pull-up resistors 50 and 51 are applied with the pull-up voltage of + 5V.

  At this time, the supply of the pull-up voltage from the pull-up resistor group 52 stops before each switch unit 70Y, 70M, 70C, 70K, and 70S is turned off due to the influence of the delay in the control unit 10 or the like. Can happen.

  The delay in the control unit 10 may be, for example, a delay in each of the switch units 70Y, 70M, 70C, 70K and 70S due to an analog switch, or a transmission path delay on the substrate of the control unit 10. Furthermore, the influence of delays and the like on the respective communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and the toner ID substrates 200Y, 200M, 200C, 200K and 200S to which 31S and 32S are connected is also considered. It is done.

  If the supply of the pull-up voltage from the pull-up resistor group 52 is stopped before the switch units 70Y, 70M, 70C, 70K and 70S are turned off, the communication lines 31Y and 32Y, 31M and 32M , 31C and 32C, 31K and 32K, and 31S and 32S are in a low state (see part B in FIG. 13). This low state is detected by each of the toner ID substrates 200Y, 200M, 200C, 200K, and 200S, and is transmitted to the CPU 11 from each of the toner ID substrates 200Y, 200M, 200C, 200K, and 200S.

  Further, after this transmission, each of the switch units 70Y, 70M, 70C, 70K, and 70S is turned off. Therefore, after a short low state such as several milliseconds, for example, a pull-up resistor 50 and 51 supplies a pull-up voltage of +5 V to each communication line by SDA and SCL derived from the CPU 11, and these communication lines are high. It becomes a state. Therefore, as shown in the part C of FIG. 13, a “whisker waveform” in a low state is generated for a short time.

By the way, according to the I ² C standard, it is permitted to connect a plurality of masters to the I ² C bus as a communication configuration. Since the start of communication on the I ² C bus is determined to be performed only from the master side, when a plurality of masters are connected to the same I ² C bus, the start of communication competes. May end up. If a communication start conflict occurs, the person who started communication first is permitted to have communication priority. Conversely, for example, if the first master starts communication earlier than the second master among the first master and the second master connected to the same I ² C bus, the second master Recognizes that the first master is communicating and does not perform the communication operation. This communication start is indicated by the start condition operation described above.

  Here, the CPU 11 may recognize a “whisker waveform” as shown in part C of FIG. 13 as a start condition operation. In this case, the CPU 11 recognizes that another master is about to start communication, and an arbitration state occurs in which communication is refrained.

  Therefore, in the modification of the embodiment, the supply of the pull-up voltage to the pull-up resistor group 52 is stopped by giving a delay to the change of the unit power OFF signal from the value “0” to the value “1”. .

  FIG. 14 illustrates an exemplary configuration of the control unit 10 according to a modification of the embodiment. In FIG. 14, the same reference numerals are given to the same parts as those in FIG. 10 described above, and detailed description thereof is omitted.

  14, the control unit 10 shown in FIG. 14 has a delay circuit 81 (between the branch point of the unit power OFF signal to the switch control circuit 60 and the drain of the switch element 62 in the configuration of the control unit 10 in FIG. In FIG. 14, it is described as “D”. The delay circuit 81 delays the unit power OFF signal and inputs it to the gate of the switch element 62. For example, the delay circuit 81 can be configured using a capacitor. Not limited to this, the delay circuit 81 may be configured using a buffer with a switch function.

  When the unit power OFF signal changes from “0” to “1”, the delay circuit 81 delays each switch unit 70Y, 70M, 70C, 70K, and 70S by a predetermined time, The supply of the pull-up voltage from the pull-up resistor group 52 can be stopped.

FIG. 15 shows the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and the unit power OFF signal when the unit power OFF signal changes from the value “0” to the value “1” according to the modification of the embodiment. , 31S and 32S signal change examples. In FIG. 15, the signal (+ 5VDly) corresponds to the signal of FIG. 13 (+ 5VDly), in the example of FIG. 14, the signal (+ 5VDly) has a waveform in position c _10.

The delay circuit 81 delays the unit power OFF signal from the value “0” to the value “1” by the time Dt, and the signal (+ 5VDly) becomes the low state. At the timing when this signal (+ 5VDly) becomes the low state, the supply of the pull-up voltage by the pull-up resistor group 52 is stopped, the signals at the positions b _{11 to} b ₂₅ fall (see the part E in FIG. 15), and the low state It becomes.

  On the other hand, each of the switch units 70Y, 70M, 70C, 70K and 70S is turned off at the timing when the unit power OFF signal changes from “0” to “1”. That is, the supply of the pull-up voltage by the pull-up resistor group 52 is stopped after a time Dt after the switch units 70Y, 70M, 70C, 70K, and 70S are turned off. By setting this time Dt to be longer than a predetermined time by the generation time of the “whisker waveform” described above, the low state of each of the communication lines 31Y and 32Y, 31M and 32M, 31C and 32C, 31K and 32K, and 31S and 32S Is not transmitted from the toner ID substrates 200Y, 200M, 200C, 200K, and 200S to the CPU 11, and a “whisker waveform” does not occur (see portion F in FIG. 15).

  Therefore, according to the modification of the embodiment, the CPU 11 is not erroneously recognized as a start condition of another master, and the occurrence of a problem that the CPU 11 is in an arbitration state can be suppressed.

  The above-described embodiments and modifications are preferred examples of the present invention, but are not limited thereto, and various modifications can be made without departing from the gist of the present invention.

DESCRIPTION OF SYMBOLS 1 Image forming apparatus 2 Main-body part 7 Door 10 Control unit 11 CPU
20Y, 20M, 20C, 20K, 20S Toner cartridge 30Y, 30M, 30C, 30K, 30S, 31Y, 31M, 31C, 31K, 31S, 32Y, 32M, 32C, 32K, 32S Communication line 50, 51 Pull-up resistor 52 Pull Up resistor group 60 Switch control circuit 61Y, 61M, 61C, 61K, 61S AND circuit 62 Switch element 70Y, 70M, 70C, 70K, 70S Switch unit 71Y, 71M, 71C, 71K, 71S, 72Y, 72M, 72C, 72K, 72S switch circuit 73Y, 73M, 73C, 73K, 73S control terminal 81 delay circuit 200Y, 200M, 200C, 200K, 200S toner ID substrate

Japanese Patent No. 3784994

Claims (5)

A plurality of communication lines each provided with a switch part for opening and closing the path;
A communication unit that transmits address information designating one connection destination from a plurality of connection destinations connected to each of the plurality of communication lines to the plurality of communication lines, and performs serial communication with the connection destination designated by the address information When,
A communication control unit that controls the switch unit of each of the plurality of communication lines ;
A switch control unit that simultaneously controls the switch unit included in each of the plurality of communication lines to be open at a timing indicated by a control signal;
For each of the plurality of communication lines, a first voltage supply unit that supplies a first voltage between the switch unit and the communication unit;
For each of the plurality of communication lines, a second voltage is supplied between the switch unit and a connection destination corresponding to the switch unit among the plurality of connection destinations, and is delayed by a predetermined time with respect to the timing. A second voltage supply unit that cuts off the supply of the second voltage ,
The switch unit provided in the communication line corresponding to the connection destination specified by the address information is closed, and at least one of the switch units provided in the communication line corresponding to the connection destination not specified by the address information is open. A communication device characterized by becoming. The communication device according to claim 1, wherein the switch unit is configured using an analog switch. The second voltage supply unit includes:
The communication apparatus according to claim 1 , wherein a cutoff of the supply of the second voltage is delayed for the predetermined time using a capacitor. A communication unit transmits address information designating one connection destination from a plurality of connection destinations connected to each of a plurality of communication lines each having a switch unit for opening and closing a path to the plurality of communication lines, and the address information A communication step for performing serial communication with the connection destination specified by
A communication control unit for controlling the switch unit of each of the plurality of communication lines ;
A switch control step in which the switch control unit simultaneously controls the switch units included in the plurality of communication lines to be in an open state at a timing indicated by a control signal;
A first voltage supply step in which a first voltage supply unit supplies a first voltage between the switch unit and the communication unit to each of the plurality of communication lines;
A second voltage supply unit for each of the plurality of communication lines, supplies a second voltage between the switch unit and a connection destination corresponding to the switch unit among the plurality of connection destinations; A second voltage supply step for interrupting the supply of the second voltage by delaying the timing by a predetermined time ;
The switch unit provided in the communication line corresponding to the connection destination specified by the address information is closed, and at least one of the switch units provided in the communication line corresponding to the connection destination not specified by the address information is open. The communication method characterized by becoming. An image forming unit that forms an image of a plurality of colors of toner on a medium according to image data;
A mounting unit for supplying each of the plurality of color toners to the image forming unit and mounting a plurality of toner modules each having a memory;
A communication device according to any one of claims 1 to 3 ,
The communication device
Each of the plurality of communication lines is connected to a memory included in each of the plurality of toner modules.

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