JP6375086B1 - Insulated heat dissipation board - Google Patents

Insulated heat dissipation board Download PDF

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JP6375086B1
JP6375086B1 JP2018527989A JP2018527989A JP6375086B1 JP 6375086 B1 JP6375086 B1 JP 6375086B1 JP 2018527989 A JP2018527989 A JP 2018527989A JP 2018527989 A JP2018527989 A JP 2018527989A JP 6375086 B1 JP6375086 B1 JP 6375086B1
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conductor layer
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substrate
heat dissipation
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真吾 岩崎
真吾 岩崎
隆 海老ヶ瀬
隆 海老ヶ瀬
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NGK Insulators Ltd
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Abstract

冷熱サイクルに対する耐久性を高め、且つ、半導体モジュールの小型化に寄与する絶縁放熱基板を提供する。セラミックス基板と、該セラミックス基板の少なくとも一方の主表面上に接合された導体層とを有する絶縁放熱基板であって、前記導体層は上面と、下面と、上面及び下面を連結する側面1とを有し、前記セラミックス基板は最低部と、最低部及び前記導体層の側面1を連結する側面2と、該最低部よりも高い位置にあり、前記導体層の下面に接合する接合面とを有し、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、前記下面の高さにおける側面1の前記下面に対する仰角αと、前記接合面の高さにおける側面2の前記接合面に対する仰角βの差の絶対値が平均で20°以下であり、側面1は前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に後退した箇所を有する絶縁放熱基板。Provided is an insulating heat dissipation substrate that enhances durability against a cooling cycle and contributes to miniaturization of a semiconductor module. An insulating heat dissipation substrate having a ceramic substrate and a conductor layer bonded on at least one main surface of the ceramic substrate, wherein the conductor layer has an upper surface, a lower surface, and a side surface 1 connecting the upper surface and the lower surface. And the ceramic substrate has a lowest part, a side face 2 connecting the lowest part and the side face 1 of the conductor layer, and a joint surface that is positioned higher than the lowest part and is joined to the lower face of the conductor layer. When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer in plan view, the elevation angle α of the side surface 1 with respect to the lower surface at the height of the lower surface; The absolute value of the difference in elevation angle β of the side surface 2 with respect to the joint surface at the height of the joint surface is 20 ° or less on average, and the side surface 1 is a method for the tangent of the planar view contour of the conductor layer rather than the end of the upper surface. Receding in the line direction Insulated radiating substrate having portions were.

Description

本発明は、絶縁放熱基板に関し、特に、パワー半導体が実装される絶縁放熱基板に関する。   The present invention relates to an insulating heat dissipation substrate, and more particularly to an insulating heat dissipation substrate on which a power semiconductor is mounted.

HEV/EVや電車等の電力制御にパワー半導体モジュールが使用されている。パワー半導体モジュールは、例えばスイッチング素子、IGBT、MOSFETなどのパワー半導体、導体層を備えた絶縁放熱基板、冷却部材、及び、筺体で構成される。パワー半導体モジュールは、大電力制御を行うため高発熱であり、また、冷熱サイクル環境下で使用される。それゆえ、パワー半導体を実装する絶縁放熱基板には、接合強度、電気絶縁性、放熱性に加え、冷熱サイクルに対する信頼性(耐久性)が要求される。   Power semiconductor modules are used for power control of HEV / EV and trains. The power semiconductor module includes, for example, a power semiconductor such as a switching element, IGBT, and MOSFET, an insulating heat dissipation substrate provided with a conductor layer, a cooling member, and a housing. The power semiconductor module generates high heat because it performs high power control, and is used in a cold cycle environment. Therefore, the insulating heat dissipation board on which the power semiconductor is mounted is required to have reliability (durability) with respect to the thermal cycle in addition to the bonding strength, electrical insulation, and heat dissipation.

このような要求に対応する絶縁放熱基板として、アルミナ基板、窒化アルミニウム基板、窒化珪素基板などのセラミックス基板に薄銅板を直接接合したDCB(Direct Copper Bond)基板が広く知られている。また、アルミナ基板、窒化アルミニウム基板、あるいは窒化珪素基板などのセラミックス基板と薄銅板とを、活性金属を含むロウ材(接合材)を用いて形成される接合層を介して接合してなるAMB(Active Metal Bonding)基板も、絶縁放熱基板として広く知られている。このような絶縁放熱基板については、更なる高性能化を図るべく日夜研究開発が続けられている。   A DCB (Direct Copper Bond) substrate in which a thin copper plate is directly bonded to a ceramic substrate such as an alumina substrate, an aluminum nitride substrate, or a silicon nitride substrate is widely known as an insulating heat dissipation substrate that meets such requirements. In addition, an AMB (AMB) formed by bonding a ceramic substrate such as an alumina substrate, an aluminum nitride substrate, or a silicon nitride substrate and a thin copper plate through a bonding layer formed using a brazing material (bonding material) containing an active metal. Active metal bonding) substrates are also widely known as insulating heat dissipation substrates. With regard to such an insulating heat dissipation substrate, research and development has been continued day and night in order to further improve the performance.

例えば、特許第4051164号公報(特許文献1)によれば、回路層間の絶縁基板の表面粗さRmax及び厚みを制御することにより、金属箔、金属板等の配線回路層の絶縁基板への密着強度を高めることができるとともに、表面に無電解メッキを施した場合においても基板表面への活性液の残留によるメッキ付着を防止でき配線間のショートによる不良をなくすことができ、且つ熱抵抗の低い回路基板を得ることができるとされている。   For example, according to Japanese Patent No. 4051164 (Patent Document 1), by controlling the surface roughness Rmax and thickness of an insulating substrate between circuit layers, adhesion of a wiring circuit layer such as a metal foil or a metal plate to the insulating substrate. Strength can be increased, and even when electroless plating is applied to the surface, adhesion of plating due to residual active liquid on the substrate surface can be prevented, and defects due to short-circuiting between wirings can be eliminated, and low thermal resistance can be achieved. It is said that a circuit board can be obtained.

特許第4688380号公報(特許文献2)によれば、窒化珪素を主結晶相とする絶縁基板の表面粗さRmaxを制御することで、金属板と絶縁基板との接合強度を高めることができ、且つメッキ工程を経ても不具合が生じず、低コストの回路基板を得ることができるとされている。   According to Japanese Patent No. 4688380 (Patent Document 2), by controlling the surface roughness Rmax of the insulating substrate having silicon nitride as the main crystal phase, the bonding strength between the metal plate and the insulating substrate can be increased, Further, it is said that no problems occur even after the plating process, and a low-cost circuit board can be obtained.

特許第5038565号公報(特許文献3)には、回路基板を構成するセラミックス基板の表面粗さの異方性がその抗折強度に大きな影響を及ぼすことが判明し、さらにセラミックス基板の表面粗さの異方性を所定値以下に低減することにより、セラミックス基板の抗折強度を向上させることができ、そのセラミックス基板を使用することにより割れの発生が少なく、絶縁耐圧性及び信頼性が高い回路基板が実現されることが記載されている。   Japanese Patent No. 5038565 (Patent Document 3) reveals that the anisotropy of the surface roughness of the ceramic substrate constituting the circuit board has a great influence on the bending strength, and further the surface roughness of the ceramic substrate. By reducing the anisotropy of the ceramic substrate to a predetermined value or less, the bending strength of the ceramic substrate can be improved. By using the ceramic substrate, a circuit with less generation of cracks and high withstand voltage and reliability is provided. It is described that a substrate is realized.

特許第5498839号公報(特許文献4)には、セラミックス材料から構成される絶縁膜と、ろう材で構成される接合層と、金属で構成される回路板とを備えた絶縁放熱基板が開示されている。当該文献には、絶縁膜の厚みを100μm以下とすることにより、絶縁膜による伝熱抵抗を小さくして、回路板から熱伝導基板への熱伝導性を良好にできることが記載されている。また、絶縁膜の接合層側に複数の凸部を設けることで、絶縁膜と回路板との接合強度が向上することが記載されている。さらに、この凸部が凸に湾曲した曲面状の表面を有するので、ろう材から構成される接合層におけるクラックの発生を抑制し、信頼性が向上することも記載されている。   Japanese Patent No. 54988839 (Patent Document 4) discloses an insulating heat dissipation substrate including an insulating film made of a ceramic material, a bonding layer made of a brazing material, and a circuit board made of metal. ing. This document describes that by setting the thickness of the insulating film to 100 μm or less, the heat transfer resistance by the insulating film can be reduced and the thermal conductivity from the circuit board to the heat conductive substrate can be improved. Further, it is described that the bonding strength between the insulating film and the circuit board is improved by providing a plurality of convex portions on the bonding layer side of the insulating film. Further, it is also described that since the convex portion has a curved surface curved in a convex manner, the occurrence of cracks in the bonding layer made of the brazing material is suppressed, and the reliability is improved.

特許第4051164号公報Japanese Patent No. 4051164 特許第4688380号公報Japanese Patent No. 4688380 特許第5038565号公報Japanese Patent No. 5038565 特許第5498839号公報Japanese Patent No. 5498839

近年、パワー半導体モジュールに対して、出力密度の向上や小型化が要求されるようになってきている。斯かる要求を受けて、パワー半導体モジュールに用いる絶縁放熱基板については、放熱性と小型化とを両立させる目的で、銅板を厚板化することが検討されている。しかし、厚銅板を用いる場合、銅とセラミックスとの熱膨張差に起因して銅板とセラミックス基板との接合界面に発生する熱応力が大きくなり、セラミックス基板と銅板とを接合する際の熱処理で発生する残留熱応力と実使用時の温度変化により生じる繰り返し熱応力とによって、セラミックス基板にクラックが発生する問題が生じやすくなる。   In recent years, power semiconductor modules have been required to have improved output density and downsizing. In response to such demands, it has been studied to increase the thickness of the copper plate for the purpose of achieving both heat dissipation and downsizing of the insulating heat dissipation substrate used in the power semiconductor module. However, when a thick copper plate is used, the thermal stress generated at the bonding interface between the copper plate and the ceramic substrate increases due to the difference in thermal expansion between copper and ceramics, which is generated by heat treatment when bonding the ceramic substrate and the copper plate. Due to the residual thermal stress and the repeated thermal stress caused by the temperature change at the time of actual use, a problem that a crack occurs in the ceramic substrate is likely to occur.

この点、従来技術では冷熱サイクル環境下でのクラックの発生防止が十分とは言えず、更なる耐久性の向上が望まれる。本発明は、このような問題に鑑みてなされたものであり、冷熱サイクルに対する耐久性を高め、且つ、半導体モジュールの小型化に寄与する絶縁放熱基板を提供することを課題の一つとする。   In this regard, the conventional technology cannot be said to be sufficient to prevent the occurrence of cracks in a cold cycle environment, and further improvement in durability is desired. This invention is made | formed in view of such a problem, and makes it one subject to provide the insulated heat dissipation board which improves durability with respect to a thermal cycle, and contributes to size reduction of a semiconductor module.

冷熱サイクルの繰り返しによって発生するセラミックス基板のクラックは導体層(回路層と同義)とセラミックス基板の接合端付近で生じやすい。本発明者は当該原因を追求したところ、セラミックス基板と導体層の接合端において急激な角度変化があることによって大きな熱応力が掛かるためであることを熱応力解析により明らかにした。そして、本発明者は当該接合端部を平滑化することで熱応力が低下し、冷熱サイクル耐久性が有意に向上することを見出した。また、導体層の側面形状を工夫することで実装エリアを拡大させることが可能であることを見出した。本発明は上記知見に基づき完成した。   Cracks in the ceramic substrate that occur due to repeated cooling and heating cycles are likely to occur in the vicinity of the junction end between the conductor layer (synonymous with the circuit layer) and the ceramic substrate. As a result of pursuing the cause, the present inventor has revealed by thermal stress analysis that a large thermal stress is applied due to a sudden angle change at the joint end of the ceramic substrate and the conductor layer. And this inventor discovered that a thermal stress fell by smoothing the said junction edge part, and cooling-heat cycle durability improved significantly. Moreover, it discovered that a mounting area could be expanded by devising the side surface shape of a conductor layer. The present invention has been completed based on the above findings.

本発明は一側面において、
セラミックス基板と、該セラミックス基板の少なくとも一方の主表面上に接合された導体層とを有する絶縁放熱基板であって、
前記導体層は上面と、下面と、上面及び下面を連結する側面1とを有し、
前記セラミックス基板は最低部と、最低部及び前記導体層の側面1を連結する側面2と、該最低部よりも高い位置にあり、前記導体層の下面に接合する接合面とを有し、
導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、前記下面の高さにおける側面1の前記下面に対する仰角αと、前記接合面の高さにおける側面2の前記接合面に対する仰角βの差の絶対値が平均で20°以下であり、
導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1は前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に後退した箇所を有する絶縁放熱基板である。
In one aspect of the present invention,
An insulating heat dissipation substrate having a ceramic substrate and a conductor layer bonded on at least one main surface of the ceramic substrate,
The conductor layer has an upper surface, a lower surface, and a side surface 1 connecting the upper surface and the lower surface,
The ceramic substrate has a lowest part, a side face 2 that connects the lowest part and the side face 1 of the conductor layer, and a joint surface that is at a position higher than the lowest part and is joined to the lower face of the conductor layer,
When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer in plan view, the elevation angle α of the side surface 1 with respect to the lower surface at the height of the lower surface, and the bonding The absolute value of the difference in the elevation angle β with respect to the joint surface of the side surface 2 at the height of the surface is 20 ° or less on average,
When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar outline of the conductor layer, the side surface 1 is tangent to the planar outline of the conductor layer rather than the end of the upper surface. It is an insulated heat dissipation board | substrate which has the location reverse | retreated in the normal line direction with respect to.

本発明に係る絶縁放熱基板は一実施形態において、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1の前記仰角αは平均で20°〜60°である。   In one embodiment, the insulated heat dissipation substrate according to the present invention is characterized in that the elevation angle of the side surface 1 when the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar outline of the conductor layer. α is 20 ° to 60 ° on average.

本発明に係る絶縁放熱基板は別の一実施形態において、前記セラミックス基板における最低部と前記接合面の端部との厚み方向の距離Hが平均で0μm〜30μmである。   In another embodiment of the insulated heat dissipation substrate according to the present invention, the distance H in the thickness direction between the lowest portion of the ceramic substrate and the end of the joining surface is 0 μm to 30 μm on average.

本発明に係る絶縁放熱基板は別の一実施形態において、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1及び側面2の輪郭は共に内側に窪んだ湾曲線状である。   In another embodiment of the insulated heat dissipation substrate according to the present invention, when the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the outline of the conductor layer in plan view, the side surface 1 and The contours of the side surfaces 2 are both curved lines that are recessed inward.

本発明に係る絶縁放熱基板は更に別の一実施形態において、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、最低部から前記接合面の接合端までの、導体の平面視輪郭の接線に対する法線方向の距離Lが平均で5μm〜30μmである。   In still another embodiment, the insulated heat dissipation substrate according to the present invention is the lowest part when the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the outline of the conductor layer in plan view. The distance L in the normal direction with respect to the tangent of the contour in plan view of the conductor from the joint surface to the joint end of the joint surface is 5 μm to 30 μm on average.

本発明に係る絶縁放熱基板は更に別の一実施形態において、側面1の前記後退した箇所のうち、最も後退した箇所は、前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に平均で200μm以下後退している。   In yet another embodiment of the insulated heat dissipation board according to the present invention, the most receded portion of the receded portion of the side surface 1 is normal to the tangent line of the contour of the conductor layer in plan view rather than the end portion of the upper surface. Retreats on average in the direction below 200 μm.

本発明に係る絶縁放熱基板は更に別の一実施形態において、側面1の前記後退した箇所のうち、最も後退した箇所は、前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に平均で20μm以上100μm以下後退している。   In yet another embodiment of the insulated heat dissipation board according to the present invention, the most receded portion of the receded portion of the side surface 1 is normal to the tangent line of the contour of the conductor layer in plan view rather than the end portion of the upper surface. Retreats in the direction from 20 μm to 100 μm on average.

本発明によれば、絶縁放熱基板の冷熱サイクルに対する耐久性を高めることが可能となり、実装エリアも拡大する。このため本発明は、放熱性及び小型化を両立させるために銅板を厚板化させた絶縁放熱基板に有利に適用することができ、とりわけパワー半導体モジュールの出力密度の向上や小型化に寄与することができる。   ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to improve the durability with respect to the thermal cycle of an insulated heat dissipation board | substrate, and a mounting area is expanded. For this reason, the present invention can be advantageously applied to an insulating heat dissipation board obtained by thickening a copper plate in order to achieve both heat dissipation and downsizing, and particularly contributes to improvement in output density and downsizing of a power semiconductor module. be able to.

本発明の一実施形態に係る絶縁放熱基板を、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの模式図である。It is a schematic diagram when the insulated heat dissipation board which concerns on one Embodiment of this invention is partially observed in the cross section parallel to both the normal line direction and thickness direction with respect to the tangent of the planar view outline of a conductor layer and a ceramic substrate. . 本発明の一実施形態に係る絶縁放熱基板を、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの、導体層とセラミックス基板の接合端付近の模式図である。An insulating heat dissipation substrate according to an embodiment of the present invention, a conductor layer and a ceramic substrate when partially observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the outline of the conductor layer in plan view, It is a schematic diagram near the joining end of a ceramic substrate. 本発明の一実施形態に係る絶縁放熱基板を、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの、導体層とセラミックス基板の接合端付近のSEM画像である。An insulating heat dissipation substrate according to an embodiment of the present invention, a conductor layer and a ceramic substrate when partially observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the outline of the conductor layer in plan view, It is a SEM image near the joining end of a ceramic substrate. 従来の絶縁放熱基板を、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの、導体層とセラミックス基板の接合端付近のSEM画像である。When a conventional insulating heat dissipation substrate is partially observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the conductor layer and the ceramic substrate in a plan view, the vicinity of the junction end of the conductor layer and the ceramic substrate It is a SEM image of. 実施例において作製した絶縁放熱基板の平面模式図である。It is a plane schematic diagram of the insulation heat dissipation board produced in the Example.

以下、本発明の実施の形態について、図面を参照しながら具体的に説明する。本発明は以下の実施の形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲で、当業者の通常の知識に基づいて、以下の実施の形態に対し適宜変更、改良等が加えられたものも本発明の範囲に入ることが理解されるべきである。   Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings. The present invention is not limited to the following embodiments, and appropriate modifications and improvements are added to the following embodiments on the basis of ordinary knowledge of those skilled in the art without departing from the spirit of the present invention. It should be understood that what has been described also falls within the scope of the invention.

<1.絶縁放熱基板>
図1は、本発明の一実施形態に係る絶縁放熱基板100を、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの模式図である。本明細書において、平面視とは絶縁放熱基板をその投影面積が最大となる方向から観察する方法を意味し、厚み方向とは当該観察方向に平行な方向を指す。絶縁放熱基板100は、セラミックス基板110と、セラミックス基板110の少なくとも一方の主表面上に接合された導体層120とを有する。導体層120はセラミックス基板110の一方の主表面上に接合されてもよいし、両方の主表面上に接合されてもよい。絶縁放熱基板100の平面図の一例を図5に示す。導体層120は電気回路を形成するための任意のパターンで形成することができる。
<1. Insulated heat dissipation board>
FIG. 1 shows an insulating heat dissipation substrate 100 according to an embodiment of the present invention when a conductor layer and a ceramic substrate are partially observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the conductor layer in plan view. FIG. In this specification, the plan view means a method of observing the insulated heat dissipation substrate from the direction in which the projected area is maximum, and the thickness direction means a direction parallel to the observation direction. Insulating heat dissipation substrate 100 includes a ceramic substrate 110 and a conductor layer 120 bonded onto at least one main surface of ceramic substrate 110. The conductor layer 120 may be bonded on one main surface of the ceramic substrate 110, or may be bonded on both main surfaces. An example of a plan view of the insulating heat dissipation substrate 100 is shown in FIG. The conductor layer 120 can be formed in an arbitrary pattern for forming an electric circuit.

導体層120は上面121と、下面122と、上面121及び下面122を連結する側面1(123)とを有する。セラミックス基板110は最低部111と、最低部111及び導体層120の側面1(123)を連結する側面2(112)と、最低部111よりも高い位置にあり、導体層120の下面122に接合する接合面113とを有する。本明細書においては、セラミックス基板の最低部111は、倍率1000倍のSEMにより、導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、接合面(113)の端部(接合端)から当該法線方向に50μm離れた場所までのセラミックス基板の表面のうち、接合端からの厚み方向への距離が最も長い箇所を指す。接合端からの厚み方向への距離が最も長い箇所が複数存在する又は連続するときは、接合端からの当該法線方向への距離が最も短い箇所を最低部とする。導体層120の平面視輪郭の接線に対する法線の例を図5に点線N1−N1’及び点線N2−N2’で示す。The conductor layer 120 has an upper surface 121, a lower surface 122, and a side surface 1 (123) that connects the upper surface 121 and the lower surface 122. The ceramic substrate 110 is located at a position higher than the lowest portion 111, the side surface 2 (112) connecting the lowest portion 111 and the side surface 1 (123) of the conductor layer 120, and the lowest portion 111, and is bonded to the lower surface 122 of the conductor layer 120. And a joining surface 113 to be connected. In the present specification, the lowest part 111 of the ceramic substrate is parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer 120 in the plan view of the conductor layer 120 by SEM with a magnification of 1000 times. The portion of the ceramic substrate surface from the end portion (joining end) of the joining surface (113) to the location 50 μm away from the joining surface (113) when observed in a cross section has the longest distance from the joining end in the thickness direction. Point to. When there are a plurality of locations where the distance from the joining end in the thickness direction is the longest or continuous, the location where the distance from the joining end in the normal direction is the shortest is the lowest part. Examples of normal lines with respect to the tangent of the planar outline of the conductor layer 120 are shown by dotted lines N 1 -N 1 ′ and dotted lines N 2 -N 2 ′ in FIG.

絶縁放熱基板100は、例えばスイッチング素子、IGBT、MOSFETなどの図示しないパワー半導体を含むパワー半導体モジュールにおいて、該パワー半導体が実装される基板として使用可能である。導体層120は電気回路パターンを形成することができ、該電気回路パターン上にパワー半導体を実装することができる。   The insulating heat dissipation substrate 100 can be used as a substrate on which the power semiconductor is mounted in a power semiconductor module including a power semiconductor (not shown) such as a switching element, IGBT, MOSFET, or the like. The conductor layer 120 can form an electric circuit pattern, and a power semiconductor can be mounted on the electric circuit pattern.

セラミックス基板110としては、窒化珪素(Si34)基板や窒化アルミニウム(AlN)基板などの窒化物セラミックス基板の他、アルミナ(Al23)基板が例示される。本発明を実現する上においては、セラミックス基板110の平面形状やサイズに特段の制限はないが、パワー半導体モジュールの小型化を図るという観点からは、一辺が20mm〜70mm程度で厚みが0.1mm〜1.0mmの平面視矩形状のセラミックス基板100が例示される。Examples of the ceramic substrate 110 include an alumina (Al 2 O 3 ) substrate in addition to a nitride ceramic substrate such as a silicon nitride (Si 3 N 4 ) substrate or an aluminum nitride (AlN) substrate. In realizing the present invention, the planar shape and size of the ceramic substrate 110 are not particularly limited. However, from the viewpoint of reducing the size of the power semiconductor module, one side is about 20 mm to 70 mm and the thickness is 0.1 mm. A ceramic substrate 100 having a rectangular shape in plan view of ˜1.0 mm is illustrated.

導体層120は、銅(Cu)、銅合金、アルミニウム(Al)、アルミニウム合金などの金属で形成することができる。導体層120は、タングステン(W)やモリブデン(Mo)等の高融点金属または銀(Ag)からなるメタライズ層で形成することもできる。その他、ニッケル、鉄、チタン、モリブデンを使用することもできる。導体層120の厚み(導体層120の上面121と下面122の高さの差(厚み方向の距離))については、パワー半導体モジュールの小型化を図るという観点からは、0.3mm〜2.0mmであることが好ましく、0.5mm〜1.5mmであることがより好ましい。   The conductor layer 120 can be formed of a metal such as copper (Cu), a copper alloy, aluminum (Al), or an aluminum alloy. The conductor layer 120 can also be formed of a metallized layer made of a refractory metal such as tungsten (W) or molybdenum (Mo) or silver (Ag). In addition, nickel, iron, titanium, and molybdenum can also be used. The thickness of the conductor layer 120 (the difference in height between the upper surface 121 and the lower surface 122 of the conductor layer 120 (distance in the thickness direction)) is 0.3 mm to 2.0 mm from the viewpoint of reducing the size of the power semiconductor module. It is preferable that it is 0.5 mm-1.5 mm.

図1に示す実施形態においては、導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1(123)は上面121の端部よりも導体層120の平面視輪郭の接線に対する法線方向に後退した箇所を有する。換言すれば、上面121が迫り出すように側面1(123)が構成されている。これにより、半導体チップを搭載することのできるボンディングエリアの他、半導体チップを半田付け等で搭載する実装エリア、端子を接続(例:超音波接続)するためのエリア等の実装エリアを大きくできることが分かる。このため、本発明によれば、半導体チップの搭載量が同じであれば絶縁放熱基板の面積を小さくできる、換言すれば、半導体モジュールを小型化することができることになる。   In the embodiment shown in FIG. 1, when the conductor layer 120 and the ceramic substrate 110 are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the contour of the conductor layer 120 in plan view, the side surface 1 (123) is The conductive layer 120 has a portion that is recessed in the normal direction with respect to the tangent to the outline of the conductor layer 120 from the end of the upper surface 121. In other words, the side surface 1 (123) is configured such that the upper surface 121 protrudes. As a result, in addition to the bonding area where the semiconductor chip can be mounted, it is possible to increase the mounting area such as a mounting area where the semiconductor chip is mounted by soldering, an area for connecting terminals (eg, ultrasonic connection), etc. I understand. For this reason, according to the present invention, if the mounting amount of the semiconductor chip is the same, the area of the insulating heat dissipation substrate can be reduced. In other words, the semiconductor module can be reduced in size.

実装エリアを大きくするという観点からは、側面1(123)の前記後退した箇所のうち、最も後退した箇所は、上面121の端部よりも導体層120の平面視輪郭の接線に対する法線方向に平均で10μm以上後退していることが好ましく、20μm以上後退していることがより好ましく、40μm以上後退していることが更により好ましい。但し、側面1(123)を後退させ過ぎると上面121の先端が鋭角となって強度が低下しやすく、更には先端が垂れ下がった状態になりやすい。そのような部分は、実装エリアとしては不適である。このため、側面1の前記後退した箇所のうち、最も後退した箇所は、前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に平均で200μm以下後退していることが好ましく、150μm以下後退していることがより好ましく、100μm以下後退していることが更により好ましい。   From the viewpoint of increasing the mounting area, the most retracted portion of the side surface 1 (123) is in a direction normal to the tangent to the contour of the conductor layer 120 from the end of the upper surface 121. The average is preferably 10 μm or more, more preferably 20 μm or more, and even more preferably 40 μm or more. However, if the side surface 1 (123) is retracted too much, the tip of the upper surface 121 becomes an acute angle and the strength tends to decrease, and further, the tip tends to hang down. Such a part is not suitable as a mounting area. For this reason, it is preferable that the most receded portion of the receded portion of the side surface 1 is receded by 200 μm or less on average in the normal direction with respect to the tangent to the outline of the conductor layer in plan view from the end portion of the upper surface. It is more preferable to recede by 150 μm or less, and it is even more preferable to recede by 100 μm or less.

図2には、本発明の一実施形態に係る絶縁放熱基板について、導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの、導体層120とセラミックス基板110の接合端付近の模式図が示されている。当該断面観察において、下面122の高さにおける側面1(123)の下面122に対する仰角αと、接合面(113)の高さにおける側面2(112)の接合面113に対する仰角βの差の絶対値が小さいことが冷熱サイクル耐久性を高める上で重要である。   FIG. 2 shows the insulating heat dissipation board according to the embodiment of the present invention, in which the conductor layer 120 and the ceramic substrate 110 are partially cross-sectionally parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer 120 in plan view. A schematic view of the vicinity of the joining end of the conductor layer 120 and the ceramic substrate 110 when observed is shown. In the cross-sectional observation, the absolute value of the difference between the elevation angle α with respect to the lower surface 122 of the side surface 1 (123) at the height of the lower surface 122 and the elevation angle β with respect to the bonding surface 113 of the side surface 2 (112) at the height of the bonding surface (113). Small is important for enhancing the heat cycle durability.

従来の絶縁放熱基板においては、図4に示すように、セラミックス基板と導体層の接合端はピン角(先端が尖った角)となっており、急激な角度変化が存在している。このようなピン角には大きな熱応力が掛かる。これは、導体層とセラミックス基板の接合端付近にピン角が存在すると、冷熱サイクルの繰り返しにより、そこを起点としてクラックが入り易くなることを意味する。   In the conventional insulated heat dissipation substrate, as shown in FIG. 4, the joint end of the ceramic substrate and the conductor layer has a pin angle (a corner with a sharp tip), and there is a sudden angle change. A large thermal stress is applied to such a pin angle. This means that if a pin angle exists in the vicinity of the joining end of the conductor layer and the ceramic substrate, cracks are likely to occur from the starting point due to repeated cooling and heating cycles.

そこで、本発明者は導体層とセラミックス基板の接合端付近にピン角が存在しないことでクラックを抑制できるという仮説を立て、種々の実験及び検討を重ねたところ、上記断面観察において、下面122の高さにおける側面1(123)の下面122に対する仰角α(0°≦α≦90°)と、接合面(113)の高さにおける側面2(112)の接合面113に対する仰角β(0°≦β≦90°)の差の絶対値(|α−β|)が平均で20°以下のときに冷熱サイクル耐久性が有意に向上することを見出した。|α−β|の平均は8°以下であることが好ましく、5°以下であることがより好ましく、例えば1°〜20°とすることができる。平均値は測定対象となる絶縁放熱基板の任意の5箇所以上の断面観察により求めることとする(以下のパラメータの平均値についても同様である。)。   Therefore, the present inventor made a hypothesis that cracks can be suppressed by the absence of a pin angle in the vicinity of the joint end of the conductor layer and the ceramic substrate, and repeated various experiments and examinations. The elevation angle α (0 ° ≦ α ≦ 90 °) of the side surface 1 (123) at the height with respect to the lower surface 122 and the elevation angle β (0 ° ≦ 0 °) of the side surface 2 (112) at the height of the bonding surface (113). It has been found that when the absolute value (| α−β |) of the difference in β ≦ 90 ° is 20 ° or less on average, the thermal cycle durability is significantly improved. The average of | α−β | is preferably 8 ° or less, more preferably 5 ° or less, for example, 1 ° to 20 °. The average value is obtained by observing cross sections of any five or more locations of the insulating heat dissipation substrate to be measured (the same applies to the average values of the following parameters).

側面1(123)の仰角α自体は特に制限はないが、20°未満や60°未満とするのは形状作り込みのためのエッチング条件やウェットブラスト条件の選定が複雑になることから、αは平均で20°〜60°とするのが一般的であり、20°〜30°とするのが好ましい。   The elevation angle α itself of the side surface 1 (123) is not particularly limited. However, if it is less than 20 ° or less than 60 °, the selection of etching conditions and wet blasting conditions for shape formation becomes complicated, so α is The average is generally 20 ° to 60 °, and preferably 20 ° to 30 °.

図3に、本発明の一実施形態に係る絶縁放熱基板を、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で部分観察したときの、導体層とセラミックス基板の接合端付近のSEM画像を示す。セラミックス基板と導体層の接合端が滑らかに接続されていることが理解できる。   In FIG. 3, when the insulated heat dissipation board which concerns on one Embodiment of this invention is partially observed in the cross section parallel to both the normal line direction and thickness direction with respect to the tangent of the planar view outline of a conductor layer and a ceramics board | substrate. The SEM image of the joining edge vicinity of a conductor layer and a ceramic substrate is shown. It can be understood that the joining ends of the ceramic substrate and the conductor layer are smoothly connected.

再び図2を参照すると、接合界面の箇所のみならず、側面2(112)は全体的に急激な角度変化がないほうが熱応力を受けにくく、冷熱サイクル耐久性の向上につながる。この観点からは、導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面2(112)の仰角βと、接合面113の接合端から導体層120の平面視輪郭の接線に対する法線方向に10μm離れた地点における側面2(112)の接合面113に対する仰角γの差の絶対値(|β−γ|)は小さいほうが好ましい。具体的には、|β−γ|は平均で30°以下であることが好ましい。一方で、|β−γ|が小さすぎると、セラミックス基板110が大きく削られて厚みが小さくなり、絶縁性能を低下させやすいことから、|β−γ|は平均で5°以上であることが好ましい。但し、|β−γ|の変化によって生じる特性上の差は軽微である。   Referring to FIG. 2 again, not only the location of the bonding interface but also the side surface 2 (112) is less susceptible to thermal stress if there is no sudden change in the angle as a whole, leading to an improvement in the cooling cycle durability. From this viewpoint, when the conductor layer 120 and the ceramic substrate 110 are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer 120, the elevation angle β of the side surface 2 (112), The absolute value (| β−γ |) of the difference in elevation angle γ of the side surface 2 (112) with respect to the bonding surface 113 at a point 10 μm away from the bonding end of the bonding surface 113 in the normal direction to the tangent to the contour of the conductor layer 120 in plan view. Is preferably smaller. Specifically, it is preferable that | β−γ | is 30 ° or less on average. On the other hand, if | β−γ | is too small, the ceramic substrate 110 is greatly scraped to reduce the thickness and easily deteriorate the insulation performance. Therefore, | β−γ | may be 5 ° or more on average. preferable. However, the difference in characteristics caused by the change of | β−γ | is slight.

セラミックス基板110が大きく削られて絶縁性能が低下するのを防止するという観点からは、導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、セラミックス基板110における最低部111と接合面113の端部(接合端)との厚み方向の距離Hは平均で30μm以下であることが好ましく、20μm以下であることがより好ましく、10μm以下であることが更により好ましい。Hの下限は特に設定されず、0でもよいが、Hが大きい方が|α−β|を小さくしやすいため、Hは平均で2μm以上が好ましい。   From the viewpoint of preventing the ceramic substrate 110 from being greatly shaved and reducing the insulation performance, the conductor layer 120 and the ceramic substrate 110 are parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer 120 in plan view. When observed in a simple cross section, the distance H in the thickness direction between the lowest portion 111 of the ceramic substrate 110 and the end portion (joining end) of the joining surface 113 is preferably 30 μm or less, more preferably 20 μm or less. Preferably, it is still more preferably 10 μm or less. The lower limit of H is not particularly set and may be 0. However, since it is easy to make | α−β | smaller when H is larger, H is preferably 2 μm or more on average.

更に、セラミックス基板110が大きく削られて絶縁性能が低下するのを防止するという観点からは、導体層120とセラミックス基板110を導体層110の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、最低部111から接合面113の接合端までの、導体120の平面視輪郭の接線に対する法線方向の距離Lが平均で5μm以上であることが好ましく、10μm以上であることがより好ましい。但し、距離Lが長くなりすぎると導体間の距離(スペース)を大きくする必要が出てくることや、絶縁性能の低下抑止効果が飽和するという観点から、距離Lは平均で30μm以下であることが好ましく、20μm以下であることがより好ましい。   Further, from the viewpoint of preventing the ceramic substrate 110 from being greatly shaved and deteriorating the insulation performance, the conductor layer 120 and the ceramic substrate 110 are both in the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer 110 in plan view. The distance L in the normal direction from the lowest portion 111 to the joining end of the joining surface 113 with respect to the tangent of the planar view contour of the conductor 120 is preferably 5 μm or more on average. It is more preferable that However, if the distance L becomes too long, it is necessary to increase the distance (space) between the conductors, and the distance L is 30 μm or less on average from the viewpoint that the effect of suppressing the decrease in insulation performance is saturated. Is preferable, and it is more preferable that it is 20 micrometers or less.

本発明において、仰角α及びβは、倍率1000倍のSEMで上述した断面を観察して以下の手順で測定することとする。導体層120とセラミックス基板110の接合端から側面1(123)の輪郭形状に対応する長さ30μmの近似直線Aを引く。導体層120とセラミックス基板110の接合端から側面2(112)の輪郭形状に対応する最低部111と接合端の間の厚み方向の距離Hの半分の長さの近似直線Bを引く。導体層120とセラミックス基板110の接合端から接合面113(下面122)の輪郭形状に対応する長さ30μmの近似直線Cを引く。近似直線Aと近似直線Cのなす角度から仰角αを、近似直線Bと近似直線Cのなす角度から仰角βをそれぞれ求める。   In the present invention, the elevation angles α and β are measured according to the following procedure by observing the above-described cross section with an SEM having a magnification of 1000 times. An approximate straight line A having a length of 30 μm corresponding to the contour shape of the side surface 1 (123) is drawn from the joining end of the conductor layer 120 and the ceramic substrate 110. An approximate straight line B having a length that is half the distance H in the thickness direction between the lowest end 111 corresponding to the contour shape of the side surface 2 (112) and the bonded end is drawn from the bonded end of the conductor layer 120 and the ceramic substrate 110. An approximate straight line C having a length of 30 μm corresponding to the contour shape of the joint surface 113 (lower surface 122) is drawn from the joint end of the conductor layer 120 and the ceramic substrate 110. The elevation angle α is determined from the angle formed by the approximate line A and the approximate line C, and the elevation angle β is determined from the angle formed by the approximate line B and the approximate line C.

例示的に、図3のSEM画像において、導体層120とセラミックス基板110の接合端から側面1(123)の輪郭形状に対応する長さ30μmの近似直線Aのイメージを示す。接合端から側面1の輪郭点を近似直線の長さが30μmとなる範囲で直交座標系((x、y)座標)に30点以上満遍なくプロットすると、最小二乗法によりy=ax+bの形の近似式が得られる。この近似式に対応する直線が近似直線Aである。その際に近似直線Aの傾きを一義的に決定することができる。近似直線B及び近似直線Cについても同様の方法で傾きを決定することができる。これらの傾きから仰角α及び仰角βをそれぞれ求めることができる。   Illustratively, in the SEM image of FIG. 3, an image of the approximate straight line A having a length of 30 μm corresponding to the contour shape of the side surface 1 (123) from the joining end of the conductor layer 120 and the ceramic substrate 110 is shown. When the contour points of the side surface 1 from the joint end are uniformly plotted on the orthogonal coordinate system ((x, y) coordinates) in the range where the length of the approximate straight line is 30 μm, approximation of the form y = ax + b by the least square method The formula is obtained. A straight line corresponding to this approximate expression is an approximate straight line A. At that time, the inclination of the approximate straight line A can be uniquely determined. The inclinations of the approximate line B and the approximate line C can be determined by the same method. From these inclinations, the elevation angle α and the elevation angle β can be obtained.

本発明において、仰角γは、倍率1000倍のSEMで上述した断面を観察して以下の手順で測定することとする。導体層120とセラミックス基板110の接合端から導体120の平面視輪郭の接線に対する法線方向に10μm離れた地点における側面2(112)の輪郭形状に対応した長さ5μmの近似直線Dを当該地点から上方(厚み方向のうち接合端に近づく方向)に引く。近似直線Dと近似直線Cのなす角度から仰角γを求める。   In the present invention, the elevation angle γ is measured according to the following procedure by observing the above-described cross-section with an SEM having a magnification of 1000 times. An approximate straight line D having a length of 5 μm corresponding to the contour shape of the side surface 2 (112) at a point 10 μm away from the joining end of the conductor layer 120 and the ceramic substrate 110 in the normal direction to the tangent to the contour of the conductor 120 in plan view. From above (in the thickness direction, the direction approaching the joint end). The elevation angle γ is obtained from the angle formed by the approximate line D and the approximate line C.

<2.製造方法>
本発明に係る絶縁放熱基板は、セラミックス基板と金属板又は金属箔とを接合して接合基板を作製した後、リソグラフィ技術及びエッチング技術を用いて電気回路パターンを形成し、更に平滑化処理することにより製造することができる。
<2. Manufacturing method>
The insulating heat dissipation board according to the present invention is a method in which a ceramic substrate and a metal plate or metal foil are joined to produce a joined substrate, and then an electric circuit pattern is formed using a lithography technique and an etching technique, and further smoothed. Can be manufactured.

セラミックス基板と金属板又は金属箔とを接合して接合基板を作製する方法は公知の任意の技術を使用すればよい。代表的にはセラミックス基板と金属板又は金属箔とを直接接合してDCB基板を作製する方法、及び、セラミックス基板と金属板又は金属箔とを活性金属を含むロウ材(接合材)を用いて形成される接合層を介して接合してAMB基板を作製する方法が挙げられる。これらの中でも接合強度を高めるという観点からは、Ag及びTiを含むろう材を用いて加熱加圧接合(ホットプレス)する方法が好ましい。ろう材は導体であるから、本発明においては、接合層も導体層の一部として取り扱うこととする。   Any known technique may be used as a method of manufacturing a bonded substrate by bonding a ceramic substrate and a metal plate or metal foil. Typically, a ceramic substrate and a metal plate or metal foil are directly bonded to form a DCB substrate, and the ceramic substrate and the metal plate or metal foil are bonded using a brazing material (bonding material) containing an active metal. There is a method of manufacturing an AMB substrate by bonding through a bonding layer to be formed. Among these, from the viewpoint of increasing the bonding strength, a method of heat-pressure bonding (hot pressing) using a brazing material containing Ag and Ti is preferable. Since the brazing material is a conductor, in the present invention, the bonding layer is also handled as a part of the conductor layer.

ろう材を用いてホットプレスする場合、接合雰囲気は、活性金属であるTiが酸化すると、そもそも接合ができないために、真空もしくは不活性雰囲気(Ar雰囲気等)とする必要がある。接合強度を高めるという観点からは、接合圧力は5MPa以上が望ましい。但し、接合圧力が高すぎると接合の際にセラミックス基板を破壊してしまうおそれがあるから、接合圧力は25MPa以下が望ましい。接合温度は使用するろう材の種類により適宜調整すればよいが、Ag及びTiを含むろう材を用いる場合、800℃〜1000℃程度とするのが好適である。   When hot-pressing using a brazing material, the bonding atmosphere must be a vacuum or an inert atmosphere (Ar atmosphere or the like) because Ti cannot be bonded in the first place when Ti, which is an active metal, is oxidized. From the viewpoint of increasing the bonding strength, the bonding pressure is desirably 5 MPa or more. However, if the bonding pressure is too high, the ceramic substrate may be destroyed during bonding, so the bonding pressure is preferably 25 MPa or less. The bonding temperature may be adjusted as appropriate depending on the type of brazing material to be used. However, when a brazing material containing Ag and Ti is used, it is preferable that the bonding temperature be about 800 ° C to 1000 ° C.

なお、ろう材としては、低融点化のためにAgにCu、Sn、In等の一種又は二種以上が添加されたもの、また、それらの合金粉末に、Tiを加えたものを用いることもできる。例えば、Ag−Cu−Ti系のろう材としては、Ag、Cu、Tiをそれぞれ組成重量比で30〜70%、0〜40%、0.1〜20%なる範囲で含有するものが例示され、これらの組成範囲を充足する市販のものを用いることも可能である。   In addition, as the brazing material, one in which one or more of Cu, Sn, In and the like are added to Ag for lowering the melting point, or one in which Ti is added to those alloy powders may be used. it can. For example, examples of the Ag-Cu-Ti brazing material include those containing Ag, Cu, and Ti in a range of 30 to 70%, 0 to 40%, and 0.1 to 20% in terms of composition weight ratio, respectively. Commercially available products satisfying these composition ranges can also be used.

接合基板を作製した後のリソグラフィ技術及びエッチング技術も公知の任意の方法を採用すればよいが、エッチング方法としてはウェットエッチングが特に好適である。エッチング条件によって導体層の側面1の仰角αが有意に影響を受けるので、エッチング条件には留意する必要がある。一般には、エッチング時間が長くなると仰角αは大きくなる傾向にある。   Although any known method may be employed for the lithography technique and the etching technique after producing the bonded substrate, wet etching is particularly suitable as the etching method. Since the elevation angle α of the side surface 1 of the conductor layer is significantly affected by the etching conditions, it is necessary to pay attention to the etching conditions. In general, the elevation angle α tends to increase as the etching time increases.

電気回路パターンを形成後に平滑化処理を実施し、導体層とセラミック基板の接合端及びその周辺を平滑化することが重要である。平滑化処理の方法としては、例えば、ウェットブラスト、乾式ブラスト、切削、レーザー加工、その他の機械加工が挙げられるが、セラミックス基板の金属層との接合面からセラミックス基板の基準面(平面)に漸近する滑らかな曲面形状を作りやすく、また、このような曲面形状にすることによって応力集中を防ぐことができるのでウェットブラストが好ましい。ウェットブラストを採用する場合、噴射圧力及び噴射時間、ウェットブラストに使用する研削材の種類及び粒径によって平滑化処理の状態が変化するため、適切な条件を適宜選定することが望まれる。一般には、噴射時間が長くなるとセラミックス基板の仰角βは大きくなる傾向にある。|α−β|の値を小さくするためには、微粒な砥粒を用いて、導体層の側面1の形状に応じて噴射時間を調整することが必要である   It is important to perform a smoothing process after forming the electric circuit pattern to smooth the joint end of the conductor layer and the ceramic substrate and the periphery thereof. Examples of the smoothing method include wet blasting, dry blasting, cutting, laser processing, and other mechanical processing, but asymptotically approach the reference surface (plane) of the ceramic substrate from the bonding surface with the metal layer of the ceramic substrate. It is easy to make a smooth curved surface shape, and wet blasting is preferred because stress concentration can be prevented by using such a curved surface shape. When wet blasting is employed, the state of the smoothing process varies depending on the spraying pressure and spraying time, the type of abrasive used for wet blasting, and the particle size, so it is desirable to select appropriate conditions as appropriate. In general, the elevation angle β of the ceramic substrate tends to increase as the injection time increases. In order to reduce the value of | α−β |, it is necessary to adjust the injection time according to the shape of the side surface 1 of the conductor layer using fine abrasive grains.

ウェットブラストの好適な条件例を挙げると、噴射圧は0.01〜0.5MPa、研削材の種類は砥粒セラミックス(SiC、アルミナ、ジルコニア等)、研削材の粒径は1〜100μm程度とすることができる。   As examples of suitable conditions for wet blasting, the injection pressure is 0.01 to 0.5 MPa, the type of abrasive is abrasive ceramics (SiC, alumina, zirconia, etc.), and the particle size of the abrasive is about 1 to 100 μm. can do.

ウェットブラストによる平滑化処理を行うことで作製された絶縁放熱基板は、典型的には以下に示す形態上の特徴を何れか一つ以上有することができ、より典型的には二つ以上有することができ、更により典型的には三つとも有することができる。下記の特徴は何れもウェットエッチングの低コスト化、生産性向上、角度αの制御性向上につながるという点で有利である。
(1)導体層120の上面の端部124は導体層120の下面の端部125よりも導体層120の平面視輪郭の接線に対する法線方向に後退している(図1参照)。
(2)導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1(123)及び側面2(112)の輪郭は共に内側に窪んだ湾曲線状である(図1参照)。
(3)導体層120とセラミックス基板110を導体層120の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1(123)は導体層120の上面の端部124よりも導体層120の平面視輪郭の接線に対する法線方向に後退した箇所を有する(図1参照)。
An insulating heat dissipation board manufactured by performing smoothing treatment by wet blasting can typically have any one or more of the following structural features, more typically two or more. And even more typically can have all three. Any of the following features is advantageous in that it leads to cost reduction of wet etching, improvement of productivity, and improvement of controllability of the angle α.
(1) The end portion 124 on the upper surface of the conductor layer 120 is set back from the end portion 125 on the lower surface of the conductor layer 120 in a direction normal to the tangent line of the contour of the conductor layer 120 in plan view (see FIG. 1).
(2) When the conductor layer 120 and the ceramic substrate 110 are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar view outline of the conductor layer 120, the side surface 1 (123) and the side surface 2 (112) Both contours are curved lines that are recessed inward (see FIG. 1).
(3) When the conductor layer 120 and the ceramic substrate 110 are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar view outline of the conductor layer 120, the side surface 1 (123) is the upper surface of the conductor layer 120. It has a location that recedes in a direction normal to the tangent to the contour of the conductor layer 120 from the end portion 124 (see FIG. 1).

平滑化処理の後、更に種々の表面処理を行うことができる。表面処理の例としては、限定的ではないが、酸処理、アルカリ処理、洗浄、めっき、防錆処理等が挙げられる。   Various surface treatments can be further performed after the smoothing treatment. Examples of the surface treatment include, but are not limited to, acid treatment, alkali treatment, washing, plating, rust prevention treatment, and the like.

以下、本発明を実施例によって更に具体的に説明するが、本発明はこれらの実施例によって何ら限定されるものではない。   EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples, but the present invention is not limited to these examples.

(1.絶縁放熱基板の作製)
セラミックス基板として厚み0.3mmの平面視矩形状(横21mm×縦21mm)の窒化珪素(Si34)基板を用意した。当該窒化珪素基板の片面側に厚み0.5mmの平面視矩形状(横21mm×縦21mm)の銅(Cu)板をろう材を用いてホットプレスにより接合し、セラミック基板と銅板の接合基板を得た。ろう材としては、組成重量比がAg:51質量%、Cu:24質量%、In:11質量%、Ti:14質量%であるものを用いた。ホットプレスは850℃の真空下で接合圧力20MPaの条件で行った。
(1. Production of insulated heat dissipation substrate)
A silicon nitride (Si 3 N 4 ) substrate having a thickness of 0.3 mm and a rectangular shape (width 21 mm × length 21 mm) in plan view was prepared as a ceramic substrate. A copper (Cu) plate having a thickness of 0.5 mm in plan view (width 21 mm × length 21 mm) is bonded to one side of the silicon nitride substrate by hot pressing using a brazing material, and a bonded substrate of the ceramic substrate and the copper plate is bonded. Obtained. As the brazing material, one having a composition weight ratio of Ag: 51 mass%, Cu: 24 mass%, In: 11 mass%, and Ti: 14 mass% was used. Hot pressing was performed under a vacuum of 850 ° C. and a bonding pressure of 20 MPa.

上記の手順で得られた接合基板から、フォトリソグラフィによるパターン形成及びウェットエッチングを経て、図5に示すような導体パターンを形成した。エッチング液としては塩化第二銅及び塩化第二鉄等を含有する水溶液(pH=1〜3)を使用した。ウェットエッチングは試験番号に応じて、エッチング時間の異なる二条件(Cuエッチング条件1及びCuエッチング条件2)で行った。Cuエッチング条件1では導体層の側面1の角度αの目標値を50°として、Cuエッチング条件2では導体層の側面1の角度αの目標値を25°として、それぞれエッチング時間を調整した。具体的にはCuエッチング条件1はエッチング時間を1時間とし、Cuエッチング条件2はエッチング時間を0.5時間とした。   A conductive pattern as shown in FIG. 5 was formed from the bonded substrate obtained by the above procedure through pattern formation by photolithography and wet etching. An aqueous solution (pH = 1 to 3) containing cupric chloride and ferric chloride was used as an etching solution. Wet etching was performed under two conditions (Cu etching condition 1 and Cu etching condition 2) with different etching times according to the test number. In Cu etching condition 1, the target value of angle α of side surface 1 of the conductor layer was set to 50 °, and in Cu etching condition 2, the target value of angle α of side surface 1 of the conductor layer was set to 25 °, and the etching time was adjusted. Specifically, Cu etching condition 1 was an etching time of 1 hour, and Cu etching condition 2 was an etching time of 0.5 hour.

導体パターンを形成後、導体層とセラミックス基板の接合端周辺を平滑化することを目的として、接合基板の導体パターン形成面に対してウェットブラストを実施した。ウェットブラストは、ウェットブラスト装置を使用し、水と研削材(粒径10〜20μm程度のSiC粒子)のスラリーを、導体パターン形成面に対して垂直な方向から噴射することにより行った。この際、噴射圧力を0.15MPaとし、ノズルの移動速度を100mm/secとし、パス回数を変化させることで、セラミックス基板の側面2の形状に変化を与えた。1回のパスで、スリット状ノズルを接合基板の一辺からこれに対向する辺に向かって移動させ、これにより全面が一度ウェットブラストされる。パス回数とは、この操作の繰り返し回数を表す。   After forming the conductive pattern, wet blasting was performed on the conductive pattern forming surface of the bonded substrate for the purpose of smoothing the periphery of the bonded end of the conductive layer and the ceramic substrate. The wet blasting was performed by using a wet blasting apparatus and injecting slurry of water and an abrasive (SiC particles having a particle diameter of about 10 to 20 μm) from a direction perpendicular to the conductor pattern forming surface. At this time, the shape of the side surface 2 of the ceramic substrate was changed by changing the injection pressure to 0.15 MPa, the nozzle moving speed to 100 mm / sec, and changing the number of passes. In one pass, the slit-shaped nozzle is moved from one side of the bonding substrate toward the side opposite to the bonding substrate, whereby the entire surface is wet-blasted once. The pass count represents the number of repetitions of this operation.

(2.形状評価)
上記の工程を経て得られた各試験例の絶縁放熱基板について、導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面が露出するように切断し、樹脂埋め後、露出した断面を研磨して、SEM観察を1000倍で行ない、以下の評価を行った。結果を表1に示す。
(1)評価1
導体層の上面の端部が導体層の下面の端部よりも導体層の平面視輪郭の接線に対する法線方向に後退しているか否かを評価した。評価結果は、任意の5箇所の断面について行い、5箇所の断面すべてが上記条件を満たす場合にYESとし、それ以外はNOとした。
(2)評価2
側面1及び側面2の輪郭は共に内側に窪んだ湾曲線状であるか否かを評価した。評価結果は、任意の5箇所の断面について行い、5箇所の断面すべてが上記条件を満たす場合にYESとし、それ以外はNOとした。
(3)評価3
側面1は導体層の上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に後退した箇所を有するか否かを評価した。評価結果は、任意の5箇所の断面について行い、5箇所の断面すべてが上記条件を満たす場合にYESとし、それ以外はNOとした。また、YESの場合は、側面1の前記後退した箇所のうち、最も後退した箇所が、導体層の上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に後退している距離の平均値を当該5箇所の断面から算出した。
(4)評価4
任意の5箇所の断面について仰角α、仰角β、仰角γ、α−β、β−γを測定し、それぞれの平均値を求めた。
(5)評価5
任意の5箇所の断面について、セラミックス基板における最低部と接合端の厚み方向の距離Hを測定し、平均値を求めた。
(6)評価6
任意の5箇所の断面について、セラミックス基板の最低部からセラミックス基板の接合面の接合端までの、導体層の平面視輪郭の接線に対する法線方向の距離Lを測定し、平均値を求めた。
(2. Shape evaluation)
For the insulated heat dissipation substrate of each test example obtained through the above steps, the conductor layer and the ceramic substrate were cut so that the cross-section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar outline of the conductor layer was exposed. Then, after embedding the resin, the exposed cross section was polished, SEM observation was performed at 1000 times, and the following evaluation was performed. The results are shown in Table 1.
(1) Evaluation 1
It was evaluated whether or not the end portion of the upper surface of the conductor layer was retracted in the normal direction with respect to the tangent to the contour in plan view of the conductor layer from the end portion of the lower surface of the conductor layer. The evaluation result was made for any five cross-sections, and when all the five cross-sections satisfied the above conditions, it was set to YES, and otherwise it was set to NO.
(2) Evaluation 2
It was evaluated whether or not the contours of the side surface 1 and the side surface 2 were curved lines recessed inward. The evaluation result was made for any five cross-sections, and when all the five cross-sections satisfied the above conditions, it was set to YES, and otherwise it was set to NO.
(3) Evaluation 3
It was evaluated whether or not the side surface 1 had a portion that was receded in the normal direction with respect to the tangent to the contour of the conductor layer from the end of the upper surface of the conductor layer. The evaluation result was made for any five cross-sections, and when all the five cross-sections satisfied the above conditions, it was set to YES, and otherwise it was set to NO. Further, in the case of YES, the distance where the most receded portion of the receded location of the side surface 1 is receded in the normal direction with respect to the tangent to the contour of the conductor layer in plan view from the end of the upper surface of the conductor layer Was calculated from the cross-sections at the five locations.
(4) Evaluation 4
Elevation angle α, elevation angle β, elevation angle γ, α-β, and β-γ were measured for arbitrary five cross sections, and the average value of each was determined.
(5) Evaluation 5
For any five cross-sections, the distance H in the thickness direction between the lowest portion and the joining end of the ceramic substrate was measured, and the average value was obtained.
(6) Evaluation 6
For any five cross-sections, the distance L in the normal direction from the lowest part of the ceramic substrate to the bonding end of the bonding surface of the ceramic substrate with respect to the tangent of the planar outline of the conductor layer was measured, and the average value was obtained.

(3.冷熱サイクル試験)
上記の工程を経て得られた各試験例の絶縁放熱基板について、冷熱サイクル試験を行った。冷熱サイクル試験は、−55℃(15分)/175℃(15分)の冷熱サイクルを1000cyc(サイクル)与える試験を行った。途中100cyc毎に(つまりは全10回)、実体顕微鏡による外観確認と超音波探傷とによって、接合部の剥がれ及びセラミックス基板におけるクラックの有無(以下、これらをまとめて「不具合」と総称する)について確認し、不具合が生じることなく冷熱サイクル試験が行うことができたサイクル回数を評価した。
(3. Thermal cycle test)
A thermal cycle test was performed on the insulating heat-radiating substrate of each test example obtained through the above steps. The cold cycle test was a test in which a cold cycle of −55 ° C. (15 minutes) / 175 ° C. (15 minutes) was applied at 1000 cyc (cycle). About every 100 cyc in the middle (that is, 10 times in total), the presence of peeling of the bonded portion and the presence or absence of cracks in the ceramic substrate (hereinafter collectively referred to as “defects”) by external appearance confirmation and ultrasonic flaw detection using a stereomicroscope The number of cycles in which the cooling / heating cycle test was able to be conducted without any problems was confirmed.

結果を表1に示す。例えば、「100」とあるのは最初の100cycまでは不具合が生じなかったが、200cyc終了後の観察時には不具合が生じたことを示す。また、「1000」とあるのは、1000cycを実施するまでの間に不具合が生じなかったことを示す。   The results are shown in Table 1. For example, “100” indicates that no defect occurred until the first 100 cyc, but a defect occurred during observation after the end of 200 cyc. Further, “1000” indicates that no malfunction occurred before the execution of 1000 cyc.

(4.絶縁破壊電圧)
上記の工程を経て得られた各試験例の絶縁放熱基板を対象に、絶縁破壊電圧の測定を行った。測定は、絶縁油中において、図5に示す三つの導体層のうち中央の最も大きな導体層の上面とセラミックス基板の非接合面(導体層が接合されている面とは反対の面)との間に、交流電圧(実効値6kV、周波数60Hz)を10秒間印加することにより行った。評価は、ショートしなかった場合を「OK」、ショートした場合を「NG」とした。表1に結果を示す。
(4. Dielectric breakdown voltage)
The dielectric breakdown voltage was measured for the insulating heat dissipation substrate of each test example obtained through the above steps. In the insulating oil, the top surface of the largest conductor layer in the middle of the three conductor layers shown in FIG. 5 and the non-joint surface of the ceramic substrate (the surface opposite to the surface where the conductor layer is joined) are measured. In the meantime, an AC voltage (effective value 6 kV, frequency 60 Hz) was applied for 10 seconds. The evaluation was “OK” when no short circuit occurred and “NG” when short circuit occurred. Table 1 shows the results.

Figure 0006375086
Figure 0006375086

Figure 0006375086
Figure 0006375086

(5.考察)
以上の結果より、α−βの絶対値の平均が20°を超える比較例1−1及び比較例2−1に対して、α−βの絶対値の平均が20°以下の実施例1−1〜1−7、実施例2−1〜2−5は、冷熱サイクル耐久性が有意に向上したことが理解できる。なお、実施例1−5のように研削量が大きいと基板の厚みが薄くなり、絶縁破壊特性へ影響が出ると考えられる。
(5. Discussion)
From the above results, in comparison with Comparative Example 1-1 and Comparative Example 2-1, in which the average absolute value of α-β exceeds 20 °, Example 1 in which the average absolute value of α-β is 20 ° or less. It can be understood that the heat cycle durability was significantly improved in 1-1-7 and Examples 2-1 through 2-5. In addition, it is thought that when the grinding amount is large as in Example 1-5, the thickness of the substrate becomes thin and the dielectric breakdown characteristics are affected.

100 絶縁放熱基板
110 セラミックス基板
111 セラミックス基板の最低部
112 セラミックス基板の側面2
113 セラミックス基板の接合面
120 導体層
121 導体層の上面
122 導体層の下面
123 導体層の側面1
124 導体層の上面の端部
125 導体層の下面の端部
100 Insulating heat dissipation substrate 110 Ceramic substrate 111 Minimum portion 112 of ceramic substrate Side surface 2 of ceramic substrate
113 Bonded surface 120 of ceramic substrate Conductor layer 121 Upper surface of conductor layer 122 Lower surface of conductor layer 123 Side surface of conductor layer 1
124 End of upper surface of conductor layer 125 End of lower surface of conductor layer

Claims (7)

セラミックス基板と、該セラミックス基板の少なくとも一方の主表面上に接合された導体層とを有する絶縁放熱基板であって、
前記導体層は上面と、下面と、上面及び下面を連結する側面1とを有し、
前記セラミックス基板は最低部と、最低部及び前記導体層の側面1を連結する側面2と、該最低部よりも高い位置にあり、前記導体層の下面に接合する接合面とを有し、
導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、前記下面の高さにおける側面1の前記下面に対する仰角αと、前記接合面の高さにおける側面2の前記接合面に対する仰角βの差の絶対値が平均で20°以下であり、
導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1は前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に後退した箇所を有する絶縁放熱基板。
An insulating heat dissipation substrate having a ceramic substrate and a conductor layer bonded on at least one main surface of the ceramic substrate,
The conductor layer has an upper surface, a lower surface, and a side surface 1 connecting the upper surface and the lower surface,
The ceramic substrate has a lowest part, a side face 2 that connects the lowest part and the side face 1 of the conductor layer, and a joint surface that is at a position higher than the lowest part and is joined to the lower face of the conductor layer,
When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the contour of the conductor layer in plan view, the elevation angle α of the side surface 1 with respect to the lower surface at the height of the lower surface, and the bonding The absolute value of the difference in the elevation angle β with respect to the joint surface of the side surface 2 at the height of the surface is 20 ° or less on average,
When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar outline of the conductor layer, the side surface 1 is tangent to the planar outline of the conductor layer rather than the end of the upper surface. An insulating heat dissipating board having a portion that is retracted in the normal direction to.
導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1の前記仰角αは平均で20°〜60°である請求項1に記載の絶縁放熱基板。   When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent to the outline of the conductor layer in plan view, the elevation angle α of the side surface 1 is 20 ° to 60 ° on average. The insulated heat dissipation board | substrate of 1. 前記セラミックス基板における最低部と前記接合面の端部との厚み方向の距離Hが平均で0μm〜30μmである請求項1又は2の何れか一項に記載の絶縁放熱基板。   The insulating heat dissipation substrate according to any one of claims 1 and 2, wherein a distance H in a thickness direction between the lowest portion of the ceramic substrate and an end portion of the bonding surface is 0 µm to 30 µm on average. 導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、側面1及び側面2の輪郭は共に内側に窪んだ湾曲線状である請求項1〜3の何れか一項に記載の絶縁放熱基板。   When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar outline of the conductor layer, the contours of the side surface 1 and the side surface 2 are both curved lines that are recessed inward. The insulated heat dissipation board | substrate as described in any one of Claims 1-3. 導体層とセラミックス基板を導体層の平面視輪郭の接線に対する法線方向及び厚み方向の両方に平行な断面で観察したとき、最低部から前記接合面の接合端までの、導体の平面視輪郭の接線に対する法線方向の距離Lが平均で5μm〜30μmである請求項1〜4の何れか一項に記載の絶縁放熱基板。   When the conductor layer and the ceramic substrate are observed in a cross section parallel to both the normal direction and the thickness direction with respect to the tangent of the planar outline of the conductor layer, the planar outline of the conductor from the lowest part to the joint end of the joint surface is observed. The insulation heat dissipation substrate according to any one of claims 1 to 4, wherein a distance L in a normal direction to the tangent line is 5 m to 30 m on average. 側面1の前記後退した箇所のうち、最も後退した箇所は、前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に平均で200μm以下後退している請求項1〜5の何れか一項に記載の絶縁放熱基板。   The most retracted portion of the receded portion of the side surface 1 is receded by 200 μm or less on average in the normal direction to the tangent to the contour of the conductor layer in plan view from the end of the upper surface. The insulated heat dissipation board | substrate as described in any one. 側面1の前記後退した箇所のうち、最も後退した箇所は、前記上面の端部よりも導体層の平面視輪郭の接線に対する法線方向に平均で20μm以上100μm以下後退している請求項6に記載の絶縁放熱基板。   7. The most receded portion of the side surface 1 that has receded from the end portion of the upper surface has receded in an average direction of 20 μm or more and 100 μm or less in the normal direction to the tangent to the contour of the conductor layer in plan view. The insulation heat dissipation board of description.
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