JP6367674B2 - Oscillator - Google Patents

Description

  The present invention relates to an oscillator capable of outputting a plurality of oscillation signals.

  Conventionally, an oscillator capable of outputting a plurality of oscillation signals is known. For example, Patent Document 1 discloses an oscillator including an oscillation circuit that generates two oscillation signals using one piezoelectric vibration element.

JP2013-115510A

  In the above oscillator, in order to prevent deterioration of the electrical characteristics of the output oscillation signal, wiring for connecting the piezoelectric vibration element and the oscillation circuit, and wiring for outputting the oscillation signal output from the oscillation circuit to the outside And are configured so as not to intersect. However, in an oscillator in which an oscillation circuit is configured by an integrated circuit, depending on the pin arrangement of the integrated circuit, wiring may be complicated in order not to cross a plurality of wirings. When wiring is complicated, there is a problem that the cost increases or the oscillator becomes large by increasing the number of layers of the substrate.

  In view of the above, an object of the present invention is to improve the degree of freedom of wiring in an oscillator.

  The oscillator according to the present invention outputs a piezoelectric oscillation element and a first oscillation signal having a first frequency which is a resonance frequency of the piezoelectric oscillation element, and outputs a second oscillation signal having a second frequency different from the first frequency. A circuit element; and a housing portion that houses the piezoelectric vibration element and the circuit element. The circuit element includes a vibration element input terminal that receives a signal input from the piezoelectric vibration element, and the piezoelectric vibration element. A vibration element output terminal for outputting a signal; a first signal output terminal for outputting a signal of the first frequency; and a second signal output terminal for outputting a signal of the second frequency; A first wiring layer having a first wiring connected to the vibration element output terminal, a second wiring connected to the first signal output terminal, and a third wiring connected to the second signal output terminal. A second wiring layer having And the first wiring, at least a portion overlapping the second wiring to be projected on the second wiring layer, and is formed in a position that does not overlap with the third line.

  The first wiring connects, for example, one of a plurality of electrodes included in the piezoelectric vibration element and the vibration element output terminal, and the second wiring includes the first signal output terminal and an external terminal of the oscillator. And connect. The first wiring may further include a wiring having one end connected to the piezoelectric vibration element and the other end not connected to the vibration element output terminal.

  The accommodating portion includes a first substrate on which the first wiring layer is formed and a second substrate on which the second wiring layer is formed, and the first wiring layer and the second wiring layer are via holes. May be connected. The distance between the first wiring layer and the second wiring layer is, for example, greater than the height of the circuit element.

  The oscillator is formed between the first wiring layer and the second wiring layer in a region including a region that overlaps at least a part of the second wiring when projected onto the second wiring layer. It may further have a ground pattern.

  According to the present invention, it is possible to improve the degree of freedom in routing the wiring in the oscillator.

It is a figure which shows the schematic circuit structure of an oscillator. It is a figure which shows an example of pin arrangement | positioning of an integrated circuit. It is sectional drawing of the orthogonal | vertical direction of an oscillator. It is sectional drawing of the horizontal direction of an oscillator. It is a figure which shows pin arrangement | positioning of the integrated circuit which concerns on 2nd Embodiment. It is sectional drawing of the horizontal direction of the oscillator which concerns on 2nd Embodiment. It is a figure which shows the waveform of the signal output from KO terminal, and the waveform of the signal output from MO terminal. It is a figure which shows the waveform of the signal output from KO terminal, and the waveform of the signal output from MO terminal. It is a figure which shows the waveform of the signal output from KO terminal, and the waveform of the signal output from MO terminal. It is sectional drawing of the orthogonal | vertical direction of the oscillator which concerns on 3rd Embodiment. It is sectional drawing of the horizontal direction of the oscillator which concerns on 3rd Embodiment. FIG. 10 is a horizontal cross-sectional view of Modification Example 1 of the oscillator according to the third embodiment. It is sectional drawing of the horizontal direction in the modification 2 of the oscillator which concerns on 3rd Embodiment. It is sectional drawing of the horizontal direction in the modification 3 of the oscillator which concerns on 3rd Embodiment. It is sectional drawing of the horizontal direction of the oscillator which concerns on 4th Embodiment. It is sectional drawing of the horizontal direction in the modification of the oscillator which concerns on 4th Embodiment.

<First Embodiment>
[Basic configuration of oscillator 1]
FIG. 1 is a diagram showing a schematic circuit configuration of the oscillator 1. The oscillator 1 includes a crystal resonator 2 and an integrated circuit 3.
The oscillator 1 connects a terminal T1 for outputting an oscillation signal in the MHz band, a terminal T2 for outputting an oscillation signal in the KHz band, a power supply terminal T3 for inputting a power supply voltage, and a ground. It has a ground terminal T4 and an output control terminal T5 for inputting a voltage for controlling whether or not to output an oscillation signal.

The crystal resonator 2 is a piezoelectric vibration element having a first connection electrode 24 and a second connection electrode 25.
The integrated circuit 3 is a circuit element including a circuit for oscillating the crystal resonator 2. The integrated circuit 3 is, for example, a semiconductor bare chip in which a circuit in which an active element and a passive element are combined is formed. The integrated circuit 3 includes a VDD terminal for inputting a power supply voltage, a GND terminal for connecting to a ground, an OE terminal for inputting a voltage for controlling whether or not to output an oscillation signal, an XIN terminal, an XOUT terminal, It has MO terminal and KO terminal. FIG. 2 is a diagram illustrating an example of the pin arrangement of the integrated circuit 3.

  The XIN terminal is a vibration element input terminal that receives a signal input from the crystal resonator 2, and the XOUT terminal is a vibration element output terminal that outputs a signal to the crystal resonator 2. The first connection electrode 24 of the crystal unit 2 is connected to the XIN terminal through the wiring 4, and the second connection electrode 25 of the crystal unit 2 is connected to the XOUT terminal through the wiring 5.

  The integrated circuit 3 outputs a first oscillation signal having a first frequency in the MHz band equal to the resonance frequency of the crystal resonator 2 from an MO terminal as a first signal output terminal. Further, the integrated circuit 3 outputs a second oscillation signal having a second frequency in the KHz band different from the first frequency from the KO terminal as the second signal output terminal.

  As shown in FIG. 1, the integrated circuit 3 includes an oscillation circuit 31, a frequency dividing circuit 32, a buffer 33, and a buffer 34. The oscillation circuit 31 includes an amplification circuit that amplifies an oscillation signal input from the XIN terminal via the wiring 4 and outputs the amplified signal from the XOUT terminal. The first oscillation signal output from the XOUT terminal is input to the crystal resonator 2 via the wiring 5. The oscillation circuit 31 outputs the oscillation signal generated by amplification by the amplification circuit to the frequency dividing circuit 32 and the buffer 33.

  The frequency divider circuit 32 divides the oscillation signal output from the oscillation circuit 31 and outputs a second oscillation signal having a second frequency lower than the first frequency. The buffer 33 amplifies the first oscillation signal output from the oscillation circuit 31 and outputs it to the outside via the MO terminal. The first oscillation signal output from the MO terminal is output to the outside of the oscillator 1 via the wiring 6 and the terminal T1. The buffer 34 amplifies the second oscillation signal output from the frequency dividing circuit 32 and outputs it to the outside via the KO terminal. The second oscillation signal output from the KO terminal is output to the outside of the oscillator 1 via the wiring 7 and the terminal T2. The oscillator 1 may generate the second oscillation signal using a PLL circuit instead of the frequency dividing circuit 32.

[Structure of oscillator 1]
Next, the structure of the oscillator 1 will be described with reference to FIGS. 3 and 4.
FIG. 3 is a vertical sectional view of the oscillator 1. FIG. 4 is a horizontal sectional view of the oscillator 1. 4A is a cross-sectional view taken along the line AA shown in FIG. 3, and FIG. 4B is a cross-sectional view taken along the line BB shown in FIG. 3 (first wiring layer). FIG. 4C is a cross-sectional view (second wiring layer) taken along the line CC shown in FIG. 3, and FIG. 4D is a cross-sectional view taken along the line DD shown in FIG. 3 (third wiring layer). FIG. 4E is a cross-sectional view taken along line EE shown in FIG. FIG. 3 is a cross-sectional view taken along line XX shown in FIG. In FIG. 4, not all wirings included in the oscillator 1 are shown, and wirings connected to the XIN terminal, the XOUT terminal, the MO terminal, and the KO terminal of the integrated circuit 3 are shown.

  In the oscillator 1, the crystal resonator 2 and the integrated circuit 3 are accommodated in the accommodating portion 10. The accommodating part 10 has a rectangular parallelepiped shape in which a lid plate 11, a substrate 12, a substrate 13, and a substrate 14 are stacked in layers. A cavity 15 is formed inside the accommodating portion 10, and the crystal resonator 2 and the integrated circuit 3 are mounted inside the cavity 15.

The lid plate 11 is formed of a flat metal member. The lid 15 is joined to the substrate 12 via the sealing material 16, so that the cavity 15 is sealed.
The board | substrate 12, the board | substrate 13, and the board | substrate 14 are formed with the ceramic member. The substrate 12 has a thickness larger than the thickness of the crystal resonator 2 and has a hole portion larger than the area of the crystal resonator 2.

  The substrate 13 has a thickness larger than the thickness of the integrated circuit 3 and has a hole portion larger than the area of the integrated circuit 3. The hole part which the board | substrate 13 has is smaller than the hole part which the board | substrate 12 has. The substrate 13 includes a pad 4a to which the first connection electrode 24 of the crystal resonator 2 is fixed, a pad 5a to which the second connection electrode 25 of the crystal resonator 2 is fixed, and the second connection electrode 25 and the XOUT terminal. A first wiring layer including wiring 5b for connection is formed. As shown in FIG. 4B, the pad 4a and the pad 5a are formed in a region that does not overlap the substrate 12 in the first wiring layer.

  The substrate 14 is a multilayer substrate including the substrate 141 and the substrate 142. The substrate 14 is formed between the second wiring layer shown in FIG. 4C and the substrate 141 and the substrate 142 formed on the main surface of the substrate 141 on which the integrated circuit 3 is mounted. and a third wiring layer shown in d). In the second wiring layer and the third wiring layer, wirings connected to the terminals of the integrated circuit 3 are formed. Six terminals including terminals T1 and T2 are formed on the back surface of the substrate 14.

  The crystal unit 2 includes a plate-shaped crystal piece 21, an excitation electrode 22, an excitation electrode 23, a first connection electrode 24, and a second connection electrode 25. The first connection electrode 24 is fixed to the pad 4a via a conductive adhesive. The second connection electrode 25 is fixed to the pad 5a via a conductive adhesive.

  The distance between the first wiring layer on which the pad 4a and the pad 5a to which the crystal resonator 2 is fixed is formed and the second wiring layer on which the integrated circuit 3 is mounted is larger than the height of the integrated circuit 3. Therefore, the integrated circuit 3 can be disposed under the crystal unit 2. For example, the integrated circuit 3 according to the present embodiment is fixed to the second wiring layer formed on the substrate 141 by bumps at a position that overlaps at least a part of the crystal resonator 2.

Hereinafter, wirings connected to the XIN terminal, the XOUT terminal, the MO terminal, and the KO terminal of the integrated circuit 3 will be described.
The wiring 4 is a wiring that connects the first connection electrode 24 of the crystal resonator 2 and the XIN terminal of the integrated circuit 3. The wiring 4 includes a pad 4 a formed in the first wiring layer of the substrate 13, a via hole 4 b penetrating the substrate 13, and a wiring 4 c formed in the second wiring layer on the substrate 141. The pad 4a and the wiring 4c are connected by a via hole 4b.

  The wiring 5 is a wiring that connects the second connection electrode 25 of the crystal unit 2 and the XOUT terminal of the integrated circuit 3. The wiring 5 includes a pad 5a and a wiring 5b formed in the first wiring layer, a via hole 5c penetrating the substrate 13, and a wiring 5d formed in the second wiring layer. The wiring 5b and the wiring 5d are connected by a via hole 5c. As shown in FIG. 4B, the wiring 5b is extended from the pad 5a to the via hole 5c formed around the position of the XOUT terminal of the integrated circuit 3 by bypassing the hole of the substrate 13. Yes.

  The wiring 6 is a wiring that connects the MO terminal of the integrated circuit 3 and the terminal T1. The wiring 6 includes, for example, a wiring 6a formed in the second wiring layer on the substrate 141 and a metal film formed in a castellation (not shown) near the terminal T1. The wiring formed in the second wiring layer and the terminal T1 may be connected via a via hole instead of the metal film formed in the castellation.

  The wiring 7 is a wiring that connects the KO terminal of the integrated circuit 3 and the terminal T2. The wiring 7 penetrates the wiring 7a formed in the second wiring layer on the substrate 141, the via hole 7b penetrating the substrate 141, the wiring 7c formed in the third wiring layer on the substrate 142, and the substrate 142. A via hole 7d is included. The wiring 7a and the wiring 7c are connected by a via hole 7b. The wiring 7c and the terminal T2 are connected by a via hole 7d.

  Of the wiring 4, the wiring 5, the wiring 6, and the wiring 7, the wiring 5 and the wiring 6 are formed at positions that intersect each other in different layers. The wiring 5 does not intersect with the wiring 7, and the wiring 4 does not intersect with any of the wiring 6 and the wiring 7. That is, the wiring 5 is formed at a position that overlaps at least a part of the wiring 6 and does not overlap with the wiring 7 when projected onto the second wiring layer, as indicated by a broken line in FIG.

  When the wiring 5 and the wiring 6 cross each other, a parasitic capacitance is generated between the wiring 5 and the wiring 6, so that an oscillation signal transmitted through the wiring 5 and an oscillation signal transmitted through the wiring 6 interfere with each other. To do. However, the frequency of the oscillation signal transmitted through the wiring 6 is equal to the first frequency that is the frequency of the oscillation signal transmitted through the wiring 5. Therefore, even if the oscillation signal transmitted through the wiring 5 and the oscillation signal transmitted through the wiring 6 interfere with each other, the influence of the parasitic capacitance on the characteristics of the oscillation signal transmitted through the wiring 6 is relatively small. The wiring 5 does not intersect with the wiring 7 through which an oscillation signal having a frequency different from that of the oscillation signal transmitted through the wiring 5 is transmitted. Therefore, the characteristics of the oscillation signal transmitted through the wiring 7 are not affected.

  As described above, in the oscillator 1 according to this embodiment, the wiring 5 connected to the XOUT terminal of the integrated circuit 3 and the wiring 6 connected to the MO terminal of the integrated circuit 3 intersect in different wiring layers. The crystal resonator 2 and the integrated circuit 3 can be connected in a small space without interference between the oscillation signal output from the XOUT terminal and the oscillation signal output from the MO terminal. By doing so, the degree of freedom of wiring routing in the oscillator 1 is improved, so that the oscillator 1 can be miniaturized and desired electrical characteristics can be obtained.

<Second Embodiment>
FIG. 5 is a diagram illustrating a pin arrangement of the integrated circuit 3 provided in the oscillator 1 according to the second embodiment. The integrated circuit 3 according to the second embodiment differs from the first embodiment in the positions of the XOUT terminal and the GND terminal, and is the same in other respects. FIG. 6 is a horizontal sectional view of the oscillator 1 according to the second embodiment. FIG. 6 (a) corresponds to FIG. 4 (b) in the first embodiment, and FIG. 6 (b) corresponds to FIG. 4 (c) in the first embodiment.

  Since the integrated circuit 3 has the pin arrangement shown in FIG. 5, the second connection electrode 25 of the crystal unit 2 is formed on the pad 5 a and the substrate 13 as shown in FIGS. 6A and 6B. The via hole 5e and the wiring 5f formed in the second wiring layer are connected to the XOUT terminal of the integrated circuit 3. In this case, even if the wiring 5 b is not formed in the first wiring layer on the substrate 13, the second connection electrode 25 of the crystal resonator 2 can be connected to the XOUT terminal of the integrated circuit 3.

  However, as shown in FIG. 6A, the wiring 5b may be formed in the first wiring layer. As in the first embodiment, even if there is a parasitic capacitance between the wiring 5b and the wiring 6, the frequency of the oscillation signal transmitted through the wiring 5b is equal to the frequency of the oscillation signal transmitted through the wiring 6. The influence of the parasitic capacitance on the characteristics of the oscillation signal transmitted through the wiring 6 is sufficiently small. Therefore, for example, by using the substrate 13 on which the wiring 5b is formed, the oscillator having either the integrated circuit 3 having the pin arrangement shown in FIG. 2 or the integrated circuit 3 having the pin arrangement shown in FIG. 1, the substrate 13 can be used. As a result, since the same substrate 13 can be shared by various types of oscillators 1, the production efficiency of the oscillator 1 is improved.

<Experimental example>
As described above, in order to confirm that even if the wiring 5 and the wiring 6 cross each other, the influence on the output oscillation signal is sufficiently small, the XIN terminal, the XOUT terminal, the KO terminal, and the MO terminal are used. With a capacitor connected between the two selected terminals, the waveform of a 32 KHz signal (hereinafter referred to as a KHz band signal) output from the KO terminal and a MHz band signal (hereinafter referred to as the MHz band) output from the MO terminal. Signal) was observed. Four types of capacitors having capacitance values of c1 (pF), c2 (pF), c3 (pF), and c4 (pF) were connected between the terminals, and the waveforms in the state where the respective capacitors were connected were observed. Note that c1 <c2 <c3 <c4.

  FIG. 7 shows the waveform of the KHz band signal output from the KO terminal and the waveform of the MHz band signal output from the MO terminal when a capacitor is connected between the XIN terminal and the KO terminal of the integrated circuit 3. FIG. When a capacitor is connected between the XIN terminal and the KO terminal, this corresponds to the case where the wiring 4 and the wiring 7 are crossed. Note that the waveform diagram shown in FIG. 7 is a diagram showing the tendency of the waveform actually measured with an oscilloscope.

  FIG. 7A shows the waveform of the KHz band signal when the capacitance of the capacitor is c1 (pF), and FIG. 7B shows the waveform of the MHz band signal when the capacitance of the capacitor is c1 (pF). Show. FIG. 7C shows the waveform of the KHz band signal when the capacitance of the capacitor is c2 (pF), and FIG. 7D shows the waveform of the MHz band signal when the capacitance of the capacitor is c2 (pF). Show. FIG. 7E shows the waveform of the KHz band signal when the capacitance of the capacitor is c3 (pF), and FIG. 7F shows the waveform of the MHz band signal when the capacitance of the capacitor is c3 (pF). Show. When the capacitance of the capacitor was c4 (pF), abnormal oscillation occurred.

  As apparent from FIGS. 7C and 7E, the influence of noise superimposed on the KHz band signal increases as the capacitance of the capacitor increases. This noise is considered to be caused by the oscillation signal input to the XIN terminal being superimposed on the KO signal via the capacitor. When the capacitance of the capacitor is c4 (pF), the impedance between the XIN terminal and the KO terminal at 32 KHz is reduced, and the KHz band signal output from the KO terminal is input to the XIN terminal via the capacitor. Therefore, it is considered that abnormal oscillation occurred.

  FIG. 8 shows the waveform of the KHz band signal output from the KO terminal and the waveform of the MHz band signal output from the MO terminal when a capacitor is connected between the XOUT terminal and the KO terminal of the integrated circuit 3. FIG. The case where a capacitor is connected between the XOUT terminal and the KO terminal corresponds to the case where the wiring 5 and the wiring 7 are crossed. Note that the waveform diagram shown in FIG. 8 is a diagram showing the tendency of the waveform actually measured with an oscilloscope.

  8A shows the waveform of the KHz band signal when the capacitance of the capacitor is c1 (pF), and FIG. 8B shows the waveform of the MHz band signal when the capacitance of the capacitor is c1 (pF). Show. FIG. 8C shows the waveform of the KHz band signal when the capacitance of the capacitor is c2 (pF), and FIG. 8D shows the waveform of the MHz band signal when the capacitance of the capacitor is c2 (pF). Show. 8E shows the waveform of the KHz band signal when the capacitance of the capacitor is c3 (pF), and FIG. 8F shows the waveform of the MHz band signal when the capacitance of the capacitor is c3 (pF). Show. FIG. 8G shows the waveform of the KHz band signal when the capacitance of the capacitor is c4 (pF), and FIG. 8H shows the waveform of the MHz band signal when the capacitance of the capacitor is c4 (pF). Show.

  As is apparent from FIGS. 8C, 8E, and 8G, the influence of noise superimposed on the KHz band signal increases as the capacitance of the capacitor increases. This noise can be attributed to the fact that the oscillation signal output from the XOUT terminal is superimposed on the KO signal via the capacitor.

  FIG. 9 shows the waveform of the KHz band signal output from the KO terminal and the waveform of the MHz band signal output from the MO terminal when a capacitor is connected between the XOUT terminal and the MO terminal of the integrated circuit 3. FIG. The case where a capacitor is connected between the XOUT terminal and the MO terminal corresponds to the case where the wiring 5 and the wiring 6 are crossed. In addition, the waveform diagram shown in FIG. 9 is a diagram showing the tendency of the waveform actually measured with an oscilloscope.

  FIG. 9A shows the waveform of the KHz band signal when the capacitance of the capacitor is c1 (pF), and FIG. 9B shows the waveform of the MHz band signal when the capacitance of the capacitor is c1 (pF). Show. FIG. 9C shows the waveform of the KHz band signal when the capacitance of the capacitor is c2 (pF), and FIG. 9D shows the waveform of the MHz band signal when the capacitance of the capacitor is c2 (pF). Show. FIG. 9E shows the waveform of the KHz band signal when the capacitance of the capacitor is c3 (pF), and FIG. 9F shows the waveform of the MHz band signal when the capacitance of the capacitor is c3 (pF). Show. FIG. 9G shows the waveform of the KHz band signal when the capacitance of the capacitor is c4 (pF), and FIG. 9H shows the waveform of the MHz band signal when the capacitance of the capacitor is c4 (pF). Show.

  As shown in FIG. 9D, FIG. 9F, and FIG. 9H, distortion occurs in the MHz band signal as the capacitance of the capacitor increases, but both the KHz band signal and the MHz band signal are good. Is oscillating.

  Note that when a capacitor was connected between the XIN terminal and the MO terminal of the integrated circuit 3, abnormal oscillation occurred in both the KHz band signal and the MHz band signal. When a capacitor is connected between the XIN terminal and the MO terminal, the MHz band signal from the crystal unit 2 and the MHz band signal from the MO terminal are input to the XIN terminal, which is considered to cause unstable operation.

  From the above experimental results, when a capacitor is connected between the XOUT terminal and the MO terminal of the integrated circuit 3, both the KHz band signal output from the KO terminal and the MHz band signal output from the MO terminal are detected. It was confirmed that a good waveform could be maintained. As a result, as in the first embodiment and the second embodiment, the wiring 5 and the wiring 6 are crossed, so that the degree of freedom in routing the wiring is improved and the oscillation signal output from the oscillator 1 is output. It was confirmed that the mechanical characteristics could be maintained well.

<Third Embodiment>
FIG. 10 is a vertical sectional view of the oscillator 1 according to the third embodiment. FIG. 11 is a horizontal sectional view of the oscillator 1 according to the third embodiment. The oscillator 1 according to the third embodiment is different in that the ground pattern 8a is formed between the first wiring layer including the wiring 5b and the second wiring layer including the wiring 5d and the wiring 6a. Unlike the oscillator 1 according to the embodiment, the other points are the same.

  11 (a) to 11 (e) are the same as FIGS. 4 (a) to 4 (e). FIG. 11F is a diagram illustrating the ground pattern 8a that the oscillator 1 according to the third embodiment has between the first wiring layer and the second wiring layer.

  In the ground pattern 8a, the wiring 5b formed in the first wiring layer and the wiring 6a formed in the second wiring layer intersect at any position between the first wiring layer and the substrate 141 in the substrate 13. It is formed in a region including the vicinity of the region. The ground pattern 8 a is formed in the entire area except for the vicinity of the via hole 4 b and the via hole 5 c and the vicinity of the end portion of the substrate 13 on the plane where the ground pattern 8 a is formed.

  Thus, in the oscillator 1 according to the third embodiment, the wiring 5b and the wiring 6a intersect between the first wiring layer in which the wiring 5b is formed and the second wiring layer in which the wiring 6a is formed. The ground pattern 8a is provided in a region including at least the region to be performed. Since the oscillator 1 has such a configuration, the oscillation signal output from the XOUT terminal transmitted through the wiring 5b and the oscillation signal output from the MO terminal transmitted through the wiring 6a are the first embodiment. It becomes harder to interfere than the oscillator 1 according to. Therefore, in the oscillator 1 according to the present embodiment, the degree of freedom of wiring routing is further improved, so that the oscillator 1 can be further reduced in size and desired electrical characteristics can be obtained.

  In the above description, the example in which the ground pattern 8a is formed in the substrate 13 has been described. However, the present invention is not limited to this. The oscillator 1 may have another substrate between the substrate 13 and the substrate 141, and the ground pattern 8 a may be formed on the substrate provided between the substrate 13 and the substrate 141.

  FIG. 12 is a horizontal sectional view of Modification 1 of the oscillator 1 according to the third embodiment. FIG. 12 differs from FIG. 11 in that a ground pattern 8b is provided in the third wiring layer between the substrate 141 and the substrate 142 as shown in FIG. . Thus, the oscillator 1 may have the ground pattern 8a and the ground pattern 8b. The oscillator 1 may have the ground pattern 8b without having the ground pattern 8a.

  FIG. 13 is a horizontal sectional view of Modification 2 of the oscillator 1 according to the third embodiment. 13 (a) to 13 (e) are the same as FIGS. 11 (a) to 11 (e). FIG. 13F shows a ground pattern 8c instead of the ground pattern 8a shown in FIG. The ground pattern 8c includes at least a region where the wiring 5b and the wiring 6a intersect, and has an area smaller than that of the ground pattern 8a. Thus, the ground pattern 8 formed between the first wiring layer and the second wiring layer may have any shape as long as it includes at least a region where the wiring 5b and the wiring 6a intersect.

  In the above description, the example in which the ground pattern 8c is formed in the substrate 13 has been described. However, the present invention is not limited to this. The oscillator 1 may have another substrate between the substrate 13 and the substrate 141, and the ground pattern 8 c may be formed on the substrate provided between the substrate 13 and the substrate 141.

  FIG. 14 is a horizontal sectional view of Modification 3 of the oscillator 1 according to the third embodiment. 14 differs from FIG. 13 in that the ground pattern 8b is provided in the third wiring layer between the substrate 141 and the substrate 142 as shown in FIG. 14D, and is the same in other points. . Thus, the oscillator 1 may include the ground pattern 8b and the ground pattern 8c. Further, the oscillator 1 may have the ground pattern 8b without having the ground pattern 8c.

<Fourth Embodiment>
FIG. 15 is a horizontal sectional view of the oscillator 1 according to the fourth embodiment. 15 (a) and 15 (b) are the same as FIGS. 6 (a) and 6 (b). FIG. 15C shows a ground pattern 8c that the oscillator 1 according to the fourth embodiment has between the first wiring layer shown in FIG. 15A and the second wiring layer shown in FIG. FIG. The oscillator 1 according to the fourth embodiment differs from the oscillator 1 according to the second embodiment in that a ground pattern 8c is provided, and is the same in other points.

  The ground pattern 8c is formed in a region including the vicinity of a region where the wiring 5b formed on the substrate 13 and the wiring 6a formed on the substrate 141 intersect. The ground pattern 8 c is formed in the entire area except for the vicinity of the via hole 4 b and the via hole 5 e and the vicinity of the end portion of the substrate 13 on the plane where the ground pattern 8 c is formed.

  Since the oscillator 1 has the ground pattern 8c, similarly to the oscillator 1 according to the third embodiment, the oscillation signal output from the XOUT terminal that is transmitted through the wiring 5b and the MO terminal that is transmitted through the wiring 6a are used. The output oscillation signal is less likely to interfere with the oscillator 1 according to the second embodiment.

  FIG. 16 is a horizontal sectional view of a modification of the oscillator 1 according to the fourth embodiment. 16 (a) and 16 (b) are the same as FIGS. 15 (a) and 15 (b). FIG. 16C shows a ground pattern 8d instead of the ground pattern 8c in the substrate 17 shown in FIG. The ground pattern 8d includes at least a region where the wiring 5b and the wiring 6a intersect, and has an area smaller than that of the ground pattern 8c. Thus, the ground pattern 8 formed between the first wiring layer and the second wiring layer may have any shape as long as it includes at least a region where the wiring 5b and the wiring 6a intersect.

  In the above description, the example in which the ground patterns 8c and 8d are formed in the substrate 13 has been described. However, the present invention is not limited to this. The oscillator 1 may include another substrate between the substrate 13 and the substrate 141, and the ground patterns 8c and 8d may be formed on the substrate provided between the substrate 13 and the substrate 141.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  For example, in the above embodiment, the case where the first wiring layer is formed on the substrate 13 and the second wiring layer is formed on the substrate 14 has been described. However, the first wiring layer and the second wiring layer are the same. It may be formed on the substrate.

  In the above-described embodiment, the case where the crystal resonator 2 as the piezoelectric vibration element has a flat plate shape has been described. However, the piezoelectric vibration element may have other shapes and other types. In the above embodiment, the configuration in which the integrated circuit 3 is disposed under the crystal resonator 2 has been described. However, the crystal resonator 2 and the integrated circuit 3 may be disposed without overlapping.

  In the above embodiment, the first frequency is a frequency in the MHz band and the second frequency is a frequency in the KHz band. However, the first frequency and the second frequency may be arbitrary frequencies. .

DESCRIPTION OF SYMBOLS 1 ... Oscillator 2 ... Crystal oscillator 3 ... Integrated circuit 4 ... Wiring 5 ... Wiring 6 ... Wiring 7 ... Wiring 8 ... Ground pattern 11 ... Lid board 12 ... substrate 13 ... substrate 14 ... substrate 21 ... crystal piece 22 ... excitation electrode 23 ... excitation electrode 24 ... first connection electrode 25 ... second connection electrode 31 ... Oscillator 32 ... Divider 33 ... Buffer 34 ... Buffer 141 ... Substrate 142 ... Substrate

Claims (6)

A piezoelectric vibration element;
A circuit element that outputs a first oscillation signal having a first frequency that is a resonance frequency of the piezoelectric vibration element and that outputs a second oscillation signal having a second frequency different from the first frequency;
An accommodating portion for accommodating the piezoelectric vibration element and the circuit element;
With
The circuit element is:
A vibration element input terminal for receiving an input of a signal from the piezoelectric vibration element;
A vibration element output terminal for outputting a signal to the piezoelectric vibration element;
A first signal output terminal for outputting a signal of the first frequency;
A second signal output terminal for outputting a signal of the second frequency;
Have
The accommodating portion is
A first wiring layer having a first wiring connected to the vibration element output terminal;
A second wiring layer having a second wiring connected to the first signal output terminal and a third wiring connected to the second signal output terminal;
Have
The first wiring is formed at a position that overlaps at least a part of the second wiring and does not overlap the third wiring when projected onto the second wiring layer.
Oscillator. The first wiring connects one of a plurality of electrodes of the piezoelectric vibration element and the vibration element output terminal, and the second wiring connects the first signal output terminal and an external terminal of the oscillator. Connecting,
The oscillator according to claim 1. The first wiring further includes a wiring having one end connected to the piezoelectric vibration element and the other end not connected to the vibration element output terminal.
The oscillator according to claim 1 or 2. The accommodating portion includes a first substrate on which the first wiring layer is formed and a second substrate on which the second wiring layer is formed, and the first wiring layer and the second wiring layer are via holes. Connected by
The oscillator according to any one of claims 1 to 3. A distance between the first wiring layer and the second wiring layer is greater than a height of the circuit element;
The oscillator according to claim 4. A ground pattern formed between the first wiring layer and the second wiring layer and formed in a region including a region that overlaps at least a part of the second wiring when projected onto the second wiring layer;
The oscillator according to any one of claims 1 to 5.