JP6365104B2 - Light emitting device and image forming apparatus - Google Patents

Description

  The present invention relates to a light emitting device and an image forming apparatus.

  In image forming apparatuses such as printers, copiers, and facsimiles that employ an electrophotographic method, after obtaining an electrostatic latent image by irradiating image information onto a uniformly charged photoreceptor by optical recording means The electrostatic latent image is visualized by adding toner, and the image is formed by transferring and fixing on the recording paper. As such optical recording means, in addition to an optical scanning method in which a laser is used to scan and expose a laser beam in the main scanning direction, in recent years, a large number of LED (Light Emitting Diode) array light sources are arranged in the main scanning direction. An optical recording means using an LED head is employed.

Patent Document 1 discloses an LED light emission control method for an electrophotographic apparatus in which a plurality of LED elements arranged in a straight line are caused to emit light corresponding to black pixels of image data to perform printing of one line. A method of controlling an LED printer device is disclosed in which, when pixels are printed, an LED element is caused to emit light corresponding to the original image data, and auxiliary light emission is performed within a period during which one line is to be printed.
Patent Document 2 discloses an image forming apparatus in which an image carrier is moved and multiple exposure is sequentially performed with respect to pixels by one line of light emitting elements in each column, and each line for exposing the same pixel is disclosed. Control means for causing the light emitting elements to emit light with the same light amount, count means for counting the number of times the DOT in the sub-scanning direction emits light for each DOT in the main scanning direction, and light emission DOT in the sub-scanning direction according to the count value of the counting means An image forming apparatus provided with a light emission DOT determining means for determining is disclosed.

JP-A-10-297022 JP 2014-730 A

When a light source using a light emitting element such as an LED is employed, the amount of light may be insufficient when an image for adjusting the state of the apparatus is formed.
The objective of this invention is providing the light-emitting device etc. which increase the light quantity in the location which forms the image which adjusts the state of an apparatus compared with the case where lighting time is not changed between light emitting elements.

According to the first aspect of the present invention, a plurality of light emitting elements arranged along the main scanning direction and sequentially lit, an optical element for imaging the light output of the plurality of light emitting elements, and the state of the apparatus are adjusted. A control unit that changes the speed of sequentially turning on the light emitting elements corresponding to the portion where the image to be formed is turned on in order to make the lighting time longer than the other light emitting elements, and the light emitting elements emit light every predetermined number. A plurality of the light emitting element array chips are arranged along the main scanning direction and mounted on the element array chip, and an image for adjusting the state of the device is obtained from two of the light emitting element array chips. When the control unit forms an image for adjusting the state of the apparatus, the two light emitting elements are formed in one line formation time. The light emitting elements mounted on one of the array chips are sequentially turned on from the boundary side in the main scanning direction at a speed slower than that for forming a normal image, and mounted on the other of the two light emitting element array chips. The light emitting device is characterized in that the light emitting element is sequentially turned on from the boundary side in the direction opposite to the main scanning direction at a slower speed than when the normal image is formed .
According to a second aspect of the present invention, the control unit sequentially turns on the light emitting elements corresponding to the portions where the image for adjusting the state of the device is formed at a speed slower than normal, and turns on the other light emitting elements. The light emitting device according to claim 1, wherein the light emitting device is not allowed to be generated.
According to a third aspect of the present invention, a plurality of light emitting elements arranged along the main scanning direction and sequentially lit, an optical element for imaging the light output of the plurality of light emitting elements, and the state of the apparatus are adjusted. And a control unit that changes the speed at which the light emitting elements corresponding to the portions where the image is to be formed are sequentially turned on, and when the normal image is formed, the control unit within the time for forming one line In the case where an image forming period and a pause period in which the normal image is not formed are provided and an image for adjusting the state of the apparatus is formed, the normal image is formed in one line forming time. During the corresponding period, the light emitting elements are sequentially turned on at the same speed as when the normal image is formed, and during the period corresponding to the rest period, the light emission is performed at a higher speed than when the normal image is formed. A light-emitting apparatus characterized by sequentially turning on the child again.
According to a fourth aspect of the present invention, the light emitting elements are mounted on the light emitting element array chips for each predetermined number, and a plurality of the light emitting element array chips are arranged along the main scanning direction. The image for adjusting the state is formed across a portion corresponding to the position of the boundary between two light emitting element array chips among the plurality of light emitting element array chips, and the control unit includes the two light emitting element array chips. The light emitting elements mounted on one of the light emitting elements are sequentially turned on in the main scanning direction from the boundary side, and the light emitting elements mounted on the other of the two light emitting element array chips are reversed from the boundary side in the main scanning direction. 4. The light emitting device according to claim 3 , wherein the light emitting device is sequentially turned on in the direction .
The invention of claim 5 includes an image holding member for holding an image, a charging means for charging the surface of the image carrier, exposing the image holding member, an electrostatic latent image to form an electrostatic latent image 5. The light-emitting device according to claim 1, further comprising: a forming unit ; and a developing unit that develops the electrostatic latent image to form a toner image. There is provided an image forming apparatus.

According to the first aspect of the present invention, it is possible to provide a light emitting device that increases the amount of light at a location where an image for adjusting the state of the device is formed, as compared with the case where the lighting time is not changed between the light emitting elements.
According to the second aspect of the present invention, an image for adjusting the state of the device is formed as compared with a case where the light emitting elements corresponding to the portions where the image for adjusting the state of the device is formed are not sequentially turned on at a slower speed than usual. The amount of light can be increased with respect to the light emitting element corresponding to the place to be.
According to invention of Claim 3 , the light quantity of a light emitting element can be increased using an idle period.
According to invention of Claim 4 , the light quantity of a light emitting element can be increased using two light emitting element array chips.
According to the fifth aspect of the present invention, it is possible to provide an image forming apparatus capable of obtaining a good image quality as compared with the case where the lighting time is not changed between the light emitting elements.

1 is a diagram illustrating an outline of an image forming apparatus according to an embodiment. It is the figure which showed the structure of the light emitting element head to which this Embodiment is applied. It is a top view of the circuit board and the light emission part in a light emitting element head. (A)-(b) is the figure explaining the structure of the light emitting chip to which this Embodiment is applied. It is the figure which showed the structure of the signal generation circuit at the time of employ | adopting a self-scanning light emitting element array chip as a light emitting chip, and the wiring structure of a circuit board. It is a figure for demonstrating the circuit structure of a light emitting chip. It is a figure explaining the timing chart. FIG. 4 is a diagram showing a relationship between an exposure amount by a light emitting element head and a potential of a photosensitive drum charged by the light emitting element head. It is a block diagram showing the functional structural example of the signal generation circuit in this embodiment. (A)-(b) is a figure explaining the drive waveform which a drive waveform generation part produces | generates in 1st Embodiment. (C) is a diagram showing the positional relationship between the reference patch created in the first embodiment and the light-emitting chip that creates this reference patch. (A)-(b) is a figure explaining the drive waveform which a drive waveform generation part produces | generates in 2nd Embodiment. (C) is a diagram showing the positional relationship between the reference patch created in the second embodiment and the light-emitting chip creating this reference patch. (A)-(b) is a figure explaining the drive waveform which a drive waveform generation part produces | generates in 3rd Embodiment. (C) is a diagram showing the positional relationship between the reference patch created in the third embodiment and the light-emitting chip that creates this reference patch. It is the figure which showed the positional relationship of the reference | standard patch produced in 4th Embodiment, and the light emitting chip which produces this reference | standard patch.

<Description of Overall Configuration of Image Forming Apparatus>
Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.
FIG. 1 is a diagram showing an outline of an image forming apparatus 1 according to the present embodiment.
The image forming apparatus 1 is an image forming apparatus generally called a tandem type. The image forming apparatus 1 includes an image forming unit 10 that forms an image corresponding to image data of each color. In addition, the image forming apparatus 1 includes an intermediate transfer belt 20 that sequentially transfers (primary transfer) each color component toner image formed by each image forming unit 11. The image forming apparatus 1 further includes a secondary transfer device 30 that collectively transfers (secondary transfer) the toner image transferred to the intermediate transfer belt 20 onto the paper P. Furthermore, the image forming apparatus 1 includes a fixing device 50 that fixes the second-transferred toner image on the paper P. Further, the image forming apparatus 1 includes an image output control unit 90 that controls each mechanism unit of the image forming apparatus 1 and performs predetermined image processing on the image data.

  The image forming unit 10 includes, for example, a plurality (four in this embodiment) of image forming units 11 (specifically, 11Y (yellow), 11M (magenta)) on which each color component toner image is formed by electrophotography. 11C (cyan), 11K (black)).

  Each image forming unit 11 (11Y, 11M, 11C, 11K) has the same configuration except for the color of the toner used. Therefore, the yellow image forming unit 11Y will be described as an example. The yellow image forming unit 11Y includes a photosensitive drum 12 that has a photosensitive layer (not shown) and is rotatably arranged in the direction of arrow A. Around the photosensitive drum 12, a charging roll 13, a light emitting element head 14, a developing device 15, a primary transfer roll 16, and a drum cleaner 17 are disposed. Among these, the charging roll 13 is rotatably disposed in contact with the photosensitive drum 12, and charges the photosensitive drum 12 to a predetermined potential. The light emitting element head 14 irradiates the photosensitive drum 12 charged to a predetermined potential by the charging roll 13 with light, and writes an electrostatic latent image. The developing unit 15 stores corresponding color component toner (yellow toner in the yellow image forming unit 11Y), and develops the electrostatic latent image on the photosensitive drum 12 with this toner. The primary transfer roll 16 primarily transfers the toner image formed on the photosensitive drum 12 to the intermediate transfer belt 20. The drum cleaner 17 removes residues (toner and the like) on the photosensitive drum 12 after the primary transfer.

  The photosensitive drum 12 functions as an image holding body that holds an image. The charging roll 13 functions as a charging unit that charges the surface of the photosensitive drum 12, and the light-emitting element head 14 exposes the photosensitive drum 12 to form an electrostatic latent image (light emission). Device). Further, the developing device 15 functions as a developing unit that develops the electrostatic latent image to form a toner image.

The intermediate transfer belt 20 as an image transfer member is rotatably supported by a plurality of (five in the present embodiment) support rolls. Of these support rolls, the drive roll 21 stretches the intermediate transfer belt 20 and drives the intermediate transfer belt 20 to rotate. Further, the tension rolls 22 and 25 tension the intermediate transfer belt 20 and rotate according to the intermediate transfer belt 20 driven by the drive roll 21. The correction roll 23 is a steering roll that is stretched around the intermediate transfer belt 20 and restricts meandering in a direction substantially orthogonal to the conveyance direction of the intermediate transfer belt 20 (is disposed so as to be tiltable with one end in the axial direction as a fulcrum). Function. Further, the backup roll 24 stretches the intermediate transfer belt 20 and functions as a constituent member of the secondary transfer device 30 described later.
Further, a belt cleaner 26 for removing residues (toner and the like) on the intermediate transfer belt 20 after the secondary transfer is disposed at a portion facing the drive roll 21 with the intermediate transfer belt 20 interposed therebetween. A density detection sensor 27 is disposed opposite to the intermediate transfer belt 20. The density detection sensor 27 is disposed adjacent to the black image forming unit 11K, and reads each color toner image primarily transferred onto the intermediate transfer belt 20 and detects the density thereof.

  As will be described in detail later, in the present embodiment, the image forming unit 11 forms a density correction image (reference patch, density correction toner image) with a predetermined density for correcting the density of the image. This density correction image is an example of an image for adjusting the state of the apparatus.

  The secondary transfer device 30 includes a secondary transfer roll 31 disposed in pressure contact with the toner image holding surface side of the intermediate transfer belt 20 and a counter electrode of the secondary transfer roll 31 disposed on the back surface side of the intermediate transfer belt 20. And a backup roll 24. A power supply roll 32 that applies a secondary transfer bias having the same polarity as the charging polarity of the toner is disposed in contact with the backup roll 24. On the other hand, the secondary transfer roll 31 is grounded.

  The paper transport system includes a paper tray 40, a transport roll 41, a registration roll 42, a transport belt 43, and a discharge roll 44. In the paper transport system, the paper P stacked on the paper tray 40 is transported by the transport roll 41, and then temporarily stopped by the registration roll 42, and then the secondary transfer position of the secondary transfer device 30 at a predetermined timing. To send. Further, the sheet P after the secondary transfer is conveyed to the fixing device 50 via the conveying belt 43, and the sheet P discharged from the fixing device 50 is sent out to the outside by the discharge roll 44.

  Next, a basic image forming process of the image forming apparatus 1 will be described. Now, when a start switch (not shown) is turned on, a predetermined image forming process is executed. Specifically, for example, when the image forming apparatus 1 is configured as a printer, the image output control unit 90 first receives image data input from the outside such as a PC (personal computer). The received image data is subjected to image processing by the image output control unit 90 and supplied to the image forming unit 11. The image forming unit 11 performs toner image formation for each color. That is, each image forming unit 11 (specifically, 11Y, 11M, 11C, and 11K) is driven according to the digital image signal of each color. Next, in each image forming unit 11, the photosensitive drum 12 charged by the charging roll 13 is irradiated with light corresponding to the digital image signal by the light emitting element head 14, thereby forming an electrostatic latent image. Then, the electrostatic latent image formed on the photosensitive drum 12 is developed by the developing device 15 to form toner images of each color. In the case where the image forming apparatus 1 is configured as a copying machine, a document set on a document table (not shown) is read by a scanner, and the obtained read signal is converted into a digital image signal by a processing circuit. Similarly, the toner images of the respective colors may be formed.

  Thereafter, the toner images formed on the respective photosensitive drums 12 are sequentially primary-transferred onto the surface of the intermediate transfer belt 20 by the primary transfer roll 16 at a primary transfer position where the photosensitive drum 12 and the intermediate transfer belt 20 are in contact with each other. . On the other hand, the toner remaining on the photosensitive drum 12 after the primary transfer is cleaned by the drum cleaner 17.

  The toner image primarily transferred onto the intermediate transfer belt 20 in this way is superimposed on the intermediate transfer belt 20 and conveyed to the secondary transfer position as the intermediate transfer belt 20 rotates. On the other hand, the sheet P is conveyed to the secondary transfer position at a predetermined timing, and the secondary transfer roll 31 sandwiches the sheet P with respect to the backup roll 24.

  Then, at the secondary transfer position, the toner image carried on the intermediate transfer belt 20 is secondarily transferred to the paper P by the action of a transfer electric field formed between the secondary transfer roll 31 and the backup roll 24. . The sheet P on which the toner image is transferred is conveyed to the fixing device 50 by the conveyance belt 43. In the fixing device 50, the toner image on the paper P is heated and pressure-fixed, and then sent to a paper discharge tray (not shown) provided outside the apparatus. On the other hand, the toner remaining on the intermediate transfer belt 20 after the secondary transfer is cleaned by the belt cleaner 26.

<Description of light emitting element head>
FIG. 2 is a diagram illustrating a configuration of the light emitting element head 14 to which the exemplary embodiment is applied. The light-emitting element head 14 includes a housing 61, a light-emitting unit 63 including a plurality of LEDs as light-emitting elements, a circuit board 62 on which the light-emitting unit 63, the signal generation circuit 100 (see FIG. 3 described later) and the like are mounted And a rod lens (radial index distribution type lens) array 64 as an example of an optical element for forming an electrostatic latent image by forming an image of the light output emitted from the photosensitive member and exposing the photosensitive member.

  The housing 61 is made of, for example, metal, supports the circuit board 62 and the rod lens array 64, and is set so that the light emitting point of the light emitting unit 63 and the focal plane of the rod lens array 64 coincide. Further, the rod lens array 64 is arranged along the axial direction (main scanning direction) of the photosensitive drum 12.

<Description of light emitting unit>
FIG. 3 is a top view of the circuit board 62 and the light emitting unit 63 in the light emitting element head 14.
As shown in FIG. 3, the light emitting unit 63 has a light emitting chip C (C1 to C60) as an example of 60 light emitting element array chips on a circuit board 62 facing each other in two rows in the main scanning direction. Arranged in a shape. That is, in this case, the LEDs are mounted on the light emitting chips C for each predetermined number, and a plurality of light emitting chips C are arranged along the main scanning direction. In this case, the LEDs are arranged along the main scanning direction, and sequentially light up for each light emitting chip C in the main scanning direction or in the direction opposite to the main scanning direction. Further, the circuit board 62 includes a signal generation circuit 100 as an example of a control unit that controls light emission of a light emitting element array (see FIG. 4 described later) of the light emitting chip C.

<Description of Light Emitting Element Array Chip>
FIGS. 4A to 4B are diagrams illustrating the structure of a light-emitting chip C to which the present embodiment is applied.
FIG. 4A is a view of the light emitting chip C as seen from the direction in which the LED light is emitted. FIG. 4B is a cross-sectional view taken along line IVb-IVb in FIG.
In the light emitting chip C, as an example of the light emitting element array, a plurality of LEDs 71 arranged in a line in the main scanning direction are arranged in a straight line at equal intervals. Bonding pads 72 as an example of electrode portions for inputting and outputting signals for driving the light emitting element array are arranged on both sides of the substrate 70 so as to sandwich the light emitting element array. Each LED 71 is formed with a microlens 73 on the light emitting side. The light emitted from the LED 71 is collected by the micro lens 73, and the light can be efficiently incident on the photosensitive drum 12 (see FIG. 2).
The microlens 73 is made of a transparent resin such as a photocurable resin, and the surface thereof preferably has an aspherical shape in order to collect light more efficiently. The size, thickness, focal length, and the like of the microlens 73 are determined by the wavelength of the LED 71 used, the refractive index of the photocurable resin used, and the like.

<Description of Self-Scanning Light Emitting Element Array Chip>
In the present embodiment, it is preferable to use a self-scanning light emitting device (SLED) chip as the light emitting element array chip exemplified as the light emitting chip C. The self-scanning light-emitting element array chip uses a light-emitting thyristor having a pnpn structure as a constituent element of the light-emitting element array chip, and is configured to realize self-scanning of the light-emitting elements.

FIG. 5 is a diagram showing the configuration of the signal generation circuit 100 and the wiring configuration of the circuit board 62 when a self-scanning light emitting element array chip is adopted as the light emitting chip C.
The signal generation circuit 100 receives various control signals such as a line synchronization signal Lsync, image data Vdata, a clock signal clk, and a reset signal RST from an image output control unit 90 (see FIG. 1). . The signal generation circuit 100 performs, for example, rearrangement of image data Vdata, correction of output values, and the like based on various control signals input from the outside, and each of the light emitting chips C (C1 to C60). The light emission signal φI (φI1 to φI60) is output. In the present embodiment, one light emission signal φI (φI1 to φI60) is supplied to each light emitting chip C (C1 to C60).

  The signal generation circuit 100 outputs a start transfer signal φS, a first transfer signal φ1, and a second transfer signal φ2 to each of the light emitting chips C1 to C60 based on various control signals input from the outside.

  The circuit board 62 is provided with a power supply line 101 for power supply Vcc = −5.0 V connected to the Vcc terminals of the light emitting chips C1 to C60 and a power supply line 102 for grounding connected to the GND terminal. Yes. The circuit board 62 has a start transfer signal line 103 for transmitting the start transfer signal φS, the first transfer signal φ1, and the second transfer signal φ2 of the signal generation circuit 100, the first transfer signal line 104, and the second transfer signal line. 105 is also provided. Further, the circuit board 62 also has 60 light emission signal lines 106 (106_1 to 106_60) for outputting light emission signals φI (φI1 to φI60) from the signal generation circuit 100 to the light emitting chips C (C1 to C60). Is provided. The circuit board 62 is provided with 60 light emitting current limiting resistors RID for preventing excessive current from flowing through the 60 light emitting signal lines 106 (106_1 to 106_60). The light emission signals φI1 to φI60 can take two states of high level (H) and low level (L), respectively, as will be described later. The low level has a potential of −5.0V, and the high level has a potential of ± 0.0V.

FIG. 6 is a diagram for explaining a circuit configuration of the light-emitting chips C (C1 to C60).
The light emitting chip C includes 60 transfer thyristors S1 to S60 and 60 light emitting thyristors L1 to L60. The light emitting thyristors L1 to L60 have the same pnpn connection as the transfer thyristors S1 to S60, and function as light emitting diodes (LEDs) by using the pn connection therein. The light emitting chip C includes 59 diodes D1 to D59 and 60 resistors R1 to R60. Further, the light-emitting chip C includes transfer current limiting resistors R1A and R2A for preventing an excessive current from flowing through the signal lines to which the first transfer signal φ1, the second transfer signal φ2, and the start transfer signal φS are supplied. , R3A. The light emitting thyristors L1 to L60 constituting the light emitting element array 81 are arranged in the order of L1, L2,..., L59, L60 from the left side in the drawing to form a light emitting element array, that is, the light emitting element array 81. The transfer thyristors S1 to S60 are also arranged in the order of S1, S2,..., S59, S60 from the left side in the drawing to form a switch element array, that is, a switch element array 82. Furthermore, the diodes D1 to D59 are also arranged in the order of D1, D2,..., D58, D59 from the left in the drawing. Furthermore, the resistors R1 to R60 are also arranged in the order of R1, R2,... R59, R60 from the left in the drawing.

Next, electrical connection of each element in the light emitting chip C will be described.
The anode terminal of each transfer thyristor S1 to S60 is connected to the GND terminal. A power supply line 102 (see FIG. 5) is connected to the GND terminal and grounded.

  Also, the cathode terminals of the odd-numbered transfer thyristors S1, S3,..., S59 are connected to the φ1 terminal via the transfer current limiting resistor R1A. The first transfer signal line 104 (see FIG. 5) is connected to the φ1 terminal, and the first transfer signal φ1 is supplied.

  On the other hand, the cathode terminals of the even-numbered transfer thyristors S2, S4,..., S60 are connected to the φ2 terminal via the transfer current limiting resistor R2A. The second transfer signal line 105 (see FIG. 5) is connected to the φ2 terminal, and the second transfer signal φ2 is supplied.

  The gate terminals G1 to G60 of the transfer thyristors S1 to S60 are connected to the Vcc terminal via resistors R1 to R60 provided corresponding to the transfer thyristors S1 to S60, respectively. A power supply line 101 (see FIG. 5) is connected to the Vcc terminal, and a power supply voltage Vcc (−5.0 V) is supplied.

  Further, the gate terminals G1 to G60 of the respective transfer thyristors S1 to S60 are connected to the gate terminals of the corresponding light emitting thyristors L1 to L60 in a one-to-one relationship.

  The anode terminals of the diodes D1 to D59 are connected to the gate terminals G1 to G59 of the transfer thyristors S1 to S59, and the cathode terminals of the diodes D1 to D59 are respectively adjacent to the transfer thyristors S2 in the next stage. Are connected to gate terminals G2 to G60 of .about.S60. That is, the diodes D1 to D59 are connected in series with the gate terminals G1 to G60 of the transfer thyristors S1 to S60 interposed therebetween.

  The anode terminal of the diode D1, that is, the gate terminal G1 of the transfer thyristor S1, is connected to the φS terminal via the transfer current limiting resistor R3A. The φS terminal is supplied with a start transfer signal φS via a start transfer signal line 103 (see FIG. 5).

  Next, the anode terminals of the light emitting thyristors L1 to L60 are connected to the GND terminal in the same manner as the anode terminals of the transfer thyristors S1 to S60.

  The cathode terminals of the light emitting thyristors L1 to L60 are connected to the φI terminal. A light emission signal line 106 (light emission signal line 106_1 in the case of the light emitting chip C1, refer to FIG. 5) is connected to the φI terminal, and a light emission signal φI (light emission signal φI1 in the case of the light emitting chip C1) is supplied. The other light emitting chips C2 to C60 are supplied with the corresponding light emission signals φI2 to φI60, respectively.

  Next, the operation of the light-emitting chip C in the exposure operation will be described in detail with reference to the timing chart shown in FIG. In FIG. 7, for convenience of explanation, a case where the respective light emitting thyristors L are sequentially turned on in the main scanning direction will be described. The timing chart in FIG. 7 is for a normal image forming operation. As will be described in detail later, when forming a reference patch (density correction image, density correction toner image) during process control, the timing chart is changed from that in FIG.

  Here, in the initial state, the start transfer signal φS is at a low level (L), the first transfer signal φ1 is at a high level (H), the second transfer signal φ2 is at a low level, and the light emission signal φI is at a high level. , Each is set.

  As the operation starts, the start transfer signal φS input from the signal generation circuit 100 is changed from the low level to the high level. As a result, the high-level start transfer signal φS is supplied to the gate terminal G1 of the transfer thyristor S1 of the light emitting chip C. At this time, the start transfer signal φS is also supplied to the gate terminals G2 to G60 of the other transfer thyristors S2 to S60 via the diodes D1 to D59. However, since the voltage drop occurs in each of the diodes D1 to D59, the voltage applied to the gate terminal G1 of the transfer thyristor S1 is the highest.

  Then, in a state where the start transfer signal φS is at the high level, the first transfer signal φ1 input from the signal generation circuit 100 is changed from the high level to the low level. In addition, after the first period ta has elapsed since the first transfer signal φ1 is changed to the low level, the second transfer signal φ2 is changed from the low level to the high level.

  As described above, when the low-level first transfer signal φ1 is supplied in a state where the start transfer signal φS is at the high level, the light-emitting chip C is an odd number to which the low-level first transfer signal φ1 is supplied. Of the second transfer thyristors S1, S3,..., S59, the transfer thyristor S1 having the highest gate voltage and exceeding the threshold value is turned on. At this time, since the second transfer signal φ2 is at the high level, the cathode voltages of the even-numbered transfer thyristors S2, S4,..., S60 remain high and the turn-off state is maintained. At this time, in the light emitting chip C, only the odd-numbered transfer thyristor S1 is turned on. As a result, the odd-numbered transfer thyristor S1 and the light-emitting thyristor L1 whose gates are connected to each other are turned on and are allowed to emit light.

  In the state where the transfer thyristor S1 is turned on, the second transfer signal φ2 is changed from the high level to the low level after the second period tb has elapsed since the second transfer signal φ2 was changed to the high level. Then, among the even-numbered transfer thyristors S2, S4,..., S60 to which the low-level second transfer signal φ2 is supplied, the transfer thyristor S2 having the highest gate voltage and equal to or higher than the threshold value is turned on. At this time, in the light emitting chip C, the odd-numbered transfer thyristor S1 and the even-numbered transfer thyristor S2 adjacent thereto are both turned on. Accordingly, in addition to the light-emitting thyristor L1 that has already been turned on, the even-numbered transfer thyristor S2 and the light-emitting thyristor L2 whose gates are connected to each other are turned on and are ready to emit light.

  In a state where both the transfer thyristor S1 and the transfer thyristor S2 are turned on, after the third period tc has elapsed after the second transfer signal φ2 is changed to the low level, the first transfer signal φ1 is changed from the low level to the high level. Changed to Accordingly, the odd-numbered transfer thyristor S1 is turned off, and only the even-numbered transfer thyristor S2 is turned on. Accordingly, the odd-numbered light-emitting thyristor L1 is turned off and cannot emit light, and only the even-numbered light-emitting thyristor L2 is kept turned on and can emit light. In this example, the start transfer signal φS is changed from the high level to the low level as the first transfer signal φ1 is changed to the high level.

  In the state where the transfer thyristor S2 is turned on, the first transfer signal φ1 is changed from the high level to the low level after the fourth period td has elapsed since the first transfer signal φ1 was changed to the high level. Accordingly, among the odd-numbered transfer thyristors S1, S3,..., S59 to which the low-level first transfer signal φ1 is supplied, the transfer thyristor S3 having the highest gate voltage is turned on. At this time, in the light emitting chip C, the even-numbered transfer thyristor S2 and the odd-numbered transfer thyristor S3 adjacent thereto are both turned on. Accordingly, in addition to the light-emitting thyristor L2 that has already been turned on, the odd-numbered transfer thyristor S3 and the light-emitting thyristor L3 whose gates are connected to each other are turned on so that both can emit light.

  In a state where both the transfer thyristor S2 and the transfer thyristor S3 are turned on, the second transfer signal φ2 is changed from the low level to the high level after the fifth period te elapses after the first transfer signal φ1 is changed to the low level. Changed to Accordingly, the even-numbered transfer thyristor S2 is turned off, and only the odd-numbered transfer thyristor S3 is turned on. Accordingly, the even-numbered light-emitting thyristor L2 is turned off to be incapable of emitting light, and only the odd-numbered light-emitting thyristor L3 is kept in a turn-on state to be capable of emitting light.

  As described above, in the light-emitting chip C, the transfer thyristor S1 is switched by alternately switching between the high level and the low level while providing an overlap period in which both the first transfer signal φ1 and the second transfer signal φ2 are set to the low level. ˜S60 are sequentially turned on in numerical order. As a result, the light emitting thyristors L1 to L60 are also turned on sequentially in the order of numbers. At this time, only the odd-numbered transfer thyristor (for example, transfer thyristor S1) is turned on in the second period tb, and in the third period tc, the odd-numbered transfer thyristor and the even-numbered transfer thyristor provided in the next stage are turned on. (For example, the transfer thyristor S1 and the transfer thyristor S2) are turned on, and in the fourth period td, only the even-numbered transfer thyristor (for example, the transfer thyristor S2) is turned on, and in the fifth period te, the even-numbered transfer thyristor and The odd-numbered transfer thyristor (for example, transfer thyristor S2 and transfer thyristor S3) provided in the next stage is turned on, and then only the odd-numbered transfer thyristor (for example, transfer thyristor S3) is turned on again in the second period tb. This process is repeated.

  On the other hand, the light emission signal φI basically changes from the high level to the low level in the second period tb in which the odd-numbered transfer thyristor is turned on alone and in the fourth period td in which the even-numbered transfer thyristor is independently turned on. Change from low level to high level.

  Accordingly, for each light emitting chip C, the light emitting thyristors L1, L2, L3, L4,..., L59, L60 emit light one by one in order (turn on sequentially).

  In FIG. 7, the time for exposing one line on the photosensitive drum 12 is shown as one line period. Then, after one line is exposed on the photosensitive drum 12, the same drive signal is generated again, and the light emitting thyristors L1, L2, L3, L4,..., L59, L60 emit light one by one in order. The above line is exposed, and this is repeated thereafter. When one line is exposed, there is a rest period at the end, and no exposure is performed in the rest period. That is, one line cycle is the total of the period during which exposure is actually performed and the rest period.

<Description of process control>
As described above, each of the image forming units 11Y, 11M, 11C, and 11K forms a corresponding color component toner image by the electrophotographic method, and primarily transfers the formed color component toner image to the intermediate transfer belt 20. Yes. In the tandem type image forming apparatus 1, since the respective photosensitive drums 12, the charging rolls 13, and the primary transfer rolls 16 are used, the degree of deterioration differs for each color. That is, the thickness of the photosensitive layer provided on the photosensitive drum 12 and the resistance values of the charging roll 13 and the primary transfer roll 16 are different for each image forming unit 11. Also, the charging characteristics of the toner for each color are different. For this reason, even if the corresponding color component toner images are formed by the image forming units 11Y, 11M, 11C, and 11K so as to form an image having the same density for each color, In practice, the image density of each color component toner formed on the transfer belt 20 is unlikely to be the same.

  Therefore, in the present embodiment, density correction reference patches (density correction images and density correction toner images) are created by the image forming units 11Y, 11M, 11C, and 11K, and each color component toner is used by using the patches. Image density correction (process control) is performed. That is, the reference patch for density correction is first transferred onto the intermediate transfer belt 20. Next, the density of the reference patch of each color transferred onto the intermediate transfer belt 20 is read by a density detection sensor 27 as reading means, and the density correction of each color component toner image is performed based on the obtained reading result. After this density correction is performed, an image toner image for actually forming an image on the paper P is formed.

However, in the light-emitting element head 14 that employs a light source using a light-emitting element such as the LED 71 (see FIG. 4), the light amount may be insufficient when a reference patch for density correction is created.
FIG. 8 is a diagram showing the relationship between the exposure amount by the light emitting element head 14 and the potential of the photosensitive drum 12 charged thereby.
As shown in the figure, the potential of the photosensitive drum 12 decreases as the exposure amount by the light emitting element head 14 increases. The normal exposure amount by the light emitting element head 14 is in a range of R1 to R2 (normal use range) as shown in the figure, and a normal electrostatic latent image is formed within this range.

  On the other hand, when creating a reference patch for density correction during process control, the photosensitive drum 12 is charged with a light amount higher than usual (for example, the exposure amount is R3 in FIG. 8). That is, the sensitivity of the photoconductor on the surface of the photoconductor drum 12 is generally not constant but varies. Therefore, in order to eliminate this influence as much as possible, the photosensitive drum 12 is charged with a light amount higher than usual. At this time, as shown in FIG. 8, the potential is saturated and tends to be relatively constant, and is less susceptible to variations in the sensitivity of the photosensitive member of the photosensitive drum 12.

  In order to increase the exposure amount by the light emitting element head 14, for example, there is a method of increasing the DUTY ratio at which the LED 71 is lit. However, there is a problem that the manufacturing cost of the light emitting element head 14 tends to increase.

  Therefore, in the present embodiment, the signal generation circuit 100 of the light emitting element head 14 has the following configuration to suppress the above problem.

<Description of functional configuration of signal generation circuit>
FIG. 9 is a block diagram illustrating a functional configuration example of the signal generation circuit 100 according to the present embodiment. In FIG. 9, among the various functions of the signal generation circuit 100, those related to the present embodiment are selected and illustrated.
As shown in the figure, the signal generation circuit 100 of the present embodiment includes an image information acquisition unit 111, a step correction unit 112, a lighting order rearrangement unit 113, a drive waveform generation unit 114, and an attachment error storage unit 115. Prepare.

  The image information acquisition unit 111 receives image data (image information) from the image output control unit 90. As described above, this image data can be used to form an image in the image forming unit 11 after image data input from the outside such as a PC is subjected to image processing in the image output control unit 90. Is. Specifically, the image processing includes, for example, rasterization processing, color conversion processing, pile height processing, screen processing, and the like.

  The level difference correcting unit 112 corrects the deviation of the electrostatic latent image caused by the level difference of the light emitting chip C. That is, since the light emitting chips C are arranged in a staggered manner as described above, if one line is output as it is, the lines of the electrostatic latent image are staggered. Therefore, it is necessary to correct this so that the line becomes a straight line. The level difference correction unit 112 considers the deviation of each light emitting chip C in the sub-scanning direction, and corrects the LED 71 of the light emitting chip C to light up corresponding to the time difference corresponding to this deviation.

  The lighting order rearrangement unit 113 determines the lighting order of the LEDs 71 of the light emitting chip C based on the result of correction by the step correction unit 112. The lighting order rearrangement unit 113 rearranges the lighting order of the LEDs 71.

  The drive waveform generation unit 114 generates a drive waveform for lighting the LED 71 and outputs it as a drive signal. Specifically, for example, the drive waveforms of the above-described light emission signal φI, start transfer signal φS, first transfer signal φ1, and second transfer signal φ2 are generated and output as drive signals. Although details will be described later, in the present embodiment, the shape of the drive waveform may be changed between the LED 71 corresponding to the location where the reference patch is formed and the other LEDs 71.

  The attachment error storage unit 115 stores the attachment error of the light emitting chip C in the main scanning direction. That is, when the light emitting chip C is mounted, an attachment error may occur. Although this error is slight, a deviation occurs between the position of the reference patch and the position density detection sensor 27 that reads the reference patch. Therefore, in order to correct this deviation, the drive waveform generation unit 114 changes the shape of the drive waveform based on the attachment error information in the attachment error storage unit 115. Then, the LED 71 is turned on at the position of the position concentration detection sensor 27.

<Description of Method for Increasing Exposure with Light-Emitting Element Head>
Next, a method for increasing the exposure amount with the light emitting element head 14 will be described.

[First Embodiment]
Here, the first embodiment will be described as a method for increasing the exposure amount with the light emitting element head 14.
In the present embodiment, the LED 71 corresponding to the location where the reference patch is formed is lit longer than usual, and the LED 71 corresponding to the other location where the reference patch is not formed is lit shorter than usual. And in order to implement | achieve this, the drive waveform produced | generated by the drive waveform production | generation part 114 is changed.

FIGS. 10A and 10B are diagrams illustrating the drive waveforms generated by the drive waveform generation unit 114 in the first embodiment.
Note that the first transfer signal φ1 is representatively shown here for easy understanding, but other drive waveforms are changed accordingly.
Among these, FIG. 10A is a diagram showing a drive waveform generated by the drive waveform generation unit 114 in a normal image forming operation. That is, it is equivalent to the first transfer signal φ1 shown in FIG. FIG. 10B is a diagram illustrating a drive waveform generated by the drive waveform generation unit 114 when the reference patch is created.

  As shown in FIG. 10 (a), the first transfer signal φ1 in the normal image forming operation has the same cycle from the beginning to the end without changing the cycle (pulse wave cycle) at which the high level and the low level are switched. It has become. FIG. 10A illustrates this by normal transfer. Thereby, the speed at which the LEDs 71 are sequentially turned on is the same from the beginning to the end.

  On the other hand, in FIG. 10B, this cycle is changed, the cycle is initially shorter than that in FIG. 10A, and the cycle becomes longer than that in FIG. 10A from the middle. Furthermore, in the last direction, it returns to the state whose period is shorter than the original FIG. As a result, the speed at which the LEDs 71 are sequentially turned on is initially faster than normal, and is slower than normal from the middle. In the last case, it will be faster than usual. In FIG. 10B, this is illustrated as fast transfer, slow transfer, and fast transfer, respectively. That is, when the sequential lighting speed is high (when the transfer speed is fast and the transfer cycle is short), the LED 71 that can be lit at this time is shorter than usual, and the amount of light is reduced. On the other hand, when the sequential lighting speed is slow (when the transfer speed is slow and the transfer cycle is long), the lightable time of the LED 71 that is lit at this time becomes longer than usual, and the light quantity increases.

FIG. 10C is a diagram showing the positional relationship between the reference patch created in the first embodiment and the light-emitting chip C that creates this reference patch.
In FIG. 10C, the light emitting chips C are arranged along the main scanning direction as shown in FIG. 3, and in this case, they are arranged in a staggered manner. In FIG. 10C, the light-emitting chip C for creating the reference patch T is illustrated as a light-emitting chip Cn. Then, the reference patch T is created near the center excluding the end of the light emitting chip Cn. The arrows in the figure indicate the directions in which the LEDs 71 of the respective light emitting chips C are sequentially turned on. In this case, the light emitting chips C in which the LEDs 71 are sequentially turned on in the main scanning direction and the LEDs 71 are opposite to the main scanning direction. Light emitting chips C that are sequentially turned on in the direction are alternately arranged. The light emitting chips Cn are sequentially turned on in the direction opposite to the main scanning direction.

  In this case, the LEDs 71 corresponding to the locations where the reference patch T is formed (in this case, the LEDs 71 other than the ends of the light emitting chip Cn) are sequentially lit at a slower speed than usual, and the light emitting elements corresponding to other locations. (In this case, the LED 71 at the end of the light emitting chip Cn) is made to be in a state where it can be sequentially turned on at a speed higher than usual. However, in this case, the light emitting elements corresponding to other portions are in a state where they can be lit, but are not actually lit. Here, the “normal speed” is a speed at which the LED 71 is turned on in a normal image forming operation.

[Second Embodiment]
Next, a second embodiment will be described as a method of increasing the exposure amount with the light emitting element head 14.
In the present embodiment, the LEDs 71 corresponding to the locations where the reference patches are formed are lit longer than usual, and the LEDs 71 corresponding to other locations where the reference patches are not formed are not lit. And in order to implement | achieve this, the drive waveform produced | generated by the drive waveform production | generation part 114 is changed.

FIGS. 11A to 11B are diagrams illustrating the drive waveforms generated by the drive waveform generation unit 114 in the second embodiment.
Among these, FIG. 11A is a diagram similar to FIG. 10A, and shows the drive waveform generated by the drive waveform generation unit 114 in the normal image forming operation. FIG. 11B is a diagram illustrating a drive waveform generated by the drive waveform generation unit 114 when the reference patch is created. Here, the first transfer signal φ1 is representatively illustrated for easy understanding.

  In the present embodiment, as shown in FIG. 11B, the period for switching the high level and the low level for the first transfer signal φ1 is set longer than usual. And this period is the same period from the beginning to the end. As a result, the speed at which the LEDs 71 are sequentially turned on becomes slower than usual (the transfer speed becomes slower and the transfer cycle becomes longer) and is the same from the beginning to the end. In FIG. 11 (b), this is illustrated by slow transfer. That is, the lighting time of the LED 71 that is turned on at this time is longer than usual, and the amount of light increases. However, in this case, since the speed of sequential lighting is reduced, all the LEDs 71 of the light-emitting chip C cannot be lit and are only lit halfway within the time for forming one line. That is, in this case, the LEDs 71 corresponding to the locations where the reference patch T is formed are sequentially lit at a slower speed than usual, and the LEDs 71 corresponding to other locations are not lit.

FIG. 11C is a diagram showing the positional relationship between the reference patch created in the second embodiment and the light-emitting chip C that creates this reference patch.
In FIG. 11C, the light emitting chip C for creating the reference patch T is illustrated by the light emitting chip Cn1 and the light emitting chip Cn2. In this case, the reference patch T is formed across a portion corresponding to the position of the boundary between the two light emitting chips C. When the reference patch T is created, the light emitting chip Cn1 and the light emitting chip Cn2 are used, and the lighting start positions are set to positions corresponding to the positions inside the reference patch T as shown in the figure. At this time, the light emitting chip Cn1 is sequentially turned on in the direction opposite to the main scanning direction, and the light emitting chip Cn2 is sequentially turned on in the main scanning direction. Thus, the reference patch T is created. In the present embodiment, the LEDs 71 of the light-emitting chips Cn1 and Cn2 cannot be lit all the time within the time of forming one line, and are only lit halfway, but the LED 71 that is not lit as shown in FIG. It is located outside the range of the location. Therefore, the LED 71 is not originally turned on, and no problem occurs in order to create the reference patch T.

[Third Embodiment]
Next, a third embodiment will be described as a method of increasing the exposure amount with the light emitting element head 14.
In this embodiment, the LED 71 of the light-emitting chip C is first turned on normally, and further, the LED 71 corresponding to the location where the reference patch T is formed using the rest period is turned on at a higher speed than usual. To do. That is, the LED 71 corresponding to the location where the reference patch T is formed is turned on a plurality of times (for example, twice), and multiple exposure (double exposure when the number of times of lighting is 2) is performed.

FIGS. 12A to 12B are diagrams illustrating the drive waveforms generated by the drive waveform generation unit 114 in the third embodiment.
Among these, FIG. 12A is a diagram showing a drive waveform generated by the drive waveform generation unit 114 in a normal image forming operation. FIG. 12B is a diagram illustrating a drive waveform generated by the drive waveform generation unit 114 when the reference patch is created. Here, the first transfer signal φ1 is representatively illustrated for easy understanding.

  In this case, as shown in FIG. 12A, there are a period during which the first transfer signal φ1 is switched between the high level and the low level and a pause period within the time for forming one line.

  In the present embodiment, as shown in FIG. 12B, the high level and the low level are switched again for the first transfer signal φ1 in a period that is normally a pause period. In other words, there is a case where the LED 71 is lit twice within the time for forming one line. In FIG. 12B, this is shown as the first and second rounds. However, since the pause period is usually a short period, in the second round, the speed at which the LEDs 71 are sequentially turned on is set to be higher than usual (the transfer speed is increased and the transfer cycle is shortened). That is, fast transfer is performed. Further, all of the LEDs 71 may not be lit but may be lit only halfway.

FIG. 12C is a diagram showing the positional relationship between the reference patch created in the third embodiment and the light-emitting chip C that creates this reference patch.
In FIG. 12C, the light emitting chip C for creating the reference patch T is illustrated by the light emitting chip Cn1 and the light emitting chip Cn2. In this case, as in FIG. 11C, the reference patch T is formed across a portion corresponding to the position of the boundary between the two light emitting chips C. When the reference patch T is created, the light emitting chip Cn1 and the light emitting chip Cn2 are used, and the lighting start positions are set to positions corresponding to the positions inside the reference patch T as shown in the figure.

  In this case, in the first round, the light emitting chips Cn1 and Cn2 are lit at a normal lighting speed. Usually, during the rest period, as the second turn, the light emitting chips Cn1 and Cn2 start to light up again, and light up at a higher lighting speed than normal. And in the second lap, it lights up only halfway. In other words, in this case, the LEDs 71 corresponding to the locations where the reference patch T is formed are sequentially lit at a normal speed and again at a higher speed than usual.

[Fourth Embodiment]
Next, a fourth embodiment will be described as a method of increasing the exposure amount with the light emitting element head 14.
In the first to third embodiments described above, when the signal generation circuit 100 forms the reference patch T, the LED 71 corresponding to the other part of the LED 71 corresponding to the part where the reference patch T is formed. In order to make the lighting time longer, control is performed to change the speed at which the LEDs 71 are sequentially turned on.
On the other hand, in the fourth embodiment, the light emitting chip C is further arranged in the sub-scanning direction at a position corresponding to the location where the reference patch T is formed. When the reference patch T is formed, the LEDs 71 of the light emitting chips C arranged side by side in the sub-scanning direction are turned on.

FIG. 13 is a diagram showing the positional relationship between the reference patch created in the fourth embodiment and the light-emitting chip C that creates this reference patch.
In FIG. 13, the light emitting chip C for creating the reference patch T is illustrated by the light emitting chip Cn1 and the light emitting chip Cn2. Among these, the light-emitting chip Cn1 is one of the light-emitting chips C arranged along the main scanning direction shown in FIG. On the other hand, the light emitting chip Cn2 is provided separately, and in the example of FIG. 13, the light emitting chip Cn2 is provided at a position where the light emitting chip Cn1 is shifted in the sub-scanning direction. That is, the long-side direction of the light-emitting chip Cn1 and the long-side direction of the light-emitting chip Cn2 are arranged substantially in parallel, and the short-side direction of the light-emitting chip Cn1 and the short-side direction of the light-emitting chip Cn2 are arranged almost in parallel.

  In this case, a plurality of light emitting chips C are arranged along the main scanning direction, and a light emitting element array chip group in which the light emitting chip Cn2 is further added in the sub scanning direction at a position corresponding to the position where the reference patch T is formed is configured. It can be said that it is done.

  Then, the drive waveform generation unit 114 inputs the same drive signal to the light emitting chip Cn1 and the light emitting chip Cn2. The drive signal may be the same as in normal image formation, and the speed at which the light is sequentially turned on is the same as normal. As a result, the LED 71 of the light emitting chip Cn1 and the LED 71 of the light emitting chip Cn2 are turned on simultaneously.

According to the first to fourth embodiments described above, the amount of light of the LED 71 corresponding to the location where the reference patch T is formed increases. Therefore, even when the reference patch T is created, a shortage of the amount of light emitted from the LED 71 is less likely to occur.
Furthermore, according to the first to third embodiments, since the drive waveform generation unit 114 may perform control to change the speed at which the LEDs 71 are sequentially turned on, the cost for manufacturing the light emitting element head 14 is as follows. Little increase. Further, according to the fourth embodiment, it is only necessary to add and arrange the light emitting chip C only at the place where the light emitting chip C creates the reference patch T. Similarly, the cost for manufacturing the light emitting element head 14 is small. .

  EXAMPLES Hereinafter, although this invention is demonstrated in detail using an Example, this invention is not limited by these Examples, unless the summary is exceeded.

  In the following examples, a light emitting chip C having a length of a [mm] in which the LEDs 71 are arranged in the main scanning direction and a 1 dot size of the LED 71 of b [mm] was used. A reference patch T having a length in the main scanning direction of c [mm] (a> c) was formed.

Example 1
The reference patch T was formed according to the first embodiment.
At this time, when one line cycle is x [μs] and the transfer cycle at the time of fast transfer is y [μs], compared with the normal case,
(X-((ac) / b) * y) / (c / b) / (x * b / a)
= A (xy (ac) / b) / bx times the exposure amount.

(Example 2)
The reference patch T was formed according to the second embodiment.
The exposed portions were divided by two light emitting chips C, and the exposure was carried out uniformly by c / 2 [mm]. At this time, although one light emitting chip C is normally exposed for a [mm], it is exposed for c / 2 [mm], so the exposure amount is 2a / c times.

(Example 3)
The reference patch T was formed according to the third embodiment.
The exposed portions were divided by two light emitting chips C, and the exposure was carried out uniformly by c / 2 [mm]. If one line period is x [μs] and the rest period is z [μs], compared to the normal case,
{(X−z / (a / b) + z / (a / b × c / 2a)} / {(x−z) / (a / b)}
= A (x-bz / a + cz / 2b) / b (x-z) times the exposure amount.

Example 4
The reference patch T was formed according to the fourth embodiment.
In this case, since exposure is performed with two light emitting chips C as compared with the case of performing exposure with one normal light emitting chip C, the exposure amount is doubled.

In the above-described example, the case where the light emitting chip C is used and the self-scanning light emitting element array chip is used as the light emitting chip C has been described as an example. However, the present invention is not limited to this. Can be applied as long as they are arranged along the main scanning direction and light up sequentially.
In the above-described example, the density correction image has been described as an image for adjusting the state of the apparatus. However, the present invention is not limited to this. For example, when performing image position correction control (so-called “registration control”) for correcting the positional deviation of each color toner image formed by each image forming unit 11 (11Y, 11M, 11C, 11K) (see FIG. 1). The present invention can also be applied to the case of forming an image position correction image (registration patch) used in the above.

DESCRIPTION OF SYMBOLS 1 ... Image forming apparatus, 11 ... Image forming unit, 12 ... Photosensitive drum, 13 ... Charging roll, 14 ... Light emitting element head, 15 ... Developing device, 64 ... Rod lens array, 90 ... Image output control part, 100 ... Signal Generation circuit, 114... Drive waveform generation unit, C1 to C60... Light emitting chip, S1, S2, S3,..., S60 ... transfer thyristor, L1, L2, L3.

Claims (5)

A plurality of light emitting elements arranged along the main scanning direction and sequentially lit;
An optical element for imaging the light output of the plurality of light emitting elements;
A control unit for changing the speed of sequentially turning on the light emitting elements corresponding to the position where the image for adjusting the state of the apparatus is formed to make the lighting time longer than other light emitting elements;
Equipped with a,
The light emitting elements are mounted on a light emitting element array chip for each predetermined number, and a plurality of the light emitting element array chips are arranged along the main scanning direction,
An image for adjusting the state of the device is formed across a portion corresponding to the position of the boundary between two light emitting element array chips among the plurality of light emitting element array chips,
When forming an image for adjusting the state of the apparatus, the control unit moves the light emitting element mounted on one of the two light emitting element array chips from the boundary side in the main scanning direction in one line formation time. In addition, the light emitting elements mounted on the other of the two light emitting element array chips are sequentially turned on at a speed slower than that in the case of forming a normal image. A light-emitting device that is sequentially turned on at a slower speed than the case of forming an image of the above .   The controller is configured to sequentially turn on the light emitting elements corresponding to the portion where an image for adjusting the state of the apparatus is formed at a speed slower than usual, and not turn on the other light emitting elements. The light emitting device according to claim 1. A plurality of light emitting elements arranged along the main scanning direction and sequentially lit;
An optical element for imaging the light output of the plurality of light emitting elements;
A control unit that changes the speed at which the light-emitting elements corresponding to the portions that form an image for adjusting the state of the apparatus are sequentially turned on;
With
When the normal image is formed, the control unit provides a period during which the normal image is formed and a pause period during which the normal image is not formed, and adjusts the state of the apparatus within the time for forming one line. When the image to be formed is formed, the light emitting elements are sequentially lit at the same speed as that for forming the normal image during the period corresponding to the period for forming the normal image within the time of forming one line, and the pause is performed. In the period corresponding to the period, the light emitting element is sequentially turned on again at a higher speed than in the case of forming the normal image. The light emitting elements are mounted on a light emitting element array chip for each predetermined number, and a plurality of the light emitting element array chips are arranged along the main scanning direction,
An image for adjusting the state of the device is formed across a portion corresponding to the position of the boundary between two light emitting element array chips among the plurality of light emitting element array chips ,
The control unit sequentially turns on the light emitting elements mounted on one of the two light emitting element array chips in the main scanning direction from the boundary side, and the control unit is mounted on the other of the two light emitting element array chips. 4. The light emitting device according to claim 3 , wherein the light emitting elements are sequentially turned on from the boundary side in a direction opposite to the main scanning direction . An image carrier for holding an image;
Charging means for charging the surface of the image carrier;
Exposing the image holding member, a latent electrostatic image forming means for forming an electrostatic latent image,
Developing means for developing the electrostatic latent image to form a toner image;
Equipped with a,
The image forming apparatus according to claim 1, wherein the electrostatic latent image forming unit is the light emitting device according to claim 1 .

Images