JP6360094B2 - Game machine - Google Patents

Description

  It relates to gaming machines.

  A spinning machine (slot machine) is a multi-row game machine in which a plurality of symbols are arranged on the outer periphery when a game start instruction device (start lever) is operated after a predetermined number of game medals have been inserted. The cylinder (reel) rotates, and as a result of stopping the rotation using a rotation stop device (stop button) for stopping the rotation, a combination of predetermined symbols (for example, “777” on the effective line) )), The game type is generally shifted to a special gaming state that is more profitable for the player than the normal gaming state {the gaming state in which the lottery probability of the winning combination is higher than in the normal state}. is there. Here, in the slot machine, there may be a case where an image for production for enhancing the fun of the game is displayed on a display such as a liquid crystal in a form synchronized with the rotation operation and the stop operation of the reel. In many cases, when a stop button or the like is operated, a game result is predicted and enjoyed while comparing a design displayed on the reel with an image for performance displayed on the display.

  In addition, the pachinko game machine has a symbol called “special symbol” variably displayed on the display section such as 7-segment when the game ball enters the start opening (start chucker). Is in a specific mode (for example, “7”), a special game state that is more profitable for the player than the normal game state {contents that a special winning opening (attacker) that is normally closed is opened under predetermined conditions] Is a type that shifts to the so-called “digipachi” (conventional “first-class gaming machine”). Here, in order to reduce the burden of display control of special symbols that are directly linked to the interests of the player, in addition to the aforementioned “special symbols”, it is referred to as “decorative symbols” for the purpose of enhancing the fun of the game. The symbol to be displayed may be variably displayed on a display such as a liquid crystal having a size larger than that of the display unit in a form synchronized with the variation of the special symbol. And when the change of the special symbol is started, the decorative symbol also starts to change accordingly, and when the special symbol stops in a specific mode (for example, “7”), the decorative symbol also changes to the predetermined mode (for example, “777”). And many things are comprised so that a player can recognize clearly that transfer to a special game was decided because the decoration design stopped in the predetermined mode.

  Such a mechanism is common to many game machines of this type, but the program capacity for controlling the operation of the game machine is to prevent mixing of illegal programs (guaranteeing the validity of the program provided by the machine manufacturer). The upper limit of the capacity is strictly regulated from the viewpoint, and in addition to the program for implementing the gaming specification, the gaming machine is cheated (for example, for the slot of the game medium and the outlet) Many programs for preventing illegal acts are also implemented to protect against unauthorized access to obtain game media by unauthorized means.

JP 2014-57762 A

  However, in the present situation, there are still many cases where new fraudulent tricks with gaps in the control processing of the fraud prevention program are being created, and improvements related to the control processing of the fraud prevention program are desired. There is a problem of being.

The gaming machine according to this aspect is
A gaming machine having a main control means having a ROM and a RAM,
The ROM stores at least a first program including a combination lottery process and a second program including an abnormality determination process for determining whether a predetermined abnormality has occurred,
The RAM is
A first storage area including a first work area and a first stack area;
A second storage area including a second work area and a second stack area;
Have
A first stack area is disposed between the first work area and the second work area,
A second work area is arranged between the first stack area and the second stack area,
The main control means includes
Enable interrupt processing,
When the predetermined condition is satisfied, the combination lottery process can be executed,
The abnormality process is configured to be executed by the interrupt process,
Before determining whether or not the predetermined abnormality has occurred in the abnormality determination process, the address value of the current stack pointer is stored in a predetermined storage area, and then the stack pointer address value is associated with the second stack area. It is configured to change to a predetermined address value
It is a gaming machine characterized by this.
<Appendix>
In addition, although the different aspect different from this aspect is listed below, it can implement without being limited to these at all.
Gaming machine according to the present alternative embodiment,
A ROM, a RAM, and a CPU;
A gaming machine further comprising a main control unit for controlling the progress of the game,
The ROM stores a program for controlling instructions to the CPU and data read according to the program,
The RAM is
It has a stack area that can save the data stored in the register,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
As the interrupt process, it is configured to be able to execute an abnormality determination process for determining whether an abnormality of the gaming machine has occurred,
The stack area is divided into a first stack area and a second stack area,
When executing the abnormality determination process during execution of the interrupt process, after storing the address value of the stack pointer in the first stack area, the address value of the stack pointer is changed to the address value in the second stack area. The gaming machine is configured as described above.

  According to the gaming machine according to this aspect, there is an effect that it is possible to improve the control process of the fraud prevention program.

FIG. 1 is a perspective view of a rotating type gaming machine according to the present embodiment. FIG. 2 is a perspective view of a state in which the door of the spinning cylinder type gaming machine according to the present embodiment is opened. FIG. 3 is a perspective view of the inside of the medal slot in the spinning cylinder game machine according to the present embodiment. FIG. 4 is a front view and a top view of the medal payout device in the spinning cylinder type gaming machine according to the present embodiment. FIG. 5 is a memory map configuration diagram of the main control chip in the spinning cylinder type gaming machine according to the present embodiment. FIG. 6 is a table relating to the maximum use amount of the stack area in the spinning cylinder game machine according to the present embodiment. FIG. 7 is a table relating to the order of data stored in the first work area in the spinning-reel game machine according to the present embodiment. FIG. 8 is a table relating to the order of data stored in the second work area in the spinning-reel game machine according to the present embodiment. FIG. 9 is an operational diagram relating to the operation of the medal payout device in the spinning cylinder game machine according to the present embodiment. FIG. 10 is a table relating to the instruction display in the spinning cylinder gaming machine according to the present embodiment. FIG. 11 is a main operation flowchart relating to the processing at the time of power-on on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 12 is a main operation flowchart relating to the game progress main process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 13 is a main operation flowchart related to interval interrupt processing on the main control board side in the spinning-reel game machine according to the present embodiment. FIG. 14 is a main operation flowchart relating to the setting change device process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 15 is a table relating to the types of errors in the spinning cylinder gaming machine according to the present embodiment. FIG. 16 is an operation diagram relating to processing at the time of error detection in the spinning cylinder game machine according to the present embodiment. FIG. 17 is a flowchart of the program start process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 18 is a flowchart of the setting change device process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 19 is a flowchart of the RWM initialization process 3 on the main control board side in the rotating game machine according to the present embodiment. FIG. 20 is a flowchart of non-recoverable error processing on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 21 is a flowchart of the power-off recovery process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 22 is a flowchart of the RWM initialization process on the main control board side in the rotary gaming machine according to the present embodiment. FIG. 23 is a flowchart of the RWM initialization process 2 on the main control board side in the rotating game machine according to the present embodiment. FIG. 24 is a flowchart of the serial communication setting process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 25 is a flowchart of the game progress main process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 26 is a flowchart of the game medal acceptance start process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 27 is a flowchart of the process of adding one game medal on the main control board side in the rotating game machine according to the present embodiment. FIG. 28 is a flowchart of the inserted number display data generation process on the main control board side in the spinning-reel game machine according to the present embodiment. FIG. 29 is a flowchart of the display processing when waiting for the insertion of a game medal on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 30 is a flowchart of the game medal management process on the main control board side in the rotating game machine according to the present embodiment. FIG. 31 is a flowchart of the first game medal insertion check process on the main control board side in the rotating game machine according to the present embodiment. FIG. 32 is a flowchart of an error display process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 33 is a flowchart of the storage throw-in process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 34 is a flowchart of the game medal settlement process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 35 is a flowchart of one game medal payout process on the main control board side in the rotary gaming machine according to the present embodiment. FIG. 36 is a flowchart of the start lever check process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 37 is a flowchart of the loading / dispensing sensor abnormality display process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 38 is a flowchart of the loading / dispensing sensor abnormality setting process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 39 is a flowchart of the input / out sensor abnormality clearing process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 40 is a flowchart of the overflow display process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 41 is a flowchart of the start lever receiving process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 42 is a flowchart of the internal lottery start process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 43 is a flowchart of a symbol stop signal output process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 44 is a flowchart of the symbol stop signal setting process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 45 is a flowchart of the condition device command set process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 46 is a flowchart of the rotation rotation start standby process on the main control board side in the rotation type gaming machine according to the present embodiment. FIG. 47 is a flowchart of the rotation rotation start preparation process on the main control board side in the rotation type gaming machine according to the present embodiment. FIG. 48 is a flowchart of the spinning stop acceptance check process on the main control board side in the spinning reel type gaming machine according to the present embodiment. FIG. 49 is a flowchart of the stop button reception process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 50 is a flowchart of the all-rotor stop check process on the main control board side in the reel-type gaming machine according to the present embodiment. FIG. 51 is a flowchart of the display determination process on the main control board side in the rotary gaming machine according to the present embodiment. FIG. 52 is a flowchart of the game medal payout process by winning on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 53 is a flowchart of interrupt processing on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 54 is a flowchart of the power-off processing on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 55 is a flowchart of LED display processing on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 56 is a flowchart of the sub notification data output processing on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 57 is a flowchart of an error management process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 58 is a flowchart of an error check process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 59 is a flowchart of the setting value error check process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 60 is a flowchart of the non-recoverable error process 2 on the main control board side in the rotating game machine according to the present embodiment. FIG. 61 is a flowchart of a built-in random number check process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 62 is a flowchart of the timer measurement process 2 on the main control board side in the rotating game machine according to the present embodiment. FIG. 63 is a flowchart of the second game medal insertion check process 1 on the main control board side in the rotating game machine according to the present embodiment. FIG. 64 is a flowchart of the second game medal insertion check process 2 on the main control board side in the rotating game machine according to the present embodiment. FIG. 65 is a flowchart of the game medal passing state update process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 66 is a flowchart of the input / exit sensor abnormality check process on the main control board side in the spinning cylinder type gaming machine according to the present embodiment. FIG. 67 is a flowchart of the error display request data clear process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 68 is a flowchart of the external signal output processing on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 69 is a flowchart of the test signal output process on the main control board side in the spinning cylinder game machine according to the present embodiment. FIG. 70 is an image diagram relating to the stack area on the main control board side in the spinning cylinder type gaming machine according to the present embodiment.

  First, the meaning of each term in this specification will be described. “Random number” is a random number used in a lottery (lottery by an electronic computer) to determine some game content in a spinning-type game machine, and includes a pseudo-random number in addition to a random number in a narrow sense (for example, as a random number) Is a hard random number, and a soft random number as a pseudo-random number). For example, a so-called “basic random number” that affects the outcome of the game, specifically, a “winning random number” associated with the transition of a special game or a winning combination can be cited. “CPU” is synonymous with what is well known in the art, and is not limited to the architecture (CISC, RISC, number of bits, etc.) used, processing performance, or the like. “Power interruption (power interruption)” means that the power supply voltage supplied to the gaming machine falls below a certain level regardless of whether the power switch provided on the gaming machine is operated or not. This also includes shutting down the power supply due to unforeseen circumstances such as unit damage or power outages. “ROM” is synonymous with what is well known in the art, and physically retains information (for example, “1” for a device configuration that conducts when a current for reading data is applied, It will be “0” if the device configuration is not.) RWM is synonymous with what is well known in the art, and electrically holds information (for example, when a current for reading data is applied, “1” is stored if it is stored, and it is not stored. (It is generally configured that backup power is supplied to some or all of the data held in the RWM when power is interrupted.) The “game state” is, for example, a special game state in which a game medal can be easily acquired and advantageous to the player (so-called jackpot game, such as a bonus game, a type 1 BB, a type 2 BB, or the like) ), The re-game probability variation game state (RT state) in which the re-game win rate is higher (or lower) than the normal game state in which the re-game win rate is a predetermined value, and the winning combination is awarded For example, an AT (assist time) state in which the stop order of the reels can be notified, an ART (assist replay time) state in which the RT state and the AT state are combined, and the like. Further, even in the normal game state, there are a high-probability normal game state, a low-probability normal game state, and the like that have different lottery probabilities for transition to the RT state, AT state, and ART state. In addition, there is no problem even if the game states are combined {in addition, these game states and functions (for example, a lottery to shift to the AT state, an output of a notification instruction related to the stop order of reels, etc.) control the game progress. There is no problem even if all are mounted on the main control board side}.

  The following embodiment is based on the assumption of a revolving game machine (so-called slot machine), but is not limited to this, and other game machines (for example, pachinko game machines, sparrow balls, arrangements) It is also within the range when applied to a ball, etc., that is, with a microcomputer chip (chip equipped with a CPU, ROM, RWM) that controls the progress of the game and for operating a program on the microcomputer chip This is a technology that can be applied to a gaming machine capable of detecting an error. This embodiment is only an example, and the location and function of each means, the order of each step regarding various processes, the timing of flag on / off, the name of the means responsible for each step, etc. It is not limited to the following aspects.

(This embodiment)
Here, before describing each component, the feature (outline) of the spinning-rotor type gaming machine P according to the present embodiment will be described. Hereinafter, each element will be described in detail with reference to the drawings.

  First, with reference to FIG. 1 (FIG. 2 for a part of the configuration), the basic structure on the front side of the rotary type gaming machine according to the present embodiment will be described. First of all, the swing type gaming machine P mainly includes a front door (also referred to as a front door), a back box (also referred to as a cabinet and a base body), a reel unit installed in the back box, a hopper device, a power supply unit, a main control. It is composed of a substrate M (a substrate on which a main control chip is mounted). Hereinafter, these will be described in order.

  Next, the front door DU of the swing type gaming machine P includes a decorative lamp unit D150 and a medal tray D230. First, the decorative lamp unit D150 has a light-emitting source that emits light in accordance with the progress of the game of the rotary game machine P. Further, a door switch D80 capable of detecting the open / closed state of the front door DU is provided. Further, the front door DU is provided with a key hole D260, and a key (door key) that matches the shape of the key hole D260 is inserted into the key hole D260 {in addition, twisted in a predetermined direction (for example, clockwise)} The front door DU can be opened. In addition, you may comprise so that an error state can be cancelled | released by inserting a door key in the keyhole D260 {in addition, twisting in a predetermined direction (for example, counterclockwise)}. Next, the medal tray D230 is a tray for game medals (sometimes called medals or game media) released from the discharge port D240.

  Next, the front door DU includes a mechanism for enabling visual recognition of the game state, a mechanism for enabling input of game media, a mechanism for operating the reel unit, and the like. Specifically, the reel window D160, the insertion number display lamp D210, the operation state display lamp D180, the special game state display apparatus D250, the acquired number display apparatus D190, and the credit number display apparatus are used as mechanisms for making the gaming state visible. D200, etc. are attached. Further, as a mechanism for enabling the insertion of game media and inputting the number of bets (the number of bets), a medal insertion slot D170, a bet button D220, and a mechanism for enabling the payout of the inserted game media are settled. Button D60 is attached. As a mechanism for operating the reel unit, a start lever D50 and a stop button D40 are attached. Hereinafter, each element will be described in detail.

<Mechanism to make game state visible>
Next, the reel window D160 is a transparent member formed of a synthetic resin or the like that constitutes a part of the front door DU, and is configured so that the reel unit installed in the gaming machine frame can be seen through the reel window D160. ing. In addition, the insertion number indicator lamp D210 is constituted by an LED, and is configured so that the same number of LEDs as the number of medals currently bet (to insert a game medal necessary for starting one game) are lit. Has been. Further, the operation state indicator lamp D180 is constituted by an LED, and is configured to be turned on / off according to the current operation state (medal acceptance / non-acceptance state, re-game winning state, game start wait state, etc.). The acquired number display device D190 is configured by a 7-segment display, and the number of game medals acquired most recently is displayed for a predetermined period. The acquired number display device D190 is a conditional device (so-called push order small role) that can be won depending on the reel stop order (stop order of the left stop button D41, middle stop button D42, and right stop button D43). In a game in which a profit rate (the number of payouts, the subsequent RT state, etc.) attached to the player can be different when the winning combination is different is generally established} The reel stop order that is most advantageous to the player can also be notified (the notification mode of the acquired number display device D190 will be described later). The special game state display device D250 is configured by a 7-segment display, and is configured to display the total number of payouts paid out during the special game. In addition, it is good also as a structure which does not provide the special game state display apparatus D250, and when it is comprised in that way, it is comprised so that a player may be in special game by displaying so that the total of the said number of payouts may be displayed in production | presentation display apparatus S40. The total number of payouts paid out can be recognized and a user-friendly gaming machine can be provided (the display may be configured to be displayed on the acquired number display device D190). Further, the credit amount display device D200 is configured by a 7-segment display, and is configured to display the total number of medals (also referred to as credit number or credit) stored in the gaming machine as medals possessed by the player. ing.

<Mechanism to enable input of game media>
Next, the medal slot D170 is a slot for game medals, and the game medal inserted into the slot is guided to the inside of the gaming machine frame in a situation where medals can be received. In addition, an insertion acceptance sensor D10s, a first insertion sensor D20s, and a second insertion sensor D30s are provided inside the gaming machine frame as sensors for detecting the insertion of medals. When it is determined that the guided game medal is normally inserted, the inserted medal is detected as a bet medal (processing at the time of game medal insertion will be described later). Further, the bet button D220 is configured to be operable by the player, and configured to bet a stored medal (credit medal). In this example, it is configured to bet three game medals by one operation of the bet button D220. However, the configuration of the bet button is not limited to this, and a plurality of bet buttons are provided. The number of game medals that can be bet by one operation is made different (for example, the first bet button can bet three game medals by one operation, and the second bet button is 1 by one operation. It is possible to be configured such that a game medal can be betted). Further, the settlement button D60 is configured to be operable by the player, and by this operation, the stored medal (credit medal) and / or the bet medal can be paid back to the player. ing. Note that the game medals paid out by operating the settlement button D60 are configured to be paid out to the discharge port D240.

<Mechanism for operating reel unit>
Next, the start lever D50 is configured to be operable by the player, and is configured to be able to start the operation of the reel unit (rotation of the spinning cylinder) by the operation. The stop button D40 includes a left stop button D41, a middle stop button D42, and a right stop button D43 that can be operated by the player. By operating each stop button, the operation of the reel unit can be stopped sequentially. It is configured. In this example, “rotor” and “reel” are synonymous. For example, “rotor stop flag” and “reel stop flag” are the same flag.

  Next, the reel unit of the rotating type gaming machine P includes a reel M50 and a drive source (stepping motor or the like) of the reel M50. The reel M50 includes a left reel M51, a middle reel M52, and a right reel M53. Here, each reel part is formed of a synthetic resin or the like, and a plurality of symbols are drawn on the outer periphery (on the reel band) of the reel part. And based on operation of each stop button in the start lever D50 and the stop button D40, it is comprised so that rotation operation and stop operation | movement of each reel part are enabled. Although not shown, an LED (hereinafter also referred to as a reel backlight) is provided inside the left reel M51, the middle reel M52, and the right reel M53, and when the LED is lit, the reel portion It is configured so that the light transmitted through the outer periphery can be visually recognized as if the outer periphery of the reel portion is lit.

<Other mechanisms>
In addition, inside and outside the gaming machine frame of the swing type gaming machine P, as a mechanism for enhancing the interest of the game, an effect display device S40 for displaying effects such as a notice effect and a background effect, various lighting modes Are provided with an LED lamp S10 that can be turned on, a speaker S20 that can output sound, and an upper panel D130 and a lower panel D140 that are members formed of synthetic resin or the like.

  Next, FIG. 2 is a perspective view showing an internal configuration of the rotating game machine P with the front door DU opened. An effect display device S40 is attached to the upper part on the back side of the front door DU. A reel window D160 is provided substantially at the center of the front door DU, and a door substrate D described later is provided below the reel window D160. In addition, the door board D receives input signals such as the stop button D40, the start lever D50, and the settlement button D60 described above. A speaker S20 is provided below the door substrate D.

  Although details will be described later, an insertion acceptance sensor D10s serving as a path for game medals inserted from the medal insertion slot D170 is provided in the vicinity of the door substrate D, and below the insertion reception sensor D10s, A coin shooter D90 and the like for guiding a game medal to the discharge port D240 are provided. The insertion acceptance sensor D10s has a function of selecting game medals inserted from the medal insertion slot D170 mainly on the basis of dimensions, and accepting only game medals conforming to the standard dimensions. The selected medal (or other foreign matter) is returned to the discharge port D240 by the blocker D100. If the player inserts a game medal before operating the start lever D50 (in a state where the insertion of the game medal is valid), the game medal is selected by the insertion acceptance sensor D10s, and only those satisfying the standard are selected. A medal that does not satisfy the standard and is inserted into the hopper H40 is returned to the discharge port D240 through the coin shooter D90. On the other hand, when a game medal is inserted after the start lever D50 is operated (in a state where the insertion of the game medal is not valid), the inserted game medal passes through the coin shooter D90, and the discharge port D240. Returned to. In addition, a sensor for medal insertion, which will be described in detail later, is provided inside the insertion acceptance sensor D10s (the back of the flow path), and when a game medal that has been received satisfying the dimensional standard passes, the first insertion sensor D20s. The signal is detected by the second input sensor D30s and the signal is supplied to the main control board M to be described later.

  A main control board M, which will be described later, that controls the entire game is stored above the reel M50, and behind the reel M50, each reel (left reel M51, middle reel M52, right reel M53) is driven. For this purpose, a later-described rotor substrate K is stored. Further, on the left side of the reel M50, a sub-control board S (to be described later) that controls various effects performed using the effect display device S40 shown in FIG. 1, the LED lamp S10, the speaker S20, and the like is stored. . In addition, the main control board M has a setting key switch M20 used for executing a setting change device control process (to change settings), which will be described later, and a setting / reset that can execute setting value change, error cancellation, and the like. A setting door switch M10 for determining opening / closing of a setting door (not shown) for protecting the button M30, the setting key switch M20, the setting / reset button M30, and the like is connected. The setting key switch M20, the setting / reset button M30, and the setting door switch M10 are not shown, but they may be provided at appropriate positions on the main control board M (ie, the front door). If the DU is not opened, it may be in a position where it is difficult to access artificially).

  Below the reel M50, there are provided a hopper H40 for collecting inserted game medals and a medal payout device H for paying out game medals, and a power supply board for supplying power to the entire revolving game machine P E is stored. The game medals paid out from the medal payout device H pass through the coin shooter D90 and are paid out from the discharge port D240. Further, on the front surface of the power supply board E, there is also provided a power switch E10 for turning on the power of the swivel type gaming machine P.

  Next, FIG. 3 is a perspective view showing a path (selector) of game medals inserted into the medal insertion slot D170 inside the spinning cylinder type game machine. A game medal inserted into the medal slot D170 first passes through the slot acceptance sensor D10s. The insertion acceptance sensor D10s is a mechanical double sensor, and when the game medal passes, it turns on when the two protruding mechanisms are pressed, and the game medal can normally pass through the passage. Become. Also, with such a configuration, when a foreign object that is not a game medal (for example, one having a smaller diameter than the game medal) is inserted, the two protruding mechanisms are not pressed. Such medals cannot be maintained in the standing state, and therefore cannot pass through the passage (the medals fall down) and are paid back to the discharge port D240. In addition, the insertion acceptance sensor D10s is configured to be able to determine that there is an error even when the on-time continues for a predetermined time or longer (as a result, the blocker D100 can be turned off). . The blocker D100 is configured such that game medals can pass when it is on, and game medals cannot pass when it is off.

  When the game medal normally passes through the blocker D100 (it can pass when the blocker D100 is on), it passes through the first insertion sensor D20s and the second insertion sensor D30s immediately after the passage. The throwing sensors (first throwing sensor D20s and second throwing sensor D30s) are composed of two sensors (adjacently arranged at an interval smaller than the standard diameter of the game medal), and each sensor is turned on. -Various errors (to be described later) are monitored by monitoring the OFF state (the order in which the combination of ON / OFF of the first input sensor D20s and the second input sensor D30s transitions) and the ON / OFF time. , “CH” error, “CE” error, etc.).

  Next, FIG. 4 is a front view and a perspective view of the medal payout device H in the spinning cylinder type gaming machine. The medal payout device H is in a state where there is a credit (game medal stored electronically inside the gaming machine) or a bet medal (medal inserted to start the game) and the checkout button D60 is set. This is activated when a game medal is paid out due to an operation or winning. In operation, first, the hopper motor H80 is driven to rotate the disk H50 about the disk rotation axis H50a. The game medal in the medal payout device H flows down from the game medal outlet H60 toward the discharge port D240 by displacing the discharge urging means H70 by the rotation. The payout sensors (the first payout sensor H10s and the second payout sensor H20s) are composed of two sensors, and the ON / OFF status of each sensor (the ON / OFF state of the first payout sensor H10s and the second payout sensor H20s). The order of transition of the combination of off, etc.) and the on / off time are monitored so that various errors (HP error, which will be described later) can be detected. More specifically, for example, when the game medal outlet H60 normally passes, the first payout sensor H10s = off and the second payout sensor H20s = off due to the displacement of the discharge biasing means H70. 1 payout sensor H10s = off / second payout sensor H20s = off → first payout sensor H10s = on / second payout sensor H20s = off → first payout sensor H10s = on / second payout sensor H20s = on → first payout Sensor H10s = on / second payout sensor H20s = off → first payout sensor H10s = off / second payout sensor H20s = off, so that when a movement contrary to this sensor state transition is detected It is possible to exemplify the configuration of an error. The situation where the first payout sensor H10s is off may be referred to as the first payout sensor signal being off, and the other sensors may be referred to in the same manner.

<Memory map>
Next, an example of the memory map of the main control chip in the spinning cylinder game machine according to the present embodiment will be described with reference to FIG. The memory map shows an address space from “0000H” to “FFFFH”. Among these, the built-in ROM is assigned to the space from “0000H” to “2FFFH”, the built-in RWM is assigned to the space from “F000H” to “F3FFH”, and the space from “FE00H” to “FEBFH” is assigned. Is assigned a register area (built-in register area) built in each circuit in the main control chip. By causing the CPU to execute an instruction to access these addresses, it is possible to execute access to the corresponding hardware.

  The built-in ROM is a first ROM area that is mainly an area for controlling the progress of the game (sometimes referred to as a use area), and an area that controls processing different from the normal progress of the game mainly related to errors (not yet). A second ROM area that may be referred to as a use area), a first control area assigned to a space from “0000H” to “11FAH”, and from “1200H” to “22E4H” The first data area allocated to the first space is collectively referred to as the first ROM area, the second control area allocated to the space from “2000H” to “22E4H”, and “22E5H” to “2346H”. The second data area allocated to the space up to "is collectively referred to as a second ROM area. The first ROM area is configured to have a larger capacity than the second ROM area (in other words, the data capacity existing in the first ROM area and accessed by the CPU exists in the second ROM area and the CPU Configured to be larger than the data capacity accessed from

  The first ROM area stores a first control area in which program codes (instruction code sets for the CPU) are stored, and program data used by the program (read out by the processing of the CPU based on the program codes). A first data area. In the figure, the memory map image in the first ROM area is illustrated, but the number of bytes in each area and the presence / absence of an unused area are merely examples.

  The second ROM area stores a second control area in which program code (instruction code set for the CPU) is stored, and program data used by the program (read by the processing of the CPU based on the program code). And the second control area is configured to have a smaller capacity than the first control area (in other words, the second control area exists in the second control area and is accessed by the CPU). The program code capacity is smaller than the program code capacity existing in the first control area and accessed by the CPU), and the second data area is configured to have a smaller capacity than the first data area. (In other words, the program data capacity that exists in the second data area and is accessed by the CPU is in the first data area. It is smaller than the program data capacity to be accessed from the existing CPU). The built-in ROM has a management area in which various settings used when operating the main control chip are stored. In the figure, the memory map image in the second ROM area is illustrated, but the number of bytes in each area and the presence / absence of an unused area are merely examples.

  The first ROM area only needs to include a first control area (sometimes referred to as a use area control area) and a first data area (sometimes referred to as a use area data area). The first address in the first control area to the last address in the first data area may be referred to as a first ROM area. Further, if the second ROM area includes a second control area (sometimes referred to as a control area outside the use area) and a second data area (sometimes referred to as a data area outside the use area). Of course, the first address in the second control area to the last address in the second data area may be referred to as a second ROM area.

  Next, the built-in RWM is based on the first RWM area, which is an area for storing information mainly based on the progress of the game (sometimes referred to as a use area), and processing different from normal progress of the game, mainly related to errors. A second RWM area that is an area for storing information (sometimes referred to as outside the use area), and is assigned to a space from “F000H” to “F149H”; The first stack area allocated to the space from “F1D8H” to “F1FFH” is collectively referred to as the first RWM area, and the second work area allocated to the space from “F210H” to “F21DH” The second stack area allocated to the space from “F3F2H” to “F3FFH” is collectively referred to as a second RWM area. The space from “F1D8H” to “F1FFH” in the first RWM area is allocated with the first stack area used when the program related to the first ROM / RWM area needs to store data internally. In addition, the space from “F3F2H” to “F3FFH” in the second RWM area is allocated with the second stack area used when the program related to the second ROM / RWM area needs to store data internally. (However, the number of bytes in each area is merely an example.) The first stack area may not be included in the first RWM area, and the second stack area may not be included in the second RWM area. In such a configuration, for example, “F000H” The first RWM area is allocated to the space up to “F149H”, and the second RWM area is allocated to the space from “F210H” to “F21DH”. The first RWM region is configured to have a larger capacity than the second RWM region.

  The first RWM area only needs to include the first work area (sometimes referred to as a work area work area), and the first work area to the last address in the first stack area are included in the first RWM area. It may be referred to as a 1RWM region. The second RWM area only needs to include the second work area (sometimes referred to as a work area outside the use area), from the start address of the second work area to the last address of the second stack area. It may be referred to as a second RWM region.

  It should be noted that although there is no problem even if the address which is an unused area is changed, it is preferable to provide an unused area between the first data area and the second control area. That is, in the case of the memory map configuration as shown in FIG. 5, the program code that exists in the first control area and is accessed by the CPU, and the program code that is present in the second control area and accessed by the CPU are: Since they are arranged apart from each other on the memory map (with discontinuous addresses) and an unused area is sandwiched between them, the location of both program codes on the program source code or dump list can be viewed visually. It can be clearly separated (the same can be said when an unused area is sandwiched between them).

  Here, the ROM mounted on the main control board M may be configured not to provide an unused area (an unfilled area) in order to prevent a program or the like modified by an illegal act from being written. It is preferable (for example, all unused areas are filled with zeros, and used areas are filled in young addresses and written). In addition, in order to prevent the first control area and the first data area from referring to data that is not normally referred to due to noise or fraudulent behavior, unused data (for example, in a gaming machine with different specifications) It is preferable not to provide data to be used or data used only for testing at the development stage. In addition, the first control area, the first data area, the second control area, the second data area, the first work area, and the second work area are arranged in a young address and used in the area (in the area). (For example, “0010H” to “0050H” in the first control area in the range of “0000H” to “11FAH” are not set as unused areas). It is preferable to do. In this example, all the bits in the unused area are “0”, and any bit other than the unused area is “1” (not “0”). ing).

  Here, the structure which concerns on the rotating type game machine P which concerns on this embodiment is demonstrated succinctly.

<Triggers and scope of RWM initialization>
First, the trigger and range of initialization of the first RWM area will be described.
(1) When the power change recovery cannot be performed normally when the setting changer is operating, data 0 is set in the first RWM area (“F000H” to “F1FFH”).
(2) When the setting changer is operating, except when the power failure recovery cannot be executed normally. In the first RWM area (“F000H” to “F1FFH”), set value data, interrupt counter, built-in random number processing random number, Data 0 is set in a range ("F008H" to "F1FFH") excluding the soft random number initial value and the RT state number.
(3) When power is restored from recovery The work area (first work area) of the first RWM area ("F000H" to "F1FFH") and the area excluding the maximum usage amount of the first stack area ("F14AH" to "F1D7H") )) Is set to data 0.

Next, the trigger and range of initialization of the second RWM area will be described.
(1) When the setting change device is operating Data 0 is set in the second RWM area (“F200H” to “F3F5H”) excluding the stack usage amount when the setting changing device is operating.
(2) When power is restored from power off The work area (second work area) of the second RWM area ("F200H" to "F3FFH") and the area excluding the maximum usage amount of the second stack area ("F200H" to "F20FH") ”And“ F21EH ”to“ F3F1H ”).

<Maximum usage of stack area>
Next, with reference to FIG. 6, the maximum amount of use of the stack area in the rotating game machine P will be described. The range of the first stack area is “F1D8H” to “F1FFH”, and the range of the second stack area is “F3F2H” to “F3FFH”. The stack usage location in the first stack area is the “game progress main processing → shifted frame number creation processing → control control execution processing → retraction / kicking control processing → specified address data set processing interrupt occurrence location” corresponding to the main processing. After being used in order, after being used for “interrupt processing” corresponding to interrupt processing, it is configured to be used in the order of “power-off recovery processing → interrupt activation processing” corresponding to power-off recovery processing. In addition, the stack usage location in the second stack area is configured to be used for “symbol stop signal output processing” corresponding to main processing (also referred to as non-interrupt processing). Note that the usage method of the stack area and the cumulative amount (number of bytes) of the usage amount are configured as shown in FIG.

<First work area>
Next, data stored in the first work area in the first RWM area will be described with reference to FIG. The data stored in the first work area is item 1, item 2 and item 3 shown in FIG. 7, and “setting value data” in item 1 is stored at the smallest address, and item 3 The “stack pointer temporary storage buffer” is stored at the largest address. In addition, the address is illustrated so that the address becomes larger as it goes down. From the address with the smallest address, “the top of item 1 → the bottom of item 1 → the top of item 2 → the bottom of item 2 → the item 3 “Top row → bottom row of item 3”.

<Second work area>
Next, data stored in the second work area in the second RWM area will be described with reference to FIG. The data stored in the second work area is configured as shown in FIG. 8, and the “stack pointer temporary storage buffer 2” shown at the top of the figure is stored at the smallest address, "Second payout sensor abnormality detection data" shown at the bottom of the figure is stored at the largest address. The address is illustrated so as to increase as it goes down. Further, items, contents, and data (details of data) are configured as shown in FIG. In the present embodiment, when processing is executed in the first ROM / RWM area, when the processing in the second ROM / RWM area is called and executed, the stack pointer set in the first stack area is set. Is stored (saved) in the “stack pointer temporary save buffer 2” of the second RWM area (details will be described later).

<Backup period when power is turned off>
Next, the backup period of the built-in RWM when a power interruption occurs will be described.
(1) In the state where the main control board M is mounted on the swivel type gaming machine P, when the power is turned off after the power is turned on, the built-in RWM is backed up for a period of about 60 days. With this configuration, the built-in RWM is backed up even when the game hall is closed for a long time of about one week, and business can be performed smoothly.
(2) When the power is turned off after the power is turned on and all harnesses are removed from the main control board M (when the main control board M is not mounted on the revolving game machine P), a period of about 1 second The built-in RWM is backed up. With this configuration, even if all the harnesses are removed from the main control board M and connected to the spinning game machine P in order to execute an illegal game, it takes 1 second to change the harness. Since it takes the above time, the built-in RWM has not been backed up at the time when an unauthorized board is connected to the spinning game machine P, and it is possible to prevent an unauthorized game from being executed.

<Processing when game medals are inserted>
Next, processing when a game medal is inserted will be described. The insertion of the game medal can be executed during the period from the start of the game to the reception of the start lever D50, and cannot be executed during the error display, the set value confirmation and the game medal settlement. The blocker signal is turned on in order to enable the insertion of game medals through the medal insertion slot D170. If the predetermined time (for example, 326.84 ms) has not elapsed since the input acceptance sensor signal was turned on from off, the blocker signal is turned on after waiting until the predetermined time elapses, and the input is performed. The number display LED is lit. The method for betting game medals is as follows.
(1) Inserting game medals from credit by operation of bet button D220 When the bet button operation signal is turned on from off, the number of inserted coins is within the upper limit of credit (50 in this example) and the specified number (3 in this example) The amount within the specified number is added and the amount within the specified number is subtracted from the credit. In addition, an insertion number display LED corresponding to the insertion number is turned on. The bet button D220 according to this example is configured to bet three game medals by operating once (so-called MAX bet button), but the configuration of the bet button is not limited to this, A plurality of bet buttons including a bet button capable of betting three game medals by one operation and a bet button capable of betting one game medal by one operation may be provided (one time). There may be a bet button that can bet two game medals by operating.
(2) Game medal insertion through the medal insertion slot D170 The game medal insertion process through the medal insertion slot D170 is performed according to the insertion acceptance sensor signal, the first insertion sensor signal, and the second insertion sensor signal. And by monitoring the order of passage.

<Minimum stop reception waiting time>
The minimum stop reception waiting time is the minimum time from the time when the operation of a certain stop button is received until the time when the operation of the stop button that stops next to the certain stop button is received, and the stop button D40 is the minimum stop reception waiting time. At the time of accepting the operation, a timer for a predetermined period {for example, 15.715 ms, which is larger than the maximum error time (for example, 2.245 ms) corresponding to one interrupt} is set, and the next stop button The measurement range is just before reception. The specific calculation formula for the minimum stop reception waiting time is, for example,
Minimum stop acceptance waiting time = timer value × timer measurement time−maximum error time due to interruption = 7 × 2.245 ms−2.245 ms
= 13.47 ms
It is like this.

<Credit (storage device)>
Next, processing related to credit will be described.
(1) Credit Display Method The number of game medals stored in the credit is displayed on the credit number display device D200.
(2) Processing at the time of game medal insertion When re-game is not activated, if the maximum prescribed number of games (3 in this example) has already been betted, or if re-game is active, The game medals inserted in can be stored up to the upper limit of credits (50 in this example). Further, the game medal stored in the credit is bet when the three-sheet insertion sensor signal is turned on from off.
(3) When game medals are won by winning The game medals won by winning are configured to store game medals in credits at intervals of 107.81 ms that do not exceed the upper limit of credit (50 in this example). ing.
(4) Credit settlement processing When there is no game medal bet when re-game is not activated, or when the settlement button D60 is accepted when re-game is activated, all stored game medals are It is configured to pay back from the discharge port D240.

<Processing when paying out game medals>
Next, a process when the medal payout device H pays out a game medal will be described with reference to FIG. First, (a) in the upper part of FIG.

  (A) in the figure is a timing chart according to the case where the first payout sensor signal and the second payout sensor signal are detected within a predetermined time in a state where the hopper motor drive signal is on. First, when the game medal payout from the medal payout device H is started and the hopper motor drive signal is on, the first payout sensor H10s detects the game medal that has been paid out, and the first payout sensor signal is From off to on. Thereafter, the period A shown in the figure has elapsed, the game medals being paid out are detected by the second payout sensor H20s, and the second payout sensor signal is turned on from off. Note that the first payout sensor signal remains on.

  Thereafter, the period B shown in the figure elapses, and the second payout sensor signal is turned from on to off when the second payout sensor H20s does not detect the game medal paid out from the medal payout device H. Note that the first payout sensor signal remains on. Thereafter, the period (C-B) shown in the figure elapses, and the first payout sensor signal is changed from on to off by the first payout sensor H10s not detecting the game medal paid out from the medal payout device H. Become. In this manner, in the process until the game medal paid out from the medal payout device H reaches the discharge port H240, in the situation where the hopper motor drive signal is on, “first payout sensor signal OFF and second payout sensor”. Signal off → first payout sensor signal on and second payout sensor signal off → first payout sensor signal on and second payout sensor signal on → first payout sensor signal on and second payout sensor signal off → first payout sensor signal When it is “OFF and the second payout sensor signal is OFF”, it is determined that one game medal is normally paid out. The payout sensors (the first payout sensor H10s and the second payout sensor H20s) are composed of two sensors, and the ON / OFF state of each sensor (sensor signal) (the first payout sensor H10s and the second payout sensor). The order of transition of the ON / OFF combination of H20s, etc.) and the on / off time are monitored so that various errors can be detected.

The first payout sensor signal is on and the second payout sensor signal is off, and the second payout sensor signal is off, and the first payout sensor signal is on and the second payout sensor signal is on. Since the first payout sensor signal is on and the second payout sensor signal is turned on and the second payout sensor signal is on, the first payout sensor signal is kept on. As a specific example of the time value that can be taken during normal payout execution of C, which is a certain period,
“A <31.82 ms”, “13.94 ms ≦ B ≦ 65.35”, “13.94 ms ≦ C ≦ 65.35”, and details will be described later.

  Next, (b) in the lower part of FIG. (B) in the figure shows that, during the period from when the hopper motor drive signal is turned off after the payout control time 6008.21 ms elapses until 108.81 ms elapses, the hopper motor drive signal is turned on and one game medal is paid out. It is a timing chart which illustrated the case. First, under the condition that the hopper motor drive signal is on, the hopper motor drive signal is turned off when the payout control time 6008.21 ms elapses. Thereafter, the period of X shown in the figure elapses, and the first payout sensor signal is turned from OFF to ON when the first payout sensor H10s detects a game medal. Thereafter, the period A shown in the figure elapses, and the second payout sensor signal turns from OFF to ON when the second payout sensor H20s detects a game medal. Note that the first payout sensor signal remains on. Thereafter, the period B shown in the figure elapses, and the second payout sensor signal is turned from on to off when the second payout sensor H20s does not detect the game medal paid out from the medal payout device H. Note that the first payout sensor signal remains on. Thereafter, the period (C-B) shown in the figure elapses, and the first payout sensor signal is changed from on to off by the first payout sensor H10s not detecting the game medal paid out from the medal payout device H. Become. As described above, when the first payout sensor signal is detected during the period from when the hopper motor drive signal is turned off after the payout control time 6008.21 ms has passed to when 108.81 ms elapses, the hopper motor drive signal is turned on, and thereafter When the first payout sensor signal and the second payout sensor signal are detected within the period, the game medal is paid out.

  In addition, as a specific example of the time value that can be taken at the time of normal payout of X, which is a period from when the payout control time 6008.21 ms elapses until the first payout sensor signal is turned on, “X <108 .81 ms ", and details will be described later.

<Indication monitor display>
Next, with reference to FIG. 10, instruction display on the acquired number display device D190 will be described. In the present embodiment, the reel stop order (push order), which is the most profitable in a certain game, can be notified by the acquired number display device D190 as an instruction display, and is executed when an operation of the start lever D50 is accepted. The instruction display is executed based on the instruction number determined after the internal lottery. In particular,
(1) When the instruction number is “0”, the instruction display is not executed (no display).
(2) When the instruction number is “1”, the acquired number display device D190 instructs to press the stop button D40 corresponding to the order of “left reel M51 → middle reel M52 → right reel M53”. The display “= 1” is displayed.
(3) When the instruction number is “2”, the acquired number display device D190 instructs to press the stop button D40 corresponding to the order of “left reel M51 → right reel M53 → middle reel M52”. The display “= 2” is displayed.
(4) If the instruction number is “3”, the acquired number display device D190 instructs to press the stop button D40 corresponding to the order of “middle reel M52 → left reel M51 → right reel M53”. The display “= 3” is displayed.
(5) When the instruction number is “4”, the acquired number display device D190 instructs to press the stop button D40 corresponding to the order of “middle reel M52 → right reel M53 → left reel M51”. The display “= 4” is displayed.
(6) When the instruction number is “5”, the acquired number display device D190 instructs to press the stop button D40 corresponding to the order of “right reel M53 → left reel M51 → middle reel M52”. The display “= 5” is displayed.
(7) When the instruction number is “6”, the acquired number display device D190 instructs to press the stop button D40 corresponding to the order “right reel M53 → middle reel M52 → left reel M51”. The display “= 6” is displayed.
The display is configured as described above.

  Note that the display period when the instruction display is displayed is from when the operation of the start lever D50 is accepted until when the previous reel is stopped.

  Here, with reference to FIG. 11 to FIG. 14, an outline of the flow of processing in the rotating type gaming machine according to the present embodiment will be described.

<Main operation flowchart for processing at power-on>
First, FIG. 11 is a flowchart showing a flow of processing that is executed for the first time by the CPU of the main control board M after turning on the power of the revolving game machine P (or at the time of system reset or user reset). . In this case, generally, the program code is executed in order from the program code arranged at the address (ie, the first control area) of “0000H” in the built-in ROM.

  First, in step 102, after turning on the power of the spinning machine P, the CPU sets the Q register to “F000H” based on the data in the first ROM / RWM area. Next, in step 104, the CPU executes function setting of the main control chip based on the data in the first ROM / RWM area. Next, in step 106, the CPU calculates a checksum based on the data in the first ROM / RWM area, and checks the first RWM and the second RWM (for example, held in the calculated checksum and checksum area). Based on the checksum data that is stored, it is checked whether or not the data stored in the built-in RWM is correctly held by power-off / power-off recovery), and power-off recovery data is generated. Next, in step 108, the CPU determines whether all of the door switch D80, the setting door switch M10, and the setting key switch M20 are on based on the data in the first ROM / RWM area. In the case of Yes in step 108, in step 110, the CPU determines whether or not the power-off recovery data generated in step 108 is abnormal based on the data in the first ROM / RWM area. In the case of No in step 110, in step 112, the CPU sets a setting change flag (a flag that is turned on when there is an operation for executing the setting change device process) based on the data in the first ROM / RWM area. Determine whether it is on. In the case of Yes in step 112, a setting change device process to be described later is executed. In the case of Yes in step 110, the setting change device process described later is executed regardless of whether the setting change flag is on or off.

  On the other hand, if No in Step 108, that is, if any of the door switch D80, the setting door switch M10, or the setting key switch M20 is off, or if No in Step 112, that is, the setting change flag is off. If there is, the CPU determines in step 114 whether the power-off recovery data generated in step 106 is normal based on the data in the first ROM / RWM area. When it is determined that the power-off recovery data is normal, the power-off process is being executed and the checksum of the RWM area is normal. In the case of No in step 114, in step 116, “E1”, which is a display related to the backup error, is displayed on the acquired number display device D190 (for example, an error number is set in the register area), and the revolving type gaming machine Stop the operation of P. The backup error is an unrecoverable error.

  In the case of Yes in step 114, in step 118, the CPU restores the stack pointer based on the data in the first ROM / RWM area. Next, in step 120, the CPU initializes an unused area in the RWM area based on the data in the first ROM / RWM area. Next, in step 122, the CPU executes reading of the input port based on the data in the first ROM / RWM area. Next, in step 124, the CPU activates the set timer interrupt based on the data in the first ROM / RWM area, and returns to the process at the time of power-off according to the returned stack pointer. When the timer interrupt process is set, a predetermined address (for example, “10AFH”) in the first control area is set as the start address of the timer interrupt process. In addition, all areas having a program for executing the interrupt process are the first control area. Also, the interrupt processing configuration in the pachinko gaming machine is the same, the start address is a predetermined address (for example, “10AFH”) in the first control area, and the area having the program for executing the interrupt processing is All are the first control region.

  Although not shown, it is preferable that the initial value (value at the start of processing) of the temporary storage area (such as the RWM area) mounted on the main control board M is not a value at which the special game is executed. (In order to prevent a special game from being erroneously executed when a process for determining whether or not to execute a special game is executed due to noise or fraud immediately after the program processing is started). Although not shown, when a random number such as a winning random number is stored in the RWM area of the main control board M, a dedicated storage area is secured and in the byte storing the information related to the random number. It is preferable to configure to store only the information related to the random number (not to store other information such as various timer values) (when operating other data stored in the same 1 byte, due to noise etc. (To prevent the information related to random numbers from being rewritten).

<Main operation flowchart related to execution of game progress main processing>
Next, FIG. 12 is a main operation flowchart according to the execution of the game progress main process. First, in step 202, the CPU sets a stack pointer based on the data in the first ROM / RWM area. Next, in step 204, the CPU executes a process for starting a game based on the data in the first ROM / RWM area, and proceeds to step 206. The process at the time of starting the game is configured to execute the processes in the order of “set operation state” → “turn on setting change flag” → “execute processing related to game medal insertion acceptance”. “Execution of processing relating to acceptance of insertion of game medals” means that, when re-playing is not in operation, blocker D100 is turned on (game medals can be passed), and acceptance of game medals is started. When not operating, blocker D100 (blocker signal) is turned on (game medal passable state) and game medal insertion acceptance is started. When replaying is activated, credits are not full. The blocker D100 (blocker signal) is turned on and an automatic insertion operation (game medals are bet automatically) at the time of re-game operation is executed.

  Next, in step 206, the CPU determines whether or not a game medal is bet based on the data in the first ROM / RWM area. In the case of No in step 206, in step 208, the CPU executes display processing when waiting for the insertion of game medals based on the data in the first ROM / RWM area (details will be described later), and proceeds to step 210. In the case of Yes in step 206, the process proceeds to step 210 without executing the process of step 208. Next, in step 210, the CPU executes game medal insertion and checkout of the settlement button D60 based on the data in the first ROM / RWM area. When a game medal is inserted from the medal insertion slot D170 or when the bet button D220 is operated, a process at the time of game medal insertion (details will be described later) is executed. In addition, when the settlement button D60 is operated, the game medals bet or the game medals stored in the credits are paid out.

Next, in step 212, the CPU executes an acceptance check of the start lever D50 based on the data in the first ROM / RWM area. In particular,
(1) The CH error detection flag is checked, and when the game medal stays in the insertion acceptance sensor D10s, “CH” is displayed on the acquired number display device D190 and the game is stopped. ).
(2) When the dwell time of the insertion acceptance sensor D10s has elapsed and the fullness detection sensor signal is on, “FE” is displayed on the acquired number display device D190 and the game is stopped, and in other cases, the process proceeds to (3). .
(3) The number of game medals and the prescribed number are compared. If they match, the process proceeds to (4). Otherwise, the start lever cannot be accepted and the process proceeds to step 214.
(4) When the start lever sensor signal is switched from OFF to ON, the start lever is accepted. In other cases, the start lever is accepted.

  Next, in step 214, the CPU determines whether or not the input of the start lever D50 has been received based on the data in the first ROM / RWM area. In the case of Yes in step 214, the internal random number is fetched and the setting change flag is turned off (a state in which the setting cannot be changed). Then, in step 216, the CPU stores the data in the first ROM / RWM area. Based on this, an internal lottery is started (details will be described later). If No in step 214, the process proceeds to step 206. Next, in step 218, the CPU starts the rotation of the reel M50 based on the data in the first ROM / RWM area (when the minimum game time has elapsed after the execution of the process in step 216, the CPU starts the rotation of the reel M50). If the minimum game time has not elapsed, the system waits until the minimum game time elapses).

  Next, in step 220, the CPU creates a shifted frame number when there is a shifted frame number creation request based on the data in the first ROM / RWM area. Next, in step 222, the CPU executes a rotation stop acceptance check based on the data in the first ROM / RWM area, that is, the reel stop acceptance is made possible when all the rotation sensor passes. In this case, the reel stop acceptance is impossible (details will be described later). Next, in Step 224, the CPU executes whether or not the stop button D40 has been operated based on the data in the first ROM / RWM area. In the case of Yes in step 224, in step 226, the CPU accepts the operation of the stop button based on the data in the first ROM / RWM area, determines the stop position of each reel, and proceeds to step 228. In the case of No in step 224, the process proceeds to step 228 without executing the process in step 226.

  Next, in step 228, the CPU executes a stop check of all reels (left reel D41, middle reel D42 and right reel D43) based on the data in the first ROM / RWM area (all reels are stopped). And the operation of the start lever D50 and the stop button D40 is finished). Next, in step 230, the CPU determines whether or not all reels have stopped based on the data in the first ROM / RWM area. If yes in step 230, the process proceeds to step 232, and if no, the process proceeds to step 218.

Next, in step 232, the CPU executes display determination based on the data in the first ROM / RWM area. Specifically, the display determination is
(1) As a result of executing the display determination, when the symbol combination display is shifted, “E5” is displayed on the acquired number display device D190 and the operation of the gaming machine is stopped.
(2) The CH error detection flag is checked, and if a game medal is retained in the insertion acceptance sensor D10s, “CH” is displayed on the acquired number display device D190 and the game is stopped. Shifts to the processing of (3). In addition, when the game is resumed by canceling the error, the process (2) is executed again.
(3) When the residence time of the insertion acceptance sensor D10s has elapsed and the full detection sensor signal is on, “FE” is displayed on the acquired number display device D190 and the game is stopped. If the game is resumed by canceling the error, the process proceeds to step 234.
The display determination is performed in the order described above.

  Next, in step 234, the CPU executes payout of game medals by winning based on data in the first ROM / RWM area (executed when there are game medals to be paid out). Next, in step 236, the CPU checks the end of the operating state as a game end check based on the data in the first ROM / RWM area, and if it ends, executes the end processing according to the operating state, The game progress main process in step 200 will be executed again.

<Main operation flowchart for interval interrupt processing execution>
Next, FIG. 13 is a main operation flowchart according to the execution of the interval interrupt process. First, in step 302, the CPU executes an interrupt start process (for example, saving of data held in a register in the CPU, clearing of an interrupt flag, etc.) based on the data in the first ROM / RWM area. Next, in step 304, the CPU executes a power-off process (details will be described later) based on the data in the first ROM / RWM area. Next, in step 306, the CPU updates the interrupt counter based on the data in the first ROM / RWM area. Next, in step 308, the CPU generates input port data based on the data in the first ROM / RWM area. In particular,
(1) Read input port 0 and save the level data. Further, the setting key switch signal and the setting / reset button signal rising data are stored, and the setting key switch signal falling data are stored according to the state of the door switch signal and the setting door switch signal.
(2) Read the input port 1 and save the level data and rising data.
(3) Read the input port 2 and save the level data and rising data.
Processing is executed in the order described above. Here, the input port data includes the settlement button D60, the start lever D50, the stop button D40, the door switch D80, the setting door switch M10, the setting key switch M20, the setting / reset button M30, the power-off detection signal, and the input acceptance sensor D10s. , Information relating to the detection of the first input sensor D20s, the second input sensor D30s, the first payout sensor H10s, the second payout sensor H20s, etc. (that is, whether or not these operation members are operated and the sensor detection state is Sampled at interrupt interval T).

Next, in step 310, the CPU executes the rotation drive management (drive control of the reel M50) based on the data in the first ROM / RWM area. Next, in step 312, the CPU determines the output port 0 (the motor signal of the left reel M51, the blocker signal and the hopper drive signal) and the output port 1 (the motor signal of the middle reel M52) based on the data in the first ROM / RWM area. And output data to the motor signal of the right reel M53). Next, in step 314, the CPU outputs the output data to the control command transmission and output port 2 (the input number display LED signal and the sub control data strobe signal) based on the data in the first ROM / RWM area. If the control command data exists, the following steps (1) to (4) are executed. In other cases, the following steps (3) to (4) are executed.
(1) Output control command clear data to the output ports 7 and 8 (sub control data signals 1 to 16).
(2) The sub-control data strobe signal is turned on, and output data is output to the output port 2 (the number-of-insertion-display LED signal and the sub-control data strobe signal).
(3) The sub-control data strobe signal is turned off, and output data is output to the output port 2 (the number-of-insertion-display LED signal and the sub-control data strobe signal).
(4) The control command clear data is output to the output ports 7 and 8 (sub control data signals 1 to 16).

Next, in step 316, the CPU executes LED display based on the data in the first ROM / RWM area. Specifically, output data of various LEDs such as the credit number display device D200 and the acquired number display device D190 are output to the output ports 3 and 4 (LED digit signal and LED segment signal). Next, in step 318, the CPU outputs the sub notification data to the output port 6 (sub control data signals 17 to 24) based on the data in the first ROM / RWM area. Next, in step 320, the CPU executes timer measurement in the order of a 1-byte timer and a 2-byte timer based on the data in the first ROM / RWM area. Next, in step 322, the CPU executes error management based on the data in the second ROM / RWM area. Specifically, error checks are executed in the following order.
(1) The set value is checked, and if the set value is not within the range, “E6” is displayed on the acquired number display device D190 and the operation of the gaming machine is stopped.
(2) The internal random number is checked, and if an abnormal frequency of the clock input to the RCK terminal or an internal random number update abnormality is detected, “E7” is displayed on the acquired number display device D190 and the operation of the gaming machine To stop.
(3) When the blocker signal is on (passable state) or the game medal is passing, the first insertion sensor signal and the second insertion sensor signal are inspected, and CP error (illegal passage) and CE error (game medal retention) Run the check.
As described above, the spinning machine P according to the present embodiment is configured such that the process related to the error check is executed based on the data in the second ROM / RWM area.

  Next, in step 324, the CPU outputs signal output data to the external terminal board to the output port 5 based on the data in the first ROM / RWM area. Next, in step 326, the CPU restores the register, permits the interrupt, and returns from the maskable interrupt process by the PTC 0 as the process at the end of the interrupt based on the data in the first ROM / RWM area.

<Main Operation Flowchart Related to Setting Change Device Processing>
Next, FIG. 14 is a main operation flowchart according to the execution of the setting change device process. First, in step 402, the CPU sets the stack pointer based on the data in the first ROM / RWM area, and starts the operation of the setting change device. Next, in step 404, RWM initialization is executed. Next, in step 406, the CPU starts PTC0 (interrupt timer) based on the data in the first ROM / RWM area. Next, in step 408, based on the data in the first ROM / RWM area, the CPU displays “88” on the acquired number display device D190 as an indication that the setting change device is operating, and the setting display LED ( The set value is displayed at (not shown), and the process proceeds to step 410. Next, in step 410, the CPU adds 1 to the set value when the set / reset button signal is turned on from off based on the data in the first ROM / RWM area. If it is out of the range, 1 is set to the set value (specifically, if the set / reset button M30 is operated when the set value display is “6”, the set value is displayed. Becomes “1”). Next, in step 412, the CPU determines whether or not the start lever signal has been turned on from off based on the data in the first ROM / RWM area. If NO in step 412, the process proceeds to step 410. If YES in step 412, in step 414, the CPU determines that the door switch signal and the set door switch signal are based on the data in the first ROM / RWM area. It is determined whether or not the setting key switch signal is turned from on to off in the on state. If No in step 414, the process of step 414 is executed again. If Yes, the process proceeds to step 416. Next, in step 416, the CPU turns off the setting display LED (not shown) based on the data in the first ROM / RWM area and displays “00” on the credit number display device D200 and the acquired number display device D190. After that, the game progress main process is executed.

<Error handling>
Next, error processing according to this example will be described with reference to FIGS. 15 and 16.

  First, FIG. 15 is an example of an error process that can be executed by the rotary gaming machine P according to the present example. As shown in the figure, in this example, a recoverable error that enables error cancellation by operating the door switch D80 and the setting door switch M10, and error cancellation by operating the door switch D80 and the setting door switch M10. An impossible non-recoverable error is provided.

<Recoverable error>
The recoverable error in this example is as follows.
(1) HE error: Error when it is determined that the game medal in the medal payout device H is empty (for example, “HE” is displayed on the acquired number display device D190).
(2) HP error: error when it is determined that game medals are stuck in the game medal payout port of the medal payout device (for example, “HP” is displayed on the acquired number display device D190)
(3) FE error: Error when it is determined that the game medal auxiliary storage is full (for example, “FE” is displayed on the acquired number display device D190).
(4) CP error: error when it is determined that the inserted game medal has been illegally passed (for example, “CP” is displayed on the acquired number display device D190)
(5) CH error: error when it is determined that game medals have accumulated in the insertion acceptance sensor D10s (for example, “CH” is displayed on the acquired number display device D190)
(6) CE error: error when it is determined that game medals have accumulated in the first insertion sensor D10s or the second insertion sensor D20s (for example, “CE” is displayed on the acquired number display device D190)
The non-recoverable errors are as described above. The errors (1) to (3) are game medal payout errors, and the errors (4) to (6) are game medal insertion errors. .

Further, the unrecoverable error in this example is as follows.
(1) E1 error: Error when power-off recovery cannot be executed normally (for example, “E1” is displayed on the acquired number display device D190)
(2) E5 error: An error when the symbol combination display is abnormal when all reels are stopped (for example, “E5” is displayed on the acquired number display device D190).
(3) E6 error: Error when the set value is out of range (for example, “E6” is displayed on the acquired number display device D190)
(4) E7 error: An error when detecting an abnormality in the frequency of the clock input to the RCK terminal for random number update or an update state abnormality in the internal random number (16-bit random number) (for example, “ E7 ”)
The non-recoverable error is as above. The error processing is not limited to the one shown in the figure, and a new error processing may be provided as a recoverable error or a non-recoverable error.

  Next, FIG. 16 is a timing chart relating to error processing that can be executed by the spinning cylinder gaming machine P according to the present example.

  First, (1) in the figure is a timing chart relating to HE error. First, the payout of game medals by the medal payout device H is started, and the hopper motor drive signal is turned on from off. Thereafter, even when the payout control time of A (for example, 6008.21 ms) shown in FIG. 6 has elapsed, no payout of game medals has been detected, and thus the hopper motor drive signal is turned from on to off. When the first payout sensor signal and the second payout sensor signal are on, the game medal payout operation is continued until both the signals are turned off. Thereafter, since the first payout sensor signal is OFF during the period B (for example, 108.81 ms) shown in the figure, it is determined that the game medal in the medal payout device H is empty, and an HE error occurs. Detected. Thereafter, the game medals are replenished in the medal payout device H, and the HE error is canceled by operating the door switch D80 and the setting door switch M10 in a predetermined operation mode, and the payout of the game medals is resumed. It will be. Also, the payout control time A (for example, 6008.21 ms) shown in the figure is longer than the period B (for example, 108.81 ms) shown in the figure.

  Next, (2-1) in the figure is a timing chart relating to the HP error. First, the payout of game medals by the medal payout device H is started, and the hopper motor drive signal is turned on from off. Thereafter, when the first payout sensor H10s detects a game medal, the first payout sensor signal is turned on from off, and thereafter, the first payout sensor signal is on and the second payout sensor signal is off. HP (31.82 ms in this example) becomes an HP error. Note that A is a period during which the second payout sensor signal is kept off after the first payout sensor signal is on and the second payout sensor signal is off, similar to A described above with reference to FIG. . That is, the range of the time value of the period A determined to be a normal game medal payout is “A <31.82 ms”, and the time period A is determined to be a normal game medal payout. If the value is out of the range, it is determined that an HP error has been detected.

  Next, (2-2) in the figure is a timing chart relating to the HP error. First, the payout of game medals by the medal payout device H is started, and the hopper motor drive signal is turned on from off. Thereafter, the first payout sensor H10s detects a game medal, so that the first payout sensor signal is turned on, and then the second payout sensor H20s detects a game medal, so that the second payout sensor signal is turned off. The first payout sensor signal and the second payout sensor signal are both turned on. After that, when both the first payout sensor signal and the second payout sensor signal are turned on, the period during which the second payout sensor signal is turned on becomes B (65.35 ms in this example) shown in FIG. HP error. Note that B is a period during which the second payout sensor signal is kept on after the first payout sensor signal is on and the second payout sensor signal is on, similar to B described above with reference to FIG. . That is, the range of the time value of the period B determined to be a normal game medal payout is “B <65.35 ms”, and the time period during which the period B is determined to be a normal game medal payout. If the value is out of the range, it is determined that an HP error has been detected.

  Next, (2-3) in the figure is a timing chart relating to the HP error. First, the payout of game medals by the medal payout device H is started, and the hopper motor drive signal is turned on from off. Thereafter, the first payout sensor H10s detects a game medal, so that the first payout sensor signal is turned on, and then the second payout sensor H20s detects a game medal, so that the second payout sensor signal is turned off. The first payout sensor signal and the second payout sensor signal are both turned on. Thereafter, a period C shown in the figure (in this example, 13.94 ms or more) has elapsed, and the second payout sensor signal is not detected by the second payout sensor H20s. From on to off. After that, after both the first payout sensor signal and the second payout sensor signal are turned on, the period during which the first payout sensor signal is on becomes D (65.35 ms in this example) shown in FIG. HP error. That is, an HP error occurs when the period during which the second payout sensor signal is on is 13.94 ms or longer and the period during which the first payout sensor signal is on is 65.35 ms. In the period D shown in the figure, the first payout sensor signal is kept on after the first payout sensor signal is turned on and the second payout sensor signal is turned on, similar to the period C described in FIG. It is a period. Note that the period D is longer than the period C in (2-3).

  Next, (3) in the figure is a timing chart relating to the FE error. First, when the insertion acceptance sensor D10s detects a game medal, the insertion acceptance sensor signal is turned on from off. Thereafter, the game medal auxiliary storage is filled with the inserted game medal, and the full detection signal is switched from OFF to ON. Thereafter, in a situation where the full detection signal is on, the insertion acceptance sensor D10s no longer detects a game medal, so that the insertion acceptance sensor signal is turned from on to off. Thereafter, the full detection signal remains on at the timing when the period A shown in the figure (452.00 ms in this example) elapses from the timing when the insertion acceptance sensor signal is turned on, indicating that an FE error has occurred. Is displayed on the acquired number display device D190. Thereafter, after the error factor is removed (the game medal is removed from the game medal auxiliary storage), the display related to the FE error is erased, and the FE error is canceled. Note that the FE error is displayed when the game medal insertion waiting period, the start lever operation reception waiting period, or after all reel rotation stops, the game medal auxiliary storage is full (the full detection signal is turned on). ) And FE error are displayed, but until the period A (452.00 ms in this example) shown in FIG. The display indicating an error is configured not to be executed.

  Next, (4) in the figure is a table relating to CP errors. First, the upper table in FIG. 4 (4) shows on / off of the first insertion sensor signal and the second insertion sensor signal when a game medal is inserted from the medal insertion slot D170 and it is determined as normal insertion. It is a table concerning an order. As shown in the figure, “first input sensor signal OFF, second input sensor signal OFF” → “first input sensor signal ON, second input sensor signal OFF” → “first input sensor signal ON, second input” A game medal is normally inserted in the order of “sensor signal ON” → “first input sensor signal OFF, second input sensor signal ON” → “first input sensor signal OFF, second input sensor signal OFF”. It is determined that it has been determined that the game medal has been inserted. In addition, when the first input sensor signal and the second input sensor signal shown in the upper table are not in the order of ON / OFF, it is determined that the input is abnormal and an error occurs. In the case where the first input sensor signal and the second input sensor signal shown in the lower table in the figure are in the on / off sequence, no error occurs. Specifically, “first input sensor signal OFF, second input sensor signal OFF” → “first input sensor signal ON, second input sensor signal OFF” → “first input sensor signal OFF, second input sensor signal” When the order is “OFF”, it is not determined that the input is normal, but an error is not caused.

  Next, (5) in the figure is a timing chart relating to the CH error. First, in a situation where the reel M50 is rotating (a situation where a CH error cannot be displayed), a game medal is inserted from the medal insertion slot D170, and the insertion acceptance sensor D10s detects the game medal to insert it. The reception sensor signal turns from off to on. Thereafter, when the insertion acceptance sensor signal is on for a predetermined period (452.00 ms in this example), it is determined that the game medal is staying in the vicinity of the insertion acceptance sensor D10s, resulting in a CH error ( However, since the reel M50 continues to rotate, the display related to the CH error is not executed. Thereafter, since the state where the insertion acceptance sensor signal is on is continued at the timing when the reel M50 stops rotating, the display relating to the CH error is executed by the acquired number display device D190. The display relating to the CH error is configured to be executed after a game medal insertion waiting period, a start lever operation reception waiting period, or after all reels have stopped rotating.

  Next, (6) in the figure is a timing chart relating to the CH error. As shown in the figure, the period from when the first input sensor signal is on and the second input sensor signal is off until the first input sensor signal is off and the second input sensor signal is on is A. The period from when the first input sensor signal is on and the second input sensor signal is on until the first input sensor signal is off and the second input sensor signal is on is B, and the first input sensor signal is on. The period from when the second closing sensor signal is turned on to when the first closing sensor signal is turned off and the second closing sensor signal is turned on is C. In addition, the range of time values of each period determined to be a normal game medal insertion is “9.47 ms ≦ A <188.27 ms”, “8.24 ms ≦ B <122.22 ms”, “9.47 ms ≦ C <188.27 ms ”, and it is determined that a CE error has been detected if any period falls outside the time value range determined to be a normal game medal insertion. Yes.

  When a recoverable error shown in the figure occurs, a display corresponding to the generated error is displayed on the acquired number display device D190 and the game is stopped. Further, when the error that has occurred is resolved, the display on the acquired number display device D190 is returned to the display before the error occurred, and then the game is resumed.

<Unrecoverable error>
Next, an unrecoverable error will be described. First, the cause of each error that becomes an unrecoverable error will be described in detail below.

  First, the cause of the E1 error is that when the power is turned on, (1) when the power-off process is not normally executed, or (2) when it is determined that the checksum of the RWM area is abnormal (RWM When the addition result is not 0).

  Next, the cause of the E5 error is when a combination of symbols that is not intended to be displayed at the time of display determination (when all reels are stopped) is displayed.

  Next, the cause of the E6 error occurs when the set value is inspected in the interrupt process and the set value is out of range as the inspection result.

Next, the cause of the E7 error is as follows.
(1) When an abnormal frequency of the clock input to the RCK terminal for updating the random number is detected The external clock input to the RCK terminal is used as a clock for updating the random number value of the random number circuit (RDG) 16-bit random number ch0. Because it is used, the internal concession gain register (CIF) that is set when the frequency is abnormal is constantly monitored by software. If the frequency of the external clock falls below 1/4 of the frequency of the internal system clock, the external clock Is determined to be abnormal, and data having a frequency abnormality is set in the third bit of the internal information register (CIF). In the interrupt processing, the third bit of the internal information register (CIF) is inspected, and an error occurs when data with frequency abnormality is set.
(2) Random number circuit (RDG) When there is an abnormality in the update state of the 16-bit random number ch0 to ch3, data with update abnormality is set in the fourth to seventh bits of the internal information register (CIF). The fourth bit of the internal information register (CIF) indicates an abnormality in the update state of ch0, the fifth bit indicates an abnormality in the update state of ch1, the sixth bit indicates an abnormality in the update state of ch2, and the seventh bit This shows an abnormality in the update state of ch3. In the interrupt processing, the fourth to seventh bits of the internal information register (CIF) are inspected, and an error occurs when random update abnormality data is set.

  Next, processing at the time of displaying an error relating to each error that becomes an unrecoverable error will be described in detail below.

  First, as processing at the time of displaying the E1 error or E5 error, the interrupt is prohibited, the output ports 0 to 6 are turned off, and then an unrecoverable error (E1) occurring in the acquired number display device D190 is displayed as an error display. An error display corresponding to the error or E5 error) is displayed and the game is stopped.

  Next, as processing at the time of displaying the E6 error or the E7 error, the output ports 0 to 6 are turned off, and then an error display is made. An error display corresponding to (error) is displayed and the game is stopped.

  Here, with reference to FIG. 17 to FIG. 69, the details of the processing in the rotating type gaming machine according to the present embodiment will be described.

<Processing in the first ROM / RWM area>
First, FIG. 17 is a flowchart of the program start process in the spinning cylinder gaming machine according to the present embodiment. First, after turning on the spinning machine P, in step 1002, the CPU sets the RWM upper address in the Q register based on the data in the first ROM / RWM area. Next, in step 1004, the CPU sets power supply return data abnormality based on the data in the first ROM / RWM area. Next, in step 1006, the CPU sets a vector address (upper order) based on the data in the first ROM / RWM area. Next, in step 1008, the CPU sets an interrupt mask register address based on the data in the first ROM / RWM area. Next, in step 1010, the CPU sets use of the maskable interrupt IR0 based on the data in the first ROM / RWM area. Next, in step 1012, the CPU sets the RWM access permission based on the data in the first ROM / RWM area. Next, in step 1014, the CPU sets the start address of the RWM area based on the data in the first ROM / RWM area.

  Next, in step 1016, the CPU calculates an RWM checksum based on the data in the first ROM / RWM area (calculates the checksum of addresses “0F000H” to “0F3FFH” of the RWM area). Next, in Step 1018, the CPU determines whether or not the calculation of the checksum of all bytes has been completed based on the data in the first ROM / RWM area. In the case of Yes in Step 1018, in Step 1020, the CPU determines whether or not the RWM checksum calculated in Step 1016 is normal based on the data in the first ROM / RWM area. On the other hand, in the case of No in step 1018, the process proceeds to step 1016. In the case of Yes in step 1020, in step 1022, the CPU determines whether or not the power-off process has been completed based on the data in the first ROM / RWM area. In the case of Yes in step 1022, in step 1024, the CPU sets power-off recovery data normal based on the data in the first ROM / RWM area, and proceeds to step 1026. On the other hand, also in the case of No in step 1020 or step 1022, the process proceeds to step 1026.

  Next, in Step 1026, the CPU inputs the input port 0 data based on the data in the first ROM / RWM area. Next, in step 1028, the CPU acquires a door switch signal, a setting door switch signal, and a setting key switch signal data based on the data in the first ROM / RWM area. Next, in step 1030, the CPU determines whether or not all the designated switch signals (for example, the door switch signal, the setting door switch signal, and the setting key switch signal) are on based on the data in the first ROM / RWM area. judge. In the case of Yes in Step 1030, in Step 1032, the CPU sets the initialization byte number and the initialization start address at the start of the setting change and at the time of power failure recovery abnormality based on the data in the first ROM / RWM area. Next, in step 1034, the CPU determines whether or not the power supply has been normally restored based on the data in the first ROM / RWM area. In the case of Yes in step 1034, in step 1036, based on the data in the first ROM / RWM area, the CPU sets the number of initialization bytes and the initialization start address corresponding to the start of the setting change and the normal time of power-off recovery. Next, in step 1038, the CPU determines whether or not the setting can be changed (the setting change flag is on) based on the data in the first ROM / RWM area. Here, in the present embodiment, the setting cannot be changed in a situation where the power-off state is not a period from the start of game medal insertion acceptance until the start lever acceptance. If No in step 1038, the process proceeds to step 1040. On the other hand, also in the case of No in step 1030, the process proceeds to step 1040. In addition, in the case of No in Step 1034 or in the case of Yes in Step 1038, the process proceeds to the next process (the process in Step 1100).

  Next, in step 1040, the CPU determines that the E1 error is based on the data in the first ROM / RWM area (error when the power-off process is not executed normally or the checksum of the RWM area is abnormal). Set. Next, in step 1042, the CPU determines whether or not the power-off recovery data is normal based on the data in the first ROM / RWM area. If Yes in step 1042, the process proceeds to the next process (the process in step 3000). If No in step 1042, the process proceeds to the next process (the process in step 1200). More specifically, when all of the door switch signal, the setting door switch signal, and the setting key switch signal are on, (1) when the power-off recovery data is abnormal, when the setting change is started (at the time of abnormal power-off recovery) ) RWM initialization byte number and initialization start address are set, and the processing shifts to the setting change device processing. (2) If the power-off recovery data is normal and the setting can be changed (setting change flag is ON), the number of RWM initialization bytes at the start of setting change (when power-off recovery is normal) Then, the initialization start address is set, and the process proceeds to the setting change device process. (3) When the power-off recovery data is normal and the setting cannot be changed (setting change flag is off), a power-off recovery process to be described later is executed. In the case of (3), that is, when the power-off recovery data is not normal, the process is shifted to a non-recoverable error process.

<Processing in the first ROM / RWM area>
Next, FIG. 18 is a flowchart of the setting change device process according to the subroutine of step 1100 in FIG. First, in step 1102, the CPU sets a stack pointer (initialized with the start address of the process) based on the data in the first ROM / RWM area. Next, in step 1104, the CPU performs RWM initialization at the start of operation of the setting change device according to the normal power-off recovery or the power-off recovery abnormality based on the data in the first ROM / RWM area. Next, in step 1106, the CPU sets the next RWM address based on the data in the first ROM / RWM area. Next, in step 1108, the CPU determines whether or not the initialization of the built-in RWM has ended based on the data in the first ROM / RWM area. If Yes in step 1108, the process proceeds to step 1110. On the other hand, if No in step 1108, the process proceeds to step 1104.

  Next, in step 1110, the CPU saves the AF register in the first RWM area based on the data in the first ROM / RWM area, and executes a process call for the second ROM / RWM area. The AF register is saved if there is no problem if only the F register can be saved, but since only the F register cannot be saved, the AF register is saved. By configuring in this way, it is possible to avoid that the F register that is overwritten by the previous operation result is overwritten (broken) by the interrupt processing.

<Processing in the second ROM / RWM area>
Next, in step 5050, the CPU executes RWM initialization processing 3 to be described later based on the data in the second ROM / RWM area, and returns to the caller of the first ROM / RWM area.

<Processing in the first ROM / RWM area>
Next, in step 1112, the CPU restores the AF register based on the data in the first ROM / RWM area. Next, in step 1113, the CPU executes an interrupt activation process based on the data in the first ROM / RWM area. In the processing in this subroutine, serial communication setting processing (processing in the second ROM / RWM area) in step 5950 described later is executed. Next, in step 1114, an output request for starting operation of the setting change device is set. Next, in step 1115, control command set processing is executed for the specified RWM data. Next, in step 1116, the CPU sets a waiting time at the start of operation of the setting change device based on the data in the first ROM / RWM area. Next, in step 117, the CPU waits until the designated waiting time becomes zero based on the data in the first ROM / RWM area. Next, in step 1118, the CPU stores a setting change device operating display based on the data in the first ROM / RWM area. Next, in step 1120, the CPU turns on the acquired number display LED (displaying that the setting change device is operating) and the setting display LED based on the data in the first ROM / RWM area. Next, in step 1122, the CPU obtains the setting / reset button signal rising data based on the data in the first ROM / RWM area (if the setting / reset button is turned on from off, the CPU sets the set value data). 1 is added and becomes 1 when the set / reset button is operated at the set value 6). Next, in step 1124, the CPU updates the set value data based on the data in the first ROM / RWM area.

  Next, in step 1126, the CPU determines whether or not the set value is in the normal range based on the data in the first ROM / RWM area. In the case of No in step 1126, in step 1128, the CPU sets a set value data initial value (0 in this example) based on the data in the first ROM / RWM area, and proceeds to step 1130. On the other hand, also in the case of Yes in step 1126, the process proceeds to step 1130. Next, in step 1130, the CPU saves the set value data based on the data in the first ROM / RWM area. Next, in step 1131, the CPU waits until there is an interrupt by PTC 0 based on the data in the first ROM / RWM area. Next, in Step 1132, the CPU starts the start lever sensor signal based on the data in the first ROM / RWM area (the start lever sensor signal is switched from OFF to ON by operating the start lever D50). ) Or not. In the case of Yes in step 1132, in step 1134, the CPU causes the setting key switch signal to fall based on the data in the first ROM / RWM area (the setting key switch signal is changed by operating the setting key switch M20). Whether or not it has been switched from on to off). If Yes in step 1134, the process proceeds to step 1136. On the other hand, in the case of No in step 1134, step 1134 is repeated until the setting key switch signal falls (the setting key switch signal is switched from on to off by operating the setting key switch M20). On the other hand, in the case of No in step 1132, the process proceeds to step 1122, and the processing up to step 1130 is performed until the start lever sensor signal rises (the start lever sensor signal is switched from off to on by operating the start lever D50). repeat.

  Next, in step 1136, the CPU clears the setting change device operating display data based on the data in the first ROM / RWM area. Next, in step 1138, the CPU turns on the stored number display LED and the acquired number display LED based on the data in the first ROM / RWM area (that is, LED display at the start of the game). Next, in step 1140, the CPU sets an output request at the end of operation of the setting change device based on the data in the first ROM / RWM area. Next, in step 1141, the CPU executes control command set generation processing for the specified RWM data based on the data in the first ROM / RWM area, and proceeds to the next processing (processing in step 1300).

<Processing in the second ROM / RWM area>
Next, FIG. 19 is a flowchart of the RWM initialization process 3 according to the subroutine of step 5050 in FIG. First, in step 5052, the CPU saves the stack pointer to the second RWM area based on the data in the second ROM / RWM area. Next, in step 5054, the CPU sets the address of the second stack area in the stack pointer based on the data in the second ROM / RWM area. In the present embodiment, interrupt processing in the first ROM / RWM area is not generated during execution of processing in the second ROM / RWM area. More specifically, in the process of step 1113 or step 3012 In the processing subsequent to the execution of the interrupt activation processing, when calling the processing in the second ROM / RWM area in the main loop processing, the processing is configured to be performed after prohibiting the interrupt.

  Next, in step 5056, the CPU saves the register in the second stack area based on the data in the second ROM / RWM area. Next, in step 5058, the RWM initialization start address is set. Next, in step 5060, the CPU sets the number of RWM initialization bytes based on the data in the second ROM / RWM area.

  Next, in step 5062, the CPU executes initialization of the second RWM area based on the data in the second ROM / RWM area. Next, in step 5064, the CPU sets the next RWM address based on the data in the second ROM / RWM area. Next, in Step 5066, the CPU determines whether or not the initialization of the second RWM area is completed based on the data in the second ROM / RWM area. If Yes in step 5066, the process proceeds to step 5068. On the other hand, in the case of No in step 5066, the process proceeds to step 5062, and the initialization is repeated until the initialization of the second RWM area is completed.

  Next, in step 5068, the CPU restores the register saved in the second stack area in step 5056 based on the data in the second ROM / RWM area. Next, in step 5070, based on the data in the second ROM / RWM area, the CPU returns the stack pointer saved in the second RWM area in step 5052 (sets it as the address of the first stack area) for the next processing. Transition.

<Processing in the first ROM / RWM area>
Next, FIG. 20 is a flowchart of non-recoverable error processing according to the subroutine of step 1200 in FIG. First, in step 1202, the CPU prohibits interruption based on the data in the first ROM / RWM area. Next, in step 1204, the CPU sets error display data (lower digits) based on the data in the first ROM / RWM area. Next, in step 1206, the CPU sets error display data (upper digit) based on the data in the first ROM / RWM area. Next, in step 1208, the CPU sets the clear output port address and the number of output ports based on the data in the first ROM / RWM area. Next, in step 1210, the CPU turns off the output ports (0 to 6) based on the data in the first ROM / RWM area. In step 1212, the CPU sets the next output port address based on the data in the first ROM / RWM area. Next, in step 1214, the CPU determines whether or not the output is completed based on the data in the first ROM / RWM area. If Yes in step 1214, an error display (output ports 3 and 4) is output in step 1216. Next, in step 1218, the CPU executes switching between upper digits / lower digits based on the data in the first ROM / RWM area, and proceeds to the processing in step 1208.

<Processing in the first ROM / RWM area>
FIG. 21 is a flowchart of power-off recovery processing according to the subroutine of step 3000 in FIG. First, in step 3002, the CPU refers to the address of the stack pointer saved when the power is turned off based on the data in the first ROM / RWM area, and restores the stack pointer. Next, in step 3004, the CPU sets the initialization start address and the number of initialization bytes at the time of power-off recovery based on the data in the first ROM / RWM area. Next, in step 3050, the CPU executes an RWM initialization process to be described later based on the data in the first ROM / RWM area. Next, in step 3006, the CPU saves the AF register based on the data in the first ROM / RWM area, and executes a process call in the second ROM / RWM area.

<Processing in the second ROM / RWM area>
Next, in Step 5900, the CPU executes RWM initialization processing 2 described later based on the data in the second ROM / RWM area, and returns to the caller of the first ROM / RWM area.

<Processing in the first ROM / RWM area>
Next, in step 3008, the CPU restores the AF register based on the data in the first ROM / RWM area. Next, in step 3009, the CPU executes input port 0-2 reading processing (processing for reading data into the input ports 0-2) based on the data in the first ROM / RWM area. Next, in step 3010, the CPU sets the output time of the external signal 4 at the time of power-off recovery based on the data in the first ROM / RWM area. Next, in step 3012, the CPU executes an interrupt activation process based on the data in the first ROM / RWM area. The serial communication setting process (process in the second ROM / RWM area) in step 5950 is executed by the process in this subroutine. Next, in step 3012, the CPU executes serial communication setting processing to be described later based on the data in the second ROM / RWM area, and returns to the caller of the first ROM / RWM area.

<Processing in the first ROM / RWM area>
Next, in step 3012, the CPU executes an interrupt activation process based on the data in the first ROM / RWM area. Next, in step 3014, the CPU clears the power-off process completion flag based on the data in the first ROM / RWM area, and proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 22 is a flowchart of the RWM initialization process according to the subroutine of step 3000 in FIG. First, in step 3052, the CPU sets RWM initialization data based on the data in the first ROM / RWM area, and proceeds to step 3054. Next, in step 3054, the CPU executes initialization of the first RWM area based on the data in the first ROM / RWM area. The initialization of the second RWM area is configured to be executed in the RWM initialization process 2 described later. Next, in step 3056, the CPU updates the RWM initialization address related to the first RWM area based on the data in the first ROM / RWM area. Next, in step 3058, the CPU determines whether or not the RWM initialization is completed based on the data in the first ROM / RWM area. In the case of Yes in step 3058, the process proceeds to the next process. On the other hand, in the case of No in step 3058, the process proceeds to step 3054, and the processing of step 3054 to step 3058 is repeated until the initialization of the first RWM area is completed. In this process, data 0 is set in an area excluding the first work area and the first stack area in the first RWM area.

<Processing in the second ROM / RWM area>
Next, FIG. 23 is a flowchart of the RWM initialization process 2 according to the subroutine of step 5900 in FIG. First, in step 5902, the CPU saves the stack pointer to the second RWM area based on the data in the second ROM / RWM area. Next, in step 5904, the CPU sets the address of the second stack area in the stack pointer based on the data in the second ROM / RWM area. Next, in step 5906, the CPU saves the register to the second stack area based on the data in the second ROM / RWM area. Next, in Step 5908, the CPU sets an RWM initialization start address related to the second RWM area based on the data in the second ROM / RWM area. Next, in step 5910, the CPU sets the number of RWM initialization bytes based on the data in the second ROM / RWM area. Next, in step 5912, the CPU executes initialization of the second RWM area based on the data in the second ROM / RWM area. Next, in Step 5914, the CPU sets the next RWM address based on the data in the second ROM / RWM area. Next, in Step 5916, the CPU determines whether or not the initialization of the second RWM area has been completed based on the data in the second ROM / RWM area. If YES in step 5916, the flow advances to step 5918. On the other hand, in the case of No in step 5916, the process proceeds to step 5912, and the processing of step 5912 to step 5916 is repeatedly executed until the initialization of the second RWM area is completed.

  Next, in step 5918, the CPU sets the RWM initialization start address related to the second RWM area based on the data in the second ROM / RWM area. Next, in step 5920, the CPU sets the number of RWM initialization bytes based on the data in the second ROM / RWM area. Next, in Step 5922, the CPU executes initialization of the second RWM area based on the data in the second ROM / RWM area. Next, in Step 5924, the CPU sets the next RWM address based on the data in the second ROM / RWM area. Next, in Step 5926, the CPU determines whether or not the initialization of the second RWM area has been completed based on the data in the second ROM / RWM area. If YES in step 5926, the flow advances to step 5928. On the other hand, in the case of No in step 5926, the process proceeds to step 5922, and the processing of step 5922 to step 5926 is repeatedly executed until the initialization of the second RWM area is completed. In the present embodiment, the unused area of the second RWM area (“F200H” to “F3FFH”) is divided into two areas of “F200H” to “F20FH” and “F21EH” to “F3F1H”. “F200H” to “F20FH” are initialized by the processing of step 5912 to step 5916, and “F21EH” to “F3F1H” are initialized by the processing of step 5922 to step 5926. Next, in step 5928, the CPU restores the register saved in the second stack area in step 5906 based on the data in the second ROM / RWM area. Next, in step 5930, the CPU restores the stack pointer saved in the second RWM area based on the data in the second ROM / RWM area, and proceeds to the next processing. In this process, data 0 is set in an area excluding the second work area and the second stack area in the second RWM area.

<Processing in the second ROM / RWM area>
Next, FIG. 24 is a flowchart of the serial communication setting process according to the subroutine of step 5950 in FIG. First, in step 5952, the CPU saves the stack pointer in the second RWM area based on the data in the second ROM / RWM area. Next, in step 5954, the CPU sets the address of the second stack area in the stack pointer based on the data in the second ROM / RWM area. Next, in Step 5956, the CPU saves the register in the second stack area based on the data in the second ROM / RWM area. Next, in step 5958, the CPU sets the SCU1 baud rate register address (lower order) based on the data in the second ROM / RWM area. Next, in step 5960, the CPU sets the SCU1 baud rate register based on the data in the second ROM / RWM area. Next, in step 5962, the CPU uses the SCU channel 1 transmission function, FIFO mode, data length 9 bits (9 bits constitute meaningful data), parity based on the data in the second ROM / RWM area. Use (method for detecting an error) and even parity (with “1” included in the bit string in the entire data as an even number) are set. Next, in step 5964, the CPU restores the register saved in the second stack area in step 5956 based on the data in the second ROM / RWM area. Next, in step 5966, the CPU restores the stack pointer saved in the second RWM area based on the data in the second ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 25 is a flowchart of the game progress main process according to the subroutine of step 1300 in FIG. The process of FIGS. 25 to 52 is a flowchart of the main process (loop process). First, in step 1301, the CPU sets the stack pointer based on the data in the first ROM / RWM area. Next, in step 1302, the CPU executes a game start set process based on the data in the first ROM / RWM area. Note that the game medal acceptance start process in step 1350, which will be described later, is executed in the process in the game start set process subroutine in step 1302. Next, in step 1303, the CPU reads the number of game medals based on the data in the first ROM / RWM area, and checks whether there are any game medals. Next, in step 1304, the CPU determines whether or not a game medal is bet based on the data in the first ROM / RWM area. In the case of No in step 1304, in step 1500, the CPU executes a display process when waiting for a game medal to be described later based on the data in the first ROM / RWM area, and proceeds to step 1550. On the other hand, in the case of Yes in step 1304, the process proceeds to the process in step 1550 without executing the process in step 1500.

  Next, in step 1550, the CPU executes a game medal management process described later based on the data in the first ROM / RWM area. Next, in step 1305, the CPU executes a process of updating the random number for internal random number processing based on the data in the first ROM / RWM area. Next, in step 1850, the CPU executes a start lever check process, which will be described later, based on the data in the first ROM / RWM area. Next, in step 1306, the CPU determines whether or not the start lever D50 has been operated based on the data in the first ROM / RWM area. If Yes in step 1306, the process proceeds to step 2100. On the other hand, in the case of No in step 1306, the process proceeds to step 1303, and the processes of step 1303 to step 1306 are repeatedly executed until the start lever D50 is operated.

  Next, in step 2100, the CPU executes an internal lottery start process described later based on the data in the first ROM / RWM area. Next, in step 1308, the CPU starts to rotate the reel M50 based on the data in the first ROM / RWM area. Next, in step 1309, the number of shifted frames is created for all symbols that have not been stopped. Next, in step 2300, the CPU executes a rotating cylinder stop acceptance check process to be described later based on the data in the first ROM / RWM area. Next, in step 2400, the CPU executes an all-round cylinder stop check process to be described later based on the data in the first ROM / RWM area. Next, in step 1310, the CPU determines whether all reels have stopped based on the data in the first ROM / RWM area. If YES in step 1310, the process proceeds to step 2450. On the other hand, in the case of No in step 1310, the process proceeds to step 1308, and the processing of step 1308 to step 1310 is repeatedly executed until all reels are stopped.

  Next, in step 2450, the CPU executes a display determination process described later based on the data in the first ROM / RWM area. Next, in step 2500, the CPU executes a game medal payout process by winning, which will be described later, based on the data in the first ROM / RWM area. Next, in step 1312, the CPU executes a game end check process based on the data in the first ROM / RWM area. Next, in step 1314, the CPU sets an output request at the end of the game based on the data in the first ROM / RWM area. Next, in step 1316, the CPU executes a control command set process for the designated RWM data based on the data in the first ROM / RWM area, and the process proceeds to step 1301.

<Processing in the first ROM / RWM area>
Next, FIG. 26 is a flowchart of the game medal acceptance start process according to the subroutine of step 1350 in FIG. First, in step 1352, the CPU turns on the setting change flag based on the data in the first ROM / RWM area. Next, in step 1354, the CPU clears the game medal number data based on the data in the first ROM / RWM area. Next, in step 1356, the CPU clears the input number display LED signal data and the LED display data based on the data in the first ROM / RWM area. Next, in step 1358, the CPU determines whether or not it is a re-game operation based on the data in the first ROM / RWM area. If Yes in step 1358, the process proceeds to step 1360. On the other hand, in the case of No in step 1358, the blocker is turned on and the process proceeds to the next process.

  Next, in step 1360, the CPU sets an automatic charging standby time based on the data in the first ROM / RWM area. Next, in Step 1362, the CPU waits until the designated waiting time becomes 0 based on the data in the first ROM / RWM area. Next, in step 1364, the CPU acquires the stored number data based on the data in the first ROM / RWM area, and checks whether there is a stored number. Next, in step 1366, the CPU determines whether the number of stored sheets is a limit based on the data in the first ROM / RWM area. In the case of No in step 1366, in step 1368, the CPU executes a blocker-on process based on the data in the first ROM / RWM area, and proceeds to the process in step 1370. On the other hand, also in the case of Yes in step 1366, the process proceeds to step 1370. Next, in step 1370, the CPU lights the re-game display LED based on the data in the first ROM / RWM area. Next, in step 1372, the CPU sets an output request for automatic input based on the data in the first ROM / RWM area. Next, in step 1374, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area.

  Next, in step 1400, the CPU executes a game medal addition process, which will be described later, based on the data in the first ROM / RWM area. Next, in step 1376, the CPU compares the game medal limit number (three) with the inserted number based on the data in the first ROM / RWM area, and checks whether the game medal is the limit. Next, in step 1378, the CPU determines whether or not the number of game medals is the limit (the number of bets is the upper limit of 3) based on the data in the first ROM / RWM area. In the case of Yes in step 1378, the processing proceeds to the next processing (processing in step 1304). On the other hand, in the case of No in step 1378, the process proceeds to step 1400, and the processes of step 1400 and step 1376 are repeatedly executed until the game medal reaches the limit.

<Processing in the first ROM / RWM area>
Next, FIG. 27 is a flowchart of one game medal addition process according to the subroutine of step 1400 in FIG. First, in step 1402, the CPU clears the acquired number data based on the data in the first ROM / RWM area. Next, in step 1404, the CPU reads game medal number data based on the data in the first ROM / RWM area and checks whether or not there is a game medal number. Next, in step 1406, the CPU adds 1 to the number of game medals bet based on the data in the first ROM / RWM area, and proceeds to the inserted number display data generation process in step 1450 described later.

<Processing in the first ROM / RWM area>
Next, FIG. 28 is a flowchart of the inserted number display data generation processing according to the subroutine of step 1450 in FIG. First, in step 1452, the CPU acquires game medal number data based on the data in the first ROM / RWM area. Next, in step 1454, the CPU generates insertion number display LED signal data based on the data in the first ROM / RWM area. Next, in step 1456, the CPU saves the inserted number display LED signal data based on the data in the first ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 29 is a flowchart of the display processing when waiting for the insertion of a game medal, according to the subroutine of step 1500 in FIG. First, in step 1502, the CPU determines whether or not the setting key switch signal has risen (turned on) based on the data in the first ROM / RWM area. In the case of Yes in step 1502, in step 1503, the CPU executes a blocker-off process based on the data in the first ROM / RWM area. Next, in step 1504, the CPU sets an output request at the start of setting value display based on the data in the first ROM / RWM area. Next, in step 1506, the CPU executes control command set processing for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in step 1508, the CPU lights up the setting display LED based on the data in the first ROM / RWM area. Next, in step 1510, the CPU determines whether or not the setting key switch signal has fallen (turned off) based on the data in the first ROM / RWM area. If Yes in step 1510, the process proceeds to step 1512. On the other hand, in the case of No in step 1510, that is, the setting display LED is kept on until the setting key switch signal falls (turns off).

  Next, in step 1512, the CPU turns off the setting display LED based on the data in the first ROM / RWM area. Next, in step 1514, the CPU sets an output request at the end of setting value display based on the data in the first ROM / RWM area. Next, in step 1516, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in step 1518, the CPU turns on the blocker based on the data in the first ROM / RWM area, and proceeds to the processing in step 1520. Also in the case of No in step 1502, the process proceeds to step 1520.

  Next, in step 1520, the CPU determines whether or not the game standby display is started based on the data in the first ROM / RWM area. In the case of Yes in step 1520, the acquired number display data clear process is executed, and the process proceeds to the next process. If NO in step 1520, the process proceeds to the next process without executing the acquired number display data clear process.

<Processing in the first ROM / RWM area>
Next, FIG. 30 is a flowchart of the game medal management process according to the subroutine of step 1550 in FIG. First, in step 1552, the CPU determines whether the blocker signal is on (blocker D100 is on) based on the data in the first ROM / RWM area. In the case of Yes in step 1552, in step 1554, the CPU turns on one of the input sensor signals (either the first input sensor signal or the second input sensor signal) based on the data in the first ROM / RWM area. It is determined whether or not. If No in step 1554, the process proceeds to step 1556. On the other hand, also in the case of No in step 1552, the process proceeds to step 1556. If the answer is YES in step 1554, a first game medal insertion check process in step 1600 described later is executed.

  Next, in step 1556, the CPU determines whether any one of the one-sheet insertion switch signal, the three-sheet insertion sensor signal, and the settlement switch signal has risen based on the data in the first ROM / RWM area. In the case of Yes in step 1556, in step 1558, the CPU turns off the game start display LED signal based on the data in the first ROM / RWM area. On the other hand, if No in step 1556, the process proceeds to the next process. Next, in step 1560, the CPU determines whether or not the signal determined to have risen in step 1556 is a settlement switch signal based on the data in the first ROM / RWM area. In the case of Yes in step 1560, the processing proceeds to the next processing (processing in step 1750). On the other hand, in the case of No in step 1560, the process proceeds to a storage input process in step 1700 described later.

<Processing in the first ROM / RWM area>
FIG. 31 is a flowchart of the first game medal insertion check process according to the subroutine of step 1600 in FIG. First, in step 1602, the CPU turns off the game start display LED signal based on the data in the first ROM / RWM area. Next, in Step 1604, the CPU obtains input port 2 level data based on the data in the first ROM / RWM area. Next, in step 1606, the CPU acquires error display request data based on the data in the first ROM / RWM area. Next, in step 1607, the CPU determines whether there is error display request data based on the data in the first ROM / RWM area. In the case of No in step 1607, in step 1608, the CPU determines that only the first input sensor signal is on based on the data in the first ROM / RWM area, that is, the first input sensor signal is on and the second input sensor. It is determined whether or not the signal is off. If No in step 1608, the process proceeds to step 1609. On the other hand, in the case of Yes in step 1608, the process proceeds to step 1604, and the processes in steps 1604 to 1608 are repeatedly executed until only the first input sensor signal is not turned on. Next, in step 1609, the CPU determines that the input sensor signal is off, that is, the first input sensor signal and the second input sensor signal are both off, based on the data in the first ROM / RWM area. It is determined whether or not. If Yes in step 1609, the process proceeds to the next process. As described above, when one game medal is normally inserted, the on / off transition between the first insertion sensor signal and the second insertion sensor signal is “(1) First insertion sensor signal”. OFF and second input sensor signal OFF → (2) first input sensor signal ON and second input sensor signal OFF → (3) first input sensor signal ON and second input sensor signal ON → ( 4) First input sensor signal OFF and second input sensor signal ON → (5) First input sensor signal OFF and second input sensor signal OFF ”. In the ON / OFF situation of (), the processing from step 1604 to step 1610 is repeatedly executed. In addition, “(2) When the first input sensor signal is ON and the second input sensor signal is OFF → (1) When the first input sensor signal is OFF and the second input sensor signal is OFF, step 1612 is executed. Although it is Yes and it is not determined that the input is normal, it is configured not to be detected as an error.

  In the case of No in step 1609, in step 1610, the CPU executes game medal limit setting processing based on the data in the first ROM / RWM area. Next, in step 1611, the CPU executes a game medal number reading process (a process of reading game medal number data and checking for the presence of the game medal number) based on the data in the first ROM / RWM area. Next, in step 1612, the CPU executes a stored number reading process (a process for acquiring stored number data and checking for the number of stored numbers) based on the data in the first ROM / RWM area. Next, in step 1614, the CPU calculates the total number of medals for the number of game medals (the number of bets) and the number of stored medals (the number of credits) based on the data in the first ROM / RWM area, and proceeds to step 1615.

  Next, in step 1615, the CPU determines whether or not medals can be inserted based on the data in the first ROM / RWM area. In the case of Yes in step 1615, in step 1616, the CPU turns off the blocker based on the data in the first ROM / RWM area, and proceeds to the processing of step 1617. On the other hand, also in the case of No in step 1615, the process proceeds to step 1617. Next, in step 1617, the CPU acquires the input port 2 level data based on the data in the first ROM / RWM area. Next, in Step 1618, the CPU acquires error display request data based on the data in the first ROM / RWM area. Next, in step 1620, the CPU determines whether there is error display request data based on the data in the first ROM / RWM area. In the case of Yes in step 1620, in step 1650, the CPU executes an error display process to be described later based on the data in the first ROM / RWM area, executes a blocker-on process, and proceeds to the next process. On the other hand, also in the case of Yes in step 1607, the process proceeds to step 1650.

  Next, in the case of No in step 1620, in step 1622, the CPU determines that one of the input sensor signals of the first input sensor signal and the second input sensor signal is ON based on the data in the first ROM / RWM area. It is determined whether or not there is. If Yes in step 1622, the process proceeds to step 1617. Note that, in the on / off situations of (3) and (4), the processing from step 1617 to step 1622 is repeatedly executed.

  Next, in the case of No in step 1622, that is, when both the first input sensor signal and the second input sensor signal are off, in step 1624, the CPU is based on the data in the first ROM / RWM area. Set an output request when a game medal is inserted. Next, in step 1626, the CPU executes control command set processing for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in step 1628, the CPU obtains the number of game medals based on the data in the first ROM / RWM area, compares the game medal limit number (three) with the inserted number, and checks whether it is the game medal limit. To do. Next, in Step 1630, the CPU determines whether or not the game medal is the limit based on the data in the first ROM / RWM area. In the case of Yes in step 1630, a process for adding one stored sheet is executed, and the process proceeds to the next process. On the other hand, in the case of No in step 1630, in step 1400, the above-described game medal addition process is executed. The first game medal insertion check process shown in the figure is a main process (also referred to as non-interrupt process or loop process) and is a process of the first ROM / RWM area. In this process, the first insertion sensor signal and the second insertion sensor signal are checked for on / off status to determine whether or not the game medal has been inserted normally. The measurement of the period related to ON / OFF of the closing sensor signal and the second closing sensor signal is executed by processing in the second ROM / RWM area (details will be described later).

<Processing in the first ROM / RWM area>
Next, FIG. 32 is a flowchart of error display processing according to the subroutine of step 1650 in FIG. First, in step 1652, the CPU stores the error number based on the data in the first ROM / RWM area. Next, in step 1654, the CPU saves the pre-error blocker signal and the hopper motor drive signal state information based on the data in the first ROM / RWM area. Next, in step 1656, the CPU turns off the hopper motor drive signal based on the data in the first ROM / RWM area. Next, in step 1658, the CPU turns off the blocker based on the data in the first ROM / RWM area. Next, in step 1659, the CPU turns off the game start display LED signal based on the data in the first ROM / RWM area. Next, in step 1660, the CPU sets an output request at the start of error display based on the data in the first ROM / RWM area. Next, in step 1661, the CPU executes control command generation processing based on the data in the first ROM / RWM area. Next, in step 1662, the CPU determines whether or not the setting / reset button signal has risen (turned on) based on the data in the first ROM / RWM area. In the case of Yes in step 1662, in step 1664, the CPU clears the setting / reset button signal rising data based on the data in the first ROM / RWM area. On the other hand, in the case of No in step 1662, the processing of step 1662 is repeated until the setting / reset button signal rises (turns on).

  Next, in step 1666, the CPU sets the RWM address corresponding to the full detection signal inspection data and the input port 0 level data based on the data in the first ROM / RWM area. Next, in step 1668, the CPU determines whether or not it is an FE error (error when the game medal auxiliary storage is full) based on the data in the first ROM / RWM area. In the case of No in step 1668, in step 1670, the CPU sets the RWM address corresponding to the payout sensor inspection data and the input port 2 level data based on the data in the first ROM / RWM area.

  Next, in Step 1672, the CPU determines whether or not it is a payout-related error (for example, HP error) based on the data in the first ROM / RWM area. In the case of No in step 1672, in step 1674, the CPU sets the inspection data of the input sensor (first input sensor, second input sensor) and input reception sensor based on the data in the first ROM / RWM area. Next, in step 1676, the CPU refers to the inspection data relating to the processing in steps 1666, 1670, and 1673 based on the data in the first ROM / RWM area, and determines the input state for each error based on the inspection data. To check. Next, in step 1678, the CPU determines whether or not the error factor has been removed based on the data in the first ROM / RWM area, that is, no error has been detected. In the case of Yes in step 1678, in step 1680, the CPU clears the error number based on the data in the first ROM / RWM area. On the other hand, in the case of No in step 1678, the process proceeds to step 1662, and the processing of step 1662 to step 1678 is repeatedly executed until the error factor is removed.

  Next, in step 1680, the CPU clears the error number based on the data in the first ROM / RWM area. Next, in step 1682, the CPU sets an output request at the end of error display based on the data in the first ROM / RWM area. Next, in step 1683, the CPU executes control command set processing for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in Step 1684, the CPU restores the pre-error blocker signal and the hopper motor driving state information based on the data in the first ROM / RWM area. Next, in step 1686, the CPU returns the hopper motor drive signal based on the data in the first ROM / RWM area. Next, in Step 1688, the CPU determines whether or not the blocker signal before the error is on based on the data in the first ROM / RWM area. If Yes in step 1688, the blocker is turned on and the process proceeds to the next process. On the other hand, if No at step 1688, the process proceeds to the next process without turning on the blocker.

<Processing in the first ROM / RWM area>
Next, FIG. 33 is a flowchart of storage input processing according to the subroutine of step 1700 in FIG. First, in step 1701, the CPU compares the game medal limit number (three) with the inserted number based on the data in the first ROM / RWM area, and checks whether the game medal is the limit. Next, in Step 1702, the CPU determines whether or not the number of game medals is the limit (the upper limit value of the number of bets, which is three in this example), based on the data in the first ROM / RWM area. In the case of No in step 1702, in step 1704, the CPU sets one as the requested number of sheets to be inserted based on the data in the first ROM / RWM area. On the other hand, if Yes in step 1702, the process proceeds to the next process.

  Next, in step 1706, the CPU confirms whether or not the single-load switch signal has risen based on the data in the first ROM / RWM area. In the case of No in step 1706, in step 1708, based on the data in the first ROM / RWM area, the CPU sets “game medal limit number-number of inserted medals” as the number of requested insertions, and proceeds to step 1709. On the other hand, in the case of Yes in step 1706, the processing of step 1708 is not executed, and the processing proceeds to step 1709. Next, in step 1709, the CPU acquires the stored number data based on the data in the first ROM / RWM area, and checks whether there is a stored number. Next, in step 1710, the CPU determines whether or not there is a game medal storage number (credit number) (not 0) based on the data in the first ROM / RWM area. In the case of Yes in step 1710, in step 1712, the CPU clears the input port 1 rising data based on the data in the first ROM / RWM area. On the other hand, if NO in step 1710, the process proceeds to the next process.

  Next, in step 1714, the CPU determines whether or not the number of game medals stored (number of credits) is equal to or greater than the number of requested insertions based on the data in the first ROM / RWM area. In the case of No in step 1714, that is, since the number of credits is less than the requested number of inserts, in step 1716, based on the data in the first ROM / RWM area, the CPU Number) is set, and the process proceeds to Step 1718. On the other hand, in the case of Yes in step 1714, the process proceeds to step 1718 without executing the process in step 1716. Next, in Step 1718, the CPU sets an output request at the time of storing and charging based on the data in the first ROM / RWM area. Next, in step 1719, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area, and proceeds to step 1400. Next, in step 1400, the CPU executes the above-described game medal addition process based on the data in the first ROM / RWM area.

  Next, in step 1720, based on the data in the first ROM / RWM area, the CPU adds 1 game medal in step 1400 and subtracts 1 from the stored number data. Next, in step 1722, the CPU determines whether or not the insertion of the requested number of insertions has been completed based on the data in the first ROM / RWM area. If Yes in step 1722, the process proceeds to the next process. On the other hand, in the case of No in step 1722, the process proceeds to step 1400, and the processing of step 1400 to step 1722 is repeatedly executed until the insertion of the requested number of insertions is completed.

<Processing in the first ROM / RWM area>
Next, FIG. 34 is a flowchart of the game medal management process according to the subroutine of step 1750 in FIG. First, in step 1751, the CPU determines whether or not the blocker-on monitoring time has elapsed based on the data in the first ROM / RWM area. In the case of Yes in step 1751, in step 1752, the CPU sets an output request at the start of settlement based on the data in the first ROM / RWM area. On the other hand, in the case of No in step 1751, since the monitoring time at blocker ON has not elapsed, the process proceeds to the next process. Next, in step 1753, the CPU determines whether or not it is a re-game operation based on the data in the first ROM / RWM area. In the case of No in step 1753, in step 1754, the CPU reads the number of game medals based on the data in the first ROM / RWM area, and checks whether or not there is a game medal number. In step 1755, the CPU determines whether or not there is a game medal (a game medal that is bet) to be used for a game based on the data in the first ROM / RWM area. In the case of Yes in step 1755, in step 1756, the CPU executes a blocker-off process based on the data in the first ROM / RWM area. Next, in step 1758, the CPU executes control command set processing based on the data in the first ROM / RWM area. Next, in step 1759, the CPU executes a game medal reading process (a process for checking the number of game medals) based on the data in the first ROM / RWM area. Next, in step 1800, the CPU executes a game medal payout process, which will be described later, based on the data in the first ROM / RWM area. Next, in step 1760, the CPU executes a game medal reading process (a process for checking whether or not there is a game medal number) based on the data in the first ROM / RWM area. Next, in step 1761, the CPU subtracts 1 from the number of game medals bet based on the data in the first ROM / RWM area. Next, in step 1450, the CPU executes the aforementioned input number display data generation process based on the data in the first ROM / RWM area. Next, in Step 1762, the CPU determines whether or not the settlement of the betting game medals has been completed based on the data in the first ROM / RWM area. In the case of No in step 1762, the process proceeds to step 1759, and the processing of step 1759 to step 1762 is repeatedly executed until the settlement of game medals is completed.

  If Yes in step 1753 or No in step 1755, the CPU obtains the stored number data based on the data in the first ROM / RWM area and checks whether there is a stored number in step 1763. . Next, in step 1764, it is determined whether there is a stored medal (number of credits). In the case of Yes in Step 1764, in Step 1765, the CPU executes a blocker off process based on the data in the first ROM / RWM area. Next, in Step 1766, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in step 1767, the CPU lights up the effect display LED based on the data in the first ROM / RWM area. On the other hand, if No in step 1764, the process proceeds to the next process. Next, in step 1768, the CPU obtains the stored number data based on the data in the first ROM / RWM area, and checks whether there is a stored number. Next, in step 1800, the CPU executes a game medal payout process, which will be described later, based on the data in the first ROM / RWM area. Next, in step 1769, the CPU subtracts 1 from the stored number data based on the data in the first ROM / RWM area. Next, in step 1770, the CPU determines whether the settlement of the stored medals has been completed based on the data in the first ROM / RWM area. In the case of No in step 1770, the process proceeds to step 1768, and the processing of step 1768 to step 1770 is repeatedly executed until the settlement of the stored medal (number of credits) is completed. On the other hand, if Yes in step 1770, in step 1772, the CPU turns off the effect display LED based on the data in the first ROM / RWM area, and proceeds to step 1774. Further, in the case of Yes in step 1762, that is, in the case where the settlement of the betting game medal is completed, the process also proceeds to step 1774. Next, in step 1774, the CPU sets an output request at the end of payment based on the data in the first ROM / RWM area. Next, in step 1776, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area, executes a blocker-on process, and proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 35 is a flowchart of one game medal payout process according to the subroutine of step 1800 in FIG. First, in step 1802, the CPU saves data relating to the remaining payout number based on the data in the first ROM / RWM area. Next, in step 1804, the CPU sets error not detected based on the data in the first ROM / RWM area. Next, in step 1806, based on the data in the first ROM / RWM area, the CPU determines the HP error {the error described above in (2-1) to (2-3) in FIG. Or, an error that occurs when a game medal stays in the second payout sensor} is set. Next, in step 1808, the CPU determines whether an error has been detected based on the data in the first ROM / RWM area. In the case of Yes in step 1808, in step 1650, the CPU executes the error display process described above based on the data in the first ROM / RWM area, and proceeds to step 1810. On the other hand, in the case of No in step 1808, the process proceeds to step 1810 without executing the process in step 1650.

  Next, in step 1810, the CPU sets a game medal payout device control time based on the data in the first ROM / RWM area. Next, in Step 1812, the CPU turns on the hopper motor drive signal based on the data in the first ROM / RWM area, and proceeds to Step 1814. Next, in step 1814, the CPU determines whether or not the game medal payout device control time has elapsed based on the data in the first ROM / RWM area. In the case of No in Step 1814, in Step 1816, the CPU determines whether or not the first payout sensor signal is on based on the data in the first ROM / RWM area. In the case of No in Step 1816, the process proceeds to Step 1814, and the processing of Step 1814 to Step 1816 is repeatedly executed until the first payout sensor signal is turned on or the game medal payout device control time elapses. Next, in Step 1818, the CPU sets the first payout sensor detection time based on the data in the first ROM / RWM area.

  Next, in step 1820, the CPU determines whether or not a game medal clogging has been detected based on the data in the first ROM / RWM area. In the case of No in Step 1820, in Step 1822, the CPU determines whether or not the second payout sensor signal is on based on the data in the first ROM / RWM area. In the case of Yes in Step 1822, in Step 1823, the CPU sets the second payout sensor 2 detection time based on the data in the first ROM / RWM area. On the other hand, in the case of No in step 1822, the process proceeds to step 1820, and the processing of step 1820 to step 1823 is repeatedly executed until the second payout sensor signal is turned on or a game medal jam is detected.

  Next, in Step 1824, the CPU determines whether or not a game medal clogging is detected based on the data in the first ROM / RWM area. In the case of No in Step 1824, in Step 1825, the CPU determines whether or not the second payout sensor signal is OFF based on the data in the first ROM / RWM area. In the case of Yes in Step 1825, in Step 1826, the CPU determines whether or not the payout of the game medal is invalid based on the data in the first ROM / RWM area. In the case of No in step 1826, in step 1827, the CPU determines whether or not the first payout sensor signal is off based on the data in the first ROM / RWM area. If YES in step 1827, data relating to the remaining payout number saved in step 1802 is restored in step 1828. If NO in step 1825 or step 1827, the process proceeds to step 1824, and the processing of step 1824 to step 1827 is repeatedly executed until the first payout sensor and the second payout sensor are turned off. Further, if Yes in step 1820 or step 1824, the process proceeds to step 1806. On the other hand, if Yes in step 1826, the process proceeds to step 1814.

  Next, in Step 1829, the CPU subtracts 1 from the remaining payout number based on the data in the first ROM / RWM area. Next, in step 1830, the CPU determines whether or not the game medals have been paid out based on the data in the first ROM / RWM area. In the case of Yes in Step 1830, in Step 1831, the CPU turns off the hopper motor drive signal based on the data in the first ROM / RWM area, and proceeds to the next processing. On the other hand, also in the case of No in step 1830, the process proceeds to the next process.

  If Yes in step 1814, that is, if the game medal payout device control time has elapsed, in step 1832 the CPU turns off the hopper motor drive signal based on the data in the first ROM / RWM area. Next, in step 1833, the CPU sets the first payout sensor detection time based on the data in the first ROM / RWM area, and proceeds to step 1834. Next, in Step 1834, the CPU determines whether or not the first payout sensor signal is on based on the data in the first ROM / RWM area. In the case of No in Step 1834, in Step 1836, the CPU determines whether or not the first payout sensor detection time has elapsed based on the data in the first ROM / RWM area. In the case of Yes in Step 1836, in Step 1838, the CPU sets an HE error (an error when it is determined that the game medal in the medal payout device H is empty) based on the data in the first ROM / RWM area. The process proceeds to the next process. On the other hand, in the case of No in Step 1836, the process proceeds to Step 1834, and the processing of Step 1834 to Step 1836 is repeatedly executed until the signal of the first payout sensor is turned on or the first payout sensor detection time elapses. . On the other hand, if Yes in step 1834, the process proceeds to step 1810.

<Processing in the first ROM / RWM area>
Next, FIG. 36 is a flowchart of the start lever check process according to the subroutine of step 1850 in FIG. First, in step 1900, the CPU executes an input / discharge sensor abnormality display process, which will be described later, based on the data in the first ROM / RWM area. Next, in Step 1851, the CPU compares the game medal limit number (three) with the inserted number based on the data in the first ROM / RWM area, and checks whether the game medal is the limit. Next, in step 1852, the CPU determines whether or not the prescribed numbers match based on the data in the first ROM / RWM area. In the case of Yes in Step 1852, in Step 1854, the CPU determines whether or not the monitoring time at the blocker ON has elapsed based on the data in the first ROM / RWM area. If No in step 1854, the game start display LED signal is turned off in step 1856, and the process proceeds to the next process.

  On the other hand, in the case of Yes in step 1854, in step 1858, the CPU turns on the game start display LED signal based on the data in the first ROM / RWM area. Next, in Step 1860, the CPU obtains input port 1 rising data based on the data in the first ROM / RWM area. Next, in Step 1862, the CPU determines whether or not the start lever sensor signal is on based on the data in the first ROM / RWM area. In the case of Yes in step 1862, the process proceeds to a start lever reception process in step 2050 described later. On the other hand, in the case of No in step 1852 or step 1862, the process proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 37 is a flowchart of the input / output sensor abnormality display processing according to the subroutine of step 1900 in FIG. In step 1902, the CPU prohibits interruption based on the data in the first ROM / RWM area. Next, in step 1904, the CPU saves the AF register based on the data in the first ROM / RWM area. Next, the CPU executes a loading / dispensing sensor abnormality setting process, which will be described later, based on the data in the second ROM / RWM area. Next, in step 1906, the CPU restores the AF register saved in the first stack area in step 1904 based on the data in the first ROM / RWM area. Next, in step 1908, the CPU permits an interrupt based on the data in the first ROM / RWM area. Next, in step 1910, the CPU acquires error display request data based on the data in the first ROM / RWM area. Next, in step 1912, the CPU determines whether there is error display request data based on the data in the first ROM / RWM area. In the case of No in step 1912, in step 1650, an error display process described later is executed.

  Next, in step 1914, the CPU prohibits interruption based on the data in the first ROM / RWM area. Next, in step 1916, the CPU saves the AF register (eg, saves to the first stack area) based on the data in the first ROM / RWM area. Next, in step 5150, the CPU executes an input / withdrawal sensor abnormality clear process, which will be described later, based on the data in the first ROM / RWM area. Next, in step 1920, the CPU restores the AF register saved in step 1916 based on the data in the first ROM / RWM area. Next, in step 1922, the CPU permits an interrupt based on the data in the first ROM / RWM area, and shifts to the processing in step 1902. That is, there is no error display request data (that is, Yes in step 1912). The process is repeated until In the case of Yes in step 1912, the process proceeds to the next process (the process of step 1950). As described above, in the present embodiment, in the processing after the interrupt activation processing is executed in the processing of step 1113 or step 3012, an interrupt is issued when calling the processing of the second ROM / RWM area in the main loop processing. It is configured to be called after prohibition. With this configuration, the interrupt process is not executed during the execution of the second ROM / RWM process, and the process of the first ROM / RWM area is executed after the process of the second ROM / RWM area is executed. In this case, the second stack area can always be in a state where data is not stacked (although the address of the second stack area can always be in the state of “F3FFH”). With this configuration, an interrupt process occurs during the execution of the second ROM / RWM area process, and data is accumulated in the second stack area (for example, the address of the second stack area is “F3F8H”). In such a case, it is possible to prevent a situation in which data is accumulated again in the second stack area by processing in the second ROM / RWM area in the interrupt processing, and complicated processing is not executed. In addition, the maximum usage amount of the second stack area can be reduced.

<Processing in the second ROM / RWM area>
FIG. 38 is a flowchart of the input / withdrawal sensor abnormality setting process according to the processing subroutine of step 5100 in FIG. First, in step 5102, the CPU saves the stack pointer in the second RWM area based on the data in the second ROM / RWM area. Next, in step 5104, the CPU sets the address of the second stack area in the stack pointer based on the data in the second ROM / RWM area. Next, in step 5106, the CPU saves the register in the second stack area based on the data in the second ROM / RWM area. Next, in step 5108, the CPU sets a CH error display request based on the data in the second ROM / RWM area.

  Next, in step 5110, the CPU determines whether or not a CH error (an error when it is determined that a game medal has accumulated in the insertion acceptance sensor D10s) is detected based on the data in the second ROM / RWM area. . In the case of No in step 5110, in step 5112, the CPU clears the error display request based on the data in the second ROM / RWM area, and proceeds to step 5114. On the other hand, also in the case of Yes in step 5110, the process proceeds to step 5114. Next, in Step 5114, the CPU stores error display request data based on the data in the second ROM / RWM area. Next, in step 5116, the CPU restores the register saved in the second stack area in step 5106 based on the data in the second ROM / RWM area. Next, in step 5118, the CPU restores the stack pointer saved in the second RWM area based on the data in the second ROM / RWM area, and proceeds to the next processing.

<Processing in the second ROM / RWM area>
Next, FIG. 39 is a flowchart of the input / withdrawal sensor abnormality clearing process according to the processing subroutine of step 5150 in FIG. First, in step 5152, the CPU saves the stack pointer to the second RWM area based on the data in the second ROM / RWM area. Next, in Step 5154, the CPU sets the address of the second stack area to the stack pointer based on the data in the second ROM / RWM area. Next, in step 5156, the CPU saves the register in the second stack area based on the data in the second ROM / RWM area. Next, in step 5158, the CPU sets an error detection flag based on the data in the second ROM / RWM area.

  Next, in step 5160, based on the data in the second ROM / RWM area, the CPU determines whether there is a display request for a CH error (an error when it is determined that a game medal has accumulated in the insertion acceptance sensor D10s). to decide. In the case of Yes in Step 5160, in Step 5162, the CPU clears the CH error detection flag based on the data in the second ROM / RWM area, and proceeds to Step 5164. On the other hand, also in the case of No in step 5160, the process proceeds to step 5164. Next, in step 5164, the CPU restores the register saved in the second stack area in step 5156 based on the data in the second ROM / RWM area. Next, in step 5166, the CPU restores the stack pointer saved in the second RWM area in step 5152 based on the data in the second ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 40 is a flowchart of the overflow display process according to the subroutine of step 1950 in FIG. First, in step 1952, the CPU determines whether or not the input acceptance sensor residence time has elapsed based on the data in the first ROM / RWM area. In the case of Yes in step 1952, in step 1954, the CPU confirms whether there is an overflow display based on the data in the first ROM / RWM area. In the case of Yes in step 1954, in step 1956, the CPU sets an FE error (error when it is determined that the game medal auxiliary storage is full) based on the data in the first ROM / RWM area, and the next Transition to processing. Also, if the answer is No in step 1952 or step 1954, the process proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 41 is a flowchart of the start lever receiving process according to the spinning cylinder game machine in the present embodiment. First, in step 2052, the CPU fetches the built-in random number into the random value register based on the data in the first ROM / RWM area. Next, in Step 2053, the CPU turns off the game start display LED signal based on the data in the first ROM / RWM area. Next, in step 2054, the CPU turns off the setting change flag based on the data in the first ROM / RWM area. Next, in step 2055, the CPU executes blocker off processing (processing for turning off the blocker) based on the data in the first ROM / RWM area. Next, in step 2056, the CPU executes a game medal reading process based on the data in the first ROM / RWM area. Next, in step 2058, the CPU doubles the number of game medals based on the data in the first ROM / RWM area.

  Next, in step 2060, the CPU prohibits interruption based on the data in the first ROM / RWM area. Next, in step 2062, the CPU sets the number of medal insertion signal outputs based on the data in the first ROM / RWM area. Next, in step 2064, the CPU turns off the re-gaming state identification information flag based on the data in the first ROM / RWM area. Next, in Step 2066, the CPU sets an output request at the time of accepting the rotation start of the rotating cylinder based on the data in the first ROM / RWM area. Next, in step 2067, the CPU executes control command generation processing based on the data in the first ROM / RWM area. Next, in step 2068, the CPU sets the start lever reception based on the data in the first ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 42 is a flowchart of the internal lottery start process according to the subroutine of step 2100 in FIG. First, in Step 2102, the CPU reads a random number value (RLOSV) based on the data in the first ROM / RWM area. Next, in step 2104, the CPU acquires a random number for internal random number processing based on the data in the first ROM / RWM area. Next, in step 2106, the CPU adds a random value based on the data in the first ROM / RWM area. Next, in step 2108, the CPU sets an internal lottery random number based on the data in the first ROM / RWM area. Next, in step 2110, the CPU sets a condition device number 6 for winning and replaying based on the data in the first ROM / RWM area (which is only an example and is not limited to the condition device number 6). Next, in step 2112, the CPU sets the internal lottery selection table 1 (which is only an example and is not limited to the internal lottery selection table 1) based on the data in the first ROM / RWM area. Next, in step 2113, the CPU executes a table selection process (a process of acquiring a table address specified by an offset value) based on the data in the first ROM / RWM area. Next, in step 2114, the CPU executes a lottery determination based on the data in the first ROM / RWM area.

  Next, in step 2116, the CPU determines whether or not the lottery determination in step 2114 has been won based on the data in the first ROM / RWM area. In the case of No in step 2116, in step 2118, the CPU is based on the data in the first ROM / RWM area, and the condition device number 23 for winning and replaying is merely an example, and is not limited to the condition device number 23 only. Set. Next, in step 2120, the CPU sets an internal lottery table 09 (which is only an example and is not limited to the internal lottery table 09) based on the data in the first ROM / RWM area. Next, in Step 2122, the CPU acquires the operation type based on the data in the first ROM / RWM area. Next, in step 2124, the CPU determines whether or not the bonus is not operating based on the data in the first ROM / RWM area. In the case of No in step 2124, in step 2125, the CPU sets the internal lottery selection table 3 (only an example and not limited to the internal lottery selection table 3) based on the data in the first ROM / RWM area. . Next, in step 2126, the CPU executes an internal lottery table setting process based on the data in the first ROM / RWM area, and proceeds to step 2128. On the other hand, also in the case of Yes in step 2124, the process proceeds to step 2128.

  Next, in step 2128, the CPU executes a lottery determination based on the data in the first ROM / RWM area, and proceeds to step 2150. Also in the case of Yes in step 2116, the process proceeds to step 2150. Next, in step 2150, the CPU executes lottery determination based on the data in the first ROM / RWM area, and executes conditional device command set processing. In the conditional device command set process, the symbol stop signal output process of step 5200, which is the process of the second ROM / RWM area, is executed.

<Processing in the second ROM / RWM area>
Next, FIG. 43 is a flowchart of the symbol stop signal output process according to the subroutine of step 5200 in FIG. First, in step 5202, the CPU saves the stack pointer in the second RWM area based on the data in the second ROM / RWM area. Next, in step 5204, the CPU sets the address of the second stack area to the stack pointer based on the data in the second ROM / RWM area. Next, in step 5206, the CPU saves the register in the second stack area based on the data in the second ROM / RWM area. Next, in step 5208, the CPU sets the SCU1 data register based on the data in the second ROM / RWM area. Next, in step 5210, the CPU writes the first command (rotation information designation) based on the data in the second ROM / RWM area. Next, in step 5212, the CPU writes a second command (rotation information designation) based on the data in the second ROM / RWM area. Next, in step 5250, a symbol stop signal setting process described later is executed. Next, in step 5214, the CPU sets the number of transmissions and the first command (push order designation) data based on the data in the second ROM / RWM area.

  Next, in Step 5216, the CPU writes the first command based on the data in the second ROM / RWM area. Next, in Step 5218, the CPU acquires the second command data from the stop acceptance designation table based on the data in the second ROM / RWM area. Next, in Step 5220, the CPU writes the second command based on the data in the second ROM / RWM area. Next, in step 5222, the CPU sets the next first command data based on the data in the second ROM / RWM area. Next, in step 5224, the CPU sets the next table address based on the data in the second ROM / RWM area.

  Next, in Step 5226, the CPU determines whether or not the transmission of the command data is completed based on the data in the second ROM / RWM area. If Yes in step 5226, the process proceeds to step 5228. On the other hand, in the case of No in step 5226, the processing of step 5216 to step 5224 is repeatedly executed until the transmission of command data is completed. Next, in step 5228, the CPU restores the register saved in the second stack area in step 5206 based on the data in the second ROM / RWM area. Next, in step 5230, the CPU returns the stack pointer saved in the second RWM area in step 5202 based on the data in the second ROM / RWM area, and returns to the caller of the first ROM / RWM.

<Processing in the second ROM / RWM area>
Next, FIG. 44 is a flowchart of the symbol stop signal setting process according to the subroutine of step 5250 in FIG. First, in step 5252, the CPU acquires an instruction number based on the data in the second ROM / RWM area. The instruction number is information relating to the order of pressing. In this example, the main control board M is determined and transmitted to the sub control board S. Next, in step 5254, the CPU sets the stop acceptance designation table 3 (which is only an example and is not limited to the stop acceptance designation table 3) based on the data in the second ROM / RWM area. Next, in Step 5256, the CPU determines whether or not it is a bonus operation based on the data in the second ROM / RWM area. In the case of No in step 5256, in step 5258, the CPU sets the stop acceptance designation table 1 (only an example, and not limited to the stop acceptance designation table 1) based on the data in the second ROM / RWM area. . Next, in step 5260, the CPU determines whether or not the bonus condition device number is 0 based on the data in the second ROM / RWM area. In the case of No in Step 5260, in Step 5262, the CPU sets the condition device number inspection table 1 based on the data in the second ROM / RWM area. Next, in step 5264, the CPU determines whether or not the bonus condition device number is 1 based on the data in the second ROM / RWM area. In the case of No in Step 5264, in Step 5266, the CPU sets the conditional device number inspection table 2 based on the data in the second ROM / RWM area. Next, in step 5268, the CPU determines whether or not the bonus condition device number is 2 based on the data in the second ROM / RWM area. In the case of No in step 5268, in step 5270, the CPU sets the conditional device number inspection table 3 based on the data in the second ROM / RWM area. Next, in step 5272, the CPU determines whether or not the bonus condition device number is 3 based on the data in the second ROM / RWM area. In the case of No in step 5272, in step 5274, the CPU sets the conditional device number inspection table 4 based on the data in the second ROM / RWM area, and proceeds to step 5276. Also in the case of Yes in steps 5264, 5268, or 5272, the process proceeds to step 5276. Note that the bonus condition device number and the number in the condition device number inspection table in steps 5260 to 5276 are merely examples, and there is no problem even if they are changed.

  Next, in Step 5276, the CPU obtains a condition device number for winning and replaying based on the data in the second ROM / RWM area. Next, in Step 5278, the CPU acquires the number of inspections based on the data in the second ROM / RWM area. Next, in Step 5280, the CPU obtains inspection data and an offset value based on the data in the second ROM / RWM area. Next, in step 5282, the CPU determines whether or not the inspection data match based on the data in the second ROM / RWM area. In the case of No in Step 5282, in Step 5284, the CPU determines whether or not the number of inspections is 0 based on the data in the second ROM / RWM area. If Yes in step 5284, an offset value is generated in step 5286, and the process proceeds to step 5288. On the other hand, in the case of Yes in 5282, the processing proceeds to step 5288 without executing the processing in steps 5284 and 5286. On the other hand, in the case of No in step 5284, the process proceeds to step 5280.

  Next, in step 5288, the CPU sets an offset value based on the data in the second ROM / RWM area. Next, in step 5290, the CPU sets a stop acceptance designation table 2 (an example only and is not limited to the stop acceptance designation table 2) based on the data in the second ROM / RWM area. Transition. Also in the case of Yes in step 5256 or step 5260, the process proceeds to step 5292. Next, in step 5292, the CPU sets a stop acceptance designation table corresponding to the offset value based on the data in the second ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 45 is a flowchart of the symbol stop signal setting process according to the subroutine of step 2150 in FIG. It is a flowchart of a condition device command set process related to the spinning cylinder game machine in the present embodiment. First, in step 2152, the CPU sets an instruction number output request based on the data in the first ROM / RWM area. Next, in step 2153, the CPU executes control command generation processing for the designated RWM data based on the data in the first ROM / RWM area. Next, in step 2154, the CPU sets an output request for the production group based on the data in the first ROM / RWM area. Next, in step 2155, the CPU executes control command generation processing for the designated RWM data based on the data in the first ROM / RWM area. Next, in step 2156, the CPU sets an output request for the accessory condition device number based on the data in the first ROM / RWM area. Next, in Step 2158, the CPU executes a control command set process for the designated RWM data based on the data in the first ROM / RWM area, and proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 46 is a flowchart of the rotation rotation start process according to the subroutine of step 2200 in FIG. First, in step 2201, the CPU executes a standby effect execution process based on the data in the first ROM / RWM area. The standby effect is an effect that is executed when the operation of the start lever is accepted and the minimum game time has not elapsed. Next, in step 2202, the CPU determines whether or not the standby effect 1 execution flag is on based on the data in the first ROM / RWM area. In the case of Yes in step 2202, in step 2204, the CPU sets the standby effect 1 standby time based on the data in the first ROM / RWM area. Next, in step 2205, the CPU executes a 2-byte time waiting process that waits until the designated waiting time becomes 0, based on the data in the first ROM / RWM area, and proceeds to the process in step 2206. . On the other hand, also in the case of No in step 2202, the process proceeds to step 2206. Next, in step 2206, the CPU determines whether or not the minimum game time has elapsed based on the data in the first ROM / RWM area. The minimum game time is the minimum period from the reel rotation start timing related to a certain game to the reel rotation start timing related to the next game of the certain game, even if the operation of the start lever is accepted. If the minimum game time has not elapsed, the reel does not start rotating until the minimum game time has elapsed. In the case of Yes in step 2206, in step 2208, the CPU stores the minimum game time based on the data in the first ROM / RWM area. On the other hand, in the case of No in step 2206, the process of step 2206 is repeatedly executed until the minimum game time has elapsed. Next, in step 2210, the CPU stores the condition device output time based on the data in the first ROM / RWM area. Next, in step 2212, the CPU executes a command transmission waiting process that waits until the control command has been transmitted based on the data in the first ROM / RWM area, and proceeds to the next process (the process of step 2250). Transition.

<Processing in the first ROM / RWM area>
Next, FIG. 47 is a flowchart of the rotation rotation start process according to the subroutine of step 2250 in FIG. First, in step 2252, the CPU initializes the rotation stop order data and the push order data based on the data in the first ROM / RWM area. Next, in Step 2254, the CPU initializes the rotation stop flag and the shift frame number creation request based on the data in the first ROM / RWM area. Next, in step 2256, the CPU sets the number of initialization symbol groups based on the data in the first ROM / RWM area. Next, in step 2258, the CPU sets a symbol control data table based on the data in the first ROM / RWM area. Next, in step 2260, the CPU sets an initialization start RWM address based on the data in the first ROM / RWM area. Next, in step 2262, the CPU initializes stop symbol data based on the data in the first ROM / RWM area. In this manner, the RWM area initialization necessary for the symbol control related to the previous game is executed by the processing from step 2252 to step 2262. Next, in step 2264, the CPU sets an output request at the start of all-reel rotation based on the data in the first ROM / RWM area. Next, in Step 2265, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in step 2266, the CPU sets all the reel rotation bits and the rotation start preparation state based on the data in the first ROM / RWM area. Next, in step 2268, the CPU sets the presence of a rotation start reel based on the data in the first ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 48 is a flowchart of the spinning cylinder stop acceptance check process according to the subroutine of step 2300 in FIG. First, in step 2302, the CPU checks all reel sensors based on the data in the first ROM / RWM area. Next, in Step 2304, the CPU determines whether or not the stop acceptance is possible based on the data in the first ROM / RWM area. In the case of Yes in step 2304, in step 2306, based on the data in the first ROM / RWM area, the CPU waits for the stop reception (from the previous stop button operation reception to the next stop button operation reception described above). It is determined whether or not (waiting time) has elapsed. In the case of Yes in step 2306, in step 2308, the CPU acquires the rising data of input port 1 based on the data in the first ROM / RWM area. Next, in step 2310, the CPU generates stop button sensor signal rise data of the rotating reel based on the data in the first ROM / RWM area. Next, in step 2312, the number of reels (3 in this example) and the first reel bit are set, and the process proceeds to step 2314.

  Next, in step 2314, the CPU determines whether a stop button sensor signal corresponding to any of the rotating reels has risen (turned on) based on the data in the first ROM / RWM area. . In the case of Yes in step 2314, the process proceeds to the stop button reception process in step 2350. On the other hand, in the case of No in step 2314, in step 2316, the CPU sets the next spinning bit (reel bit) based on the data in the first ROM / RWM area. Next, in Step 2318, the CPU determines whether or not the stop of all reels has been received based on the data in the first ROM / RWM area. In the case of No in step 2318, the process proceeds to step 2314, and the processing of step 2314 to step 2318 is repeatedly executed until stop reception of all reels is completed. On the other hand, in the case of Yes in step 2318, in step 2320, the CPU obtains a rotation stop flag (reel stop flag) based on the data in the first ROM / RWM area. Next, in step 2322, the CPU stores the stop acceptance information data based on the data in the first ROM / RWM area, and proceeds to the next processing. In the case of No in step 2304 or step 2306, that is, when it is impossible to accept the stop of the reel or when the stop acceptance waiting time has not elapsed, the process proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 49 is a flowchart of stop button reception processing according to the subroutine of step 2350 in FIG. First, in step 2352, the CPU newly sets a reel stop acceptance waiting time based on the data in the first ROM / RWM area. Next, in step 2354, the CPU clears the stop acceptance information data based on the data in the first ROM / RWM area. Next, in step 2356, the CPU stores a reel stop flag based on the data in the first ROM / RWM area. Next, in step 2358, the CPU refers to the reel stop flag stored in step 2356 based on the data in the first ROM / RWM area, and stores the shift frame number creation request. Next, in Step 2360, the CPU generates a stop reel number based on the data in the first ROM / RWM area. Next, in step 2362, the CPU stores the stop reel number generated in step 2360 based on the data in the first ROM / RWM area. Next, in step 2364, the CPU adds 1 to the reel stop order data based on the data in the first ROM / RWM area, and proceeds to step 2366. Next, in step 2366, the CPU bit-shifts the stop rotation number in accordance with the reel stop order data based on the data in the first ROM / RWM area. Next, in Step 2368, the CPU determines whether or not the bit shift is completed based on the data in the first ROM / RWM area. In the case of No in step 2368, the processing from step 2366 to step 2368 is repeatedly executed until the bit shift is completed. On the other hand, in the case of Yes in step 2368, in step 2370, the CPU generates push order data based on the data in the first ROM / RWM area. Next, in step 2372, the CPU stores the pressing order data generated in step 2370 based on the data in the first ROM / RWM area, and proceeds to the next processing.

<Processing in the first ROM / RWM area>
Next, FIG. 50 is a flowchart of the all-round cylinder stop check process according to the subroutine of step 2400 in FIG. First, in step 2402, the CPU checks whether or not the operation of the stop button and the start lever has been completed based on the data in the first ROM / RWM area. In step 2404, the CPU checks whether all reels have stopped based on the data in the first ROM / RWM area, and proceeds to the next process.

<Processing in the first ROM / RWM area>
Next, FIG. 51 is a flowchart of display determination processing according to the subroutine of step 2450 in FIG. First, in step 2451, the CPU executes an acquired number display clear process based on the data in the first ROM / RWM area. Next, in step 2452, the CPU sets the RWM address of the stop symbol data 1 based on the data in the first ROM / RWM area. Next, in step 2454, the CPU sets the number of control symbol groups and the RWM address of kick symbol data 1 based on the data in the first ROM / RWM area. Next, in step 2546, the CPU sets an E5 error (error when the symbol combination display is abnormal when all reels are stopped) based on the data in the first ROM / RWM area, and proceeds to step 2458.

  Next, in Step 2460, the CPU determines whether or not the kicked symbol is displayed based on the data in the first ROM / RWM area. In the case of Yes in step 2460, that is, in the case where the symbol combination set in the symbol data that is kicked on the active line is displayed, the process proceeds to a non-recoverable error in step 1200. On the other hand, in the case of No in step 2460, in step 2462, the CPU sets the next stop symbol data address based on the data in the first ROM / RWM area. Next, in step 2464, the CPU sets the next kick symbol data address based on the data in the first ROM / RWM area. Next, in step 2466, the CPU determines whether or not the determination of the same number of times as the number of control symbol groups has ended based on the data in the first ROM / RWM area. In the case of No in step 2466, the process proceeds to step 2458, and the processing of step 2458 to step 2466 is repeatedly executed until the determination of the same number of times as the number of control symbol groups is completed. On the other hand, if Yes in step 2466, the one-line display determination process in step 2468 is executed. In addition, the above-mentioned insertion / withdrawal sensor abnormality display processing is executed in the one-line display determination processing.

<Processing in the first ROM / RWM area>
Next, FIG. 52 is a flowchart of the game medal payout process by winning according to the subroutine of step 2500 in FIG. First, in step 2502, the CPU sets an output request at the start of paying out a game medal based on data in the first ROM / RWM area. Next, in step 2503, the CPU executes control command generation processing for the data in the designated RWM area based on the data in the first ROM / RWM area. Next, in Step 2504, the CPU acquires game medal payout number data based on the data in the first ROM / RWM area. Next, in step 2505, the CPU sets the number of updates based on the data in the first ROM / RWM area. Next, in step 2506, the CPU determines whether or not the re-game operation symbol is displayed based on the data in the first ROM / RWM area. If YES in step 2506, a game medal reading process is executed in step 2507, and the process proceeds to step 2508. On the other hand, in the case of No in step 2506, the process proceeds to step 2508 without executing the process in step 2507.

  Next, in step 2508, the CPU sets the game medal number data × 2 based on the data in the first ROM / RWM area. Next, in step 2510, the CPU prohibits interruption based on the data in the first ROM / RWM area. Next, in step 2512, the CPU stores the number of outputs of the medal payout signal based on the data in the first ROM / RWM area. Next, in step 2514, the CPU permits an interrupt based on the data in the first ROM / RWM area. Next, in step 2516, the CPU determines whether or not a game medal has been paid out based on the data in the first ROM / RWM area. In the case of Yes in step 2516, in step 2518, the CPU refers to the game medal payout number based on the data in the first ROM / RWM area and subtracts the number that can be acquired at the time of BB operation. On the other hand, in the case of No in step 2516, the process proceeds to the next process. Next, in step 2520, the CPU determines whether or not the number of updates related to subtraction of the BB obtainable number has ended based on the data in the first ROM / RWM area. In the case of No in step 2520, the processing of step 2518 to step 2520 is repeatedly executed until the number of updates is completed. On the other hand, in the case of Yes in step 2520, in step 2521, the CPU executes the stored number reading process based on the data in the first ROM / RWM area. Next, in step 2522, the CPU determines whether or not the number of game medals is limited based on the data in the first ROM / RWM area, in other words, whether or not the credit is 50, which is the upper limit value. judge.

  In the case of No in step 2522, in step 2524, the CPU sets an addition waiting time related to credit addition based on the data in the first ROM / RWM area. In the present embodiment, when game medals are stored in credits, the credits are added at intervals of 197.81 ms. Next, in step 2525, the CPU executes a 2-byte time waiting process based on the data in the first ROM / RWM area. Next, in step 2526, the CPU executes a process for adding one stored sheet based on the data in the first ROM / RWM area, and proceeds to step 2532.

  In the case of Yes in step 2522, in step 2528, the CPU acquires game medal payout number data based on the data in the first ROM / RWM area. Next, in step 1800, the CPU executes the above-described game medal payout process based on the data in the first ROM / RWM area, and proceeds to step 2532.

  Next, in Step 2532, the CPU adds 1 to the acquired number data (data related to the acquired game medal) based on the data in the first ROM / RWM area. Next, in step 2534, the CPU subtracts 1 from the game medal payout data (data relating to the number of game medals to be paid out) based on the data in the first ROM / RWM area. Next, in step 2536, the CPU determines whether or not the payout of the game medal related to the current winning is completed based on the data in the first ROM / RWM area. In the case of Yes in step 2536, in step 2538, the CPU sets an output request at the end of game medal payout based on the data in the first ROM / RWM area. Next, in Step 2540, the CPU executes a control command set process for the data in the designated RWM area based on the data in the first ROM / RWM area, and proceeds to the next process. In the case of No in step 2536, that is, if the payout of the game medal related to the current winning is not completed, the process proceeds to step 2521 and steps 2521 to 2536 are performed until the payout related to the current winning is completed. This process is repeatedly executed.

<Processing in the first ROM / RWM area>
Next, FIG. 53 is a flowchart of interrupt processing in the spinning cylinder gaming machine according to the present embodiment. Note that the processing of FIGS. 53 to 69 is a flowchart of interrupt processing. In the present embodiment, the process in the first ROM / RWM area is executed when the interrupt process starts (when the interrupt process occurs). First, in step 2552, the CPU saves the register as processing at the start of interrupt based on the data in the first ROM / RWM area. Next, in step 2554, the CPU clears the interrupt flag based on the data in the first ROM / RWM area. Next, in step 2600, the CPU executes a power-off process described later based on data in the first ROM / RWM area. Next, in step 2556, the CPU updates the interrupt counter based on the data in the first ROM / RWM area. Next, in step 2558, the CPU executes input port data generation processing based on the data in the first ROM / RWM area. Here, the input port data includes the settlement button D60, the start lever D50, the stop button D40, the door switch D80, the setting door switch M10, the setting key switch M20, the setting / reset button M30, the closing reception sensor D10s, and the first closing sensor. D20s, the second input sensor D30s, the first payout sensor H10s, the second payout sensor H20s, etc. (that is, the presence / absence of operation on these operation members and the sensor detection state are sampled at the interrupt interval T). )

  Next, the processing from step 2560 to step 2564 is the rotating drum drive management processing in the interrupt processing. First, in step 2560, the CPU sets the number of revolutions (the number of reels, 3 in this example) based on the data in the first ROM / RWM area, and proceeds to step 2561. Next, in Step 2561, a rotating drum drive control data address setting process is executed. Next, in Step 2562, the CPU executes a rotating drum drive control process (reel drive control) based on the data in the first ROM / RWM area. Next, in step 2564, the CPU determines based on the data in the first ROM / RWM area whether the control of all the cylinders is completed, that is, whether the rotation of all the reels is completed. In the case of Yes in step 2564, the process proceeds to step 2566, and in the case of No, the processes of steps 2561 to 2564 are repeatedly executed until the rotation of all reels is completed.

  Next, the processing of step 2566 to step 2572 is port output processing in interrupt processing. First, in Step 2566, the CPU generates data of the output port 0 based on the data in the first ROM / RWM area. Next, in Step 2568, the CPU outputs the data generated in Step 2566 to the output port 0 based on the data in the first ROM / RWM area. Next, in Step 2570, the CPU generates data of the output port 1 based on the data in the first ROM / RWM area. Next, in step 2572, the CPU outputs the data generated in step 2570 to the output port 1 based on the data in the first ROM / RWM area, and proceeds to step 2574.

  Next, the processing from step 2574 to step 2594 is control command transmission processing in interrupt processing. First, in step 2574, the CPU sets a control command buffer address based on the data in the first ROM / RWM area. Next, in step 2574, the CPU obtains a control command read pointer based on the data in the first ROM / RWM area. Next, in step 2578, the CPU sets a designated address based on the data in the first ROM / RWM area. Next, in step 2580, the CPU sets a transmission target control command buffer address based on the data in the first ROM / RWM area. Next, in Step 2582, the CPU determines whether there is an untransmitted control command in the control command storage buffer based on the data in the first ROM / RWM area. In the case of Yes in step 2582, in step 2584, the CPU outputs an untransmitted control command to be output this time to the output ports 7 and 8 based on the data in the first ROM / RWM area. Next, in step 2586, the CPU turns on the sub control data strobe signal based on the data in the first ROM / RWM area, and outputs the output data to the output port 2. Next, in Step 2588, the CPU clears the transmitted command storage buffer based on the data in the first ROM / RWM area. Next, in step 2590, the CPU updates the control command read pointer based on the data in the first ROM / RWM area, and proceeds to step 2592. In the case of No in step 2582, that is, when there is no untransmitted control command, the process proceeds to step 2592.

  Next, the CPU turns off the sub control data strobe signal based on the data in the first ROM / RWM area, and outputs the output data to the output port 2. Next, in step 2594, the CPU outputs control command clear data to the output ports 7 and 8 based on the data in the first ROM / RWM area, and proceeds to the LED display processing in step 2650.

<Processing in the first ROM / RWM area>
Next, FIG. 54 is a flowchart of power-off processing according to the subroutine of step 2600 in FIG. First, in step 2602, the CPU determines whether or not the previous power-off detection signal is on based on the data in the first ROM / RWM area. In the case of Yes in step 2602, in step 2604, the CPU inputs the data of the current input port 0 based on the data in the first ROM / RWM area. Next, in step 2606, the CPU determines whether or not the current power-off detection signal is on based on the data in the first ROM / RWM area. In the case of Yes in step 2606, in step 2608, the CPU sets the clear output port address and the number of output ports based on the data in the first ROM / RWM area, and proceeds to step 2610. If No in step 2602 or step 2606, that is, if any of the power-off detection signal of the previous power-off detection signal and the current power-off detection signal is off, the processing after step 2608 is executed. Without moving to the next process.

  Next, in step 2610, the CPU turns off the output ports 0 to 6 based on the data in the first ROM / RWM area. Next, in step 2612, the CPU sets the next output port address based on the data in the first ROM / RWM area. Next, in step 2614, the CPU determines whether or not output of the output data has ended based on the data in the first ROM / RWM area. In the case of No in step 2614, the process proceeds to step 2610, and the processing of step 2610 to step 2614 is repeatedly executed until the output of output data is completed. On the other hand, if Yes in step 2614, the current stack pointer is saved in step 2616. Next, in step 2618, the CPU sets a power-off process completion flag based on the data in the first ROM / RWM area. Next, in step 2620, the CPU clears the checksum data of the RWM based on the data in the first ROM / RWM area. Next, in step 2622, the CPU sets initial data for RWM checksum calculation based on the data in the first ROM / RWM area, and proceeds to step 2624. Next, in step 2624, the CPU calculates the checksum of the RWM (from “0F000H” to “0F3FFH”) based on the data in the first ROM / RWM area. Next, in step 2626, the CPU determines whether the calculation of the checksum of all bytes has been completed based on the data in the first ROM / RWM area. In the case of No in step 2626, the process proceeds to step 2624, and the processing of step 2624 to step 2626 is repeatedly executed until the checksum calculation of all bytes is completed.

  On the other hand, in the case of Yes in step 2626, in step 2628, based on the data in the first ROM / RWM area, the CPU detects error detection information based on the checksum calculated in step 2624 (for example, in the calculated checksum). Lower 1 byte or its complement) is set in the checksum area. Next, in step 2630, the CPU prohibits access to the RWM based on the data in the first ROM / RWM area. Next, in step 2632, the CPU executes an infinite loop process for waiting for reset based on the data in the first ROM / RWM area.

<Processing in the first ROM / RWM area>
Next, FIG. 55 is a flowchart of LED display processing according to the subroutine of step 2650 in FIG. First, in step 2652, the CPU turns off the LED digit and the LED segment (output ports 3 and 4) based on the data in the first ROM / RWM area. Next, in step 2654, the CPU updates the LED display counter based on the data in the first ROM / RWM area. Next, in Step 2656, the CPU determines whether or not the LED display counter is 0 based on the data in the first ROM / RWM area. In the case of Yes in step 2656, in step 2658, the CPU initializes the LED display counter based on the data in the first ROM / RWM area, and proceeds to step 2660. Note that if the result of step 2656 is No, the process proceeds to step 2660.

  Next, in step 2660, the CPU acquires an LED display counter and an LED display request flag based on the data in the first ROM / RWM area. Next, in step 2662, the CPU sets the segment display request confirmation of the digit to be displayed this time based on the data in the first ROM / RWM area. Next, in Step 2664, the CPU determines whether or not there is an LED display request based on the data in the first ROM / RWM area. In the case of Yes in step 2664, in step 2666, the CPU acquires error display data based on the data in the first ROM / RWM area. Next, in step 2668, the CPU sets the error display data acquired in step 2666 based on the data in the first ROM / RWM area. Next, in Step 2670, the CPU sets the 7-segment LED segment table 2 based on the data in the first ROM / RWM area. Next, in Step 2672, the CPU acquires set value data based on the data in the first ROM / RWM area. Next, in step 2673, the CPU generates set value display data based on the data in the first ROM / RWM area. Next, in step 2676, the CPU determines whether there is a setting value display request based on the data in the first ROM / RWM area. In the case of No in step 2676, in step 2677, the CPU executes a stored number reading process based on the data in the first ROM / RWM area. Next, in step 2678, the CPU acquires an upper digit offset based on the data in the first ROM / RWM area. Next, in Step 2680, the CPU determines whether or not there is a display request for the number of stored (higher digits) based on the data in the first ROM / RWM area. In the case of No in step 2680, in step 2682, the CPU determines whether or not there is a request for displaying the number of stored sheets (lower digits) based on the data in the first ROM / RWM area. In the case of No in step 2682, in step 2684, the CPU obtains the setting change device operating display data, the acquired number data, and the instruction data based on the data in the first ROM / RWM area. Next, in Step 2686, the CPU determines whether it is an error display timing based on the data in the first ROM / RWM area. In the case of Yes in step 2686, in step 2688, the CPU sets the 7-segment LED segment table 1 based on the data in the first ROM / RWM area, and proceeds to step 2690. In the case of No in step 2686, that is, when the error display timing is not reached, the process proceeds to step 2690.

  Next, in step 2690, the CPU acquires an upper digit offset based on the data in the first ROM / RWM area. Next, in Step 2692, the CPU determines whether or not there is a display request for the acquired number (upper digit) based on the data in the first ROM / RWM area. If No in step 2692 or Yes in step 2682, that is, if there is a display request for the number of stored items (lower digits), the CPU proceeds to step 2694 based on the data in the first ROM / RWM area. The digit offset is acquired, and the process proceeds to Step 2695. In the case of Yes in step 2680, in the case of Yes in step 2692 or Yes in step 2676, in step 2695, the CPU acquires segment output data based on the data in the first ROM / RWM area, and in step 2696. Migrate to In the case of No in step 2664, the process proceeds to step 2696.

  Next, in Step 2696, the CPU determines whether or not there is a display request for the segment P based on the data in the first ROM / RWM area. In the case of Yes in step 2696, in step 2697, the CPU sets segment P output data based on the data in the first ROM / RWM area, and proceeds to step 2698. Note that if the result of step 2696 is No, the process proceeds to step 2698. Next, in step 2698, the CPU outputs LED digits and LED segments (output ports 3 and 4) based on the data in the first ROM / RWM area, and proceeds to the sub notification data output processing in step 2700.

<Processing in the first ROM / RWM area>
Next, FIG. 56 is a flowchart of the sub notification data output processing according to the subroutine of step 2700 in FIG. First, in step 2702, the CPU sets stop acceptance information data based on the data in the first ROM / RWM area. Next, in step 2703, the CPU compares the game medal limit number (game medal limit number (three)) with the inserted number based on the data in the first ROM / RWM area, and checks whether it is the game medal limit. Process). Next, in step 2704, the CPU determines whether or not the number of game medals bet is the limit (3 in this example) based on the data in the first ROM / RWM area. In the case of No in Step 2704, in Step 2706, the CPU determines whether or not the blocker signal is off based on the data in the first ROM / RWM area. In this example, although the blocker on / off is not described in detail, the blocker signal is configured to be turned off in a state in which a game medal cannot be inserted. In the case of No in step 2706, in step 2707, the CPU executes a stored number reading process based on the data in the first ROM / RWM area. Next, in step 2708, the CPU determines whether or not there is a stored number (game medals stored in credit) based on the data in the first ROM / RWM area. In the case of No in step 2708, in step 2710, the CPU determines whether or not a game medal is being inserted based on the data in the first ROM / RWM area (for example, the insertion acceptance sensor D10s, the first insertion sensor). D20s and the on / off status of the second closing sensor D30s is confirmed and determined). In the case of No in step 2710, in step 2712, based on the data in the first ROM / RWM area, the CPU sets the three-sheet insertion button notification data (notification data related to the bet button D220), and proceeds to step 2714. Note that if the result of step 2704, step 2706, step 2708, or step 2710 is Yes, the process proceeds to step 2714. Thus, in this embodiment, (1) the number of game medals bet is not limited, (2) the blocker is turned on, (3) there are credits (one or more). (4) When all four conditions are satisfied, that is, a game medal is not being inserted, the three-sheet insertion button notification data is set.

  Next, in step 2714, the CPU sets setting / reset button notification data, setting key notification data, door notification data, and setting door notification data based on the data in the first ROM / RWM area. Next, in step 2716, the CPU outputs the sub notification data set in the output port 6 based on the data in the first ROM / RWM area, and proceeds to step 2718.

  Next, the processing from step 2718 to step 2734 is timer measurement processing in interrupt processing. First, in step 2718, the CPU sets a measurement start timer address based on the data in the first ROM / RWM area. Next, in step 2720, the CPU sets the number of 1-byte timers based on the data in the first ROM / RWM area, and proceeds to step 2722. Next, in step 2722, the CPU updates the 1-byte timer value set in step 2720 based on the data in the first ROM / RWM area. Next, in step 2724, the CPU sets the next timer address based on the data in the first ROM / RWM area. Next, in Step 2726, the CPU determines whether or not the measurement of the 1-byte timer has ended based on the data in the first ROM / RWM area. In the case of No in step 2726, the process proceeds to step 2722, and the processing of step 2722 to step 2726 is repeatedly executed until the measurement of the 1-byte timer is completed.

  In the case of Yes in step 2726, in step 2728, the CPU sets the 2-byte timer number based on the data in the first ROM / RWM area, and proceeds to step 2730. Next, in step 2732, the CPU updates the 2-byte timer value set in step 2730 based on the data in the first ROM / RWM area. Next, in step 2732, the CPU sets the next timer address based on the data in the first ROM / RWM area. Next, in Step 2734, the CPU determines whether or not the measurement of the 2-byte timer has ended based on the data in the first ROM / RWM area. In the case of No in step 2734, the process proceeds to step 2730, and the processing from step 2730 to step 2734 is repeatedly executed until the measurement of the 2-byte timer is completed. On the other hand, in the case of Yes in step 2734, the process proceeds to error management processing in step 2750. As described above, the timer measurement process according to the present embodiment is configured to perform timer measurement in the order of “1-byte timer → 2-byte timer”.

<Processing in the first ROM / RWM area>
Next, FIG. 57 is a flowchart of error management processing related to the subroutine of step 2750 in FIG. First, in step 2752, the CPU determines whether or not the insertion acceptance sensor D10s has risen (whether or not the insertion acceptance sensor signal has been turned on from off) based on the data in the first ROM / RWM area. In the case of Yes in step 2752, in step 2754, the CPU sets the blocker-off monitoring time and the blocker-on monitoring time based on the data in the first ROM / RWM area, and proceeds to step 2756. Note that if the result is No in step 2752, the process proceeds to step 2756. Next, in step 2756, the CPU saves the AF register based on the data in the first ROM / RWM area, calls the process in the second ROM / RWM area, and proceeds to step 5300.

<Processing in the second ROM / RWM area>
Next, in step 5300, the CPU executes an error check process, which will be described later, based on the data in the second ROM / RWM area, returns to the caller of the first ROM / RWM area, and proceeds to step 2758.

<Processing in the first ROM / RWM area>
Next, in step 2758, the CPU restores the AF register saved in step 2756 based on the data in the first ROM / RWM area. Next, in step 2760, the CPU determines whether an error is detected based on the data in the first ROM / RWM area. In the case of Yes in step 2760, in step 2762, the CPU sets an output request upon error detection based on the data in the first ROM / RWM area. Next, in Step 2763, the CPU executes the control command set process 2 for the data in the designated RWM area based on the data in the first ROM / RWM area, and proceeds to Step 2764. In the case of No in step 2760, the process proceeds to step 2764.

  Next, the processing of step 2764 to step 2784 is a flowchart of external signal data management processing in interrupt processing. First, in step 2764, the CPU acquires an external signal flag based on the data in the first ROM / RWM area. Next, in Step 2766, the CPU determines whether or not the bonus is operating based on the data in the first ROM / RWM area. In the case of Yes in step 2766, in step 2768, the CPU sets the external signal 2 data based on the data in the first ROM / RWM area, and proceeds to step 2770. Note that if the result is No in step 2766, the process proceeds to step 2770.

  Next, in step 2770, the CPU determines whether or not the external signal management time has elapsed based on the data in the first ROM / RWM area. In the case of Yes in step 2770, the external signal 1 flag is cleared and the process proceeds to step 2774. On the other hand, also in the case of No in step 2770, the process proceeds to step 2774. Next, in step 2770, the CPU determines whether the door switch signal or the setting door switch signal is on based on the data in the first ROM / RWM area. In the case of Yes in step 2774, in step 2776, the CPU sets the external signal 5 output data based on the data in the first ROM / RWM area, and proceeds to step 2778. On the other hand, also in the case of No in step 2774, the process proceeds to step 2778. Next, in step 2778, the CPU determines whether or not the setting key switch signal is on based on the data in the first ROM / RWM area. In the case of No in step 2778, in step 2780, the CPU checks the error detection flag and the external signal 4 output time data at the time of power-off recovery based on the data in the first ROM / RWM area. Next, in step 2782, the CPU determines based on the data in the first ROM / RWM area whether or not all data exist as a result of checking in step 2780. If Yes in step 2778, or No in step 2782, that is, the setting key switch signal is ON, there is an error detection flag output, or the external signal 4 output time has not elapsed at the time of power failure recovery. If there is, in step 2784, the CPU sets the external signal 4 output data based on the data in the first ROM / RWM area, and proceeds to the external signal output processing in step 2800. Note that if the result is Yes in step 2784, the process proceeds to step 2800.

<Processing in the second ROM / RWM area>
Next, FIG. 58 is a flowchart of error check processing according to the subroutine of step 5300 in FIG. First, in step 5302, the CPU saves the stack pointer in the second RWM area based on the data in the second ROM / RWM area. Next, in step 5304, the CPU sets the address of the second stack area in the stack pointer based on the data in the second ROM / RWM area. Next, in step 5306, the CPU saves the register in the second stack area based on the data in the second ROM / RWM area. Next, in step 5350, the CPU executes a setting value error check process, which will be described later, based on the data in the second ROM / RWM area. Next, in step 5450, the CPU executes a built-in random number check process, which will be described later, based on the data in the second ROM / RWM area. Next, in Step 5500, the CPU executes a timer measurement process 2 described later based on the data in the second ROM / RWM area. Next, in Step 5550, the CPU executes a second game medal insertion check process 1 to be described later based on the data in the second ROM / RWM area. Next, in step 5650, the CPU executes a game medal passing state update process, which will be described later, based on the data in the second ROM / RWM area. Next, in step 5700, the CPU executes an input / discharge sensor abnormality check process, which will be described later, based on the data in the second ROM / RWM area. Next, in step 5750, the CPU executes an error display request data clear process, which will be described later, based on the data in the second ROM / RWM area. Next, in step 5308, the CPU restores the register saved in the second stack area in step 5306 based on the data in the second ROM / RWM area. Next, in step 5310, the CPU restores the stack pointer saved in step 5302 based on the data in the second ROM / RWM area, and proceeds to the next processing. In the present embodiment, as the interrupt process, the error check process related to the subroutine of step 5300 and the power-off process related to the subroutine of step 2600 described above are executed, and one interrupt process is performed. In FIG. 3, the error check process is executed after the power-off process. By configuring in this way, when power failure is detected during the execution of error check processing, the power interruption processing in the next interrupt processing after executing the interrupt processing being executed (especially error check processing) Since the process at the time of power failure occurs is executed, even if the power failure occurs during the error check process, the error check process being executed is executed to the end and the power As a result, the control process of the fraud prevention program can be improved.

<Processing in the second ROM / RWM area>
Next, FIG. 59 is a flowchart of the set value error check process according to the subroutine of step 5350 in FIG. First, in step 5352, the CPU sets an E6 error (error when the set value is out of range) based on the data in the second ROM / RWM area. Next, in Step 5354, the CPU determines whether or not the set value is in the normal range based on the data in the second ROM / RWM area. If Yes in step 5354, the process proceeds to the next process. On the other hand, in the case of No in step 5354, it is determined that an E6 error has been detected, and the process proceeds to non-recoverable error processing 2 in step 5400.

<Processing in the second ROM / RWM area>
Next, FIG. 60 is a flowchart of non-recoverable error processing 2 according to the subroutine of step 5400 in FIG. First, in step 5402, the CPU sets error display data of lower digits based on data in the second ROM / RWM area. Next, in step 5404, the CPU sets the error display data of the upper digit based on the data in the second ROM / RWM area, and proceeds to step 5406. Next, in step 5406, the CPU sets the clear output port address and the number of output ports based on the data in the second ROM / RWM area, and proceeds to step 5408.

  Next, in Step 5408, the CPU turns off the output ports 0 to 6 based on the data in the second ROM / RWM area. Next, in step 5410, the CPU sets the next output port address based on the data in the second ROM / RWM area. Next, in step 5412, the CPU determines whether or not the output to each output port has been completed based on the data in the second ROM / RWM area. In the case of No in step 5412, the process proceeds to step 5408, and the processing of step 5408 to step 5412 is repeatedly executed until the output to each output port is completed. In the case of Yes in step 5412, in step 5414, based on the data in the second ROM / RWM area, the CPU outputs the output data related to the error display corresponding to the output ports 3 and 4 to the acquired number display device D 190. Output. Next, in step 5416, the CPU executes switching between the upper digit and the lower digit based on the data in the second ROM / RWM area, and proceeds to step 5406.

<Processing in the second ROM / RWM area>
Next, FIG. 61 is a flowchart of the internal random number check process according to the subroutine of step 5450 in FIG. First, in step 5452, based on the data in the second ROM / RWM area, the CPU updates the E7 error {the frequency abnormality of the clock input to the RCK terminal for random number update or the update state of the internal random number (16-bit random number). Set an error when an abnormality is detected}. Next, in step 5454, the CPU acquires internal information register data based on the data in the second ROM / RWM area. Next, in Step 5456, the CPU determines whether an abnormality related to the internal random number update has occurred based on the data in the second ROM / RWM area. If No in step 5456, the process proceeds to the next process. On the other hand, if Yes in step 5456, it is determined that an E7 error has been detected, and the process proceeds to the unrecoverable error processing 2 in step 5400 described above. As described above, the built-in random number is detected when an abnormality in the frequency of the clock input to the RCK terminal is detected or an update state abnormality of the built-in random number (16-bit random number) is detected. It is configured to determine that an update-related abnormality has occurred, that is, to determine that an E7 error has been detected.

<Processing in the second ROM / RWM area>
Next, FIG. 62 is a flowchart of the timer measurement process 2 according to the subroutine of step 5500 in FIG. First, in step 5502, the CPU sets a measurement start timer address based on the data in the second ROM / RWM area. Next, in step 5504, the CPU sets the number of 1-byte timers 2 (the number of timers used in the timer measurement process 2 in the figure) based on the data in the second ROM / RWM area, and proceeds to step 5506. Next, in Step 5506, the CPU updates the 1-byte timer value based on the data in the second ROM / RWM area. Next, in step 5508, the CPU sets the next timer address based on the data in the second ROM / RWM area. Next, in Step 5510, the CPU determines whether or not the measurement of the 1-byte timer has ended based on the data in the second ROM / RWM area. If Yes in step 5510, the process proceeds to the next process. On the other hand, in the case of No in step 5510, the process proceeds to step 5506, and the processing of step 5506 to step 5510 is repeatedly executed until the measurement of the 1-byte timer is completed.

<Processing in the second ROM / RWM area>
Next, FIG. 63 is a flowchart of the second game medal insertion check process 1 according to the subroutine of step 5550 in FIG. First, in step 5552, the CPU sets the previous blocker signal data based on the data in the second ROM / RWM area. Next, in Step 5554, the CPU generates blocker signal data based on the data in the second ROM / RWM area. Next, in Step 5556, the CPU generates current blocker signal data based on the data in the second ROM / RWM area. Next, in Step 5558, the CPU generates blocker signal data based on the data in the second ROM / RWM area.

  Next, in Step 5564, the CPU determines whether or not the medal insertion inspection flag is on based on the data in the second ROM / RWM area. In the case of No in step 5564, in step 5566, the CPU determines whether or not the blocker signal is on based on the data in the second ROM / RWM area. If NO in step 5566, that is, if the blocker signal is OFF, the process proceeds to the next process. In the case of Yes in step 5564 or step 5566, in step 5568, the CPU acquires the previous game medal passing state based on the data in the second ROM / RWM area. In this embodiment, game medal passing states 0 to 3 are provided as game medal passing states. In the game medal passing state update process described later, the first insertion sensor signal and the second medal passing state are processed. The game medal passing state is configured to be updated based on the on / off state with the insertion sensor signal. The specific on / off status of the first insertion sensor signal and the second insertion sensor signal corresponding to the game medal passing state is “game medal passing state 0 = first insertion sensor signal off and second insertion” “Sensor signal OFF”, “game medal passing state 1 = first insertion sensor signal OFF and second insertion sensor signal ON”, “game medal passing state 2 = first insertion sensor signal ON, and second insertion sensor signal” “Off”, “Game medal passing state 3 = first insertion sensor signal on and second insertion sensor signal on”.

  Next, in step 5570, based on the data in the second ROM / RWM area, the CPU determines whether one of the first sensor signals or the second sensor signals is on. . In the case of Yes in step 5570, in step 5572, the CPU sets a medal insertion inspection flag based on the data in the second ROM / RWM area. In the case of No in step 5570, the process proceeds to step 5618 in the second game medal insertion check process 2 in FIG. Next, in step 5574, the CPU determines whether or not the first input sensor signal is on and the second input sensor signal is off based on the data in the second ROM / RWM area.

  In the case of Yes in step 5574, a CP error (an error that occurs when it is determined that the passing order of game medals is abnormal using the first insertion sensor and the second insertion sensor) is set in step 5576. The processing from step 5576 to step 5586 is executed when the first insertion sensor signal is on and the second insertion sensor signal is off (when the current game medal passing state is the game medal passing state 2). It is processing. Next, in Step 5578, the CPU determines whether or not the previous game medal passing state is 1 or 3 based on the data in the second ROM / RWM area. In the case of No in step 5578, in step 5580, the CPU determines whether or not the previous game medal passing state is 0 based on the data in the second ROM / RWM area. In the case of Yes in step 5580, in step 5582, the CPU sets the first insertion sensor passage check time based on the data in the second ROM / RWM area, and proceeds to step 5584. In the case of No in step 5580, the process proceeds to step 5584 without executing the process in step 5582. As described above, since the processing of step 5576 to step 5586 is the case where the current game medal passing state is the game medal passing state 2, the previous game medal passing state is the game medal passing state 0. Is the first process of “first input sensor signal OFF and second input sensor signal OFF → first input sensor signal ON and second input sensor signal OFF”. The first input sensor passage check time is set, and the period during which the first input sensor signal is on can be measured. If the previous game medal passing state is 2, the current game medal passing state is 2, so that the result is No in step 5580 and the CP error is not detected.

  Next, in step 5584, the CPU generates a CE error (an error that occurs when it is determined that a game medal has accumulated in the first insertion sensor or the second insertion sensor) based on the data in the second ROM / RWM area. set. Next, in step 5586, the CPU has exceeded the passing time of the first closing sensor D20s based on the data in the second ROM / RWM area (in this example, as described above, the first closing sensor signal is ON). If a certain period exceeds 188.27 ms, it is determined whether or not the passage time of the first input sensor has been exceeded). If No in step 5586, it is determined that a CE error has not been detected, and the process proceeds to the next process.

  If NO in step 5574, that is, if the first input sensor signal is ON and the second input sensor signal is not OFF, in step 5588, the CPU is based on the data in the second ROM / RWM area. Then, it is determined whether or not the first closing sensor signal and the second closing sensor signal are on. In the case of Yes in step 5588, in step 5590, the CPU sets a CP error based on the data in the second ROM / RWM area. Note that the processing from step 5590 to step 5594 in FIG. 5 and step 5602 to step 5608 in FIG. The processing is executed in the case of medal passing state 3). Next, in Step 5592, the CPU determines whether or not the previous game medal passing state is 0 or 1 based on the data in the second ROM / RWM area. In the case of No in step 5592, in step 5594, the CPU determines whether or not the previous game medal passing state is 2 based on the data in the second ROM / RWM area. In the case of Yes in step 5594, the process proceeds to the second game medal insertion check process 2 in step 5600.

<Processing in the second ROM / RWM area>
Next, FIG. 64 is a flowchart of the second game medal insertion check process 2 according to the subroutine of step 5600 in FIG. First, in step 5602, the CPU sets the second insertion sensor passage check time based on the data in the second ROM / RWM area, and proceeds to step 5604. Note that in the case of No in step 5594 in FIG. 63 described above, the process proceeds to step 5604 without executing the process in step 5602. As described above, the processing of step 5590 to step 5594 in FIG. 63 and step 5602 to step 5608 in FIG. 63 is the case where the current game medal passing state is the game medal passing state 3, so the previous game When the medal passing state is the game medal passing state 2, “first insertion sensor signal ON and second insertion sensor signal OFF → first insertion sensor signal ON and second insertion sensor signal ON”. Since this is the first processing, the second closing sensor passage check time is set in step 5602 so that the period during which the second closing sensor signal is on can be measured. If the previous game medal passing state is 3, the current game medal passing state is also 3, so that the result is No in step 5594 and no CP error is detected.

  Next, in Step 5604, the CPU sets a CE error based on the data in the second ROM / RWM area. Next, in Step 5606, the CPU determines whether or not the passing time of the second closing sensor D30s has been exceeded based on the data in the second ROM / RWM area. In the case of No in step 5606, in step 5608, based on the data in the second ROM / RWM area, the CPU has passed the passing time of the second input sensor D30s (in this example, as described above, the second input sensor If the period during which the signal is on exceeds 188.27 ms, it is determined whether or not the passing time of the second closing sensor has been exceeded). In the case of No in step 5606, in step 5608, based on the data in the second ROM / RWM area, the CPU has exceeded the passage time of the first input sensor D20s (in this example, as described above, the first input sensor If the period during which the signal is on exceeds 188.27 ms, it is determined whether or not the passage time of the first closing sensor has been exceeded). In the case of No in step 5608, it is determined that a CE error has not been detected, and the process proceeds to the next process.

  If NO in step 5588 in FIG. 63 described above, in step 5610, the CPU sets a CP error based on the data in the second ROM / RWM area. Note that the processing from step 5610 to step 5616 is executed when the first insertion sensor signal is OFF and the second insertion sensor signal is ON (when the current game medal passing state is the game medal passing state 1). It is processing. Next, in step 5612, the CPU determines whether or not the previous game medal passing state is 0 or 2 based on the data in the second ROM / RWM area. If the previous game medal passing state is 1, the current game medal passing state is 1, so that the result is No in step 5612 and no CP error is detected. If the previous game medal passing state is 3, it is determined that the game medal passing order is normal, and no CP error is detected.

  In the case of No in step 5612, in step 5614, the CPU sets a CE error based on the data in the second ROM / RWM area. Next, in step 5616, based on the data in the second ROM / RWM area, the CPU has exceeded the passing time of the second making sensor (in this example, as described above, the second making sensor signal is on). If the period exceeds 188.27 ms, it is determined whether or not the passing time of the second closing sensor has been exceeded). In the case of No in step 5616, it is determined that a CE error has not been detected, and the process proceeds to the next process.

  Further, in the case of No in step 5570 in FIG. 63 described above, in step 5618, the CPU clears the medal insertion inspection flag based on the data in the second ROM / RWM area. Next, in step 5620, the CPU clears the first closing sensor passage check time and the second closing sensor passage check time based on the data in the second ROM / RWM area. Next, in Step 5622, the CPU determines whether or not the previous game medal passing state is 0 based on the data in the second ROM / RWM area. In the case of No in step 5622, in step 5624, the CPU determines whether or not the previous game medal passing state is 2 based on the data in the second ROM / RWM area. In the case of No in step 5624, the process proceeds to step 5626. The processing from step 5618 to step 5628 is executed when the first insertion sensor signal is OFF and the second insertion sensor signal is OFF (when the current game medal passing state is the game medal passing state 0). It is processing. In the case of Yes in step 5622 or step 5624, the process proceeds to the next process.

  Next, in step 5626, the CPU sets a CP error based on the data in the second ROM / RWM area. Next, in step 5628, the CPU determines whether or not the previous game medal passing state is 1 based on the data in the second ROM / RWM area. In the case of No in step 5628, in step 5630, the CPU stores error display request data based on the data in the second ROM / RWM area, and proceeds to the next processing. Note that Step 5578, Step 5586, Step 5592 in FIG. 63, Step 5606, Step 5608, Step 5612 or Step 5616 in FIG. 64 also shifts to Step 5630 to store the error display request data. . If the previous game medal passing state is 0, the current game medal passing state is also 0, so that the answer is YES in step 5622 and no CP error is detected. Further, when the previous game medal passing state is 2, as described in (4) of FIG. 15, “first input sensor signal ON and second input sensor signal OFF → first input sensor signal”. When it is “OFF and the second insertion sensor signal is OFF”, it is not considered that a normal game medal has been inserted and the number of credits and bets does not increase, but an error (CP error) does not occur. Has been. If the previous game medal passing state is 1, it is determined that the game medal passing order is normal, and no CP error is detected. As described above, in the present embodiment, as processing in the second ROM / RWM area, when the blocker signal is on or the medal insertion inspection flag is on, the first insertion sensor D20s and the second insertion sensor D30s When an inspection is executed and a gaming medal passing abnormality is detected, a display request corresponding to the detected error (in FIG. 63 and FIG. 64, two errors are a CP error and a CE error) is executed. It is configured to

  As described above, the present embodiment is configured to determine the detection of an error related to the insertion of a game medal in the interrupt process (interrupt process in the second ROM / RWM area) (determine in steps 5550 and 5600). Yes. In addition, the time when the first input sensor signal is turned on or off and the time when the second input sensor signal is turned on or off are managed in interrupt processing (interrupt processing in the second ROM / RWM area). Has been. On the other hand, the main loop process (main loop process in the first ROM / RWM area) is configured to determine whether or not a game medal has been normally inserted, but the first insertion sensor D20s and the second insertion sensor D30s The passing order is confirmed, and the time when the first closing sensor signal is turned on or off and the time when the second closing sensor signal is turned on or off are not confirmed. The timer measurement process in the interrupt process is the process of step 5500. After executing the timer measurement process, an error related to the insertion of a game medal in the interrupt process (interrupt process in the second ROM / RWM area) is executed. The execution of complicated processing is not sandwiched until the processing for determining the detection is executed (or executed within one interrupt processing), that is, it relates to the insertion of the game medal after the timer measurement is executed. The time until the error detection is determined can be shortened. On the other hand, in the case where the main loop process (main loop process in the first ROM / RWM area) is configured to execute the process for determining the error detection related to the insertion of the game medal, for example, in step 1600, the error Even if the timer measurement is executed in the interrupt process, the error detection determination is not executed until the process of step 1600 is executed. It takes a long time to determine the detection of an error related to the insertion of a game medal. Therefore, as in the present embodiment, it is configured to determine the detection of an error related to the insertion of a game medal in the interrupt process (interrupt process in the second ROM / RWM area) (determine in steps 5550 and 5600). By shortening the time from the execution of the timer measurement to the determination of the error detection related to the insertion of the game medal, a more accurate error detection process can be executed.

<Processing in the second ROM / RWM area>
Next, FIG. 65 is a flowchart of the game medal passing state update process according to the subroutine of step 5650 in FIG. First, in Step 5562, the CPU obtains closing sensor signal information (information of the first closing sensor signal and the second closing sensor signal) based on the data in the second ROM / RWM area. Next, in step 5654, the CPU updates the game medal passing state based on the insertion sensor signal information acquired in step 5562 based on the data in the second ROM / RWM area, and proceeds to the next processing.

<Processing in the second ROM / RWM area>
Next, FIG. 66 is a flowchart of the input / withdrawal sensor abnormality check process according to the subroutine of step 5700 in FIG. First, in step 5702, the CPU updates the previous error detection flag based on the data in the second ROM / RWM area. Next, in step 5708, the CPU determines whether or not it is a throwing-related error (for example, the aforementioned CP error or CE error) based on the data in the second ROM / RWM area. In the case of No in step 5708, in step 5714, based on the data in the second ROM / RWM area, the CPU determines whether or not the input acceptance sensor has started up (whether or not the input acceptance sensor signal has been turned on from off). To do. In the case of Yes in step 5714, in step 5716, the CPU sets the input reception sensor dwell time based on the data in the second ROM / RWM area, and proceeds to step 5718. On the other hand, in the case of No in step 5714, the process proceeds to step 5718 without executing the process in step 5716.

  Next, in Step 5718, the CPU determines whether or not the input acceptance sensor signal is on based on the data in the second ROM / RWM area. If YES in step 5718, in step 5720, based on the data in the second ROM / RWM area, the CPU determines whether or not a period (452.00 ms in this example) has elapsed that the input acceptance sensor residence time becomes an error. Determine. In the case of Yes in step 5720, in step 5722, the CPU sets a CH error detection flag based on the data in the second ROM / RWM area, and proceeds to step 5724. Note that if the answer is Yes in Step 5708, No in Step 5718, or No in Step 5720, the process proceeds to Step 5724.

  Next, in step 5724, the CPU determines that the HP error {the error described above in (2-1) to (2-3) in FIG. 15 is the first payout sensor based on the data in the second ROM / RWM area. Alternatively, it is determined whether or not an error occurs when a game medal stays in the second payout sensor. In the case of No in step 5724, in step 5726, the CPU sets the RWM address of the first payout sensor abnormality detection data based on the data in the second ROM / RWM area. Next, in Step 5728, the CPU sets the RWM address of the second payout sensor abnormality detection data based on the data in the second ROM / RWM area. Next, in step 5729, the CPU sets the mask data of the first payout sensor and the first payout sensor bit based on the data in the second ROM / RWM area. Next, in Step 5730, the CPU determines whether or not the hopper motor drive signal is on based on the data in the second ROM / RWM area. In the case of Yes in step 5730, in step 5731, the CPU sets the mask data of the first payout sensor and the second payout sensor and the second payout sensor bit based on the data in the second ROM / RWM area, and in step 5732 Transition. On the other hand, if No in step 5730, the process proceeds to step 5732 without executing the process in step 5731.

  Next, in step 5732, the CPU generates payout sensor check data based on the data in the second ROM / RWM area. Next, in step 5733, the CPU sets abnormality detection data clear data based on the data in the second ROM / RWM area. Next, in step 5734, the CPU clears the abnormality detection data of the sensor that does not execute the check based on the data in the second ROM / RWM area. Next, in step 5735, the CPU determines whether an abnormality of the first payout sensor or the second payout sensor is detected based on the data in the second ROM / RWM area. In the case of Yes in step 5735, in step 5736, the CPU determines whether or not the abnormality detection time of the first payout sensor or the second payout sensor has elapsed based on the data in the second ROM / RWM area. In the case of No in step 5736, in step 5738, the CPU generates abnormality detection data + 1 data of the first payout sensor or the second payout sensor based on the data in the second ROM / RWM area, and proceeds to step 5739. Note that if the result is No in step 5735 or Yes in step 5736, the process proceeds to step 5739. Next, in step 5739, the CPU updates the abnormality detection data of the first payout sensor or the second payout sensor based on the data in the second ROM / RWM area, and proceeds to the next process. In the case of Yes in step 5724, that is, in the case of an HP error, the process proceeds to the next process. As described above, in this embodiment, the game medal is performed by the process of step 5700 which is an interrupt process (process in the second ROM / RWM area) and the process of step 1800 which is a main loop process (process in the first ROM / RWM area). It is configured to be able to execute the determination of error detection related to payout of the game, and in the interrupt process (the process in the second ROM / RWM area), it cannot be detected in the progress of the normal game (the illegal game was executed) The abnormal input of the first payout sensor or the second payout sensor can be determined and detected in the progress of normal game (for example, in the first ROM / RWM area) It is determined whether an error is detected (eg, HE error is detected by executing a bonus), that is, interrupt processing (second ROM / RWM area) In the process) in the main loop processing (processing in the 1ROM · RWM region) is configured that can detect different error regarding payout of game medals.

<Processing in the second ROM / RWM area>
FIG. 67 is a flowchart of the error display request data clear process related to the subroutine of step 5750 in FIG. First, in step 5752, the CPU determines whether or not an error is being displayed based on the data in the second ROM / RWM area. If YES in step 5752, in step 5754, the CPU clears the error display request data based on the data in the second ROM / RWM area, and proceeds to the next processing. If No in step 5752, that is, if it is not during error display, the process proceeds to the next process without clearing the error display request data.

<Processing in the first ROM / RWM area>
Next, FIG. 68 is a flowchart of an external signal output process according to the subroutine of step 2800 in FIG. First, in step 2802, the CPU determines whether or not the external signal output time has ended based on the data in the first ROM / RWM area. In the case of Yes in step 2802, in step 2804, the CPU sets the external signal output time based on the data in the first ROM / RWM area. Next, in step 2806, the CPU determines whether or not there is a medal insertion signal output count based on the data in the first ROM / RWM area. In the case of Yes in step 2806, in step 2808, the CPU decrements the medal insertion signal output count by 1 based on the data in the first ROM / RWM area. Next, in step 2810, the CPU turns on the medal insertion signal output data bit based on the data in the first ROM / RWM area, and proceeds to step 2812. Note that if the result of step 2806 is No, the process proceeds to step 2812.

  Next, in step 2812, the CPU determines whether or not there is a medal payout signal output count based on the data in the first ROM / RWM area. If YES in step 2812, in step 2814, the CPU decrements the medal payout signal output count by 1 based on the data in the first ROM / RWM area. Next, in step 2816, the CPU turns on the medal payout signal output data bit based on the data in the first ROM / RWM area, and proceeds to step 2818. Note that if the answer is No in Step 2812, the process proceeds to Step 2818.

  Next, in step 2818, the CPU inverts on / off of the output bit based on the data in the first ROM / RWM area. Next, in step 2820, the CPU sets a medal insertion signal and a payout signal output data based on the data in the first ROM / RWM area, and proceeds to step 2822. Note that if the result of step 2802 is No, the process proceeds to step 2822. Next, in step 2822, the CPU sets an external signal, a medal insertion signal, and a payout signal output data based on the data in the first ROM / RWM area, and proceeds to step 2824.

  Steps 2824 to 2826 are test signal management processes in the interrupt process. First, in step 2824, the CPU saves the AF register based on the data in the first ROM / RWM area, and executes a process call for the second ROM / RWM area.

<Processing in the second ROM / RWM area>
Next, in step 5850, the CPU executes a test signal output process to be described later based on the data in the first ROM / RWM area, and returns to the caller of the first ROM / RWM area.

<Processing in the first ROM / RWM area>
Next, in step 2826, the CPU restores the AF register based on the data in the first ROM / RWM area, and proceeds to step 2828.

  Next, Step 2828 is a soft random number update process in the interrupt process. First, in step 2828, the CPU executes soft random number update processing 2 based on the data in the first ROM / RWM area, and proceeds to step 2830.

  Next, Step 2830 to Step 2832 are interrupt processing end processing in the interrupt processing. First, in step 2830, the CPU restores the register based on the data in the first ROM / RWM area. Next, in step 2832, the CPU permits an interrupt based on the data in the first ROM / RWM area, and ends the interrupt process.

<Processing in the second ROM / RWM area>
Next, FIG. 69 is a flowchart of a test signal output process according to the subroutine of step 5850 in FIG. First, in step 5852, the CPU saves the stack pointer in the second RWM area based on the data in the second ROM / RWM area. Next, in Step 5854, the CPU sets a stack pointer in the second stack area based on the data in the second ROM / RWM area. Next, in step 5856, the CPU saves the register based on the data in the second ROM / RWM area. Next, in Step 5858, the CPU generates test signal output data based on the data in the second ROM / RWM area. Next, in Step 5860, the CPU outputs a test signal based on the data in the second ROM / RWM area. Next, in Step 5862, the CPU determines whether or not the re-gaming state identification information flag is on based on the data in the second ROM / RWM area. In the case of Yes in step 5862, in step 5864, the CPU sets the re-game identification signal 4 based on the data in the second ROM / RWM area. Next, in Step 5866, the CPU determines whether or not the bonus condition device is operating based on the data in the second ROM / RWM area. In the case of No in step 5866, in step 5868, the CPU sets the re-game identification signal 5 based on the data in the second ROM / RWM area. Next, in step 5870, the CPU determines whether or not the type 1 BB-A is operating based on the data in the second ROM / RWM area. In the case of No in step 5870, in step 5872, the CPU determines whether or not the operation of the type 1 BB-B is based on the data in the second ROM / RWM area. In the case of No in step 5872, in step 5874, the CPU sets the re-game identification signal 6 based on the data in the second ROM / RWM area. Next, in Step 5876, the CPU determines whether or not the type 1 BB-C is operating based on the data in the second ROM / RWM area. In the case of No in step 5876, in step 5877, the CPU sets the re-game identification signal 7 based on the data in the second ROM / RWM area, and proceeds to step 5894. Note that if the result of Step 5866, Step 5870, Step 5872, or Step 5876 is Yes, the process proceeds to Step 5894. On the other hand, in the case of No in step 5862, the process proceeds to step 5878. The type 1 BB and the replay identification number are merely examples, and there is no problem even if they are changed.

  In step 5878, the CPU sets conditional device information clear data based on the data in the second ROM / RWM area. Next, in Step 5879, the CPU determines whether or not it is time to output the conditional device information based on the data in the second ROM / RWM area. If No in step 5879, the process moves to step 5894. In the case of Yes in step 5879, in step 5880, the CPU sets the data for outputting the accessory condition device information based on the data in the second ROM / RWM area. Next, in Step 5882, the CPU sets a bonus condition device number based on the data in the second ROM / RWM area. Next, in Step 5883, the CPU determines whether or not it is at the time of outputting the accessory condition device information based on the data in the second ROM / RWM area. In the case of No in step 5883, in step 5884, the CPU sets a winning and replay condition device number based on the data in the second ROM / RWM area. Next, in Step 5858, the CPU sets data for winning and replaying condition device information output based on the data in the second ROM / RWM area, and proceeds to Step 5886. Note that if the result in Step 5883 is Yes, the process proceeds to Step 5886.

  Next, in step 5886, the CPU sets conditional device lower information based on the data in the second ROM / RWM area. Next, in Step 5888, the CPU determines whether or not it is time to output the conditional device lower information based on the data in the second ROM / RWM area. In the case of No in step 5888, in step 5890, the CPU sets the condition device upper information based on the data in the second ROM / RWM area, and proceeds to step 5892. In the case of Yes in step 5888, the process proceeds to step 5892. Next, in Step 5892, the CPU generates condition device information based on the data in the second ROM / RWM area, and proceeds to Step 5894.

  Next, in step 5894, the CPU outputs conditional device information based on the data in the second ROM / RWM area. Next, in Step 5896, the CPU restores the register based on the data in the second ROM / RWM area. Next, in Step 5898, the CPU restores the stack pointer from the second RWM area based on the data in the second ROM / RWM area, and returns to the caller of the first ROM / RWM area.

  Next, FIG. 70 is an example of processing in the stack area when the processing of the second ROM / RWM area is called when the processing of the first ROM / RWM area is executed, which is applicable to the present embodiment. . In the figure, a case where the process of the second ROM / RWM area is called during the process of the first ROM / RWM area is illustrated. Note that the processing in the figure is an example, and the order of processing in the first stack area and the second stack area, the storage area, and the like are not limited to those in the figure. First, in (1), a stack pointer X (indicating the address of the first stack area) is set in the first stack area. After that, in (2), after the processing by the first ROM / RWM area is executed, all registers α are saved in the first stack area, and the processing of the second ROM / RWM area is called. Thereafter, in (3), the stack pointer A is saved to a predetermined address in the second RWM area (the address A of the stack pointer is temporarily stored in the second RWM area). In (1) to (3), the first stack area is used as the stack area.

  Thereafter, in (4), the stack pointer Y (indicating the address of the second stack area) is set in the second stack area. Thereafter, in (5), processing is executed in the second ROM / RWM area, and the address of the stack pointer becomes B (indicating the address of the second stack area). In (4) to (5), the second stack area is used as the stack area.

  Thereafter, in (6), the processing of the second ROM / RWM area ends, and the stack pointer A (indicating the address of the first stack area) stored in the second RWM area is restored. After that, in (7), after returning to the caller of the first ROM / RWM area, all registers α saved in the first stack area are restored, and then the processing of the first ROM / RWM area is executed. It becomes. As described above, in this embodiment, when the process of the second ROM / RWM area is called while the process of the first ROM / RWM area is being executed, the data related to all the registers and the return address are saved in the first stack area. At the same time, after the address of the stack pointer, which is the address of the first stack area, is stored in the second RWM area, the processing of the second ROM / RWM area is executed. However, the present invention is not limited to the configuration shown in the figure. For example, all registers may be saved by processing in the second ROM / RWM area and saved in the second stack area.

  With the configuration as described above, according to the spinning-reel game machine according to the present embodiment, the first RWM area (or the register area) is processed by the CPU based on the program code arranged in the second ROM area. ) Can be referred to, and an illegal act is performed on the gaming machine such as error detection and error display (for example, illegal access to a game medium insertion port or payout port to illegally access the game medium) And so on), the program for preventing fraud to prevent such a situation can be executed by the process in the second ROM / RWM area, so that the process and the area related to the progress of the game can be clearly separated. This makes it easy to verify the legitimacy of the fraud prevention program.

  Also, a program that exists in the first control area and is accessed from the CPU = a program for implementing the game play specification, and a program that exists in the second control area and is accessed from the CPU = a program for preventing fraud By doing so, the placement positions of the program for implementing the game playability specification and the program for preventing fraud can be clearly separated visually on the program source code or on the dump list. It becomes easy to verify the sex artificially. In addition, since the program that exists in the first control area and is accessed by the CPU is located at a lower address than the program that exists in the second control area and is accessed by the CPU, the CPU executes first. It is easy to limit the program to be executed to a program that exists in the first control area and is accessed by the CPU (that is, a program for implementing game play specifications).

  Also, a program that exists in the first control area and is accessed from the CPU = a program for implementing the game play specification, and a program that exists in the second control area and is accessed from the CPU = a program for preventing fraud In this case, the master-slave relationship between the program for implementing the gaming specification and the program for preventing fraud can be established, and the processing result of the program for preventing illegal acts is taken over, and the main gaming specification is A program for implementation can be executed. Here, since the processing result of the program for implementing the main gaming specification can be highly confidential information, it is possible to output information for misconduct notification from a subsidiary program for preventing misconduct that can be output externally. If it is updated implicitly, there is a risk that security may be reduced, but the execution timing of the program for preventing fraud can be limited to the case where there is this call instruction. As a result of visually clarifying the execution timing of the program for preventing illegal acts on the dump list, the update timing of the processing result is also clarified on the program source code or the dump list. It is possible to artificially verify the legitimacy of anti-fraud programs (including the timing of updating results) To become. Here, the program for fraud prevention tends to have different specifications for each gaming machine manufacturer, so it is highly necessary to verify the validity artificially, but by configuring in this way, It is possible to reduce labor for verifying a program for preventing fraud.

  As described above, the configuration of the above embodiment is within the range even when applied to pachinko gaming machines. An example of applying the above-described configuration to a pachinko gaming machine will be described in detail below. The configuration of the memory map of the main control chip (the size of the area, the configuration of the address, etc.) in the pachinko gaming machine described in detail below is the same as the configuration of the memory map in the rotary gaming machine described above with reference to FIG. The case where it is is illustrated.

<Processing in the first ROM / RWM area>
After powering on the pachinko machine, non-interrupt processing is executed. That is, after turning on the power of the pachinko machine and making initial settings (register initialization, input / output port settings, etc.), the main control board checks the input port of the RWM clear button, and the power supply unit It is determined whether or not the reset button (RWM clear button) has been operated, that is, whether or not an operation of intentionally clearing the contents of the RWM has been performed by a game hall manager or the like. When the RWM clear button is operated, the main control board clears all the RWM contents on the main control board side. Next, the main control board transmits ram clear information (command) indicating that the RWM of the main control board has been cleared to the sub-main control unit side.

  If the RWM clear button is not operated, the main control board checks the contents of the RWM area on the main control board (for example, the checksum recorded at the time of power failure and the information stored in the RWM area) Comparison with quantity). Next, the main control board determines whether the content of the RWM is not normal based on the check result (whether the information at the time of power interruption is not backed up to the RWM correctly). If the data backed up in the RWM is abnormal, the RWM clear process described above is executed. On the other hand, when the data backed up in the RWM is normal, the main control board acquires various information commands at the time of power interruption stored (backed up) in the RWM in the main control board, and acquires the acquired various information commands. Transmit to the sub-main control unit side. Next, the main control board is triggered by a scheduled interrupt related to the game progress main process on the main control board side (for example, a hardware interrupt about every 1.5 ms. In this example, the interrupt cycle is T {As a result, when the execution scheduled interrupt timing is reached, the interrupt processing is executed}, and until the next scheduled interrupt timing is reached, the main control board performs various random number update processes (for example, (Increment process of random number counter) is repeatedly executed.

<Processing in the first ROM / RWM area>
Next, timer interrupt processing will be described. The main control board executes the game progress main process based on the interrupt request generated when the scheduled interrupt timing is reached. Note that when an interrupt process occurs, the process of the first ROM / RWM area is always executed. First, triggered by the arrival of the scheduled interruption period T (for example, a hardware interruption every about 1.5 ms), the main control board detects the entry of a game ball at various entrances Process). Next, the main control board calls up the processing of the second ROM / RWM area.

<Processing in the second ROM / RWM area>
Next, the main control board executes a vibration error management process (a process for determining whether a condition for generating a vibration error and a condition for canceling the vibration error are satisfied). Next, the main control board returns to the caller of the first ROM / RWM area. The vibration error is an error that occurs when the vibration sensor detects that the gaming machine vibrates illegally (a vibration of intensity or acceleration that cannot occur when playing normally). . As a position where the vibration sensor is provided, for example, it may be configured to be provided on the back side (as viewed from the player) of the big winning opening at the lower right side of the game area (referenced to the center of the game area), and configured as such. In such a case, the player is placed at a position where the player cannot see (or hardly). Since the vibration sensor is a device that does not detect a vibration error if the game is proceeding normally, it is preferable to arrange the vibration sensor at a position where it is not visible (or difficult) to the player. The vibration sensor converts the mechanical energy due to vibration (impact) into electrical energy by the piezoelectric ceramic plate formed of piezoelectric ceramics in a plate shape, and the converted electrical energy is printed via the lead wire. A signal that is a vibration error can be transmitted to a pachinko machine by being output from the connector to the outside (for example, the main control board) through a filter circuit and an amplifier circuit mounted on the board. Yes. In this example, only the process related to the occurrence of the vibration error is exemplified as the process in the second ROM / RWM area. However, the process related to the occurrence of an error other than the vibration error is not limited to this. You may comprise so that it may perform as a process in a RWM area | region.

<Processing in the first ROM / RWM area>
Next, the main control board obtains an auxiliary game content determination random number acquisition process {a process for acquiring an auxiliary game content determination random number, which is a symbol related to the opening of an electric accessory attached to the start port (so-called electric Chu)}. Execute. Next, the main control board executes an electric accessory drive determination process {determination of whether or not an electric accessory attached to the start port (so-called electric chew) can be opened and a mode of opening}. Next, the main control board executes a main game content determination random number acquisition process {a process of acquiring a main game symbol content determination random number, which is a symbol related to the opening of a big prize opening (so-called attacker)}. Next, the main control board executes a main game symbol display process (a process for deciding the main game symbol determination result, stop symbol, variation mode, etc., and variably displaying the main game symbol). Next, the main control board executes a special game operation condition determination process (a process for determining whether or not the special game operation condition is satisfied). Next, the main control board executes a special game control process (a process for executing drive control of a special prize opening during execution of the special game). Next, the main control board executes a prize ball payout command transmission control process (a process for controlling a command to be transmitted to the prize ball payout control board). Next, the main control board executes external signal output processing (information output processing to an external terminal board, hall computer, etc.). Next, the main control board executes a control command transmission process (a process for transmitting a command set in each process to the sub-main control unit side), and returns to the process executed immediately before the execution of this interrupt process. . As described above, the process in the second ROM / RWM area is executed by being called by the process in the first ROM / RWM area during the execution of the interrupt process after the interrupt process is executed as the process in the first ROM / RWM area. Will be.

  As described above, the above-described configuration can also be applied to pachinko gaming machines.

(Summary)
The following concepts can be extracted (listed) based on the configuration shown in the above embodiments. However, the concepts listed below are merely examples, and the concepts based on the further configurations shown in the above embodiments are added to these concepts as well as the combination and separation (higher level conceptualization) of these listed concepts. May be.

The gaming machine according to this aspect (1)
A main control unit for controlling the game progress;
A first sensor for detecting an input of game value;
A gaming machine comprising a second sensor for detecting an input of gaming value,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
When managing the input of gaming value,
When the interrupt process is executed, a first input signal that is an input signal from the first sensor and a second input signal that is an input signal from the second sensor are generated,
When the non-interrupt processing is executed, it is periodically checked whether or not the first input signal is turned on. After confirming that the first input signal is turned on, the first input signal is turned on. Periodically check whether both the first input signal and the second input signal are turned off,
When the interrupt process is executed, a period during which the first input signal is kept on after the first input signal is turned on does not fall within a first range. The period during which both the first input signal and the second input signal are kept on after both the two input signals are turned on does not fall within the second range, and the second input signal is turned on. The input period of the gaming value is detected by any of the following: the period during which the second input signal is kept on does not fall within the third range;
After the non-interrupt processing is executed, the first input signal and the second input signal are not detected after the gaming value input abnormality is not detected after confirming that the first input signal is turned on. When both are confirmed to be off, it is determined that the game value has been entered,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
The first sensor and the second sensor are provided at positions where one game value input can be detected by both the first sensor and the second sensor,
When the first input signal is turned off within a predetermined period after the first input signal is turned on, the gaming value input abnormality is not detected and it is not determined that the gaming value is inputted. This is a gaming machine.

The gaming machine according to this aspect (2)
A gaming machine having a main control unit for controlling the progress of the game,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
When managing the game value output,
When the non-interrupt processing is executed, the first output abnormality of the gaming value can be detected,
The gaming machine is configured to detect a second output abnormality of the gaming value different from the first output abnormality of the gaming value when the interrupt process is executed.

The gaming machine according to this aspect (3)
A gaming machine having a main control unit for controlling the progress of the game,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
One set value can be selected from a plurality of set values, and the execution result of the lottery process can be different for each set value.
When the interrupt process is executed, it is determined whether or not the selected set value is within a predetermined range, and when it is determined that it is not within the predetermined range, an abnormality can be detected. Is a gaming machine characterized by

The gaming machine according to this aspect (4)
A main control unit for controlling the game progress;
A first sensor for detecting an input of game value;
A gaming machine further comprising a second sensor for detecting an input of gaming value,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
When managing the input of gaming value,
When the interrupt process is executed, a first input signal that is an input signal from the first sensor and a second input signal that is an input signal from the second sensor are generated,
When the non-interrupt processing is executed, it is periodically checked whether or not the first input signal is turned on. After confirming that the first input signal is turned on, the first input signal is turned on. Periodically check whether both the first input signal and the second input signal are turned off,
When the interrupt process is executed, a period during which the first input signal is kept on after the first input signal is turned on does not fall within a first range. The period during which both the first input signal and the second input signal are kept on after both the two input signals are turned on does not fall within the second range, and the second input signal is turned on. The input period of the gaming value is detected by any of the following: the period during which the second input signal is kept on does not fall within the third range;
After the non-interrupt processing is executed, the first input signal and the second input signal are not detected after the gaming value input abnormality is not detected after confirming that the first input signal is turned on. When both are confirmed to be off, it is determined that the game value has been entered,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
The first sensor and the second sensor are provided at positions where one game value input can be detected by both the first sensor and the second sensor,
When the first input signal is turned off within a predetermined period after the first input signal is turned on, the gaming value input abnormality is not detected and the gaming value is not judged to be inputted. And
As the interrupt process, it is configured to be able to execute a power-off process executed after detecting a power-off and an abnormality determination process for determining whether or not an abnormality of the gaming machine has occurred,
If a power interruption is detected during the abnormality determination process, the interrupt process is executed and then the power interruption process is executed when the next interrupt process is executed. It is a gaming machine characterized by being played.

The gaming machine according to this aspect (5)
A gaming machine having a main control unit for controlling the progress of the game,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
When managing the game value output,
When the non-interrupt processing is executed, the first output abnormality of the gaming value can be detected,
When the interrupt process is executed, the second output abnormality of the gaming value different from the first output abnormality of the gaming value can be detected,
As the interrupt process, it is configured to be able to execute a power-off process executed after detecting a power-off and an abnormality determination process for determining whether or not an abnormality of the gaming machine has occurred,
If a power interruption is detected during the abnormality determination process, the interrupt process is executed and then the power interruption process is executed when the next interrupt process is executed. It is a gaming machine characterized by being played.

The gaming machine according to this aspect (6)
A gaming machine having a main control unit for controlling the progress of the game,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
One set value can be selected from a plurality of set values, and the execution result of the lottery process can be different for each set value.
When the interrupt process is executed, it is determined whether or not the selected set value is within a predetermined range, and when it is determined that it is not within the predetermined range, an abnormality can be detected.
As the interrupt process, it is configured to be able to execute a power-off process executed after detecting a power-off and an abnormality determination process for determining whether or not an abnormality of the gaming machine has occurred,
If a power interruption is detected during the abnormality determination process, the interrupt process is executed and then the power interruption process is executed when the next interrupt process is executed. It is a gaming machine characterized by being played.

The gaming machine according to this aspect (7)
A ROM, a RAM, and a CPU;
A main control unit for controlling the game progress;
A first sensor for detecting an input of game value;
A gaming machine further comprising a second sensor for detecting an input of gaming value,
The ROM stores a program for controlling instructions to the CPU and data read according to the program,
The RAM is
It has a stack area that can save the data stored in the register,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
When managing the input of gaming value,
When the interrupt process is executed, a first input signal that is an input signal from the first sensor and a second input signal that is an input signal from the second sensor are generated,
When the non-interrupt processing is executed, it is periodically checked whether or not the first input signal is turned on. After confirming that the first input signal is turned on, the first input signal is turned on. Periodically check whether both the first input signal and the second input signal are turned off,
When the interrupt process is executed, a period during which the first input signal is kept on after the first input signal is turned on does not fall within a first range. The period during which both the first input signal and the second input signal are kept on after both the two input signals are turned on does not fall within the second range, and the second input signal is turned on. The input period of the gaming value is detected by any of the following: the period during which the second input signal is kept on does not fall within the third range;
After the non-interrupt processing is executed, the first input signal and the second input signal are not detected after the gaming value input abnormality is not detected after confirming that the first input signal is turned on. When both are confirmed to be off, it is determined that the game value has been entered,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
The first sensor and the second sensor are provided at positions where one game value input can be detected by both the first sensor and the second sensor,
When the first input signal is turned off within a predetermined period after the first input signal is turned on, the gaming value input abnormality is not detected and the gaming value is not judged to be inputted. And
As the interrupt process, it is configured to be able to execute an abnormality determination process for determining whether an abnormality of the gaming machine has occurred,
The stack area is divided into a first stack area and a second stack area,
When executing the abnormality determination process during execution of the interrupt process, after storing the address value of the stack pointer in the first stack area, the address value of the stack pointer is changed to the address value in the second stack area. The gaming machine is configured as described above.

The gaming machine according to this aspect (8)
A ROM, a RAM, and a CPU;
A gaming machine further comprising a main control unit for controlling the progress of the game,
The ROM stores a program for controlling instructions to the CPU and data read according to the program,
The RAM is
It has a stack area that can save the data stored in the register,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
When managing the game value output,
When the non-interrupt processing is executed, the first output abnormality of the gaming value can be detected,
When the interrupt process is executed, the second output abnormality of the gaming value different from the first output abnormality of the gaming value can be detected,
As the interrupt process, it is configured to be able to execute an abnormality determination process for determining whether an abnormality of the gaming machine has occurred,
The stack area is divided into a first stack area and a second stack area,
When executing the abnormality determination process during execution of the interrupt process, after storing the address value of the stack pointer in the first stack area, the address value of the stack pointer is changed to the address value in the second stack area. The gaming machine is configured as described above.

The gaming machine according to this aspect (9)
A ROM, a RAM, and a CPU;
A gaming machine further comprising a main control unit for controlling the progress of the game,
The ROM stores a program for controlling instructions to the CPU and data read according to the program,
The RAM is
It has a stack area that can save the data stored in the register,
The main control unit
After receiving the supply of power supply voltage for driving, permit the generation of interrupt processing that is controlled to occur periodically, execute non-interrupt processing other than the interrupt processing,
After a game value necessary for one game is input, a lottery process of a combination that affects a game result in the one game based on a game start operation is executed.
After executing the lottery process, start rotating the spinning cylinder,
After the spinning cylinder starts to rotate at a predetermined speed, the game result in the one game is displayed on the spinning cylinder after the spinning cylinder stopping operation is executed.
After the game result of the game is displayed on all the shells, the game value is output based on the displayed game result,
One set value can be selected from a plurality of set values, and the execution result of the lottery process can be different for each set value.
When the interrupt process is executed, it is determined whether or not the selected set value is within a predetermined range, and when it is determined that it is not within the predetermined range, an abnormality can be detected.
As the interrupt process, it is configured to be able to execute an abnormality determination process for determining whether an abnormality of the gaming machine has occurred,
The stack area is divided into a first stack area and a second stack area,
When executing the abnormality determination process during execution of the interrupt process, after storing the address value of the stack pointer in the first stack area, the address value of the stack pointer is changed to the address value in the second stack area. The gaming machine is configured as described above.

The gaming machine according to this aspect (10-1)
An interrupt program that occurs at regular intervals;
A first program which is a predetermined program including an interrupt program;
A second program other than the predetermined program,
After satisfying the first condition, the rotator rotates,
After satisfying the second condition, the rotator stops,
A spinning machine that waits until the first condition is satisfied again,
A first storage area writable by the first program;
A first stack area writable by the first program;
A second storage area writable by the second program;
A second stack area writable by the second program;
A stack pointer that is set or updated by the first program or the second program,
The first program includes at least a program for rotating the rotating drum,
In the first program, an interrupt program can be generated,
The second program is configured not to generate an interrupt program,
The program capacity is larger in the first program than in the second program,
The first storage area to be used is larger than the second storage area to be used,
The area used in the first stack area is larger than the area used in the second stack area,
The first program is always executed when the power is turned on,
A rotary game machine is characterized in that the second program is executed at least once after the first condition is satisfied and before the first condition is satisfied again.

The gaming machine according to this aspect (10-2)
An interrupt program that occurs at regular intervals;
A first program which is a predetermined program including an interrupt program;
A second program other than the predetermined program,
After satisfying the first condition, the identification information will change and display,
After the second condition is satisfied, the identification information is stopped and displayed.
A pachinko machine that waits until the first condition is satisfied again,
A first storage area writable by the first program;
A first stack area writable by the first program;
A second storage area writable by the second program;
A second stack area writable by the second program;
A stack pointer that is set or updated by the first program or the second program,
The first program includes at least a program for variably displaying the identification information,
In the first program, an interrupt program can be generated,
The second program is configured not to generate an interrupt program,
The program capacity is larger in the first program than in the second program,
The first storage area to be used is larger than the second storage area to be used,
The area used in the first stack area is larger than the area used in the second stack area,
The first program is always executed when the power is turned on,
The pachinko gaming machine is characterized in that the second program is executed at least once after the first condition is satisfied and before the first condition is satisfied again.

P Cylinder type game machine, DU front door (door)
D Door board, D10s Input acceptance sensor D20s First input sensor, D30s Second input sensor D40 Stop button, D41 Left stop button D42 Middle stop button, D43 Right stop button D50 Start lever, D60 Checkout button D70 Display panel, D80 Door switch D90 Coin shooter, D100 Blocker D130 Upper panel, D140 Lower panel D150 Decoration lamp unit, D160 Reel window D170 Medal slot, D180 Operation status indicator D190 Acquired number display device, D200 Credit number display device D210 Insertion number indicator, D220 Bet Button D230 Medal tray, D240 Release port D250 Special game state display device, D260 Key hole M Main control board, M10 Setting door switch M20 Setting key switch, M30 Setting / reset button M50 reel, M51 left reel M52 middle reel, M53 right reel S sub control board, S10 LED lamp S20 speaker, S30 swirl backlight S40 effect display device E power supply board, E10 power switch H medal payout device, H10s first payout sensor H20s second payout sensor, H40 hopper H50 disc, H50a disc rotation shaft H60 game medal outlet, H70 discharge urging means H80 hopper motor K spinning board, K10 spinning motor K20 spinning sensor IN relay board

Claims (1)

A gaming machine having a main control means having a ROM and a RAM,
The ROM stores at least a first program including a combination lottery process and a second program including an abnormality determination process for determining whether a predetermined abnormality has occurred ,
The RAM is
A first storage area including a first work area and a first stack area;
A second working area and a second storage area including a second stack area ;
A first stack area is disposed between the first work area and the second work area,
A second work area is arranged between the first stack area and the second stack area,
The main control means includes
Enable interrupt processing,
When a predetermined condition is satisfied, and can execute the combination lottery process,
The abnormality process is configured to be executed by the interrupt process,
Before determining whether or not the predetermined abnormality has occurred in the abnormality determination process, the address value of the current stack pointer is stored in a predetermined storage area, and then the stack pointer address value is associated with the second stack area . A gaming machine configured to be changed to a predetermined address value.

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