JP6351882B1 - Programmable logic controller and program - Google Patents

Abstract

The programmable logic controller according to the present invention includes a connection determination unit (124) that determines whether or not a nonvolatile storage device is connected, and when the nonvolatile storage device is connected, the nonvolatile storage device The control of the control target device is started using the data stored in the apparatus as the device value or parameter value.

Description

  The present invention relates to a programmable logic controller (PLC), a memory module, and a program.

  A programmable logic controller (hereinafter referred to as “PLC”) used as a control device for an industrial machine or the like includes a base unit and various units arranged on the base unit. Specifically, a signal from a power supply unit that supplies power to other units, a CPU (Central Processing Unit) unit that controls a device to be controlled connected to the PLC, a production device, a sensor attached to a facility device, or the like Various units, such as an input unit that inputs a control signal, an output unit that outputs a control output to an actuator, and a network unit for connecting to a communication network, are attached to the base unit to constitute a PLC.

  Among the above-mentioned various units constituting the PLC, the CPU unit appropriately updates device values and parameter values (hereinafter collectively referred to as data) used in device control, which are held in the memory. Control the equipment. The device value is a physical quantity indicating the state of the control target device. Conventional PLCs are volatile that allows high-speed memory access to data updated during control operations based on the relationship between the memory access speed, that is, the data write speed to the memory and the data read speed from the memory. A general configuration is provided with a backup battery that is held in a memory and prevents data loss due to a sudden power interruption. In addition, a nonvolatile memory having a slower memory access speed than a volatile memory is generally used for backup of data held in the volatile memory (for example, Patent Document 1).

JP-A-8-185208

  In the case of a configuration including a backup battery, it is necessary to periodically check the consumption and deterioration of the battery, and replace the battery with a new battery as necessary, which requires battery cost and maintenance work. In addition, data is lost when a failure occurs in the battery. Therefore, it is desired to realize a CPU unit that can eliminate the loss of data while realizing a battery-less configuration, that is, a configuration that does not require a backup battery. The memory of the CPU unit needs to consider the writing speed, capacity, reliability, and the like. Although it is possible to realize a battery-less CPU unit by using a non-volatile memory, a non-volatile memory that can be used in the CPU unit, that is, a non-volatile memory that satisfies the specifications required for the memory of the CPU unit Currently expensive. Therefore, the batteryless unit itself is expensive, and there are many users who use a unit that is not batteryless in terms of cost. By the way, the price of parts will become cheaper as it is distributed in the market, so it is expected that currently expensive non-volatile memory will become cheaper in the future, and a CPU unit with a battery-less configuration can be realized at a lower price. Is done. That is, in the future, it is expected that the cost of the nonvolatile memory that can be used in the CPU unit will be lower than the cost in the case of using a combination of a volatile memory and a data backup battery.

  The present invention has been made in view of the above, and an object thereof is to obtain a programmable logic controller that can be changed to a battery-less configuration in the future.

In order to solve the above-described problems and achieve the object, a programmable logic controller according to the present invention includes a battery connection unit for connecting a backup battery for data held in a volatile storage device. The programmable logic controller determines whether one of the volatile storage device and the nonvolatile storage device, or both the volatile storage device and the nonvolatile storage device are connected. The storage device that reads the device value or parameter value for controlling the device to be controlled is changed in accordance with the storage device connected between the nonvolatile storage device and the volatile storage device. The programmable logic controller controls the control target device using the device value or the parameter value stored in the changed storage device.

  The programmable logic controller according to the present invention is advantageous in that it can be changed from a configuration including a data backup battery to a battery-less configuration.

The figure which shows the structural example of PLC provided with the unit concerning Embodiment 1 of this invention. 1 is a diagram illustrating a configuration example of a CPU unit according to a first embodiment. 3 is a flowchart showing an operation example of the CPU unit according to the first embodiment. 6 is a flowchart showing an operation example when a volatile memory and a nonvolatile memory are mounted on the CPU unit according to the first embodiment. The figure which shows the structural example of the CPU unit concerning Embodiment 2. FIG.

  Below, a programmable logic controller, a memory module, and a program concerning an embodiment of the invention are explained in detail based on a drawing. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of a PLC including a unit according to the first embodiment of the present invention. The PLC 1 includes a base unit 10 that electrically connects various units for realizing functions required in production facilities, and a power supply unit 11, a CPU unit 12, and an input unit 13 that are various units connected to the base unit 10. The output unit 14 and the network unit 15 are provided. There may be a case where a plurality of units of the same type are connected to one base unit. The various units shown in FIG. 1 are examples.

  FIG. 2 is a diagram illustrating a configuration example of the CPU unit 12 according to the first embodiment. The CPU unit 12 is also referred to as a control unit, and includes a memory connection unit 120, a control unit 121 that controls a control target device such as an actuator connected to the output unit 14, and a control unit 121 during a control operation of the control target device. A memory 122 that holds data to be updated and a battery connection unit 123 are provided. The CPU unit 12 is a unit according to the present invention. The data held in the memory 122 is a device value and a parameter value.

The memory connection unit 120 is provided to mount a memory different from the memory 122 in the CPU unit 12. An example of the memory connection unit 120 is a land provided on a substrate. The control unit 121 is realized by an information processing apparatus, which is a processor having a small-capacity internal memory, executing a PLC sequence program. The memory 122 is a volatile memory, and holds data used by the control unit 121 in the control operation of the control target device. However, in the future, it is assumed that the nonvolatile memory connected to the memory connection unit 120 holds data such as device values and parameter values held in the memory 122. That is, the non-volatile memory connected to the control unit 121 via the memory connection unit 120 holds data such as device values and parameter values, so that a battery for backup of the memory 122 is not required. Assumes that. When a non-volatile memory is connected to the memory connection unit 120, the CPU 122 may be configured such that the memory 122 is removed in addition to the backup battery of the memory 122. The volatile memory is a volatile storage device, and the nonvolatile memory is a nonvolatile storage device.

  The battery connection unit 123 is a mechanism for connecting a backup battery for data stored in the memory 122, and includes a connector or the like. Note that the memory 122 may be configured to be detachable from the CPU unit 12 in the same manner as the data backup battery. That is, the control unit 121 and the memory 122 may be mounted on different substrates, and the control unit 121 and the memory 122 may be connected via a connection mechanism such as a connector.

  The control unit 121 includes a connection determination unit 124 that determines the type of memory that is connected, that is, the type of memory that is mounted on the CPU unit 12. The connection determination unit 124 determines whether or not the memory 122 that is a volatile memory is connected, and whether or not the nonvolatile memory is connected via the memory connection unit 120.

  FIG. 3 is a flowchart showing an operation example of the CPU unit 12 according to the first embodiment, and specifically shows an operation example of the operation executed when the control unit 121 starts sequence control of the control target device. ing. In the following description, the control operation refers to an operation of controlling a control target device by sequence control.

  The control unit 121 of the CPU unit 12 executes the process shown in FIG. 3 when an operator instructs the start of the control operation by performing an operation of an operation switch or the like not shown in FIG.

  When the control unit 121 detects the start instruction of the control operation, the control unit 121 confirms the connection of the memory to the memory connection unit 120 (step S11), and when the nonvolatile memory is connected and the volatile memory is not connected (step S11). S12: Yes, Step S15: No), sequence control using data held in the nonvolatile memory is started (Step S17). The case where the nonvolatile memory is connected refers to the case where the nonvolatile memory is connected to the memory connection unit 120. The state where the volatile memory is connected refers to a state where the memory 122 is mounted. In addition, when the non-volatile memory is connected and the volatile memory is also connected (Step S12: Yes, Step S15: Yes), the control unit 121 clears the data held in the volatile memory. Is executed (step S16). Specifically, the control unit 121 discards the stored data by clearing the memory 122, which is a volatile memory, to zero. When the discard of the data held in the volatile memory is completed, the control unit 121 starts sequence control using the data held in the nonvolatile memory (step S17).

  When both the volatile memory and the non-volatile memory are connected, the control unit 121 uses the data held in the non-volatile memory at the start of sequence control. Is stored in both a volatile memory and a nonvolatile memory. That is, when starting the sequence control, the control unit 121 first reads data such as device values and parameter values used for device control from the nonvolatile memory, and writes the read data to the volatile memory. Next, the control unit 121 performs sequence control using data held in the volatile memory, and appropriately updates the data held in the volatile memory. The operation of the control unit 121 when both the volatile memory and the nonvolatile memory are connected will be described separately.

  When the non-volatile memory is not connected and the volatile memory is connected (step S12: No, step S13: Yes), the control unit 121 displays the data or initial value held in the volatile memory. The used sequence control is started (step S14). A case where the initial value is used may be a case where data is not held in the volatile memory. The initial values of the device value and parameter value are described in the operation program of the control unit 121, for example.

  Further, when the non-volatile memory is not connected and the volatile memory is not connected (Step S12: No, Step S13: No), the control unit 121 ends the operation without starting the sequence control. .

  Of the processes shown in FIG. 3, the connection determination unit 124 executes the processes of steps S11 to S13 and S15. As a method for the connection determination unit 124 to determine the type of the connected memory, a method of determining from the voltage applied to the memory can be considered. When the operating voltages of the nonvolatile memory and the volatile memory are different, it is possible to determine the type of the memory based on the voltage. When the operating voltage is the same, a pull-up resistor or a pull-down resistor is added to the conventional circuit, and the voltage value is changed by resistance division so that the type of memory can be determined. Another possible method is to write information indicating the type in a specific area of the memory and read the information.

  The operation shown in FIG. 3 may be performed after the CPU unit 12 is started, that is, at the start of the first sequence control after the power of the PLC 1 is turned on and the power supply to the CPU unit 12 is started. However, this is not limited to the time when the first sequence control is started after the CPU unit 12 is activated, and may be always performed when starting the sequence control. 3 is performed only when the first sequence control after the CPU unit 12 is started, the control unit 121 performs the first sequence control after the CPU unit 12 is started. Before starting, steps S11 to S13, S15, and S16 may be executed in advance to check the memory connection state. That is, the control unit 121 may automatically execute steps S11 to S13, S15, and S16 when the CPU unit 12 is activated.

  In recent years, the access speed has been increased with the improvement of the performance of the non-volatile memory, and the data is retained using the non-volatile memory in the sequence control of the production facility or the like where the volatile memory has been used until now. It has also been considered. MRAM (Magnetoresistive Random Access Memory), also called magnetoresistive memory, is a non-volatile memory having memory access performance equivalent to volatile memory such as DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory). When an MRAM or a non-volatile memory having equivalent performance is connected to the memory connection unit 120, the memory 122 that is a volatile memory and the battery for data backup are not necessary. Also, if MRAM or a non-volatile memory having equivalent performance is connected to the memory connection unit 120 and the memory 122 is left as it is, that is, both the MRAM and the memory 122 are mounted. Even if it becomes, the battery for data backup of the memory 122 becomes unnecessary. That is, when MRAM or a non-volatile memory having equivalent performance is connected to the memory connection unit 120, the control unit 121 writes data used for control of the control target device to the non-volatile memory. The battery can be removed from the CPU unit 12 to form a battery-less configuration. Further, as a nonvolatile memory having a memory access performance equivalent to that of the MRAM, there are a resistance change type memory (ReRAM: Resistive Random Access Memory) and a ferroelectric memory (FeRAM: Ferroelectric Random Access Memory). You may use these as a non-volatile memory connected to the memory connection part 120. FIG.

In addition, before attaching a non-volatile memory to the memory connection unit 120, a “non-volatile memory with a small capacity” may be mounted in addition to the memory 122 which is a volatile memory . That is, in step S17 of FIG. 3, the control is started using both the data held in the “nonvolatile memory having a small capacity” and the data held in the attached nonvolatile memory as parameter values or device values. May be.

  FIG. 4 is a flowchart showing an operation example of the CPU unit 12 according to the first embodiment. Specifically, when both the volatile memory and the nonvolatile memory are mounted on the CPU unit 12, that is, FIG. The example of operation | movement of the control part 121 when it becomes Yes by step S15 of is shown. Here, when both the volatile memory and the non-volatile memory are connected, the control unit 121 uses the data held in the non-volatile memory when starting the sequence control, and after starting the sequence control. Stores data in volatile memory. The data stored in the volatile memory is updated each time the control unit 121 controls the control target device. The operation shown in FIG. 4 is executed for the purpose of updating the data in the non-volatile memory used at the start of sequence control to the latest state and using the latest data at the start of sequence control. It is an operation to do.

  The control unit 121 of the CPU unit 12 executes the operation shown in FIG. 3 to determine that both the volatile memory and the nonvolatile memory are connected, and starts the control operation, that is, the sequence control. It is confirmed whether or not it is the update timing of the data held in (step S21). The control unit 121 determines whether or not it is a data update timing by analyzing the sequence program. That is, the control unit 121 checks whether or not a command for instructing the update of data in the nonvolatile memory is described in the sequence program being executed, and updates the data if a data update command is detected. Judgment is timing. When it is determined that the update timing of the data in the nonvolatile memory is reached (step S21: Yes), the control unit 121 updates the data in the nonvolatile memory (step S24). Specifically, the control unit 121 reads data held in the volatile memory and writes the read data to the nonvolatile memory. Similarly, in the subsequent update of data in the nonvolatile memory, the control unit 121 reads the data held in the volatile memory and writes the read data to the nonvolatile memory. After performing the process of step S24, it returns to step S21 and continues the process. In addition, when an instruction is given to update the data in the nonvolatile memory before or after the start of sequence control, the data is updated according to the instruction.

  When the control unit 121 determines that it is not the update timing of the data in the nonvolatile memory (step S21: No), whether or not the control operation has been stopped, that is, the operator uses a switch or the like. It is confirmed whether or not an operation for stopping the sequence control has been performed (step S22). The control unit 121 confirms whether or not the corresponding operation has been performed by analyzing the input signal received from the input unit 13. When the control operation stop operation is performed (step S22: Yes), the control unit 121 updates the data in the nonvolatile memory (step S25) and stops the control operation (step S26). In addition, also when the sensor etc. which were attached to production equipment detect danger, and stop suddenly, the control part 121 performs step S25 and S26 process. That is, the control unit 121 updates data in the nonvolatile memory and performs an emergency stop of the control operation.

  After executing the step S26 and stopping the control operation, the control unit 121 determines whether or not a control operation start operation has been performed, that is, whether the operator has performed an operation to start sequence control using a switch or the like. It is confirmed whether or not (step S27). When the start operation of the control operation is performed (step S27: Yes), the control unit 121 starts the sequence control and returns to step S21 to continue the process. At this time, the control unit 121 may start the sequence control after confirming the connection state of the memory by executing the operation shown in FIG. When the control operation start operation has not been performed (step S27: No), the control unit 121 determines whether or not the power shut-off operation has been performed, that is, the operator uses a switch or the like from the power supply unit 11 to perform another operation. It is confirmed whether or not an operation for stopping power supply to the unit has been performed (step S28). When the power shutdown operation is not performed (step S28: No), the control unit 121 returns to step S27 and continues the process. When the power shutdown operation is performed (step S28: Yes), the control unit 121 shuts off the power and ends the process (step S30).

  Further, when the control operation stop operation is not performed (step S22: No), the control unit 121 confirms whether or not the power shut-off operation is performed (step S23). When the power shutdown operation is not performed (step S23: No), the control unit 121 returns to step S21 and continues the process. When the power shutdown operation is performed (step S23: Yes), the control unit 121 updates the data in the nonvolatile memory (step S29), shuts off the power, and ends the process (step S30).

  As shown in FIG. 4, in the state in which the sequence control is performed, the control unit 121, when it is time to update data in the nonvolatile memory, when an operation to instruct the stop of the control operation is performed, When an operation for shutting off the power is performed, the data in the nonvolatile memory is updated. As a result, both the volatile memory and the nonvolatile memory can hold the latest data, and the control unit 121 starts the control operation using the latest data held in the nonvolatile memory. can do. Therefore, a battery for backing up data held in the volatile memory becomes unnecessary.

  As described above, the control unit 121 of the CPU unit 12 according to this embodiment includes the connection determination unit 124 that determines whether or not the nonvolatile memory is connected, and when the nonvolatile memory is connected. Decided to use the data held in the non-volatile memory to perform the control operation. In addition, when both the nonvolatile memory and the volatile memory are connected, the control unit 121 uses the data held in the nonvolatile memory at the start of the control operation, and after starting the control operation, The data in the nonvolatile memory is updated so that the data held in the nonvolatile memory is the same as the data held in the nonvolatile memory. Furthermore, the control unit 121 updates the data in the nonvolatile memory even when the control operation is stopped and the power is shut off. As a result, the control unit 121 can perform sequence control using the latest data stored in the non-volatile memory, and even if a volatile memory is provided, it is not necessary to mount a data backup battery. Therefore, it is possible to realize a PLC having a configuration in which the battery for data backup is reduced.

  Further, according to the CPU unit 12 according to the present embodiment, the type of memory to be used can be changed in accordance with memory cost fluctuations. For example, the cost of using a non-volatile memory with high-speed memory access at a certain point in time is higher than the cost of using a volatile memory and a data backup battery. Even if it is large, it is conceivable that the costs of both are reversed over time. In such a case, first, the CPU unit 12 is realized by combining the volatile memory and the battery, and then the volatile memory and the battery are replaced with the nonvolatile memory when the price of the nonvolatile memory is reduced. Is possible. It is only necessary to connect a non-volatile memory to the memory connection unit 120, and it is not necessary to modify a program for operating as the control unit 121. Therefore, even users who have not introduced a CPU unit with a battery-less configuration in the initial state will switch to using a non-volatile memory when the price of the nonvolatile memory with the specifications necessary for realizing the CPU unit has been reduced. CPU unit can be realized at low cost. In other words, when a user who has forgotten to introduce a CPU unit with a batteryless configuration because it is expensive at the time of introducing a PLC, when the cost is lowered in the future, a CPU with a batteryless configuration at a low cost It becomes possible to change to a unit.

  In the present embodiment, the PLC 1 having the configuration in which the CPU unit 12 includes the memory connection unit 120 and the connection determination unit 124 has been described. It may be provided outside the CPU unit 12. The “outside of the CPU unit” corresponds to a unit other than the CPU unit 12 and the base unit 10 constituting the PLC 1.

Embodiment 2. FIG.
In the first embodiment, the configuration in which the control unit 121 of the CPU unit 12 has the connection determination unit 124 in advance has been described, but the CPU unit 12 is not limited to this configuration. In a state before the nonvolatile memory is connected to the memory connection unit 120, the control unit 121 may not have the connection determination unit 124.

  As described in the first embodiment, the control unit 121 is realized by a processor executing a PLC sequence program. Therefore, in the initial state, when it becomes necessary to connect the non-volatile memory to the memory connection unit 120 by causing the processor to execute a sequence program that does not include a program for operating as the connection determination unit 124. The sequence program may be updated. That is, when a non-volatile memory is connected to the memory connection unit 120 to realize the battery-less CPU unit 12, a sequence program executed by a processor (not shown) of the CPU unit 12 operates as the connection determination unit 124. The program may be rewritten to a sequence program including the above program.

  In this way, the sequence program for realizing the control unit 121 is rewritten at a necessary timing, that is, at a timing for realizing a battery-less connection by connecting a non-volatile memory to the memory connection unit 120, and a control having the connection determination unit 124 The unit 121 may be realized.

Embodiment 3 FIG.
FIG. 5 is a diagram illustrating a configuration example of a CPU unit according to the third embodiment. The CPU unit 12 described in the first and second embodiments has a memory connection unit 120 and is configured to be battery-less by mounting a nonvolatile memory in the CPU unit 12. On the other hand, the CPU unit 12a according to the present embodiment has a configuration in which a memory module in which a nonvolatile memory is mounted can be connected. As shown in FIG. 5, the CPU unit 12 a includes a control unit 121, a memory 122, a battery connection unit 123, and a memory module connection unit 125. The control unit 121, the memory 122, and the battery connection unit 123 are the same as the control unit 121, the memory 122, and the battery connection unit 123 of the CPU unit 12 according to the first embodiment. That is, the CPU unit 12a is obtained by replacing the memory connection unit 120 of the CPU unit 12 according to the first embodiment with the memory module connection unit 125. The memory module 20 is connected to the memory module connection unit 125.

  The memory module 20 includes a CPU unit connection unit 126 for connecting the CPU unit 12a and a memory 127 that is a nonvolatile memory. The memory module connection unit 125 of the CPU unit 12 a and the CPU unit connection unit 126 of the memory module 20 electrically connect the control unit 121 mounted on the CPU unit 12 a and the memory 127 mounted on the memory module 20. It is a connector for.

  The CPU unit 12a according to the present embodiment can realize battery-less operation by connecting the memory module 20. Also. The memory 127, which is a non-volatile memory for realizing the battery-less CPU unit 12a, can be easily attached and the workability is improved.

Embodiment 4 FIG.
In the third embodiment, the configuration in which the control unit 121 of the CPU unit 12a has the connection determination unit 124 in advance has been described. However, the CPU unit 12a is not limited to this configuration. In a state before the memory module 20 is connected to the memory module connection unit 125, the control unit 121 may not have the connection determination unit 124.

  That is, as in the second embodiment described above, in the initial state, the processor executes a sequence program having a configuration that does not include a program for operating as the connection determination unit 124, and the memory module connection unit 125 includes the memory module. The sequence program may be updated when it becomes necessary to connect 20. In this case, when the memory module 20 is connected to the memory module connection unit 125 to realize battery-less CPU unit 12a, a sequence program executed by a processor (not shown) of the CPU unit 12a operates as the connection determination unit 124. May be rewritten to a sequence program having a configuration including a program for performing the above.

Thus, required timing sequence program for implementing the control unit 121, i.e., rewriting the timing to achieve a battery-less and connect the memory module 20 to the memory module connection part 12 5, the connection determination section 124 You may make it implement | achieve the control part 121 which has.

  In the first to fourth embodiments, the control unit 121 of the CPU units 12 and 12a determines the type of memory connected to the CPU unit 12 or 12a. However, the constituent elements determine the type of memory connected to the control unit 121. May be provided separately. A component for determining the type of memory connected to the control unit 121 may be provided in a unit other than the CPU units 12 and 12a.

  The configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

  DESCRIPTION OF SYMBOLS 1 Programmable logic controller (PLC), 10 Base unit, 11 Power supply unit, 12, 12a CPU unit, 13 Input unit, 14 Output unit, 15 Network unit, 20 Memory module, 120 Memory connection part, 121 Control part, 122, 127 Memory, 123 Battery connection unit, 124 Connection determination unit, 125 Memory module connection unit, 126 CPU unit connection unit

Claims (7)

A battery connection for connecting a backup battery for data held in the volatile storage device;
Said either one of the volatile storage or non-volatile storage device, or connecting determining unit both the volatile memory and the nonvolatile storage device to determine whether it is connected,
A storage device that reads a device value or a parameter value for controlling a device to be controlled is changed according to a connected storage device among the nonvolatile storage device and the volatile storage device, and the changed storage device A control unit for controlling the device to be controlled using the device value or the parameter value stored in
A programmable logic controller comprising: When both the volatile storage device and the nonvolatile storage device are connected, the control unit stores data held by the volatile storage device before starting control of the control target device. Clear process,
The programmable logic controller according to claim 1. After executing the clear process, the control further writes the data held in the nonvolatile storage device to the volatile storage device and updates the data held in the volatile storage device. Control the target device,
The programmable logic controller according to claim 2. When executing the control, a process of writing the data held in the volatile storage device to the nonvolatile storage device at a predetermined timing, or an operation for instructing to stop the control Is performed, the volatile storage device retains the data stored in the volatile storage device when the process of writing the data to the nonvolatile storage device or the operation of shutting off the power is performed. Performing at least one of the processes of writing the data into the nonvolatile storage device;
The programmable logic controller according to claim 3. A memory module connection section to which a memory module configured to include the nonvolatile storage device can be attached and detached;
The programmable logic controller according to any one of claims 1 to 4, further comprising: The nonvolatile memory device is a magnetoresistive memory, a resistance change memory, or a ferroelectric memory.
The programmable logic controller according to any one of claims 1 to 5, wherein: A program executed by a unit that configures a programmable logic controller and has a battery connection unit for connecting a backup battery for data stored in a volatile storage device , and that controls a device to be controlled There,
One of the volatile storage device and the nonvolatile storage device, or a process for determining whether both the volatile storage device and the nonvolatile storage device are connected, and the nonvolatile storage device Processing for changing a storage device for reading a device value or parameter value for controlling a control target device according to a connected storage device among the storage device and the volatile storage device, and storing in the storage device after the change A process for controlling the device to be controlled using the device value or the parameter value being executed, and causing the information processing apparatus to execute the process .
A program characterized by that.

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