JP6318190B2 - Photodetector - Google Patents

Description

  The present invention relates to a light detection device.

  A front-illuminated photodiode array (semiconductor photodetecting element) having a plurality of avalanche photodiodes operating in Geiger mode and a quenching resistor connected in series to each avalanche photodiode is known. (For example, refer to Patent Document 1). In this photodiode array, a quenching resistor is provided on a semiconductor substrate on which an avalanche photodiode constituting each pixel is formed.

JP 2011-003739 A

  In the front-illuminated semiconductor photodetecting element described in Patent Document 1, the quenching resistor is disposed on the light incident surface (front surface) side of the semiconductor substrate. For this reason, the aperture ratio has to be lowered by the space where the quenching resistor is arranged, and there is a limit to the improvement of the aperture ratio.

  By the way, in the back-illuminated semiconductor photodetecting element, the quenching resistor is disposed on the surface (rear surface) side facing the light incident surface of the semiconductor substrate. Even in back-illuminated semiconductor photodetectors, if the size of each pixel is small due to factors such as an increase in the number of pixels, quenching resistors are placed outside each pixel area (active area) due to process design constraints. There are things you have to do. The multiplication region formed when each avalanche photodiode operates in the Geiger mode is located in the active region. As a result, the aperture ratio has to be lowered by the amount that the quenching resistor is disposed outside the active region.

  An object of the present invention is to provide a photodetection device capable of remarkably improving the aperture ratio.

  A photodetection device according to the present invention includes a semiconductor photodetection element having a semiconductor substrate including first and second main surfaces facing each other, a second photodetection element disposed opposite to the semiconductor photodetection element, A semiconductor photodetecting element that operates in a Geiger mode and that is electrically connected to each avalanche photodiode, and a plurality of avalanche photodiodes formed in the semiconductor substrate. And a first electrode disposed on the second main surface side of the semiconductor substrate, and the mounting substrate includes a plurality of second electrodes disposed on the third main surface side corresponding to each first electrode. Two electrodes and a quenching circuit electrically connected to each second electrode and disposed on the third main surface side, and corresponding to the first electrode and the first electrode The second electrode, Characterized in that it is connected via the amplifier electrodes.

  In the photodetecting device according to the present invention, the quenching circuit is arranged not on the semiconductor substrate of the semiconductor photodetecting element but on the mounting substrate. For this reason, each avalanche photodiode is formed in the semiconductor substrate without considering the space for arranging the quenching circuit. As a result, the aperture ratio of the light detection device (semiconductor light detection element) can be significantly improved.

  Each avalanche photodiode includes a semiconductor substrate of a first conductor, a first semiconductor region of a second conductivity type formed on the first main surface side of the semiconductor substrate, a first semiconductor region formed in the first semiconductor region A second conductivity type second semiconductor region having a higher impurity concentration than the region, and a third electrode disposed on the first main surface side of the semiconductor substrate and electrically connected to the second semiconductor region, The semiconductor substrate may be provided with a through electrode that penetrates the avalanche photodiode from the first main surface side to the second main surface side and electrically connects the corresponding third electrode and the first electrode. . In this case, the aperture ratio can be remarkably improved even when a front-illuminated semiconductor photodetecting element is used. In addition, since the third electrode and the first electrode are electrically connected through the through electrode, the third electrode, the through electrode, the first electrode, the bump electrode, and the second electrode from the second semiconductor region through the second electrode The wiring distance to the quenching circuit is relatively short. For this reason, the influence of the resistance and capacitance of the wiring is suppressed, and the time resolution is improved.

  Each avalanche photodiode forms a PN junction with a semiconductor substrate of a first conductor, a first semiconductor region of a second conductivity type formed on the second main surface side of the semiconductor substrate, and a first semiconductor region; A first conductivity type second semiconductor region having a higher impurity concentration than the semiconductor substrate, and the first semiconductor region and the first electrode may be electrically connected. In this case, the aperture ratio can be remarkably improved even when a back-illuminated semiconductor photodetecting element is used. In addition, since the first electrode and the second electrode are electrically connected via the bump electrode, the wiring distance from the first semiconductor region to the quenching circuit is extremely short. For this reason, the influence of the resistance and capacitance of the wiring is remarkably suppressed, and the time resolution is further improved.

  The mounting substrate may further include a common electrode to which a quenching circuit is connected in parallel. In this case, each avalanche photodiode (quenching circuit) can be connected in parallel without increasing the wiring distance.

  The quenching circuit may be a passive quenching circuit or an active quenching circuit.

  ADVANTAGE OF THE INVENTION According to this invention, the photodetector which can improve an aperture ratio remarkably can be provided.

It is a schematic perspective view which shows the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a mounting substrate. It is a circuit diagram of a photon detection device. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on the modification of this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on the modification of this embodiment. It is a schematic plan view of a mounting substrate.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  With reference to FIGS. 1-6, the structure of the photon detection apparatus 1 which concerns on this embodiment is demonstrated. FIG. 1 is a schematic perspective view showing a photodetecting device according to the present embodiment. FIG. 2 is a diagram for explaining a cross-sectional configuration of the photodetecting device according to the present embodiment. 3 and 4 are schematic plan views of the semiconductor photodetector element. FIG. 5 is a schematic plan view of the mounting substrate. FIG. 6 is a circuit diagram of the photodetector.

  As shown in FIGS. 1 and 2, the light detection device 1 includes a semiconductor light detection element 10 </ b> A, a mounting substrate 20, and a glass substrate 30. The mounting substrate 20 is disposed to face the semiconductor photodetecting element 10A. The glass substrate 30 is disposed to face the semiconductor photodetecting element 10A. The semiconductor photodetecting element 10 </ b> A is disposed between the mounting substrate 20 and the glass substrate 30.

  The semiconductor photodetecting element 10A is composed of a front-illuminated photodiode array PDA1. The photodiode array PDA1 has a semiconductor substrate 1N that has a rectangular shape in plan view. The semiconductor substrate 1N includes a main surface 1Na and a main surface 1Nb facing each other. The semiconductor substrate 1N is an N-type (first conductivity type) semiconductor substrate made of Si.

  The photodiode array PDA1 includes a plurality of avalanche photodiodes APD formed on the semiconductor substrate 1N. One avalanche photodiode APD constitutes one pixel in the photodiode array PDA1. Each avalanche photodiode APD is connected in parallel with each other in series with the quenching resistor R1, and a reverse bias voltage is applied from the power supply. The output current from the avalanche photodiode APD is detected by a signal processing unit SP described later.

  Each avalanche photodiode APD has a P-type (second conductivity type) first semiconductor region 1PA and a P-type (second conductivity type) second semiconductor region 1PB. The first semiconductor region 1PA is formed on the main surface 1Na side of the semiconductor substrate 1N. The second semiconductor region 1PB is formed in the first semiconductor region 1PA and has a higher impurity concentration than the first semiconductor region 1PA. The planar shape of the second semiconductor region 1PB is, for example, a polygon (in this embodiment, an octagon). The depth of the first semiconductor region 1PA is deeper than that of the second semiconductor region 1PB.

  The semiconductor substrate 1N has an N-type (first conductivity type) semiconductor region 1PC. The semiconductor region 1PC is formed on the main surface 1Na side of the semiconductor substrate 1N. The semiconductor region 1PC prevents a PN junction formed between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA from being exposed to a through-hole TH in which a later-described through-electrode TE is disposed. The semiconductor region 1PC is formed at a position corresponding to the through hole TH (through electrode TE).

  As shown also in FIG. 3, the avalanche photodiode APD has an electrode E1 disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E1 is connected to the second semiconductor region 1PB. The electrode E1 is formed on the semiconductor substrate 1N outside the second semiconductor region 1PB as viewed from the main surface 1Na side via the insulating layer L1. In FIG. 3, the description of the insulating layer L1 shown in FIG. 2 is omitted for clarity of the structure. The first semiconductor region 1PA is electrically connected to the electrode E1 through the second semiconductor region 1PB.

  As shown in FIG. 4, the avalanche photodiode APD includes an electrode (not shown) electrically connected to the semiconductor substrate 1N and disposed on the main surface 1Nb side of the semiconductor substrate 1N, an electrode E5, And an electrode E7 connected to the electrode E5. The electrode E5 is formed on the semiconductor substrate 1N outside the second semiconductor region 1PB as viewed from the main surface 1Nb side via an insulating layer L2. The electrode E7 is formed on the semiconductor substrate 1N overlapping with the second semiconductor region 1PB when viewed from the main surface 1Nb side via the insulating layer L2. That is, the electrode E7 is formed on a region corresponding to the second semiconductor region 1PB on the main surface 1Nb. In FIG. 4, the description of the passivation film PF shown in FIG. 2 is omitted for clarity of the structure.

  The photodiode array PDA1 includes a plurality of through electrodes TE. The through electrode TE is provided for each individual avalanche photodiode APD. The through electrode TE is formed so as to penetrate the semiconductor substrate 1N from the main surface 1Na side to the main surface 1Nb side. That is, the through electrode TE is disposed in the through hole TH that penetrates the semiconductor substrate 1N. The insulating layer L2 is also formed in the through hole TH. Therefore, the through electrode TE is disposed in the through hole TH via the insulating layer L2.

  The through electrode TE has one end connected to the electrode E1 and the other end connected to the electrode E5. The second semiconductor region 1PB is electrically connected to the electrode E7 via the electrode E1, the through electrode TE, and the electrode E5.

  The through electrode TE is disposed in a region between the avalanche photodiodes APD in plan view. In this embodiment, the avalanche photodiodes APD are two-dimensionally arranged in M rows in the first direction and N columns (M and N are natural numbers) in the second direction orthogonal to the first direction. The through electrode TE is formed in a region surrounded by four avalanche photodiodes APD. Since the through electrodes TE are provided for each avalanche photodiode APD, they are two-dimensionally arranged in M rows in the first direction and N columns in the second direction.

  The electrodes E1, E5, E7 and the through electrode TE are made of a metal such as aluminum. When the semiconductor substrate is made of Si, AuGe / Ni or the like is often used as the electrode material in addition to aluminum. Although it depends on the process design, the electrode E5, the electrode E7, and the through electrode TE can be integrally formed. As a method of forming the electrodes E1, E5, E7 and the through electrode TE, a sputtering method can be used.

  When Si is used, a Group 3 element such as B is used as the P-type impurity, and a Group 5 element such as N, P, or As is used as the N-type impurity. Even if N-type and P-type semiconductors are substituted for each other to form an element, the element can function. As a method for adding these impurities, a diffusion method or an ion implantation method can be used.

As a material of the insulating layers L1 and L2, SiO ₂ or SiN can be used. As a method for forming the insulating layer L1, L2, when the insulating layer L1, L2 consists of SiO _2, it is possible to use a thermal oxidation method or a sputtering method.

  The mounting substrate 20 has a main surface 20a and a main surface 20b facing each other. The mounting substrate 20 has a rectangular shape in plan view. Main surface 20a is opposed to main surface 1Nb of semiconductor substrate 1N. The mounting substrate 20 includes a plurality of electrodes E9 arranged on the main surface 20a side. As shown in FIGS. 2 and 6, the electrode E9 is disposed corresponding to the through electrode TE. Specifically, the electrode E9 is formed on each region of the main surface 20a facing the electrode E7.

  The side surface 1Nc of the semiconductor substrate 1N and the side surface 20c of the mounting substrate 20 are flush with each other as shown in FIGS. In other words, the outer edge of the semiconductor substrate 1N and the outer edge of the mounting substrate 20 coincide with each other in plan view.

  The electrode E7 and the electrode E9 are connected by a bump electrode BE. Thereby, the through electrode TE is electrically connected to the electrode E9 via the electrode E5, the electrode E7, and the bump electrode BE. The second semiconductor region 1PB is electrically connected to the electrode E9 via the electrode E1, the through electrode TE, the electrode E5, the electrode E7, and the bump electrode BE. The electrode E9 is also made of a metal such as aluminum like the electrodes E1, E5, E7 and the through electrode TE. As an electrode material, AuGe / Ni or the like may be used in addition to aluminum. The bump electrode BE is made of, for example, solder.

  The bump electrode BE is formed on the electrode E7 via an unillustrated UBM (Under Bump Metal). The UBM is made of a material that is electrically and physically connected to the bump electrode BE. An electroless plating method can be used as a method for forming the UBM. As a method for forming the bump electrode BE, a method of mounting a solder ball or a printing method can be used.

  As shown in FIG. 5, the mounting board 20 includes a plurality of quenching resistors R1 and a signal processing unit SP. The mounting substrate 20 constitutes an ASIC (Application Specific Integrated Circuit). In FIG. 5, the description of the passivation film PF shown in FIG. 2 is omitted for clarity of the structure.

  The quenching resistor R1 is disposed on the main surface 20a side. The quenching resistor R1 has one end electrically connected to the electrode E9 and the other end connected to the common electrode CE. The quenching resistor R1 constitutes a passive quenching circuit. A quenching resistor R1 is connected in parallel to the common electrode CE.

  The signal processing unit SP is disposed on the main surface 20a side. The signal processing unit SP has an input end electrically connected to the electrode E9 and an output end connected to the signal line TL. An output signal from each avalanche photodiode APD (semiconductor photodetecting element 10A) is input to the signal processing unit SP via the electrode E1, the through electrode TE, the electrode E5, the electrode E7, the bump electrode BE, and the electrode E9. The The signal processing unit SP processes an output signal from each avalanche photodiode APD. The signal processing unit SP includes a CMOS circuit that converts an output signal from each avalanche photodiode APD into a digital pulse.

  A passivation film PF having openings formed at positions corresponding to the bump electrodes BE is disposed on the main surface 1Nb side of the semiconductor substrate 1N and the main surface 20a side of the mounting substrate 20. The passivation film PF is made of SiN, for example. As a method for forming the passivation film PF, a CVD (Chemical Vapor Deposition) method can be used.

  The glass substrate 30 has a main surface 30a and a main surface 30b facing each other. The glass substrate 30 has a rectangular shape in plan view. Main surface 30a faces main surface 1Nb of semiconductor substrate 1N. The main surface 30b is flat. In the present embodiment, the main surface 30a is also flat. The glass substrate 30 and the semiconductor photodetecting element 10A are optically connected by an optical adhesive OA. The glass substrate 30 may be directly formed on the semiconductor photodetecting element 10A.

  Although not shown, a scintillator is optically connected to the main surface 30b of the glass substrate 30 by an optical adhesive. The scintillation light from the scintillator passes through the glass substrate 30 and enters the semiconductor photodetecting element 10A.

  The side surface 1Nc of the semiconductor substrate 1N and the side surface 30c of the glass substrate 30 are flush with each other as shown in FIG. In other words, the outer edge of the semiconductor substrate 1N and the outer edge of the glass substrate 30 coincide with each other in plan view.

  In the light detection device 1 (semiconductor light detection element 10A), an avalanche photodiode APD is formed by forming a PN junction between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA. Yes. The semiconductor substrate 1N is electrically connected to an electrode (not shown) formed on the back surface of the substrate 1N, and the first semiconductor region 1PA is connected to the electrode E1 through the second semiconductor region 1PB. The quenching resistor R1 is connected in series with the avalanche photodiode APD (see FIG. 6).

  In the photodiode array PDA1, each avalanche photodiode APD is operated in the Geiger mode. In the Geiger mode, a reverse voltage (reverse bias voltage) larger than the breakdown voltage of the avalanche photodiode APD is applied between the anode and the cathode of the avalanche photodiode APD. That is, the (−) potential V1 is applied to the anode and the (+) potential V2 is applied to the cathode. The polarities of these potentials are relative, and one of the potentials can be a ground potential.

  The anode is a P-type first semiconductor region 1PA, and the cathode is an N-type semiconductor substrate 1N. When light (photons) enters the avalanche photodiode APD, photoelectric conversion is performed inside the substrate to generate photoelectrons. Avalanche multiplication is performed in a region near the PN junction interface of the first semiconductor region 1PA, and the amplified electron group flows toward an electrode formed on the back surface of the semiconductor substrate 1N. That is, when light (photon) is incident on any pixel (avalanche photodiode APD) of the semiconductor photodetecting element 10A (photodiode array PDA1), it is multiplied and taken out from the electrode E9 as a signal, and the corresponding signal Input to the processing unit SP.

  As described above, in the present embodiment, the quenching resistor R1 is arranged on the mounting substrate 20 instead of the semiconductor substrate 1N of the semiconductor photodetector element 10A. For this reason, each avalanche photodiode APD is formed in the semiconductor substrate 1N without considering the space for disposing the quenching resistor R1. As a result, the aperture ratio of the light detection device 1 (semiconductor light detection element 10A) can be remarkably improved.

  Each avalanche photodiode APD has a semiconductor substrate 1N, a first semiconductor region 1PA, a second semiconductor region 1PB, and an electrode E1 electrically connected to the second semiconductor region 1PB. In each avalanche photodiode APD, a penetrating electrode TE penetrating from the main surface 1Na side to the main surface 1Nb side and electrically connecting the corresponding electrode E1 and electrode E5 is formed. Thereby, even when the front-illuminated semiconductor photodetecting element 10A is used, the aperture ratio can be remarkably improved. Further, since the electrode E1 and the electrode E5 are electrically connected through the through electrode TE, the second semiconductor region 1PB through the electrode E1, the through electrode TE, the electrodes E5 and E7, the bump electrode BE, and the electrode E9. To the quenching resistance R1 is relatively short. For this reason, in the photodetector 1, the influence of the resistance and capacitance of the wiring from the second semiconductor region 1PB to the quenching resistor R1 is suppressed, and the time resolution is improved.

  The mounting substrate 20 includes a common electrode CE to which a quenching resistor R1 is connected in parallel. Thereby, each avalanche photodiode APD (quenching resistor R1) can be connected in parallel without increasing the wiring distance.

  In the present embodiment, the mechanical strength of the semiconductor substrate 1N can be increased by the glass substrate 30 disposed to face the semiconductor photodetector 10A. This is particularly effective when the semiconductor substrate 1N is thinned.

  Next, with reference to FIG.7 and FIG.8, the structure of the photon detection apparatus 1 which concerns on the modification of this embodiment is demonstrated. FIG. 7 is a diagram for explaining a cross-sectional configuration of a photodetection device according to a modification of the present embodiment. FIG. 8 is a schematic plan view of the semiconductor photodetector element.

  As shown in FIGS. 7 and 8, the light detection device 1 includes a semiconductor light detection element 10 </ b> B, a mounting substrate 20, and a glass substrate 30. The mounting substrate 20 is disposed to face the semiconductor photodetecting element 10B. The glass substrate 30 is disposed to face the semiconductor photodetecting element 10B. The semiconductor photodetecting element 10 </ b> B is disposed between the mounting substrate 20 and the glass substrate 30.

  The semiconductor photodetecting element 10B is composed of a back-illuminated photodiode array PDA2. The photodiode array PDA2 has a semiconductor substrate 2N that has a rectangular shape in plan view. The semiconductor substrate 2N includes a main surface 2Na and a main surface 2Nb facing each other. The semiconductor substrate 2N is a P-type (first conductivity type) semiconductor substrate made of Si. The semiconductor substrate 2N is electrically connected to an electrode (not shown) formed on the main surface 2Nb side of the substrate 1N.

  The photodiode array PDA2 includes a plurality of avalanche photodiodes APD formed on the semiconductor substrate 2N. One avalanche photodiode APD constitutes one pixel in the photodiode array PDA2.

  Each avalanche photodiode APD has an N-type (first conductivity type) first semiconductor region 2PA and a P-type (second conductivity type) second semiconductor region 2PB. The first semiconductor region 2PA is formed on the main surface 2Nb side of the semiconductor substrate 2N. The second semiconductor region 2PB forms a PN junction with the first semiconductor region 2PA and has an impurity concentration higher than that of the semiconductor substrate 2N. The planar shape of the first semiconductor region 2PA is, for example, a polygon (in this embodiment, an octagon). The first semiconductor region 2PA functions as a cathode layer, and the second semiconductor region 2PB functions as a multiplication layer.

An accumulation layer and an insulating layer are disposed on the main surface 2Na side of the semiconductor substrate 2N (both not shown). The accumulation layer is formed by ion-implanting or diffusing P-type impurities in the semiconductor substrate 2N from the main surface 2Na side so as to have an impurity concentration higher than that of the semiconductor substrate 2N. The insulating layer is formed on the accumulation layer. As the material of the insulating layer, SiO ₂ or SiN can be used. As a method for forming the insulating layer, if the insulating layer is made of SiO ₂ may be used a thermal oxidation method or a sputtering method.

  As shown in FIG. 8, the avalanche photodiode APD includes an electrode E11 disposed on the main surface 2Nb side of the semiconductor substrate 2N. The electrode E11 is connected to the first semiconductor region 2PA. The electrode E11 is formed on the semiconductor substrate 2N corresponding to the first semiconductor region 2PA through the insulating layer L4 when viewed from the main surface 2Nb side. In FIG. 8, the description of the insulating layer L4 and the passivation film PF shown in FIG. 2 is omitted for clarification of the structure.

  The electrode E11 and the electrode E9 are connected by a bump electrode BE. Thereby, the first semiconductor region 2PA is electrically connected to the electrode E9 via the electrode E11 and the bump electrode BE. The electrode E11 is also made of a metal such as aluminum, like the electrode E9. As an electrode material, AuGe / Ni or the like may be used in addition to aluminum.

  As described above, also in the present modification, the quenching resistor R1 is disposed on the mounting substrate 20 instead of the semiconductor substrate 2N of the semiconductor photodetector 10B. For this reason, each avalanche photodiode APD is formed in the semiconductor substrate 2N without considering the space for disposing the quenching resistor R1. As a result, the aperture ratio of the light detection device 1 (semiconductor light detection element 10B) can be significantly improved.

  Each avalanche photodiode APD includes a semiconductor substrate 2N, a first semiconductor region 2PA, and a second semiconductor region 2PB, and the first semiconductor region 2PA and the electrode E9 are electrically connected. Thereby, even when the back-illuminated semiconductor photodetecting element 10B is used, the aperture ratio can be remarkably improved. In addition, since the electrode E11 and the electrode E9 are electrically connected via the bump electrode BE, the wiring distance from the first semiconductor region 2PA to the quenching resistor R1 is extremely short. For this reason, the influence of the resistance and capacitance of the wiring from the first semiconductor region 2PA to the quenching resistor R1 is remarkably suppressed, and the time resolution is further improved.

  Also in this modification, the mechanical strength of the semiconductor substrate 2N can be increased by the glass substrate 30 disposed to face the semiconductor photodetector 10B. This is particularly effective when the semiconductor substrate 2N is thinned.

  As shown in FIG. 9, in the semiconductor substrate 2N, the region where the plurality of avalanche photodiodes APD are formed is thinned from the main surface 2Na side, and the region where the plurality of avalanche photodiodes APD are formed in the semiconductor substrate 2N. The part corresponding to is removed. Around the thinned region, the semiconductor substrate 2N exists as a frame portion. The removal of the semiconductor substrate 2N can be performed by etching (for example, dry etching) or polishing.

  On the main surface 2Na side of the semiconductor substrate 2N, an accumulation layer AC and an insulating layer L5 are arranged. Accumulation layer AC is formed by ion-implanting or diffusing P-type impurities in semiconductor substrate 2N from the main surface 2Na side so as to have a higher impurity concentration than semiconductor substrate 2N. The insulating layer L5 is formed on the accumulation layer AC. As a material of the insulating layer L5, SiO2 or SiN can be used. As a method of forming the insulating layer L5, when the insulating layer L5 is made of SiO2, a thermal oxidation method or a sputtering method can be used.

  The preferred embodiments of the present invention have been described above. However, the present invention is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

  The mounting substrate 20 may include an active quenching circuit AQ as shown in FIG. 10 instead of the passive quenching circuit (quenching resistor). The active quenching circuit AQ also functions as the signal processing unit SP and includes a CMOS circuit. A common electrode CE and a signal line TL are connected to each active quenching circuit AQ.

  The active quenching circuit AQ converts the output signal from each avalanche photodiode APD into a digital pulse and performs the ON / OFF operation of the MOS using the converted digital pulse to perform the forced drop of the voltage and the reset operation. Do. Since the mounting substrate 20 includes the active quenching circuit AQ, the voltage recovery time when the semiconductor photodetector elements 10A and 10B operate in the Geiger mode can be reduced.

  The shapes of the first and second semiconductor regions 1PB, 1PB, 2PA, 2PB are not limited to the shapes described above, and may be other shapes (for example, a circular shape). The number (number of rows and number of columns) and arrangement of the avalanche photodiodes APD formed on the semiconductor substrates 1N and 2N are not limited to those described above.

  The present invention can be used in a light detection device that detects weak light.

  DESCRIPTION OF SYMBOLS 1 ... Photodetector, 1N, 2N ... Semiconductor substrate, 1Na, 1Nb, 2Na, 2Nb ... Main surface, 1PA ... First semiconductor region, 1PB ... Second semiconductor region, 2PA ... First semiconductor region, 2PB ... Second semiconductor Area: 10A, 10B ... Semiconductor photodetection element, 20 ... Mounting substrate, 20a, 20b ... Main surface, APD ... Avalanche photodiode, AQ ... Active quenching circuit, BE ... Bump electrode, CE ... Common electrode, E1, E5 E7, E9, E11 ... electrodes, PDA1, PDA2 ... photodiode array, R1 ... quenching resistor, TE ... penetrating electrode.

Claims (5)

A semiconductor substrate including first and second main surfaces facing each other, a plurality of avalanche photodiodes operating in Geiger mode and formed in the semiconductor substrate, and electrically connected to each of the avalanche photodiodes And a plurality of first electrodes arranged on the second main surface side of the semiconductor substrate, and a semiconductor photodetecting element,
And a third main surface facing the second main surface of the semiconductor substrate, and a plurality of second electrodes arranged on the third main surface side corresponding to each first electrode, and the semiconductor A mounting substrate disposed opposite to the light detection element;
A plurality of quenching circuits electrically connected to the plurality of second electrodes,
The first electrode and the second electrode corresponding to the first electrode are electrically connected via a bump electrode;
The plurality of quenching circuits are disposed on the mounting substrate ,
The corresponding first electrode and the second electrode are electrically connected, so that the plurality of avalanche photodiodes are respectively connected to the corresponding first electrode, the bump electrode, and the second electrode. The photodetecting device is connected in series with the corresponding quenching circuit. Each avalanche photodiode is
The semiconductor substrate of the first conductor;
A first semiconductor region of a second conductivity type formed on the first main surface side of the semiconductor substrate;
A second semiconductor region of a second conductivity type formed in the first semiconductor region and having an impurity concentration higher than that of the first semiconductor region;
A third electrode disposed on the first main surface side of the semiconductor substrate and electrically connected to the second semiconductor region,
The semiconductor substrate includes a through electrode that penetrates from the first main surface side to the second main surface side and electrically connects the corresponding third electrode and the first electrode for each avalanche photodiode. Is formed,
2. The light detection according to claim 1, wherein the plurality of avalanche photodiodes are connected in series to the corresponding quenching circuit via the corresponding third electrode and the through electrode, respectively. apparatus. Each avalanche photodiode is
The semiconductor substrate of the first conductor;
A first semiconductor region of a second conductivity type formed on the second main surface side of the semiconductor substrate;
A first conductivity type second semiconductor region that forms a PN junction with the first semiconductor region and has a higher impurity concentration than the semiconductor substrate;
The photodetecting device according to claim 1, wherein the first semiconductor region and the first electrode are electrically connected.   The said mounting board | substrate further contains the common electrode to which the said quenching circuit was connected in parallel, The optical detection apparatus as described in any one of Claims 1-3 characterized by the above-mentioned.   The said quenching circuit is a passive quenching circuit or an active quenching circuit, The optical detection apparatus as described in any one of Claims 1-4 characterized by the above-mentioned.

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