JP6295537B2 - Silicon carbide substrate and semiconductor element - Google Patents

Silicon carbide substrate and semiconductor element Download PDF

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JP6295537B2
JP6295537B2 JP2013161788A JP2013161788A JP6295537B2 JP 6295537 B2 JP6295537 B2 JP 6295537B2 JP 2013161788 A JP2013161788 A JP 2013161788A JP 2013161788 A JP2013161788 A JP 2013161788A JP 6295537 B2 JP6295537 B2 JP 6295537B2
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弘幸 長澤
弘幸 長澤
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Sumitomo Metal Mining Co Ltd
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本発明は、高機能半導体素子に用いられる炭化珪素基板に関するものである。特に、結晶内に線欠陥(転位)を含みつつも、それらの運動が抑制された炭化珪素基板を提供し、半導体素子の安定動作を可能にすることを目的とする。    The present invention relates to a silicon carbide substrate used for a high-performance semiconductor element. In particular, it is an object of the present invention to provide a silicon carbide substrate in which the movement is suppressed while including line defects (dislocations) in the crystal, and to enable stable operation of the semiconductor element.

高効率での電力制御などに用いられる半導体素子の基板となる化合物半導体結晶として、炭化珪素が用いられ始めている。半導体素子の基板材料として炭化珪素を用いると、その絶縁破壊電界強度の高さから、従来用いられているシリコン基板上のそれよりも、高耐圧または低損失で半導体素子を動作させることができる。しかしながら、炭化珪素基板にはシリコン基板よりも高密度の格子欠陥が含まれており、それらが半導体素子の性能に少なからず悪影響を及ぼす。たとえば、積層欠陥や転位などの構造欠陥は電流漏洩や絶縁破壊、あるいは順方向電圧の変動をもたらし、電力用半導体素子の性能や信頼性を著しく損なう。このため、半導体素子の基板として用いられる炭化珪素基板に対しては、欠陥密度の低減が望まれる。    Silicon carbide has begun to be used as a compound semiconductor crystal serving as a substrate of a semiconductor element used for power control with high efficiency. When silicon carbide is used as a substrate material of a semiconductor element, the semiconductor element can be operated with higher withstand voltage or lower loss than that on a conventionally used silicon substrate because of its high dielectric breakdown electric field strength. However, the silicon carbide substrate contains lattice defects with a higher density than the silicon substrate, and these adversely affect the performance of the semiconductor element. For example, structural defects such as stacking faults and dislocations cause current leakage, dielectric breakdown, or fluctuations in forward voltage, which significantly impairs the performance and reliability of power semiconductor elements. For this reason, a reduction in defect density is desired for a silicon carbide substrate used as a substrate for a semiconductor element.

以下には炭化珪素基板を形成する際の欠陥低減方法を述べる。炭化珪素をシリコン基板上にエピタキシャル成長する際の欠陥密度低減方法としては、例えば、特許文献1の特公平6−41400号公報に記載されている炭化珪素の厚さを制御する方法やK.Shibahara,S.Nishino,H.Matsunami,Appl.Phys.Lett.50(1987)pp.1888−1890(非特許文献1)に記載されているシリコン基板の表面法線軸を僅かに傾けるオフ角加工方法などがある。非特許文献1はシリコン(100)基板の〔011〕方向に数度程度の角度(オフ角)を付ける、いわゆるオフ基板を用いることによって極性面の配向方位を特定し、面欠陥の一種である反位相領域境界面を解消する手段を述べている。しかし、このオフ角を導入すると、特定方位にのみ優先して積層欠陥が伝播するため、それらの会合消滅機構が消失してしまい、積層欠陥密度の低減は困難であった。    Hereinafter, a method for reducing defects in forming a silicon carbide substrate will be described. As a defect density reduction method when epitaxially growing silicon carbide on a silicon substrate, for example, a method of controlling the thickness of silicon carbide described in Japanese Patent Publication No. 6-41400 of Patent Document 1, Shibahara, S .; Nishino, H .; Matsunami, Appl. Phys. Lett. 50 (1987) p. 1888-1890 (Non-patent Document 1) includes an off-angle machining method for slightly tilting the surface normal axis of a silicon substrate. Non-Patent Document 1 specifies a polar plane orientation orientation by using a so-called off-substrate that forms an angle (off angle) of about several degrees in the [011] direction of a silicon (100) substrate, and is a kind of surface defect. A means for eliminating the anti-phase region boundary is described. However, when this off-angle is introduced, stacking faults propagate only in a specific direction, so that their association annihilation mechanism disappears and it is difficult to reduce the stacking fault density.

本来、立方晶炭化珪素を(001)面上に成長すると、積層欠陥は4つの等価な{111}面に平行に伝播するため、対向する積層欠陥同士が会合して積層欠陥密度は減少する。ところが、[110]方位にオフ角度が導入されたシリコン(001)基板に炭化珪素を成長する場合、表面のステップによって(111)面に平行に伝播する積層欠陥が遮断され、積層欠陥の伝播方位は(−1−11)面に平行な方向に限定されてしまう。その結果、会合消滅機構が消失し、積層欠陥の完全消滅には至らない。    Originally, when cubic silicon carbide is grown on the (001) plane, stacking faults propagate in parallel to four equivalent {111} planes, so that opposing stacking faults meet to reduce the stacking fault density. However, when silicon carbide is grown on a silicon (001) substrate in which an off angle is introduced in the [110] direction, the stacking fault that propagates parallel to the (111) plane is blocked by the surface step, and the propagation direction of the stacking fault Is limited to the direction parallel to the (−1-11) plane. As a result, the association annihilation mechanism disappears, and the stacking fault does not completely disappear.

この問題を解決し、炭化珪素内の面欠陥である反位相領域境界面と積層欠陥の両者を低減させる方法として、特開2001−335935号公報(特許文献2)や、H.Nagasawa,T.Kawahara,K.Yagi,Mater.Sci.Forum389−393(2002)pp.319−322(非特許文献2)に記載されているように、1方向に平行な尾根を有する起伏が形成されたシリコン基板上に炭化珪素をエピタキシャル成長させる技術が開発された。1方向に平行な尾根を有する起伏加工されたシリコン(001)基板上に炭化珪素をヘテロエピタキシャル成長すると、反位相領域境界面および基板表面にC極性面を露出する積層欠陥が消滅する。しかしながら、Si極性面を表面に露出する積層欠陥は依然として残存する。この理由のひとつは、Si極性面を露出する積層欠陥が、成長時の格子歪に起因して常に発生していること、もうひとつは残留した積層欠陥を構成する転位(線欠陥)が結晶内で運動し、積層欠陥を拡張させるためである。特に、結晶成長プロセスのような高温下では、炭化珪素結晶内部に熱分布による歪が発生しやすく、積層欠陥の発生と拡大が促進される。特に、熱ひずみの量は結晶の口径に依存して増大するため、積層欠陥密度は結晶の口径に依存して増加する。    As a method for solving this problem and reducing both the antiphase region boundary surface and the stacking fault, which are surface defects in silicon carbide, Japanese Patent Laid-Open No. 2001-335935 (Patent Document 2), H. Nagasawa, T .; Kawahara, K .; Yagi, Mater. Sci. Forum 389-393 (2002) pp. As described in 319-322 (Non-Patent Document 2), a technique for epitaxially growing silicon carbide on a silicon substrate on which undulations having ridges parallel to one direction have been developed has been developed. When silicon carbide is heteroepitaxially grown on a undulated silicon (001) substrate having a ridge parallel to one direction, the stacking faults exposing the C phase plane at the antiphase region boundary surface and the substrate surface disappear. However, stacking faults that expose the Si polar face on the surface still remain. One reason for this is that stacking faults that expose the Si polar plane always occur due to lattice distortion during growth, and the other is that dislocations (line defects) that form the remaining stacking faults in the crystal. The reason is that the stacking faults are expanded by the movement. In particular, under a high temperature such as a crystal growth process, distortion due to heat distribution tends to occur inside the silicon carbide crystal, and the generation and expansion of stacking faults is promoted. In particular, since the amount of thermal strain increases depending on the diameter of the crystal, the stacking fault density increases depending on the diameter of the crystal.

以上のような残留積層欠陥を消滅させる手段として、特開2002−201099号公報(特許文献3)では、結晶基板上に形成する起伏を一方向のみならずこれと直交する方向にも形成している。この方法では、一方の起伏で形成されるステップフローと他方の起伏で形成されるステップフローとが互いに垂直な関係で競合する成長様式となるため、表面モフォロジーとして片方のステップフローを引きずったようなモフォロジーは消滅し、平坦な表面が得られる。しかしながら、一方向ならずこれと直交する方位にも傾斜が発生しているため、非特許文献2に記載されているような極性面方位の配向方位制御が損なわれ、反位相領域境界面の解消が導かれない。    As means for eliminating the above-mentioned residual stacking faults, Japanese Patent Application Laid-Open No. 2002-201099 (Patent Document 3) forms undulations formed on a crystal substrate not only in one direction but also in a direction orthogonal thereto. Yes. In this method, since the step flow formed by one undulation and the step flow formed by the other undulation compete with each other in a perpendicular relationship with each other, it seems that one step flow was dragged as a surface morphology. The morphology disappears and a flat surface is obtained. However, since the tilt is generated not only in one direction but also in the direction orthogonal thereto, the orientation direction control of the polar plane direction as described in Non-Patent Document 2 is impaired, and the antiphase region boundary surface is eliminated. Is not guided.

特開2001−257166号公報(特許文献4)ではサファイア基板上にGaN層を設け、その上にSiOで等価な3つの<11−20>方向に、正三角形開口部を作成しGaNを成長し、三角錐GaN成長層を形成している。三角錐GaN成長層上に島状GaN層形成して、サファイア基板上の全面にGaN成長層を成長すると、三角錐を埋め込むように、横方向成長が促進され、平坦になる。基板界面から垂直に延びる転位は、錐構造の斜面に到達すると偏向して、表面に到達せず、転位密度が低減するが、偏向され転位はSiO上の結晶領域で集合して再び上に伸びるので、表面には高密度転位領域が形成されてしまう。これに加え、炭化珪素内の積層欠陥のように特定方位に平行に伝播する面欠陥に対しては、いかなる開口部形成や横方向成長を駆使したとしても欠陥の伝搬方位が変わらず、低転位密度領域の形成には至らない。したがって、特開2001−257166号記載のサファイアを炭化珪素として、炭化珪素のホモエピタキシャル成長に転用したとしても、基板である炭化珪素の反位相領域境界面や積層欠陥が解消されていない限り、それらの面欠陥を含まない炭化珪素表面を得ることは不可能である。In Japanese Patent Laid-Open No. 2001-257166 (Patent Document 4), a GaN layer is provided on a sapphire substrate, and an equilateral triangular opening is formed in three <11-20> directions equivalent to SiO 2 to grow GaN. The triangular pyramid GaN growth layer is formed. When an island GaN layer is formed on the triangular pyramid GaN growth layer and the GaN growth layer is grown on the entire surface of the sapphire substrate, lateral growth is promoted and flattened so as to fill the triangular pyramid. Dislocations extending perpendicularly from the substrate interface are deflected when they reach the slope of the cone structure and do not reach the surface, reducing the dislocation density, but they are deflected and the dislocations gather in the crystalline region on SiO 2 and rise again Since it stretches, a high-density dislocation region is formed on the surface. In addition, for plane defects that propagate in parallel to a specific orientation, such as stacking faults in silicon carbide, the defect propagation orientation does not change and low dislocations can be used regardless of the formation of openings or lateral growth. It does not lead to the formation of a density region. Therefore, even if sapphire described in JP-A-2001-257166 is used as silicon carbide and diverted to homoepitaxial growth of silicon carbide, as long as the antiphase region boundary surface and stacking fault of silicon carbide as a substrate are not eliminated, those It is impossible to obtain a silicon carbide surface free from surface defects.

反位相領域境界面や積層欠陥を解消する手段としては、H.Hatta,T.Kawahara,K.Yagi、H.Nagasawa, S.Reshanov,A.Schoner,Mater.Sci.Forum717−720(2012)pp.173−176(非特許文献3)に記載されているように、炭化珪素基板表面にラインアンド スペース加工を施し、その後にスペース部分の空隙が残るようにエピタキシャル成長を実施し、積層欠陥の伝播を空隙部分で終端する手段も知られているが、この方法では隣接する空隙間の間隔と空隙の高さの関係に一定の制限があるほか、空隙部分が実質的に基板の電気抵抗を増加させること、空隙間では転位が自由に運動できること、そして基板表面への形状加工と複数回にわたるエピタキシャル成長など製造工程が複雑になるという問題点がある。    As a means for eliminating the anti-phase region boundary surface and stacking faults, H.C. Hatta, T .; Kawahara, K .; Yagi, H .; Nagasawa, S .; Reshanov, A .; Schoner, Mater. Sci. Forum 717-720 (2012) pp. As described in 173-176 (Non-patent Document 3), line and space processing is performed on the surface of the silicon carbide substrate, and then epitaxial growth is performed so that voids in the space portion remain, thereby preventing the propagation of stacking faults. There are also known means for terminating at the part, but this method has certain limitations on the relationship between the gap between adjacent gaps and the height of the gaps, and the gap part substantially increases the electrical resistance of the substrate. However, there are problems that dislocations can move freely in the gaps and that the manufacturing process becomes complicated, such as shape processing on the substrate surface and multiple times of epitaxial growth.

特公平6−41400号公報Japanese Patent Publication No. 6-41400 特開2001−335935号公報JP 2001-335935 A 特開2002−201099号公報JP 2002-201099 A 特開2001−257166号公報JP 2001-257166 A

K.Shibahara,S.Nishino,H.Matsunami,Appl.Phys.Lett.50(1987)pp.1888−1890K. Shibahara, S .; Nishino, H .; Matsunami, Appl. Phys. Lett. 50 (1987) p. 1888-1890 H,Nagasawa,T.Kawahara,K.Yagi,Mater.Sci.Forum389−393(2002)pp.319−322H, Nagasawa, T .; Kawahara, K .; Yagi, Mater. Sci. Forum 389-393 (2002) pp. 319-322 H.Hatta,T.Kawahara,K.Yagi、H.Nagasawa,S.Reshanov,A.Schoner,Mater.Sci.Forum717−720(2012)pp.173−176H. Hatta, T .; Kawahara, K .; Yagi, H .; Nagasawa, S .; Reshanov, A .; Schoner, Mater. Sci. Forum 717-720 (2012) pp. 173-176

本発明は上記問題点を鑑みてなされたものであり、結晶を成長するための基板にいかなる加工を施すこともせず、熱歪や格子不整合に起因する欠陥の発生や伝播を阻み、高機能かつ安定な動作の半導体素子を実現させうる低欠陥密度の炭化珪素基板を提供することを目的とするものである。    The present invention has been made in view of the above-mentioned problems, does not perform any processing on the substrate for growing a crystal, prevents the generation and propagation of defects due to thermal strain and lattice mismatch, and has high functionality. It is another object of the present invention to provide a silicon carbide substrate having a low defect density capable of realizing a semiconductor element that operates stably.

上記目的を達成するために、本発明は、以下の構成としてある。
(構成1)炭素と珪素の共有結合による周期的結晶格子からなる板状の単結晶炭化珪素基板であり、その炭化珪素基板の一部または全部の領域(不純物添加領域)において、炭素または珪素が配置すべき格子位置の一部が炭素、珪素、酸素、鉄、コバルト、ニッケル フッ素、ヨウ素のうちの一種類以上の不純物元素で置換されていることを特長とする炭化珪素基板。
In order to achieve the above object, the present invention has the following configuration.
(Configuration 1) A plate-like single crystal silicon carbide substrate composed of a periodic crystal lattice formed by covalent bonding of carbon and silicon. In a part or all of the silicon carbide substrate (impurity added region), carbon or silicon is A silicon carbide substrate characterized in that a part of lattice positions to be arranged is substituted with one or more impurity elements of carbon, silicon, oxygen, iron, cobalt, nickel fluorine, and iodine.

(構成2)構成1の炭化珪素基板であり、その不純物添加領域内において、不純物濃度は珪素濃度の0.1ppm以上かつ10ppm以下の割合で置換していることを特長とする炭化珪素基板。    (Structure 2) A silicon carbide substrate according to Structure 1, wherein the impurity concentration is substituted at a ratio of 0.1 ppm or more and 10 ppm or less of the silicon concentration in the impurity added region.

(構成3)構成1から2の炭化珪素基板であり、かつ構成1に記載された不純物添加領域と不純物不添加領域の境界が基板結晶格子の最稠密面と平行ではないことを特長とする炭化珪素基板。    (Structure 3) Carbonization characterized in that it is a silicon carbide substrate according to structures 1 and 2, and the boundary between the impurity-added region and the impurity-free region described in structure 1 is not parallel to the densest surface of the substrate crystal lattice. Silicon substrate.

(構成4)2つ以上の電極を有し、印加される電流、電圧、圧力、光によって異なる電極間のインピーダンスが変化する半導体素子であり、かつ構成1から構成3に記載された炭化珪素基板上に設けられていることを特長とする半導体素子。    (Structure 4) A silicon carbide substrate having two or more electrodes, wherein the impedance is different between different electrodes depending on applied current, voltage, pressure, and light, and is described in Structure 1 to Structure 3. A semiconductor element characterized by being provided above.

従来は、会合消滅や空隙により欠陥の伝播や拡大を抑制していたが、会合消滅確率は積層欠陥密度に比例するので、積層欠陥数が減少するに従い、それらの密度低減効果(単位厚さあたり減少する積層欠陥密度)は低下し、一定の値以下に低減させることは困難となる。このような会合消滅や空隙での終端に拠らず積層欠陥や転位密度を低減するため、本発明では図1に示すように炭化珪素結晶内の不純物添加領域(101)に転位の運動を妨げるように不純物を添加する。添加不純物は炭化珪素を構成する炭素(102)と珪素(103)の格子位置に炭素(104)、珪素(105)、酸素(106)、鉄(107)、コバルト(108)、ニッケル(109)、フッ素(110)、ヨウ素(111)のうちの一種類以上である。    Conventionally, the propagation and expansion of defects was suppressed by association annihilation and voids, but the probability of association annihilation is proportional to the stacking fault density, so as the number of stacking faults decreases, the density reduction effect (per unit thickness) Decreasing stacking fault density) decreases, and it is difficult to reduce it to a certain value or less. In order to reduce stacking faults and dislocation density regardless of such association annihilation and termination at voids, in the present invention, as shown in FIG. 1, the movement of dislocations is prevented in the impurity added region (101) in the silicon carbide crystal. Impurities are added as follows. The added impurities are carbon (104), silicon (105), oxygen (106), iron (107), cobalt (108), nickel (109) at the lattice positions of carbon (102) and silicon (103) constituting silicon carbide. , Fluorine (110), or iodine (111).

酸素、鉄、コバルト、ニッケル フッ素、ヨウ素が置換する位置は本来の炭素位置でも珪素位置でも不問であるが、炭素が不純物である場合には本来の珪素位置を置換し、珪素が不純物である場合には本来の炭素位置を置換しなければならない。置換する不純物の原子半径は、炭素の原子半径(0.79オングストローム)より小さいか、珪素の原子半径(1.11オングストローム)より大きく、それらが本来の珪素位置または炭素位置が不純物に置換されると、置換した不純物は結晶内を運動する転位に対するパイエルス−ナバロ力を高じさせ、それらを不動化するとともに積層欠陥の拡張を防ぐ。したがって、不純物が置換された領域は結晶全体であることが望ましいが、少なくとも領域の幅が積層欠陥の平均的な大きさ以上であればその効果が発現する。    The position where oxygen, iron, cobalt, nickel fluorine, and iodine are substituted is not limited to the original carbon position or silicon position, but when carbon is an impurity, the original silicon position is replaced and silicon is an impurity. Must replace the original carbon position. The atomic radius of the impurity to be substituted is smaller than the atomic radius of carbon (0.79 angstrom) or larger than the atomic radius of silicon (1.11 angstrom), so that the original silicon position or carbon position is replaced with the impurity. The substituted impurities increase the Peierls-Navarro force against dislocations moving in the crystal, immobilizing them and preventing the extension of stacking faults. Therefore, it is desirable that the region where the impurities are replaced is the entire crystal, but the effect is exhibited if at least the width of the region is equal to or larger than the average size of the stacking fault.

また、不純物が結晶格子を置換した領域の形状には特段の制限は無いが、少なくとも転位が運動する最稠密面(112)と平行ではないことが転位の不動化をもたらすための必要条件である。    In addition, the shape of the region in which the impurity has replaced the crystal lattice is not particularly limited, but at least it is not necessary to be parallel to the closest dense surface (112) where the dislocation moves, which is a necessary condition for causing dislocation immobilization. .

また、不純物原子が結晶格子にとどまっている限り、転位の運動の妨げになるので、たとえば電界、電流、圧力、光が印加されたとしても転位の不動化は保たれ、半導体素子の動作特性は安定化する。したがって、不純物の添加は結晶を作製している最中でも良いし、結晶を作製した後、あるいは半導体素子を製造した後でも本発明の効果は発現する。    Also, as long as the impurity atoms remain in the crystal lattice, the dislocation movement is hindered. For example, even when an electric field, current, pressure, or light is applied, the dislocation is kept immobilized, and the operating characteristics of the semiconductor element are Stabilize. Therefore, the addition of impurities may be performed during the production of the crystal, and the effect of the present invention is exhibited even after the production of the crystal or the production of the semiconductor element.

結晶成長中に不純物を添加する場合は、炭化珪素の原料(炭素を含むガスと珪素を含むガス)に不純物を含むガスを混入させれば良いが、この際の炭素を含むガスと珪素を含むガスの流量比を変化させれば、不純物が置換する格子位置を選択可能であり、不純物を含むガスの供給量を変えれば炭化珪素中の不純物濃度を制御することができる。また、結晶を成長した後であれば、イオン注入や熱拡散を用いて不純物を添加することも可能である。    When impurities are added during crystal growth, a gas containing impurities may be mixed into a silicon carbide raw material (a gas containing carbon and a gas containing silicon). In this case, the gas containing carbon and silicon are included. If the gas flow ratio is changed, the lattice position where the impurities are replaced can be selected, and if the supply amount of the gas containing impurities is changed, the impurity concentration in the silicon carbide can be controlled. Further, it is possible to add impurities by ion implantation or thermal diffusion after the crystal is grown.

本発明に係る炭化珪素基板の断面図である。    It is sectional drawing of the silicon carbide substrate which concerns on this invention.

本発明を実施するための形態Mode for carrying out the present invention

本発明は炭化珪素の結晶多形のいずれに対しても効果を発揮するが、その効果は最稠密面である{111}面数の多い立方晶炭化珪素基板において顕著である。また、その主表面(結晶の表面の中で、最も露出している面積が大きい部分)が(001)面に平行であり、これと平行な裏面を有する板状の結晶であると、不純物添加領域が基板表面と平行になり、かつ、いかなる稠密面とも平行にならないので最適である。    The present invention is effective for any of the silicon carbide crystal polymorphs, but the effect is remarkable in a cubic silicon carbide substrate having a large number of {111} faces, which is the most dense surface. Further, if the main surface (the portion of the surface of the crystal that has the largest exposed area) is parallel to the (001) plane and is a plate-like crystal having a back surface parallel to the (001) plane, impurities are added. It is optimal because the region is parallel to the substrate surface and not parallel to any dense surface.

不純物の添加領域は基板全体でも良いが、不純物が基板の電気抵抗を変化させるので、基板の固有抵抗を大きく変化させたくない場合には、基板表面に平行な層状に添加しても、本発明の効果は発現する。特に、基板の表面近傍の20マイクロメートル程度の領域は半導体素子の空乏層が拡大するので、半導体素子の耐圧や抵抗を制御する観点から、不純物添加領域から除外するほうが望ましい。    The added region of the impurity may be the entire substrate, but since the impurity changes the electrical resistance of the substrate, if it is not desired to greatly change the specific resistance of the substrate, it may be added in a layer parallel to the substrate surface. The effect of. In particular, since the depletion layer of the semiconductor element expands in the region of about 20 micrometers near the surface of the substrate, it is desirable to exclude it from the impurity added region from the viewpoint of controlling the breakdown voltage and resistance of the semiconductor element.

添加する不純物は炭素、珪素、酸素、鉄、コバルト、ニッケル フッ素、ヨウ素のいずれでも良いが、不純物添加のしやすさ、半導体素子製造工程への汚染回避の観点からは炭素、珪素、酸素のいずれかから選ばれる元素を用いることが望ましい。さらに、多量の炭素を珪素位置に置換したり、多量の珪素を炭素位置に置換すると反位相領域境界面を発生させる原因となるので、不純物としては酸素が最も望ましい。    The impurity to be added may be any of carbon, silicon, oxygen, iron, cobalt, nickel fluorine, and iodine. However, from the viewpoint of easy addition of impurities and avoiding contamination in the semiconductor device manufacturing process, any of carbon, silicon, and oxygen may be added. It is desirable to use an element selected from these. Further, substitution of a large amount of carbon at the silicon position or substitution of a large amount of silicon at the carbon position causes the occurrence of an antiphase region interface, so oxygen is the most desirable as an impurity.

不純物濃度は炭化珪素を構成する珪素濃度の0.1ppm以上かつ10ppm以下であれば本発明の効果が発現するが、不純物濃度が低い場合には転位の運動に対する抑止効果が薄れること、不純物濃度が高い場合には不純物が析出したり電気抵抗を増大させる可能性があることから、0.2ppm以上かつ10ppm以下、さらに望ましくは0.5ppm以上かつ5ppm以下であることが望ましい。    If the impurity concentration is 0.1 ppm or more and 10 ppm or less of the silicon concentration constituting silicon carbide, the effect of the present invention is exhibited. However, when the impurity concentration is low, the effect of suppressing the movement of dislocations is reduced, and the impurity concentration is low. If it is high, impurities may be deposited or the electrical resistance may be increased. Therefore, it is preferably 0.2 ppm or more and 10 ppm or less, more preferably 0.5 ppm or more and 5 ppm or less.

不純物元素は、イオン注入や熱拡散で添加することも可能であるが、イオン注入では不純物添加領域がイオンの飛程に限定されること、熱拡散では炭化珪素内における不純物の拡散係数が低いことから、結晶成長時に結晶の炭化珪素の原料ガスに不純物を混入して不純物添加を行うことが望ましい。不純物源として酸素を添加する場合には酸素ガスを原料ガスに混入させても良いが、一般に、気相成長では水素がキャリアガスとして用いられることから酸素と水素が反応して爆発を起こす危険性があるので、二酸化炭素や窒素酸化物など水素と混合しても爆発しないガスを用いることが望ましい。  Impurity elements can be added by ion implantation or thermal diffusion, but the impurity addition region is limited to the ion range in ion implantation, and the diffusion coefficient of impurities in silicon carbide is low in thermal diffusion. Therefore, it is desirable to add impurities by mixing impurities into the silicon carbide raw material gas during crystal growth. When oxygen is added as an impurity source, oxygen gas may be mixed into the raw material gas. However, in general, hydrogen is used as a carrier gas in vapor phase growth, so there is a risk of oxygen and hydrogen reacting to cause an explosion. Therefore, it is desirable to use a gas that does not explode even when mixed with hydrogen, such as carbon dioxide or nitrogen oxides.

最良の形態を具現化するための方法は、たとえば以下の通りである。
市販のシリコン単結晶ウエハ(001)面を基板として、立方晶炭化珪素をエピタキシャル成長する。炭化珪素の成長にあたっては、CVD(化学的気相堆積法)、MBE(分視線エピタキシー法)、LPE(液相エピタキシー法)などを用いることができるが、いずれにしてもSi源とC源の供給量を個々に調整できることが望ましく、さらにはガスとしてその流量を精密に調整してSi源とC源の供給比率を変化させることが望ましいのでCVD法が最適である。CVD法ではSi源とC源の供給比率を適宜調整することにより、Si面とC面の成長速度に差をつけて、特定の結晶面を特定の結晶方位に配向させることが可能となる。たとえば、Si面が(111)と(−1−11)面、C面が(−111)と(1−11)面となるように配置する。このようにして配向方位を調整することにより、本来結晶格子に珪素が位置すべき箇所に炭素を配置したり、本来結晶格子に炭素が位置すべき箇所に珪素を配置することが可能になる。また、酸素を添加する場合にはSi源とC源のガスに加えて、炭素酸化物(CO,CO)や窒素酸化物(NO,NO)ガスを混入させ、かつSi源とC源のガスの供給比率を適宜調整すると、酸素が配置する格子位置を任意に制御することができる。添加する不純物の量は二酸化炭素や窒素酸化物ガスの流量によって制御可能であり、流量を増加させるほど添加不純物濃度は増加する。最適な不純物原料ガス流量は、炭化珪素を成長する温度における不純物原料ガスと炭素と珪素の原料ガスの分解効率の比によって変化するが、それらは実験的に求めることが可能である。このように、ガスの供給量や供給量比を調整すれば、添加不純物濃度を任意に制御可能である。
A method for realizing the best mode is, for example, as follows.
Cubic silicon carbide is epitaxially grown using a commercially available silicon single crystal wafer (001) surface as a substrate. For the growth of silicon carbide, CVD (Chemical Vapor Deposition), MBE (Sensitive Line Epitaxy), LPE (Liquid Phase Epitaxy), etc. can be used. It is desirable that the supply amount can be adjusted individually, and further, it is desirable to change the supply ratio of the Si source and the C source by precisely adjusting the flow rate as a gas, so that the CVD method is optimal. In the CVD method, by appropriately adjusting the supply ratio of the Si source and the C source, it becomes possible to orient the specific crystal plane in the specific crystal orientation by making a difference in the growth rate of the Si plane and the C plane. For example, it arrange | positions so that Si surface may become (111) and (-1-11) surface, and C surface may become (-111) and (1-11) surface. By adjusting the orientation azimuth in this way, it is possible to arrange carbon at a location where silicon should originally be located in the crystal lattice, or to place silicon at a location where carbon should be originally located in the crystal lattice. When oxygen is added, in addition to Si source and C source gas, carbon oxide (CO, CO 2 ) or nitrogen oxide (NO, NO 2 ) gas is mixed, and Si source and C source are mixed. By appropriately adjusting the gas supply ratio, the lattice position where oxygen is arranged can be arbitrarily controlled. The amount of impurities to be added can be controlled by the flow rate of carbon dioxide or nitrogen oxide gas, and the concentration of the added impurities increases as the flow rate is increased. The optimum impurity source gas flow rate varies depending on the ratio of the decomposition efficiency of the impurity source gas and the carbon and silicon source gas at the temperature at which silicon carbide is grown, but these can be obtained experimentally. Thus, the additive impurity concentration can be arbitrarily controlled by adjusting the gas supply amount and the supply amount ratio.

また、不純物を添加する層の位置と厚さは、不純物原料ガスの供給開始時間と供給継続時間によって制御することが可能である。たとえば、炭化珪素の成長速度が50マイクロメートル/時であると仮定し、酸素が添加された層がシリコン基板と炭化珪素の界面から、100マイクロメートルから150マイクロメートルの範囲に位置するように制御する場合には、炭化珪素の成長を開始して2時間を経た後に不純物原料ガスの供給を開始し、その後1時間供給を継続すればよい。この場合、不純物を添加された層は立方晶炭化珪素の(001)面と略平行になるので、その稠密面である{111}面と交差して、転位の不動化が実現する。    Further, the position and thickness of the layer to which the impurity is added can be controlled by the supply start time and the supply continuation time of the impurity source gas. For example, assuming that the growth rate of silicon carbide is 50 micrometers / hour, the oxygen-added layer is controlled to be in the range of 100 micrometers to 150 micrometers from the interface between the silicon substrate and silicon carbide. In this case, the supply of the impurity source gas may be started after two hours have passed after the growth of silicon carbide is started, and then the supply may be continued for one hour. In this case, since the layer to which the impurity is added is substantially parallel to the (001) plane of cubic silicon carbide, dislocations are immobilized by crossing the {111} plane which is the dense plane.

<第1実施形態>
はじめに、直径6インチのシリコン(001)基板表面にCVD装置内にて極薄の炭化珪素層を形成する。炭素の原料ガスであるC、およびキャリアガスであるHは、室温より基板表面に供給し、その後、基板温度を所定の成長温度である1350℃まで昇温する。ガスの供給量と圧力は、表1に示したとおりである。
<First Embodiment>
First, an extremely thin silicon carbide layer is formed on the surface of a silicon (001) substrate having a diameter of 6 inches in a CVD apparatus. Carbon source gas C 2 H 2 and carrier gas H 2 are supplied to the substrate surface from room temperature, and then the substrate temperature is raised to a predetermined growth temperature of 1350 ° C. The gas supply amount and pressure are as shown in Table 1.

Figure 0006295537
Figure 0006295537

基板表面温度が1350℃に到達した直後にSi原料であるSiHClとC原料であるCそしてHを供給することにより炭化珪素を気相成長する。この場合の成長条件は、表2に示したとおりである。成長時の圧力は、反応室と排気装置間に設置したスロットルバルブで調整する。Immediately after the substrate surface temperature reaches 1350 ° C., SiH 2 Cl 2 as Si raw material, C 2 H 2 and H 2 as C raw material are supplied to vapor-phase grow silicon carbide. The growth conditions in this case are as shown in Table 2. The growth pressure is adjusted with a throttle valve installed between the reaction chamber and the exhaust system.

Figure 0006295537
Figure 0006295537

以上の条件で8時間成長をおこない、450マイクロメートルの立方晶炭化珪素をシリコン基板上に成長する。    Growth is performed for 8 hours under the above conditions, and 450 μm cubic silicon carbide is grown on the silicon substrate.

成長後にシリコン基板をフッ酸と硝酸の混酸でエッチングし、単独の立方晶炭化珪素基板を得る。次いで、立方晶炭化珪素基板を再びCVD装置内に挿入し、表3に記載の条件にて3時間で240マイクロメートルの炭化珪素を成長する。    After the growth, the silicon substrate is etched with a mixed acid of hydrofluoric acid and nitric acid to obtain a single cubic silicon carbide substrate. Next, the cubic silicon carbide substrate is again inserted into the CVD apparatus, and 240 micrometer silicon carbide is grown in 3 hours under the conditions shown in Table 3.

Figure 0006295537
Figure 0006295537

酸素源であるCOを添加して成長することにより炭化珪素内には酸素が混入する。混入した酸素は本来炭素が配置すべき格子位置に納まっていること、そしてその濃度は珪素濃度の0.21ppmであることが、それぞれX線光電子分光法のエネルギースペクトルと強度から求められる。Oxygen is mixed in the silicon carbide by growing by adding CO 2 as an oxygen source. It is determined from the energy spectrum and intensity of the X-ray photoelectron spectroscopy that the mixed oxygen is originally contained in the lattice position where the carbon should be disposed and that the concentration is 0.21 ppm of the silicon concentration.

次に、成長した立方晶炭化珪素基板表面の欠陥密度を測定するため500℃で溶融したKOHに5分間浸漬する。その後、エッチピットとして積層欠陥が顕在化した基板表面を光学顕微鏡で観察することにより表面に露出した積層欠陥の線密度が150/cmであることが判明する。    Next, in order to measure the defect density on the surface of the grown cubic silicon carbide substrate, it is immersed in KOH melted at 500 ° C. for 5 minutes. Thereafter, by observing the surface of the substrate on which the stacking fault is manifested as an etch pit with an optical microscope, it is found that the line density of the stacking fault exposed on the surface is 150 / cm.

比較のため、表4の条件で、CO供給量のみを0cc/分から1500cc/分まで変化させて、炭化珪素内の酸素濃度を変化させる。その後、成長した立方晶炭化珪素基板の欠陥密度を測定するため500℃で溶融したKOHに5分間浸漬し、エッチピットとして表面に露出した積層欠陥の線密度を求めると、炭化珪素内の酸素濃度に対して表4に示すとおりの依存性が得られる。表4には四端子抵抗測定から求めることのできる炭化珪素の抵抗率も示す。For comparison, the oxygen concentration in silicon carbide is changed by changing only the CO 2 supply amount from 0 cc / min to 1500 cc / min under the conditions shown in Table 4. Then, in order to measure the defect density of the grown cubic silicon carbide substrate, it was immersed in KOH melted at 500 ° C. for 5 minutes, and the linear density of stacking faults exposed on the surface as etch pits was obtained. Dependencies as shown in Table 4 are obtained. Table 4 also shows the resistivity of silicon carbide that can be obtained from the four-terminal resistance measurement.

Figure 0006295537
Figure 0006295537

以上のとおり、炭化珪素中の本来の炭素位置を酸素で置換すると、0.1ppm以上の濃度で積層欠陥低減効果がもたらされ、その効果は0.2ppm以上の酸素濃度でさらに顕著となる。ただし、酸素濃度が10ppmを超えると抵抗率が急激に上昇することから酸素濃度は10ppm以下とすることが望ましい。    As described above, when the original carbon position in silicon carbide is replaced with oxygen, a stacking fault reduction effect is brought about at a concentration of 0.1 ppm or more, and the effect becomes more remarkable at an oxygen concentration of 0.2 ppm or more. However, since the resistivity rapidly increases when the oxygen concentration exceeds 10 ppm, the oxygen concentration is preferably 10 ppm or less.

以上のとおり、不純物添加による欠陥低減効果は明らかである。本実施例では、結晶基板として立方晶炭化珪素を用いたが、その稠密面である{111}面は六方晶の{0001}面に匹敵するので、六方晶炭化珪素においても同様の欠陥低減効果がもたらされることは明らかである。この場合、基板の表面は{11−20}面、あるいは{03−38}面を用いれば、不純物添加領域は稠密面である{0001}面と交差するので、欠陥の低減効果が高くなる。    As described above, the effect of reducing defects by adding impurities is clear. In this example, cubic silicon carbide was used as the crystal substrate. However, since the {111} plane, which is a dense surface, is comparable to the {0001} plane of hexagonal crystal, the same defect reduction effect can be obtained in hexagonal silicon carbide. It is clear that In this case, if the {11-20} plane or the {03-38} plane is used as the surface of the substrate, the impurity-added region intersects with the {0001} plane which is a dense plane, so that the effect of reducing defects becomes high.

また、炭化珪素の成長に用いるためのSiの原料ガスとしては、SiH、SiCl、SiHClなどを用いても差し支えない。Cの原料ガスとしては、CH、C,C、Cなどを用いることもできる。さらに、酸素源としてはCOを用いたが、熱的に酸素を放出するような分子であれば良く、酸素ガス、CO、NO、NOなどでもガス流量を適宜調整すれば本実施例と同様の効果が得られる。特に、不純物原料として窒素酸化物を用いると、窒素が炭素位置に置換してドナーとして振舞うので、酸素原子による抵抗率上昇を抑制し好ましい。Also, SiH 4 , SiCl 4 , SiHCl 3 or the like may be used as a Si source gas for use in growing silicon carbide. As the C source gas, CH 4 , C 2 H 4 , C 2 H 6 , C 3 H 8, or the like can be used. Further, although CO 2 is used as the oxygen source, any molecule that releases oxygen thermally may be used, and oxygen gas, CO, NO, NO 2, etc. can be appropriately adjusted by adjusting the gas flow rate. Similar effects can be obtained. In particular, it is preferable to use nitrogen oxide as an impurity raw material because nitrogen substitutes at a carbon position and acts as a donor, thereby suppressing an increase in resistivity due to oxygen atoms.

また、不純物としては必ずしも酸素である必要は無く、炭素または珪素の格子位置を置換する限り炭素、珪素、鉄、コバルト、ニッケル フッ素 、ヨウ素のいずれでも良い。また、本実施例では結晶成長法として化学的気相成長法を用いたが、所定の不純物を所定の格子位置に、所定の量添加できれば、昇華再結晶法、溶液成長などを用いても同様の効果が発現する。    The impurity is not necessarily oxygen, and may be any of carbon, silicon, iron, cobalt, nickel fluorine, and iodine as long as the lattice position of carbon or silicon is substituted. In this embodiment, the chemical vapor deposition method is used as the crystal growth method. However, if a predetermined amount of a predetermined impurity can be added to a predetermined lattice position, a sublimation recrystallization method, solution growth, or the like can be used. The effect of.

<第2実施形態>
直径6インチのシリコン(001)基板表面にCVD装置内にて表1の条件で極薄の炭化珪素層を形成する。次に、温度1350℃でSi原料であるSiHClとC原料であるCそしてH供給することにより表2に示された条件で炭化珪素をエピタキシャル成長する。成長時の圧力は、反応室と排気装置の間に設置したスロットルバルブにて調整する。以上の条件で12時間の気相成長をおこない、675マイクロメートルの立方晶炭化珪素をシリコン基板上に成長させる。
Second Embodiment
An ultrathin silicon carbide layer is formed on the surface of a 6-inch diameter silicon (001) substrate in a CVD apparatus under the conditions shown in Table 1. Next, silicon carbide is epitaxially grown under the conditions shown in Table 2 by supplying SiH 2 Cl 2 as a Si raw material, C 2 H 2 and H 2 as a C raw material at a temperature of 1350 ° C. The growth pressure is adjusted by a throttle valve installed between the reaction chamber and the exhaust system. Vapor phase growth is performed for 12 hours under the above conditions to grow 675 micrometer cubic silicon carbide on the silicon substrate.

成長後にシリコン基板をフッ酸と硝酸の混酸でエッチングし、単独の立方晶炭化珪素基板得る。その後、主表面の法線軸に対し、[110]方位に7度の方向に酸素イオンを注入する。酸素の加速エネルギーは200keVから400keVの間で変化させ、それぞれの加速エネルギーにおけるドーズ量は1014/cmから1017/cmで変化させる。その結果、炭化珪素の表面の0.1マイクロメートルの層に酸素が添加された層が形成する。酸素は本来炭素が配置すべき格子位置に納まっていることはX線光電子分光のエネルギースペクトルのエネルギー位置から同定され、その濃度はX線光電子分光のエネルギースペクトルのピーク強度から算出される。After the growth, the silicon substrate is etched with a mixed acid of hydrofluoric acid and nitric acid to obtain a single cubic silicon carbide substrate. Thereafter, oxygen ions are implanted in a direction of 7 degrees in the [110] direction with respect to the normal axis of the main surface. The acceleration energy of oxygen is changed between 200 keV and 400 keV, and the dose at each acceleration energy is changed from 10 14 / cm 2 to 10 17 / cm 2 . As a result, a layer in which oxygen is added to a 0.1 micrometer layer on the surface of silicon carbide is formed. It is identified from the energy position of the energy spectrum of X-ray photoelectron spectroscopy that oxygen is originally contained in the lattice position where carbon should be arranged, and the concentration is calculated from the peak intensity of the energy spectrum of X-ray photoelectron spectroscopy.

次いで、表2に記載された条件で5分をかけて5マイクロメートルの立方晶炭化珪素成長を実施する。その後、炭化珪素基板を500℃溶融KOHに5分間浸漬して積層欠陥を顕在化させる。この基板表面を光学顕微鏡で観察すると基板表面における積層欠陥密度は添加された酸素濃度に対して表5の傾向を示す。    A 5 micrometer cubic silicon carbide growth is then performed over 5 minutes under the conditions listed in Table 2. Thereafter, the silicon carbide substrate is immersed in 500 ° C. molten KOH for 5 minutes to reveal stacking faults. When this substrate surface is observed with an optical microscope, the stacking fault density on the substrate surface shows the tendency shown in Table 5 with respect to the added oxygen concentration.

Figure 0006295537
Figure 0006295537
Figure 0006295537
Figure 0006295537

以上のとおり、炭化珪素中の本来の炭素位置を酸素で置換すると、0.1ppm以上の濃度で顕著な積層欠陥低減効果がもたらされることから、本発明の欠陥低減効果は明らかである。ただし、酸素濃度が10ppmを超えるとイオン注入に伴う結晶格子の乱れが著しくなり、エッチピット密度が急激に増加するので、酸素濃度は10ppm以下とすることが望ましい。    As described above, when the original carbon position in silicon carbide is replaced with oxygen, a remarkable stacking fault reduction effect is obtained at a concentration of 0.1 ppm or more, and thus the defect reduction effect of the present invention is clear. However, when the oxygen concentration exceeds 10 ppm, the crystal lattice is significantly disturbed by ion implantation, and the etch pit density increases rapidly. Therefore, the oxygen concentration is preferably 10 ppm or less.

本実施例では、結晶基板として立方晶炭化珪素(001)面を用いたが、{110}面あるいは{211}面であっても稠密面である{111}面とは平行にならないので、本実施例と同様の欠陥低減がもたらされる。さらに、立方晶炭化珪素の稠密面である{111}面は六方晶の{0001}面に匹敵するので、六方晶炭化珪素においても同様の欠陥低減効果がもたらされる。この場合、基板の表面として{11−20}面、あるいは{03−38}面を用いれば、不純物添加領域は稠密面である{0001}面と交差するので、欠陥の低減効果が高くなる。    In this example, a cubic silicon carbide (001) plane was used as the crystal substrate, but the {110} plane or the {211} plane is not parallel to the {111} plane which is a dense plane. Defect reduction similar to the example is brought about. Furthermore, since the {111} plane, which is a dense surface of cubic silicon carbide, is comparable to the {0001} plane of hexagonal crystal, the same defect reduction effect can be achieved in hexagonal silicon carbide. In this case, if the {11-20} plane or the {03-38} plane is used as the surface of the substrate, the impurity-added region intersects the {0001} plane which is a dense plane, so that the effect of reducing defects becomes high.

また、不純物としては必ずしも酸素である必要は無く、炭素または珪素の格子位置を置換する限り炭素、珪素、鉄、コバルト、ニッケル フッ素、ヨウ素のいずれでも良い。さらに、添加方法もイオン注入に限らず、炭素または珪素の格子位置に不純物を置換できる限り、熱拡散でも同様の効果が得られる。    The impurity is not necessarily oxygen, and may be any of carbon, silicon, iron, cobalt, nickel fluorine, and iodine as long as the lattice position of carbon or silicon is substituted. Further, the addition method is not limited to ion implantation, and the same effect can be obtained by thermal diffusion as long as impurities can be substituted at the lattice positions of carbon or silicon.

<第3実施形態>
実施例2で作製される炭化珪素基板表面に下記のとおりpnダイオードを形成する。はじめに、基板全面に加速エネルギー400keVでドーズ量3x1015/cmの窒素イオンを注入し、厚さ1マイクロメートル、ドナー濃度1x1016/ccのn層を形成する。次に、基板表面に厚さ5マイクロメートルのフォトレジストを塗布し、フォトリソグラフィー工程により、直径10マイクロメートルの円形の開口部を設ける。さらに、加速エネルギー300keVでドーズ量7x1015/cmのアルミニウムイオンを注入し、厚さ0.3マイクロメートル、アクセプタ濃度3x1017/ccのp層を形成する。p層の表面にアルミニウム電極を真空蒸着し、基板の裏面側にはニッケル電極を蒸着することによりそれぞれ陽極と陰極とする。
<Third Embodiment>
A pn diode is formed on the surface of the silicon carbide substrate manufactured in Example 2 as follows. First, nitrogen ions having a dose of 3 × 10 15 / cm 2 are implanted into the entire surface of the substrate at an acceleration energy of 400 keV to form an n layer having a thickness of 1 μm and a donor concentration of 1 × 10 16 / cc. Next, a photoresist having a thickness of 5 micrometers is applied to the substrate surface, and a circular opening having a diameter of 10 micrometers is provided by a photolithography process. Further, aluminum ions having a dose of 7 × 10 15 / cm 2 at an acceleration energy of 300 keV are implanted to form a p layer having a thickness of 0.3 μm and an acceptor concentration of 3 × 10 17 / cc. An aluminum electrode is vacuum-deposited on the surface of the p layer, and a nickel electrode is deposited on the back side of the substrate to form an anode and a cathode, respectively.

室温にて陽極から陰極に1mAの一定電流を12時間印加し、印加開始時点と印加開始後の陽極と陰極の電位差の変化を測定すると、表6に示すような酸素濃度依存性が得られる。    When a constant current of 1 mA is applied for 12 hours from the anode to the cathode at room temperature, and the change in potential difference between the anode and the cathode after the start of application is measured, the oxygen concentration dependency as shown in Table 6 is obtained.

Figure 0006295537
Figure 0006295537
Figure 0006295537
Figure 0006295537

以上のとおり、炭化珪素中の本来の炭素位置を酸素で置換すると、0.1ppm以上の濃度で電極間の電位差の変動が抑制されることから、本発明の供する半導体素子の安定動作が確保される。ただし、酸素濃度が10ppmを超えると電極間の電圧降下が急激に上昇することから酸素濃度は10ppm以下とすることが望ましい。    As described above, when the original carbon position in silicon carbide is replaced with oxygen, the fluctuation of the potential difference between the electrodes is suppressed at a concentration of 0.1 ppm or more, so that the stable operation of the semiconductor element provided by the present invention is ensured. The However, since the voltage drop between the electrodes rapidly increases when the oxygen concentration exceeds 10 ppm, the oxygen concentration is desirably 10 ppm or less.

また、本実施例ではpnダイオードにおける安定動作の効果を示したが、欠陥に電界が印加される限り同様の効果が発現するので、本発明はショットキーダイオード、JFET、バイポーラトランジスタ、MOSFET,IGBTなどいかなる半導体素子に対しても効果を発揮することは明らかである。    Further, in this embodiment, the effect of the stable operation in the pn diode is shown. However, since the same effect appears as long as an electric field is applied to the defect, the present invention is a Schottky diode, JFET, bipolar transistor, MOSFET, IGBT, etc. It is clear that the effect is exerted on any semiconductor element.

また、不純物としては必ずしも酸素である必要は無く炭素または珪素の格子位置を置換する限り炭素、珪素、鉄、コバルト、ニッケル フッ素 、ヨウ素のいずれでも同様の効果が得られる。添加方法も実施例2記載のイオン注入法に限ることなく、実施例1記載の気相成長中の添加であっても転位の運動が抑制されるので、素子の安定動作がもたらされることは明らかである。    The impurity is not necessarily oxygen, and the same effect can be obtained with any of carbon, silicon, iron, cobalt, nickel fluorine, and iodine as long as the lattice position of carbon or silicon is substituted. The addition method is not limited to the ion implantation method described in Example 2, and even when the addition is performed during the vapor phase growth described in Example 1, the movement of dislocation is suppressed, so that it is clear that stable operation of the device is brought about. It is.

さらに、本実施例では、結晶基板として立方晶炭化珪素(001)面を用いたが、{110}面あるいは{211}面であっても稠密面である{111}面とは平行にならないので、本実施例と同様の欠陥低減がもたらされる。さらに、立方晶炭化珪素の稠密面である{111}面は六方晶の{0001}面に匹敵するので、六方晶炭化珪素においても同様の欠陥低減効果がもたらされる。この場合、基板の表面として{11−20}面、あるいは{03−38}面を用いれば、不純物添加領域は稠密面である{0001}面と交差するので、素子の安定動作が実現する。    Further, in this example, a cubic silicon carbide (001) plane was used as the crystal substrate, but the {110} plane or the {211} plane is not parallel to the {111} plane which is a dense plane. Defect reduction similar to the present embodiment is brought about. Furthermore, since the {111} plane, which is a dense surface of cubic silicon carbide, is comparable to the {0001} plane of hexagonal crystal, the same defect reduction effect can be achieved in hexagonal silicon carbide. In this case, if a {11-20} plane or a {03-38} plane is used as the surface of the substrate, the impurity-added region intersects with the {0001} plane which is a dense plane, thereby realizing stable operation of the element.

101;炭化珪素結晶内の不純物添加領域
102;格子位置の炭素原子
103;格子位置の珪素原子
104;珪素格子位置の炭素原子
105;炭素格子位置の珪素原子
106;酸素原子
107;鉄原子
108;コバルト原子
109;ニッケル原子
110;フッ素原子
111;ヨウ素原子
112;結晶格子の最稠密面に平行な面
101; impurity doped region in silicon carbide crystal 102; carbon atom 103 at lattice position; silicon atom 104 at lattice position; carbon atom 105 at silicon lattice position; silicon atom 106 at carbon lattice position; oxygen atom 107; iron atom 108; Cobalt atom 109; Nickel atom 110; Fluorine atom 111; Iodine atom 112; A plane parallel to the most dense surface of the crystal lattice

Claims (3)

炭素と珪素の共有結合による周期的結晶格子からなる板状の単結晶炭化珪素基板であり、その炭化珪素基板の一部または全部の領域(不純物添加領域)において、炭素または珪素が配置すべき格子位置の一部が、珪素濃度に対し0.1ppm以上かつ10ppm以下の割合で、酸素、フッ素、ヨウ素のうちの一種類以上の不純物元素で置換されていることを特長とする炭化珪素基板。 A plate-like single crystal silicon carbide substrate composed of a periodic crystal lattice formed by covalent bonding of carbon and silicon, and a lattice in which carbon or silicon is to be arranged in a part or all of the region (impurity added region) of the silicon carbide substrate A silicon carbide substrate, wherein a part of the position is substituted with one or more impurity elements of oxygen, fluorine, and iodine at a ratio of 0.1 ppm to 10 ppm with respect to the silicon concentration . 炭素と珪素の共有結合による周期的結晶格子からなる板状の単結晶炭化珪素基板であり、その炭化珪素基板の一部の領域(不純物添加領域)において、炭素または珪素が配置すべき格子位置の一部が炭素、珪素、酸素、鉄、コバルト、ニッケル、フッ素、ヨウ素のうちの一種類以上の不純物元素で置換されている炭化珪素基板であり、該不純物添加領域と不純物不添加領域の境界が基板結晶格子の最稠密面と平行ではないことを特長とする炭化珪素基板。   A plate-like single crystal silicon carbide substrate having a periodic crystal lattice formed by covalent bonding of carbon and silicon. In a partial region (impurity-added region) of the silicon carbide substrate, the lattice position where carbon or silicon is to be disposed A silicon carbide substrate partially substituted with one or more impurity elements of carbon, silicon, oxygen, iron, cobalt, nickel, fluorine, iodine, and the boundary between the impurity-added region and the impurity-free region is A silicon carbide substrate characterized by not being parallel to the close-packed surface of the substrate crystal lattice. 2つ以上の電極を有し、印加される電流、電圧、圧力、光によって異なる電極間のインピーダンスが変化する半導体素子であり、かつ請求項1又は2記載の炭化珪素基板上に設けられていることを特長とする半導体素子。 It is a semiconductor element which has two or more electrodes, and the impedance between different electrodes changes with applied current, voltage, pressure, and light, and is provided on the silicon carbide substrate according to claim 1 or 2 . A semiconductor element characterized by this.
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