JP6278423B2 - Light emitting element - Google Patents

Light emitting element Download PDF

Info

Publication number
JP6278423B2
JP6278423B2 JP2016129599A JP2016129599A JP6278423B2 JP 6278423 B2 JP6278423 B2 JP 6278423B2 JP 2016129599 A JP2016129599 A JP 2016129599A JP 2016129599 A JP2016129599 A JP 2016129599A JP 6278423 B2 JP6278423 B2 JP 6278423B2
Authority
JP
Japan
Prior art keywords
concentration
type semiconductor
type
semiconductor portion
type dopant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016129599A
Other languages
Japanese (ja)
Other versions
JP2018006496A (en
Inventor
裕樹 津田
裕樹 津田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sodick Co Ltd
Original Assignee
Sodick Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sodick Co Ltd filed Critical Sodick Co Ltd
Priority to JP2016129599A priority Critical patent/JP6278423B2/en
Publication of JP2018006496A publication Critical patent/JP2018006496A/en
Application granted granted Critical
Publication of JP6278423B2 publication Critical patent/JP6278423B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Description

本発明は、シリコン半導体レーザに用いられる発光素子に関する。   The present invention relates to a light emitting device used for a silicon semiconductor laser.

間接遷移型半導体レーザに用いられる素子として、特許文献１に記載のものがある。この素子は、シリコン等の間接遷移型半導体からなり、ｎ型ドーパント濃度に対してｐ型ドーパント濃度の高いｐ型半導体層と、ｐ型ドーパント濃度に対してｎ型ドーパント濃度の高いｎ型半導体層と、ｐ型半導体層とｎ型半導体層との接合部に形成されるｐｎ接合層とを備えている。   As an element used for an indirect transition type semiconductor laser, there is one described in Patent Document 1. This element is made of an indirect transition semiconductor such as silicon, and has a p-type semiconductor layer having a high p-type dopant concentration relative to the n-type dopant concentration, and an n-type semiconductor layer having a high n-type dopant concentration relative to the p-type dopant concentration. And a pn junction layer formed at the junction between the p-type semiconductor layer and the n-type semiconductor layer.

このような間接遷移型半導体からなる素子を発光させるためには、素子のｐｎ接合層内に、ｐｎ接合層が発光するためのｐ型ドーパントおよびｎ型ドーパントの配列を形成させる必要がある。特許文献１では、素子形成後、ｎ型半導体層側が正電圧、ｐ型半導体層側が負電圧となるように順方向に所定のバイアス電圧を印加してｐｎ接合層に電流を流している。これによって生じる熱によりｐｎ接合層内のｐ型ドーパントおよびｎ型ドーパントを拡散させてドーパント分布を繰り返し変化させるとともに、バイアス電圧によりｐｎ接合層における伝導帯と価電子帯に反転分布を生じさせている。そして、反転分布を形成している伝導帯中の電子を非断熱過程に基づいて複数段階で誘導放出させることにより、ｐｎ接合層に流れる電流を減少させて素子の温度を低下させ、ｐｎ接合層内のｐ型ドーパントおよびｎ型ドーパントの分布を固定している（以下、DPPアニールと称する）。   In order to emit light from an element made of such an indirect transition type semiconductor, it is necessary to form an array of p-type dopants and n-type dopants for the pn junction layer to emit light in the pn junction layer of the element. In Patent Document 1, after forming an element, a predetermined bias voltage is applied in the forward direction so that the n-type semiconductor layer side is a positive voltage and the p-type semiconductor layer side is a negative voltage, and a current flows through the pn junction layer. The heat generated thereby diffuses the p-type dopant and the n-type dopant in the pn junction layer to repeatedly change the dopant distribution, and the bias voltage causes an inversion distribution in the conduction band and the valence band in the pn junction layer. . Then, the electrons in the conduction band forming the inversion distribution are stimulated and emitted in a plurality of steps based on the non-adiabatic process, thereby reducing the current flowing in the pn junction layer and lowering the temperature of the device, thereby reducing the pn junction layer. The distribution of the p-type dopant and the n-type dopant is fixed (hereinafter referred to as DPP annealing).

また、非特許文献１には、特許文献１に記載の素子と同様の構成を有するシリコン半導体素子が記載されている。また、そのシリコン半導体素子のｎ型半導体層の電気抵抗率と、ｐ型半導体層のｐ型ドーパント濃度分布について記載されている。より具体的には、ｎ型半導体層の電気抵抗率は、１０Ωｃｍであると記載されている。また、ｐ型半導体層のｐ型ドーパント濃度は、シリコン半導体素子の表面から約１．５μｍの深さでピークとなり、そのピーク濃度は約１×１０１９個／ｃｍ３となっている。また、ｐ型半導体層は、ｎ型ドーパントが均一に拡散された素子に対して、その表面近傍にｐ型ドーパントを打ち込むことによって形成されている。 Non-Patent Document 1 describes a silicon semiconductor element having the same configuration as the element described in Patent Document 1. In addition, the electrical resistivity of the n-type semiconductor layer of the silicon semiconductor element and the p-type dopant concentration distribution of the p-type semiconductor layer are described. More specifically, it is described that the electrical resistivity of the n-type semiconductor layer is 10 Ωcm. The p-type dopant concentration of the p-type semiconductor layer has a peak at a depth of about 1.5 μm from the surface of the silicon semiconductor element, and the peak concentration is about 1 × 10 19 atoms / cm 3 . The p-type semiconductor layer is formed by implanting a p-type dopant in the vicinity of the surface of an element in which the n-type dopant is uniformly diffused.

非特許文献１に記載のシリコン半導体素子の深さとドーパント濃度との関係について図４に示す。なお、図４では、素子の深さに対するｐ型ドーパント濃度を一点鎖線、素子の深さに対するｎ型ドーパント濃度を実線で示す。また、素子の「深さ」は、ｐ型ドーパントが打ち込まれる一端面を基準とし、他端面に近づくにつれて大きくなっていくものとする。   FIG. 4 shows the relationship between the depth of the silicon semiconductor element described in Non-Patent Document 1 and the dopant concentration. In FIG. 4, the p-type dopant concentration with respect to the element depth is indicated by a one-dot chain line, and the n-type dopant concentration with respect to the element depth is indicated by a solid line. Further, the “depth” of the element is assumed to be larger as approaching the other end surface with reference to the one end surface into which the p-type dopant is implanted.

図４に示すように、非特許文献１に記載の素子では、ｎ型ドーパント濃度が素子の深さに関わらず一定であって、低い値で抑えられている。また、素子の深さの小さい領域では、ｎ型ドーパント濃度に対してｐ型ドーパント濃度が高く、そのピーク値は約１×１０１９個／ｃｍ３となっている。 As shown in FIG. 4, in the device described in Non-Patent Document 1, the n-type dopant concentration is constant regardless of the depth of the device, and is suppressed to a low value. Further, in the region where the depth of the element is small, the p-type dopant concentration is higher than the n-type dopant concentration, and the peak value is about 1 × 10 19 atoms / cm 3 .

すなわち、図４において、素子の深さの小さい領域は、非特許文献１に記載の素子のｐ型半導体層のドーパント濃度分布を示している。また、深さの大きい領域は、ｎ型半導体層のドーパント濃度分布を示している。そして、ｐ型ドーパント濃度とｎ型ドーパント濃度との差の小さい領域は、ｐｎ接合層のドーパント濃度分布を示している。   That is, in FIG. 4, the region where the depth of the element is small indicates the dopant concentration distribution of the p-type semiconductor layer of the element described in Non-Patent Document 1. A region with a large depth indicates the dopant concentration distribution of the n-type semiconductor layer. A region where the difference between the p-type dopant concentration and the n-type dopant concentration is small indicates the dopant concentration distribution of the pn junction layer.

特開２０１２−２４３８２４号公報JP 2012-243824 A

Tadashi Kawazoe1，Katsuhiro Nishioka，Motoichi Ohtsu著、「Polarization control of an infrared silicon light-emitting diode by dressed photons and analyses of the spatial distribution of doped boron atoms」、Applied Physics A、2015年6月25日発行、p.1409〜1415Tadashi Kawazoe1, Katsuhiro Nishioka, Motoichi Ohtsu, `` Polarization control of an infrared silicon light-emitting diode by dressed photons and analyzes of the spatial distribution of doped boron atoms '', Applied Physics A, June 25, 2015, p. 1409-1415

現在までのところ、種々の方法で製造されているシリコン半導体の発光ダイオード素子またはレーザダイオード素子は、何れも実用上要求される発光強度を得ることができていないようである。   To date, none of the silicon semiconductor light-emitting diode elements or laser diode elements manufactured by various methods has been able to obtain the light emission intensity required for practical use.

そこで、非特許文献１では、素子全域のｎ型ドーパント濃度を低く抑えることにより、DPPアニールを効果的に行っている。より具体的には、ｎ型半導体層を高抵抗化して電流を流した際に素子内に熱を効率的に伝達させることにより、ｐｎ接合層内のｐ型ドーパントおよびｎ型ドーパントを積極的に拡散させている。これにより、発光領域であるｐｎ接合層をより広範囲に形成させている。   Therefore, in Non-Patent Document 1, DPP annealing is effectively performed by keeping the n-type dopant concentration in the entire element area low. More specifically, the p-type dopant and the n-type dopant in the pn junction layer are positively transferred by efficiently transferring heat into the device when the n-type semiconductor layer has a high resistance and a current flows. It is spreading. Thereby, the pn junction layer which is a light emitting region is formed in a wider range.

しかしながら、ｐｎ接合層の発光の強さは、DPPアニール後にｐｎ接合層内に形成される、ｐｎ接合層が発光するためのｐ型ドーパントおよびｎ型ドーパントの配列の数に比例する。この配列の数はｐｎ接合層内のｐ型ドーパント濃度およびｎ型ドーパント濃度の両方に依存するため、非特許文献１のように素子全域のｎ型ドーパント濃度を低く抑えた場合、ｐｎ接合層内が発光するためのｎ型ドーパントおよびｐ型ドーパントの配列の数は少なくなる。以上により、非特許文献１に記載の素子では、ｐｎ接合層の発光効率が低くなる。   However, the intensity of light emission of the pn junction layer is proportional to the number of p-type dopants and the arrangement of n-type dopants formed in the pn junction layer after DPP annealing so that the pn junction layer emits light. Since the number of this arrangement depends on both the p-type dopant concentration and the n-type dopant concentration in the pn junction layer, when the n-type dopant concentration in the entire device is kept low as in Non-Patent Document 1, The number of arrangements of n-type dopants and p-type dopants for emitting light decreases. As described above, in the element described in Non-Patent Document 1, the light emission efficiency of the pn junction layer is lowered.

本発明は、上記事情に鑑みてなされたものであって、その目的は、DPPアニールを効果的に実行可能、且つ、高い発光効率を有するｐｎ接合部が形成された発光素子を提供することである。   The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a light emitting device in which a DPN annealing can be effectively performed and a pn junction portion having high light emission efficiency is formed. is there.

第１の発明の発光素子は、１×１０ １４ 個／ｃｍ ３ 以上１×１０ １６ 個／ｃｍ ３ 以下の濃度範囲でヒ素およびアンチモンのうちの１以上からなるｎ型ドーパントが均一に拡散された単結晶シリコンからなる基板の１つの表面側の一部またはすべての部分に形成され、ピーク値が１×１０ １９ 個／ｃｍ ３ 以上１×１０ ２１ 個／ｃｍ ３ 以下の濃度範囲で前記ｎ型ドーパントが拡散された高濃度ｎ型半導体部と、前記高濃度ｎ型半導体部の表面に設けられた単結晶シリコンからなる薄膜の前記高濃度ｎ型半導部に対応する部分に形成され、ピーク値が１×１０ １９ 個／ｃｍ ３ 以上１×１０ ２１ 個／ｃｍ ３ 以下の濃度範囲でホウ素からなるｐ型ドーパントを打ち込むことによって拡散された高濃度ｐ型半導体部と、前記高濃度ｎ型半導体部と前記高濃度ｐ型半導体部との接合部に形成され、前記ｎ型ドーパントおよび前記ｐ型ドーパントが、前記高濃度ｎ型半導体部を除く前記単結晶シリコン基板の前記ｎ型ドーパント濃度よりも高い濃度範囲で拡散されたｐｎ接合部と、からなる発光素子であって、前記高濃度ｎ型半導体部の厚みは、１〜２μｍであって、前記高濃度ｎ型半導体部を除く前記基板の厚みは、１００〜７００μｍであって、前記高濃度ｐ型半導体部の厚みは、１〜２μｍであることを特徴とするものである。 In the light-emitting element according to the first aspect of the invention, an n-type dopant composed of one or more of arsenic and antimony is uniformly diffused in a concentration range of 1 × 10 14 pieces / cm 3 or more and 1 × 10 16 pieces / cm 3 or less . The n-type is formed in a part or all of one surface side of a substrate made of single crystal silicon and has a peak value in a concentration range of 1 × 10 19 pieces / cm 3 or more and 1 × 10 21 pieces / cm 3 or less. A high-concentration n-type semiconductor portion in which a dopant is diffused and a peak corresponding to the high-concentration n-type semiconductor portion of a thin film made of single crystal silicon provided on the surface of the high-concentration n-type semiconductor portion. A high-concentration p-type semiconductor portion diffused by implanting a p-type dopant made of boron in a concentration range of 1 × 10 19 / cm 3 or more and 1 × 10 21 / cm 3 or less, and the high-concentration n-type Semiconductor part and the above A concentration range formed at a junction with a high-concentration p-type semiconductor portion, wherein the n-type dopant and the p-type dopant are higher than the n-type dopant concentration of the single crystal silicon substrate excluding the high-concentration n-type semiconductor portion. And a pn junction part diffused in step (b) , wherein the high-concentration n-type semiconductor part has a thickness of 1 to 2 μm, and the thickness of the substrate excluding the high-concentration n-type semiconductor part is a 100～700Myuemu, the thickness of the high-concentration p-type semiconductor portion is a feature and be shall to be a 1 to 2 [mu] m.

第２の発明の発光素子は、１×１０The light emitting device of the second invention is 1 × 10 １４14 個／ｃｍPiece / cm ３3 以上１×１０1 × 10 or more １６16 個／ｃｍPiece / cm ３3 以下の濃度範囲でホウ素からなるｐ型ドーパントが均一に拡散された単結晶シリコンからなる基板の１つの表面側の一部またはすべての部分に形成され、ピーク値が１×１０A p-type dopant made of boron is formed in a part or all of one surface side of a substrate made of single crystal silicon in which a p-type dopant made of boron is uniformly diffused in the following concentration range, and the peak value is 1 × 10 １９19 個／ｃｍPiece / cm ３3 以上１×１０1 × 10 or more ２１21 個／ｃｍPiece / cm ３3 以下の濃度範囲で前記ｐ型ドーパントを打ち込むことによって拡散された高濃度ｐ型半導体部と、前記高濃度ｐ型半導体部の表面に設けられた単結晶シリコンからなる薄膜の前記高濃度ｐ型半導部に対応する部分に形成され、ピーク値が１×１０A high-concentration p-type semiconductor part diffused by implanting the p-type dopant in the following concentration range, and the high-concentration p-type half of a thin film made of single crystal silicon provided on the surface of the high-concentration p-type semiconductor part It is formed in the part corresponding to the lead part, and the peak value is 1 × 10 １９19 個／ｃｍPiece / cm ３3 以上１×１０1 × 10 or more ２１21 個／ｃｍPiece / cm ３3 以下の濃度範囲でヒ素およびアンチモンのうちの１以上からなるｎ型ドーパントが拡散された高濃度ｎ型半導体部と、前記高濃度ｐ型半導体部と前記高濃度ｎ型半導体部との接合部に形成され、前記ｐ型ドーパントおよび前記ｎ型ドーパントが、前記高濃度ｐ型半導体部を除く前記単結晶シリコン基板の前記ｐ型ドーパント濃度よりも高い濃度範囲で拡散されたｐｎ接合部と、からなる発光素子であって、前記高濃度ｐ型半導体部の厚みは、１〜２μｍであって、前記高濃度ｐ型半導体部を除く前記基板の厚みは、１００〜７００μｍであって、前記高濃度ｎ型半導体部の厚みは、１〜２μｍであることを特徴とするものである。At a junction between the high-concentration n-type semiconductor portion in which an n-type dopant composed of one or more of arsenic and antimony is diffused in the following concentration range, and the high-concentration p-type semiconductor portion and the high-concentration n-type semiconductor portion And a pn junction portion in which the p-type dopant and the n-type dopant are diffused in a concentration range higher than the p-type dopant concentration of the single crystal silicon substrate excluding the high-concentration p-type semiconductor portion. In the light emitting device, the high-concentration p-type semiconductor part has a thickness of 1 to 2 μm, and the substrate excluding the high-concentration p-type semiconductor part has a thickness of 100 to 700 μm, and the high-concentration n The type semiconductor part has a thickness of 1 to 2 μm.

本発明によれば、DPPアニールを効果的に実行可能、且つ、ｐｎ接合部の発光効率を高くすることができる。   According to the present invention, DPP annealing can be effectively performed, and the luminous efficiency of the pn junction can be increased.

本実施形態に係る発光素子の斜視図である。It is a perspective view of the light emitting element concerning this embodiment. （ａ）は、図１に示す発光素子の長手方向からみた図であって、（ｂ）は、発光素子の深さとｐ型ドーパント濃度およびｎ型ドーパント濃度との関係を示すグラフである。(A) is the figure seen from the longitudinal direction of the light emitting element shown in FIG. 1, (b) is a graph which shows the relationship between the depth of a light emitting element, p-type dopant density | concentration, and n-type dopant density | concentration. 本実施形態の変形例に係る発光素子の斜視図である。It is a perspective view of the light emitting element concerning the modification of this embodiment. 非特許文献１に記載の発光素子の深さとｐ型ドーパント濃度およびｎ型ドーパント濃度の関係を示すグラフである。It is a graph which shows the relationship between the depth of the light emitting element of a nonpatent literature 1, and a p-type dopant density | concentration and an n-type dopant density | concentration.

以下、本発明の実施の形態について、図面を参照しつつ説明する。   Embodiments of the present invention will be described below with reference to the drawings.

図１に示すように、発光素子１００は、所定厚みを有する直方体形状である。発光素子１００は、単結晶シリコンからなる基板１と基板１の上面に形成された単結晶シリコンからなる薄膜２とを有している。なお、以下では、図１の手前側を前側、奥側を後側、左側を左側、右側を右側、上側を上側、下側を下側と定義して、適宜、「前」、「後」、「左」、「右」、「上」、「下」の方向語を使用して説明する。   As shown in FIG. 1, the light emitting element 100 has a rectangular parallelepiped shape having a predetermined thickness. The light emitting element 100 includes a substrate 1 made of single crystal silicon and a thin film 2 made of single crystal silicon formed on the upper surface of the substrate 1. In the following, the front side in FIG. 1 is defined as the front side, the back side is defined as the rear side, the left side is defined as the left side, the right side is defined as the right side, the upper side is defined as the upper side, and the lower side is defined as the lower side. , “Left”, “Right”, “Up”, “Down” direction words will be used for explanation.

基板１は、ｎ型ドーパントが高濃度で拡散された高濃度ｎ型半導体部１ｂとｎ型ドーパントが低濃度で拡散された低濃度ｎ型半導体部１ａとを有している。高濃度ｎ型半導体部１ｂは、基板１の上面近傍全域に形成されている。低濃度ｎ型半導体部１ａは、基板１の高濃度ｎ型半導体部１ｂから下側全域に形成されている。高濃度ｎ型半導体部１ｂの厚みは、低濃度ｎ型半導体部１ａの厚みと比較して非常に小さい。より具体的には、高濃度ｎ型半導体部１ｂの厚みは１〜２μｍであって、低濃度ｎ型半導体部１ａの厚みは１００〜７００μｍである。高濃度ｎ型半導体部１ｂおよび低濃度ｎ型半導体部１ａに拡散されたｎ型ドーパントは、ヒ素もしくはアンチモンである。   The substrate 1 has a high-concentration n-type semiconductor portion 1b in which an n-type dopant is diffused at a high concentration and a low-concentration n-type semiconductor portion 1a in which an n-type dopant is diffused at a low concentration. The high concentration n-type semiconductor portion 1 b is formed in the entire vicinity of the upper surface of the substrate 1. The low-concentration n-type semiconductor portion 1 a is formed in the entire region below the high-concentration n-type semiconductor portion 1 b of the substrate 1. The thickness of the high concentration n-type semiconductor portion 1b is very small compared to the thickness of the low concentration n-type semiconductor portion 1a. More specifically, the thickness of the high-concentration n-type semiconductor portion 1b is 1 to 2 μm, and the thickness of the low-concentration n-type semiconductor portion 1a is 100 to 700 μm. The n-type dopant diffused in the high-concentration n-type semiconductor portion 1b and the low-concentration n-type semiconductor portion 1a is arsenic or antimony.

薄膜２は、ｐ型ドーパントが高濃度で拡散された高濃度ｐ型半導体部２ａを有している。高濃度ｐ型半導体部２ａは、薄膜２の全域に形成されている。高濃度ｐ型半導体部２ａの厚みは、１〜２μｍである。高濃度ｐ型半導体部２ａに拡散されたｐ型ドーパントは、ホウ素である。   The thin film 2 has a high concentration p-type semiconductor portion 2a in which a p-type dopant is diffused at a high concentration. The high-concentration p-type semiconductor portion 2 a is formed over the entire thin film 2. The thickness of the high-concentration p-type semiconductor portion 2a is 1 to 2 μm. The p-type dopant diffused into the high-concentration p-type semiconductor portion 2a is boron.

また、高濃度ｎ型半導体部１ｂと高濃度ｐ型半導体部２ａとの境界部分である基板１と薄膜２との接合部には、ｐｎ接合部３が形成されている。   A pn junction 3 is formed at the junction between the substrate 1 and the thin film 2 that is the boundary between the high concentration n-type semiconductor portion 1b and the high concentration p-type semiconductor portion 2a.

次に、図２（ａ），（ｂ）により、発光素子１００の深さとｐ型ドーパント濃度およびｎ型ドーパント濃度との関係について説明する。なお、図２（ｂ）では、発光素子１００の深さに対するｐ型ドーパント濃度を一点鎖線、発光素子１００の深さに対するｎ型ドーパント濃度を実線で示す。また、発光素子１００の「深さ」は、薄膜２の上面を基準とし、基板１の下面に近づくにつれて大きくなっていくものとする。   Next, the relationship between the depth of the light emitting element 100 and the p-type dopant concentration and the n-type dopant concentration will be described with reference to FIGS. In FIG. 2B, the p-type dopant concentration with respect to the depth of the light emitting element 100 is indicated by a one-dot chain line, and the n-type dopant concentration with respect to the depth of the light emitting element 100 is indicated by a solid line. In addition, the “depth” of the light emitting element 100 is assumed to increase as it approaches the lower surface of the substrate 1 with respect to the upper surface of the thin film 2.

基準面である薄膜２の上面から薄膜２と基板１との接合面の深さｄ１近傍までの領域では、ｎ型ドーパント濃度に対してｐ型ドーパント濃度が高くなっている。この領域が発光素子１００の高濃度ｐ型半導体部２ａに対応している。高濃度ｐ型半導体部２ａのｐ型ドーパント濃度のピーク値ｃ１は、１×１０１９個／ｃｍ３である。 The p-type dopant concentration is higher than the n-type dopant concentration in the region from the upper surface of the thin film 2 that is the reference surface to the vicinity of the depth d1 of the bonding surface between the thin film 2 and the substrate 1. This region corresponds to the high-concentration p-type semiconductor portion 2a of the light emitting element 100. The peak value c1 of the p-type dopant concentration of the high-concentration p-type semiconductor portion 2a is 1 × 10 19 pieces / cm 3 .

また、薄膜２と基板１との接合面の深さｄ１近傍から基板１に形成された高濃度ｎ型半導体部１ｂと低濃度ｎ型半導体部１ａとの境界の深さｄ２までの領域では、ｐ型ドーパント濃度に対してｎ型ドーパント濃度が高くなっている。この領域が発光素子１００の高濃度ｎ型半導体部１ｂに対応している。高濃度ｎ型半導体部１ｂのｎ型ドーパント濃度のピーク値ｃ２は、１×１０１９個／ｃｍ３である。 In the region from the vicinity of the depth d1 of the bonding surface between the thin film 2 and the substrate 1 to the depth d2 of the boundary between the high-concentration n-type semiconductor portion 1b and the low-concentration n-type semiconductor portion 1a formed on the substrate 1, The n-type dopant concentration is higher than the p-type dopant concentration. This region corresponds to the high-concentration n-type semiconductor portion 1b of the light emitting element 100. The peak value c2 of the n-type dopant concentration of the high-concentration n-type semiconductor portion 1b is 1 × 10 19 atoms / cm 3 .

また、薄膜２と基板１との接合面の深さｄ１では、高濃度ｐ型半導体部２ａのｐ型ドーパント濃度と高濃度ｎ型半導体部１ｂのｎ型ドーパント濃度との高さが等しくなっている。この深さｄ１近傍のｎ型ドーパント濃度とｐ型ドーパント濃度との差が小さくなった領域が発光素子１００のｐｎ接合部３に対応している。   Further, at the depth d1 of the junction surface between the thin film 2 and the substrate 1, the heights of the p-type dopant concentration of the high-concentration p-type semiconductor portion 2a and the n-type dopant concentration of the high-concentration n-type semiconductor portion 1b are equal. Yes. A region where the difference between the n-type dopant concentration and the p-type dopant concentration in the vicinity of the depth d1 is small corresponds to the pn junction 3 of the light emitting device 100.

また、基板１に形成された高濃度ｎ型半導体部１ｂと低濃度ｎ型半導体部１ａとの境界の深さｄ２から基板１の下面の深さｄ３までの領域では、ｐ型ドーパント濃度に対してｎ型ドーパント濃度が高くなっている。この領域が発光素子１００の低濃度ｎ型半導体部１ａに対応している。低濃度ｎ型半導体部１ａのｎ型ドーパント濃度ｃ３は、１×１０１４個／ｃｍ３である。 Further, in the region from the depth d2 of the boundary between the high-concentration n-type semiconductor portion 1b and the low-concentration n-type semiconductor portion 1a formed on the substrate 1 to the depth d3 of the lower surface of the substrate 1, the p-type dopant concentration is reduced. Thus, the n-type dopant concentration is high. This region corresponds to the low concentration n-type semiconductor portion 1a of the light emitting element 100. The n-type dopant concentration c3 of the low-concentration n-type semiconductor portion 1a is 1 × 10 14 pieces / cm 3 .

また、ｐｎ接合部３のｎ型ドーパント濃度およびｐ型ドーパント濃度は、低濃度ｎ型半導体部１ａのｎ型ドーパント濃度ｃ３よりも高くなっている。   Further, the n-type dopant concentration and the p-type dopant concentration of the pn junction part 3 are higher than the n-type dopant concentration c3 of the low-concentration n-type semiconductor part 1a.

（作用・効果）
本実施形態では、図２（ｂ）に示すように、高濃度ｐ型半導体部２ａのｐ型ドーパント濃度のピーク値ｃ１は１×１０１９個／ｃｍ３であって、高濃度ｎ型半導体部１ｂのｎ型ドーパント濃度のピーク値ｃ２は、１×１０１９個／ｃｍ３である。このとき、ｐｎ接合部３のｎ型ドーパント濃度およびｐ型ドーパント濃度は、低濃度ｎ型半導体部１ａのｎ型ドーパント濃度ｃ３である１×１０１４個／ｃｍ３よりも高くなっている。従って、基板１全域のｎ型ドーパント濃度が１×１０１４個／ｃｍ３である場合と比較して、ｐｎ接合部３のｐ型ドーパント濃度およびｎ型ドーパント濃度を高くすることができる。これにより、ｐｎ接合部３内のｎ型ドーパントおよびｐ型ドーパントの配列の組み合わせの数を多くすることができるため、DPPアニール後にｐｎ接合部３内に形成される、ｐｎ接合部３が発光するためのｐ型ドーパントおよびｎ型ドーパントの配列を数多く形成することができる。従って、ｐｎ接合部３の発光効率を高くすることができる。 (Action / Effect)
In the present embodiment, as shown in FIG. 2B, the peak value c1 of the p-type dopant concentration of the high-concentration p-type semiconductor portion 2a is 1 × 10 19 / cm 3 , and the high-concentration n-type semiconductor portion The peak value c2 of the n-type dopant concentration of 1b is 1 × 10 19 atoms / cm 3 . At this time, the n-type dopant concentration and the p-type dopant concentration of the pn junction part 3 are higher than 1 × 10 14 / cm 3 which is the n-type dopant density c3 of the low-concentration n-type semiconductor part 1a. Therefore, the p-type dopant concentration and the n-type dopant concentration of the pn junction part 3 can be increased as compared with the case where the n-type dopant concentration of the entire region of the substrate 1 is 1 × 10 14 atoms / cm 3 . As a result, the number of combinations of n-type dopants and p-type dopant arrangements in the pn junction 3 can be increased, so that the pn junction 3 formed in the pn junction 3 after DPP annealing emits light. Therefore, a large number of p-type dopants and n-type dopant arrays can be formed. Therefore, the light emission efficiency of the pn junction 3 can be increased.

また、低濃度ｎ型半導体部１ａのｎ型ドーパント濃度が１×１０１４個／ｃｍ３に抑えられている。従って、低濃度ｎ型半導体部１ａは、高抵抗となっている。これにより、高濃度ｎ型半導体部１ｂを介して、低濃度ｎ型半導体部１ａからｐｎ接合部３へと熱を効率的に伝達させることができる。従って、ｐｎ接合部３内のｎ型ドーパントおよびｐ型ドーパントを積極的に拡散させ、DPPアニールを効果的に行うことができる。 Further, the n-type dopant concentration of the low-concentration n-type semiconductor portion 1a is suppressed to 1 × 10 14 pieces / cm 3 . Therefore, the low concentration n-type semiconductor portion 1a has a high resistance. Thereby, heat can be efficiently transferred from the low concentration n-type semiconductor portion 1a to the pn junction portion 3 through the high concentration n-type semiconductor portion 1b. Therefore, the n-type dopant and the p-type dopant in the pn junction 3 can be actively diffused, and DPP annealing can be effectively performed.

また、高濃度ｎ型半導体部１ｂの厚みは１〜２μｍであって、低濃度ｎ型半導体部１ａの厚みは１００〜７００μｍである。また、上下方向から見て、両者ともに基板１の全域に形成されているため、低濃度ｎ型半導体部１ａの体積は、高濃度ｎ型半導体部１ｂの体積よりも十分に大きい。さらに、低濃度ｎ型半導体部１ａは、上述したドーパント濃度であることから、高抵抗値を有している。そのため、DPPアニール時、低濃度ｎ型半導体部１ａでは、低濃度ｎ型半導体部１ａの体積が高濃度ｎ型半導体部１ｂの体積と同等もしくは小さい場合と比較して、大きな発熱量を得ることができる。これにより、高濃度ｎ型半導体部１ｂを介して、その上側の高濃度ｎ型半導体部１ｂおよびｐｎ接合部３を効率的に加熱し、DPPアニールを効果的に行うことができる。   The high concentration n-type semiconductor portion 1b has a thickness of 1 to 2 μm, and the low concentration n-type semiconductor portion 1a has a thickness of 100 to 700 μm. Moreover, since both are formed in the whole area | region of the board | substrate 1 seeing from an up-down direction, the volume of the low concentration n-type semiconductor part 1a is sufficiently larger than the volume of the high concentration n-type semiconductor part 1b. Further, the low concentration n-type semiconductor portion 1a has a high resistance value because of the above-described dopant concentration. Therefore, at the time of DPP annealing, the low-concentration n-type semiconductor portion 1a can obtain a large amount of heat generation as compared with the case where the volume of the low-concentration n-type semiconductor portion 1a is equal to or smaller than the volume of the high-concentration n-type semiconductor portion 1b. Can do. Thereby, the high-concentration n-type semiconductor part 1b and the pn junction part 3 on the upper side can be efficiently heated via the high-concentration n-type semiconductor part 1b, and DPP annealing can be performed effectively.

以上、本発明の好適な実施の形態について説明したが、本発明は上述の実施形態や実施例に限られるものではなく、特許請求の範囲に記載した限りにおいて様々な設計変更が可能なものである。   The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments and examples, and various design changes can be made as long as they are described in the claims. is there.

本実施形態では、高濃度ｎ型半導体部１ｂおよび低濃度ｎ型半導体部１ａのｎ型ドーパントは、ヒ素もしくはアンチモンであると記載したが、高濃度ｎ型半導体部１ｂおよび低濃度ｎ型半導体部１ａのｎ型ドーパントは、ヒ素およびアンチモンの両方で構成されていても構わない。   In the present embodiment, the n-type dopant of the high-concentration n-type semiconductor portion 1b and the low-concentration n-type semiconductor portion 1a is described as arsenic or antimony. However, the high-concentration n-type semiconductor portion 1b and the low-concentration n-type semiconductor portion are described. The n-type dopant of 1a may be composed of both arsenic and antimony.

また、本実施形態では、高濃度ｐ型半導体部２ａのｐ型ドーパント濃度のピーク値ｃ１は、１×１０１９個／ｃｍ３であると記載したが、高濃度ｐ型半導体部２ａのｐ型ドーパント濃度のピーク値は、１×１０１９個／ｃｍ３以上１×１０２１個／ｃｍ３以下の範囲内であれば構わない。また、低濃度ｎ型半導体部１aのｎ型ドーパント濃度のピーク値ｃ１は、１×１０１４個／ｃｍ３であると記載したが、高濃度ｎ型半導体部１aのｎ型ドーパント濃度のピーク値は、１×１０１４個／ｃｍ３以上１×１０１６個／ｃｍ３以下の範囲内であれば構わない。また、高濃度ｎ型半導体部１ｂのｎ型ドーパント濃度ｃ３は、１×１０１９個／ｃｍ３であると記載したが、高濃度ｎ型半導体部１ｂのｎ型ドーパント濃度は、１×１０１９個／ｃｍ３以上１×１０２１個／ｃｍ３以下の範囲内であれば構わない。以上のドーパント範囲によれば、ｐｎ接合部３のｎ型ドーパント濃度およびｐ型ドーパント濃度を低濃度ｎ型半導体部１ａのｎ型ドーパント濃度ｃ３よりも高くすることができる。 In the present embodiment, the peak value c1 of the p-type dopant concentration of the high-concentration p-type semiconductor part 2a is described as 1 × 10 19 / cm 3 , but the p-type of the high-concentration p-type semiconductor part 2a is described. The peak value of the dopant concentration may be in the range of 1 × 10 19 atoms / cm 3 or more and 1 × 10 21 atoms / cm 3 or less. Moreover, although the peak value c1 of the n-type dopant concentration of the low-concentration n-type semiconductor portion 1a is described as 1 × 10 14 pieces / cm 3 , the peak value of the n-type dopant concentration of the high-concentration n-type semiconductor portion 1a is described. Is within the range of 1 × 10 14 pieces / cm 3 or more and 1 × 10 16 pieces / cm 3 or less. In addition, the n-type dopant concentration c3 of the high-concentration n-type semiconductor portion 1b is described as 1 × 10 19 / cm 3 , but the n-type dopant concentration of the high-concentration n-type semiconductor portion 1b is 1 × 10 19. It does not matter as long as it is in the range of not less than 3 / cm 3 and not more than 1 × 10 21 / cm 3 . According to the above dopant range, the n-type dopant concentration and the p-type dopant concentration of the pn junction part 3 can be made higher than the n-type dopant concentration c3 of the low-concentration n-type semiconductor part 1a.

また、本実施形態では、高濃度ｎ型半導体部１ｂが基板１の上面近傍の全域に形成され、高濃度ｐ型半導体部２ａが薄膜２の全域に形成されている場合について記載したが、高濃度ｎ型半導体部１ｂと高濃度ｐ型半導体部２ａとは、発光素子の厚み方向に対して少なくとも一部が対向していればよく、基板１および薄膜２の一部のみに形成されていても構わない。より具体的には、発光素子２００は、図３に示すように、前後方向から見て、高濃度ｎ型半導体部１ｂが基板１の上面近傍中央部に形成され、高濃度ｐ型半導体部２ａが薄膜２の左右方向中央部全域に形成され、上下方向に対して、高濃度ｎ型半導体部１ｂと高濃度ｐ型半導体部２ａとが対向するように形成されていても構わない。   In the present embodiment, the case where the high-concentration n-type semiconductor portion 1b is formed in the entire area near the upper surface of the substrate 1 and the high-concentration p-type semiconductor section 2a is formed in the entire area of the thin film 2 is described. The concentration n-type semiconductor portion 1b and the high-concentration p-type semiconductor portion 2a need only be at least partially opposed to the thickness direction of the light emitting element, and are formed only on a portion of the substrate 1 and the thin film 2. It doesn't matter. More specifically, as shown in FIG. 3, in the light emitting element 200, as viewed from the front-rear direction, the high-concentration n-type semiconductor portion 1b is formed in the central portion near the upper surface of the substrate 1, and the high-concentration p-type semiconductor portion 2a. May be formed over the entire central portion of the thin film 2 in the left-right direction, and the high-concentration n-type semiconductor portion 1b and the high-concentration p-type semiconductor portion 2a may be formed to face each other in the vertical direction.

また、本実施形態では、基板１にｎ型ドーパント濃度の高い高濃度ｎ型半導体部１ｂとｎ型ドーパント濃度の低い低濃度ｎ型半導体部１ａとを有し、薄膜２に高濃度ｐ型半導体部２ａを有する場合について記載したが、ｎ型ドーパントとｐ型ドーパントとが逆の構成であっても構わない。すなわち、発光素子は、基板にｐ型ドーパント濃度の高い高濃度ｐ型半導体部とｐ型ドーパント濃度の低い低濃度ｐ型半導体部とを有し、薄膜に高濃度ｎ型半導体部を有する構成であっても構わない。   In the present embodiment, the substrate 1 has a high-concentration n-type semiconductor portion 1b having a high n-type dopant concentration and a low-concentration n-type semiconductor portion 1a having a low n-type dopant concentration, and the thin film 2 has a high-concentration p-type semiconductor. Although the case where the portion 2a is provided has been described, the n-type dopant and the p-type dopant may have opposite configurations. That is, the light-emitting element has a configuration in which a high-concentration p-type semiconductor portion having a high p-type dopant concentration and a low-concentration p-type semiconductor portion having a low p-type dopant concentration are provided on the substrate, and a high-concentration n-type semiconductor portion is provided on the thin film. It does not matter.

１ 基板
１ａ 低濃度ｎ型半導体部
１ｂ 高濃度ｎ型半導体部
２ 薄膜
２ａ 高濃度ｐ型半導体部
３ ｐｎ接合部
１００ 発光素子
２００ 発光素子 DESCRIPTION OF SYMBOLS 1 Substrate 1a Low concentration n-type semiconductor portion 1b High concentration n-type semiconductor portion 2 Thin film 2a High concentration p-type semiconductor portion 3 pn junction portion 100 Light emitting element 200 Light emitting element

Claims (2)

１×１０ １４ 個／ｃｍ ３ 以上１×１０ １６ 個／ｃｍ ３ 以下の濃度範囲でヒ素およびアンチモンのうちの１以上からなるｎ型ドーパントが均一に拡散された単結晶シリコンからなる基板の１つの表面側の一部またはすべての部分に形成され、ピーク値が１×１０ １９ 個／ｃｍ ３ 以上１×１０ ２１ 個／ｃｍ ３ 以下の濃度範囲で前記ｎ型ドーパントが拡散された高濃度ｎ型半導体部と、
前記高濃度ｎ型半導体部の表面に設けられた単結晶シリコンからなる薄膜の前記高濃度ｎ型半導部に対応する部分に形成され、ピーク値が１×１０ １９ 個／ｃｍ ３ 以上１×１０ ２１ 個／ｃｍ ３ 以下の濃度範囲でホウ素からなるｐ型ドーパントを打ち込むことによって拡散された高濃度ｐ型半導体部と、
前記高濃度ｎ型半導体部と前記高濃度ｐ型半導体部との接合部に形成され、前記ｎ型ドーパントおよび前記ｐ型ドーパントが、前記高濃度ｎ型半導体部を除く前記単結晶シリコン基板の前記ｎ型ドーパント濃度よりも高い濃度範囲で拡散されたｐｎ接合部と、
からなる発光素子であって、
前記高濃度ｎ型半導体部の厚みは、１〜２μｍであって、
前記高濃度ｎ型半導体部を除く前記基板の厚みは、１００〜７００μｍであって、
前記高濃度ｐ型半導体部の厚みは、１〜２μｍであることを特徴とする発光素子。 One substrate of single crystal silicon in which an n-type dopant consisting of one or more of arsenic and antimony is uniformly diffused in a concentration range of 1 × 10 14 / cm 3 or more and 1 × 10 16 / cm 3 or less High-concentration n-type formed in part or all of the surface side and having the n-type dopant diffused in a concentration range where the peak value is 1 × 10 19 atoms / cm 3 or more and 1 × 10 21 atoms / cm 3 or less A semiconductor part;
A thin film made of single crystal silicon provided on the surface of the high-concentration n-type semiconductor portion is formed in a portion corresponding to the high-concentration n-type semiconductor portion, and has a peak value of 1 × 10 19 pieces / cm 3 or more and 1 ×. A high-concentration p-type semiconductor portion diffused by implanting a p-type dopant made of boron at a concentration range of 10 21 / cm 3 or less ;
The n-type dopant and the p-type dopant are formed at a junction between the high-concentration n-type semiconductor portion and the high-concentration p-type semiconductor portion. a pn junction diffused in a concentration range higher than the n-type dopant concentration;
A light emitting device comprising :
The high-concentration n-type semiconductor part has a thickness of 1 to 2 μm,
The thickness of the substrate excluding the high-concentration n-type semiconductor portion is 100 to 700 μm,
The high-concentration p-type semiconductor part has a thickness of 1 to 2 μm . １×１０ １４ 個／ｃｍ ３ 以上１×１０ １６ 個／ｃｍ ３ 以下の濃度範囲でホウ素からなるｐ型ドーパントが均一に拡散された単結晶シリコンからなる基板の１つの表面側の一部またはすべての部分に形成され、ピーク値が１×１０ １９ 個／ｃｍ ３ 以上１×１０ ２１ 個／ｃｍ ３ 以下の濃度範囲で前記ｐ型ドーパントを打ち込むことによって拡散された高濃度ｐ型半導体部と、
前記高濃度ｐ型半導体部の表面に設けられた単結晶シリコンからなる薄膜の前記高濃度ｐ型半導部に対応する部分に形成され、ピーク値が１×１０ １９ 個／ｃｍ ３ 以上１×１０ ２１ 個／ｃｍ ３ 以下の濃度範囲でヒ素およびアンチモンのうちの１以上からなるｎ型ドーパントが拡散された高濃度ｎ型半導体部と、
前記高濃度ｐ型半導体部と前記高濃度ｎ型半導体部との接合部に形成され、前記ｐ型ドーパントおよび前記ｎ型ドーパントが、前記高濃度ｐ型半導体部を除く前記単結晶シリコン基板の前記ｐ型ドーパント濃度よりも高い濃度範囲で拡散されたｐｎ接合部と、
からなる発光素子であって、
前記高濃度ｐ型半導体部の厚みは、１〜２μｍであって、
前記高濃度ｐ型半導体部を除く前記基板の厚みは、１００〜７００μｍであって、
前記高濃度ｎ型半導体部の厚みは、１〜２μｍであることを特徴とする発光素子。 Part or all of one surface side of a substrate made of single crystal silicon in which p-type dopants made of boron are uniformly diffused in a concentration range of 1 × 10 14 pieces / cm 3 or more and 1 × 10 16 pieces / cm 3 or less A high-concentration p-type semiconductor part formed by implanting the p-type dopant in a concentration range of 1 × 10 19 pieces / cm 3 to 1 × 10 21 pieces / cm 3 ,
A thin film made of single crystal silicon provided on the surface of the high-concentration p-type semiconductor portion is formed at a portion corresponding to the high-concentration p-type semiconductor portion, and has a peak value of 1 × 10 19 pieces / cm 3 or more and 1 ×. A high-concentration n-type semiconductor portion in which an n-type dopant composed of one or more of arsenic and antimony is diffused in a concentration range of 10 21 / cm 3 or less;
The p-type dopant and the n-type dopant are formed at a junction between the high-concentration p-type semiconductor portion and the high-concentration n-type semiconductor portion, and the single-crystal silicon substrate except the high-concentration p-type semiconductor portion a pn junction diffused in a concentration range higher than the p-type dopant concentration;
A light emitting device comprising:
The high-concentration p-type semiconductor part has a thickness of 1 to 2 μm,
The thickness of the substrate excluding the high-concentration p-type semiconductor portion is 100 to 700 μm,
The high-concentration n-type semiconductor part has a thickness of 1 to 2 μm .
JP2016129599A 2016-06-30 2016-06-30 Light emitting element Active JP6278423B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2016129599A JP6278423B2 (en) 2016-06-30 2016-06-30 Light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016129599A JP6278423B2 (en) 2016-06-30 2016-06-30 Light emitting element

Publications (2)

Publication Number Publication Date
JP2018006496A JP2018006496A (en) 2018-01-11
JP6278423B2 true JP6278423B2 (en) 2018-02-14

Family

ID=60949815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016129599A Active JP6278423B2 (en) 2016-06-30 2016-06-30 Light emitting element

Country Status (1)

Country Link
JP (1) JP6278423B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020065736A1 (en) * 2018-09-25 2020-04-02 特定非営利活動法人ナノフォトニクス工学推進機構 Method for manufacturing light-emitting device
WO2022153983A1 (en) * 2021-01-12 2022-07-21 日亜化学工業株式会社 Semiconductor element and manufacturing method for semiconductor element

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08148280A (en) * 1994-04-14 1996-06-07 Toshiba Corp Semiconductor device and manufacture therefor
US5917195A (en) * 1995-02-17 1999-06-29 B.A. Painter, Iii Phonon resonator and method for its production
EP1107044A1 (en) * 1999-11-30 2001-06-13 Hitachi Europe Limited Photonic device
US20070096171A1 (en) * 2005-10-31 2007-05-03 Ching-Fuh Lin Semiconductor laser device that has the effect of phonon-assisted light amplification and method for manufacturing the same
JP5003013B2 (en) * 2006-04-25 2012-08-15 株式会社日立製作所 Silicon light-emitting diode, silicon phototransistor, silicon laser, and manufacturing method thereof.
JP2012186162A (en) * 2011-02-18 2012-09-27 Univ Of Tokyo Electroluminescent element and manufacturing method therefor
JP2012243824A (en) * 2011-05-16 2012-12-10 Univ Of Tokyo Semiconductor laser diode and manufacturing method thereof
JP5840871B2 (en) * 2011-06-06 2016-01-06 特定非営利活動法人ナノフォトニクス工学推進機構 ELECTROLUMINESCENCE ELEMENT LIGHT EMITTING CONTROLLER AND METHOD
JP6005917B2 (en) * 2011-08-30 2016-10-12 特定非営利活動法人ナノフォトニクス工学推進機構 Pulsed light emission controller and method
JP6073599B2 (en) * 2012-08-24 2017-02-01 特定非営利活動法人ナノフォトニクス工学推進機構 Method for manufacturing electroluminescence element
JP2014059170A (en) * 2012-09-14 2014-04-03 V Technology Co Ltd Semiconductor ring laser apparatus
JP2014072498A (en) * 2012-10-01 2014-04-21 V Technology Co Ltd Process of manufacturing semiconductor light-emitting/light receiving element and semiconductor light-emitting/light receiving element

Also Published As

Publication number Publication date
JP2018006496A (en) 2018-01-11

Similar Documents

Publication Publication Date Title
Gong et al. Size-dependent light output, spectral shift, and self-heating of 400 nm InGaN light-emitting diodes
JP3266207B2 (en) Thermally stable diode laser structure
JP6162890B2 (en) Micro light emitting diode
US9306113B2 (en) Silicon light emitting device utilising reach-through effects
JP5420550B2 (en) Silicon light emitting device using carrier injection
JP2009260246A (en) Semiconductor light-emitting device, optical print head, and image forming appparatus
JPH05267716A (en) Thermally stabilized light-emitting diode structure
JP6278423B2 (en) Light emitting element
JP5676273B2 (en) Semiconductor light-emitting device using punch-through effect
JP2013065591A (en) Light-emitting element, light-emitting element array, optical writing head and image formation apparatus
Kantner et al. Efficient current injection into single quantum dots through oxide-confined pn-diodes
TW201535777A (en) Nitride semiconductor stacked body and semiconductor light emitting device
TW533456B (en) Radiation-emissive optoelectronic device and method for making the same
JP2012186162A (en) Electroluminescent element and manufacturing method therefor
EP0837506A2 (en) Semiconductor device with defect layer and method of manufacturing the same
Myllynen et al. Current spreading in back-contacted GaInP/GaAs light-emitting diodes
US20080029757A1 (en) Semiconductor device having a laterally injected active region
JP6073599B2 (en) Method for manufacturing electroluminescence element
JP6135559B2 (en) Semiconductor light emitting device, method for manufacturing semiconductor light emitting device, and semiconductor device
TWI781445B (en) High-power vcsel
JP5823304B2 (en) Method for producing p-type ZnO, ZnO electroluminescent semiconductor element
JP2015012047A (en) Light receiving element and manufacturing method of the same
JP6529048B2 (en) Method of manufacturing light emitting device
JP2005519488A (en) Laser diode with low absorption diode junction
JP2014072498A (en) Process of manufacturing semiconductor light-emitting/light receiving element and semiconductor light-emitting/light receiving element

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20171005

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20171026

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180110

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180110

R150 Certificate of patent or registration of utility model

Ref document number: 6278423

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250