JP6255661B2 - TS signal switching device and signal switching method - Google Patents

Description

  The present invention relates to a broadcast signal transmission technique, and more particularly to a broadcasting TS (Transport Stream) signal switching device.

  With the development of high-quality video broadcasts and data broadcasts, there is an increasing need for reliably transmitting broadcast signals in order to maintain the broadcast quality. In order to maintain the transmission quality of broadcast signals, it is important not to cause abnormalities in the paths and devices used for transmission, but at the same time, when abnormalities occur in broadcast signals, the effects of those abnormalities are reduced. It is also important.

  As one of measures for suppressing the influence of the abnormality of the broadcast signal that occurs during the transmission of the broadcast signal, it is possible to make redundant signals by sending signals including the same information in a plurality of systems. At that time, it is not sufficient to transmit a plurality of broadcast signals, and a technique is required for switching between a plurality of broadcast signals and using normal signals when an abnormality occurs. For this reason, technical development relating to a signal switching device for switching a broadcast signal system when an abnormality occurs has been actively conducted. As a signal switching device used for switching signals when an abnormality occurs in a broadcast signal, for example, there is a signal switching device as disclosed in Patent Document 1.

  Patent Document 1 discloses a device that analyzes a broadcast signal and switches the signal when an abnormality is detected. The signal switching device disclosed in Patent Document 1 analyzes a header portion of a packet that constitutes a broadcast signal, and detects an abnormality of the signal based on whether or not the data included in the packet is abnormal. A plurality of broadcast signals are input to the signal switching device of Patent Document 1. When an abnormality is detected in one of the plurality of systems, a normal signal is output by replacing the normal data of another system by switching the switch.

  Patent Document 2 discloses a broadcast signal switching device that monitors an abnormality of data information included in a signal and switches a switch to flow a normal signal when the abnormality is detected. In Patent Document 2, it is assumed that the presence / absence of data abnormality is detected by a method such as monitoring whether the numerical value for identification included in a packet increases in order.

JP 2010-34971 A JP 2008-283476 A

  However, the technique disclosed in Patent Document 1 has the following problems. In the technique of Patent Document 1, an abnormality included in a packet is detected, and the packet in which the abnormality has occurred is replaced with a packet of another system. However, it does not disclose a method for outputting a plurality of systems of signals in synchronization. Also, Patent Document 2 switches from a signal in which an abnormality has occurred to a signal in which no abnormality has occurred, but does not disclose details about a method for synchronously replacing signals received from a plurality of systems. Therefore, in the technique described in Patent Document 1 or Patent Document 2, when an abnormality occurs in a broadcast signal unless a signal synchronization unit is separately used, a replacement signal is seamlessly generated without causing a signal loss or the like. It may be insufficient as a technique for outputting. In general, signal synchronization is often performed using a clock signal from a rubidium oscillator or the like, but they are expensive. In addition, the configuration of the apparatus may be complicated by using an oscillator or the like. Therefore, even if the technique of the cited document 1 or 2 is combined with a signal synchronization method using an oscillator or the like, only a signal switching device that is expensive or complicated in configuration can be obtained.

  An object of the present invention is to obtain a switching device having a seamless signal switching function by absorbing a phase difference between signals in a plurality of systems even in a configuration in which no reference clock signal is input without an oscillator or the like.

  In order to solve the above problems, the signal switching device of the present invention includes a first memory circuit, a second memory circuit, and a signal switching means. Each of the first memory circuit and the second memory circuit includes a memory means. The storage means stores data in a predetermined order included in the input broadcast signal and outputs the data in a predetermined order. The signal switching means selects and outputs one of the data output from the first memory circuit and the second memory circuit. In addition, when the data input to one of the storage means of the first storage circuit or the second storage circuit satisfies a predetermined standard, the data is output from the storage means. When data is output, the storage means of the first storage circuit and the storage means of the second storage circuit simultaneously output data in the same order among the stored data.

  In the signal switching device of the present invention, data of signals input to a plurality of paths is stored, and when the data input to any of the paths satisfies a predetermined standard, data is simultaneously output from the storage means of each path. Is called. Further, the data output from the storage means is selected by the signal switching switch and the signal data of one path is selected and output. As a result, it is possible to absorb a phase difference between signals input from a plurality of systems, and to switch signals seamlessly and output signals. In the present invention, since the output is performed based on the timing at which the signal is input, it is not necessary to input a reference clock signal. Since it is not necessary to input a clock signal, an element such as an oscillator is not required, and the apparatus configuration can be simplified.

It is a figure which shows the outline | summary of a structure of the 1st Embodiment of this invention. It is a figure which shows the example of the data in the 1st Embodiment of this invention. It is a figure which shows the outline | summary of a structure of the 2nd Embodiment of this invention. It is a figure which shows the outline | summary of a structure of the 3rd Embodiment of this invention. It is a figure which shows the outline | summary of a structure of the 4th Embodiment of this invention.

  A first embodiment of the present invention will be described in detail with reference to FIG. FIG. 1 shows an outline of the configuration of the signal switching device 10 of the present embodiment. The signal switching device 10 includes a first input monitoring unit 11, a first adjustment memory unit 12, a second input monitoring unit 13, a second adjustment memory unit 14, and a signal switching unit 15. . The signal switching device 10 further includes a switching control unit 16, a memory monitoring unit 17, and a memory control unit 18.

  The first input monitoring unit 11 has a function of monitoring an input TS signal and detecting whether there is an abnormality in the TS signal. Further, the first input monitoring unit 11 has a function of transmitting information indicating the occurrence of an abnormality to the switching control unit 16 when an abnormality is detected from data included in the TS signal. The first adjustment memory unit 12 has a function of storing data included in the signal output from the first input monitoring unit 11. The first adjustment memory unit 12 has a function of outputting and erasing stored data in accordance with instructions from the memory control unit 18. In the present embodiment, a signal path that is input to the first input monitoring unit 11 and output from the first adjustment memory unit 12 is referred to as a first path 61. The second input monitoring unit 13 has the same function as the first input monitoring unit 11. The second adjustment memory unit 14 has the same function as the first adjustment memory unit 12. In the present embodiment, a path of a signal that is input to the second input monitoring unit 13 and output from the second adjustment memory unit 14 is referred to as a second path 62. The signal switching unit 15 has a function of selecting and outputting one of the signals input from the first path 61 and the second path 62 based on an instruction from the switching control unit 16.

  The switching control unit 16 has a function of receiving information indicating the occurrence of an abnormality from the first input monitoring unit 11 and the second input monitoring unit 13. When the switching control unit 16 receives information indicating the occurrence of an abnormality, the signal switching unit 15 determines whether the path where the abnormality is detected is the same as the current path. When the switching control unit 16 determines that the path in which the abnormality has occurred is the same as the current path, the switching control unit 16 sends an instruction to switch to the signal path in which no abnormality has occurred in the signal switching unit 15. The memory monitoring unit 17 has a function of monitoring the contents and the amount of data stored in the first adjustment memory unit 12 and the second adjustment memory unit 14. When the data input to the first adjustment memory unit 12 and the second adjustment memory unit 14 satisfy a predetermined standard, the memory monitoring unit 17 transmits information indicating that to the memory control unit 18. The memory control unit 18 has a function of sending instructions for storing data input to the first adjustment memory unit 12 and the second adjustment memory unit 14, outputting and erasing stored data, and the like.

  The TS signal input to the signal switching device 10 of the present embodiment is a signal composed of TS packets in the TS format. One TS packet is composed of data of 188 bytes or 204 bytes. As the broadcast signal, a signal based on a standard such as MPEG-2 (Moving Picture Experts Group) is used.

  It is assumed that a TS signal is input to the first input monitoring unit 11 of the first path 61 and the second input monitoring unit 13 of the second path 62. The signal input to the first path 61 and the signal input to the second path 62 may be out of phase due to the effect of signal delay on the transmission path. The input TS signal passes through the first input monitoring unit 11 or the second input monitoring unit 13 and is then sent to the first adjustment memory unit 12 or the second adjustment memory unit 14. Data included in the signal sent to the first adjustment memory unit 12 or the second adjustment memory unit 14 is stored in the first adjustment memory unit 12 or the second adjustment memory unit 14, respectively.

  It is assumed that a predetermined reference packet is input after detecting the leading packet constituting the TS signal, and further, data for one packet is input to the second path 62. The predetermined standard is set in advance according to the amount of data and the number of packets. The predetermined reference can be set, for example, as a data amount obtained by adding a fixed amount of data and a fixed delay amount appropriate for absorbing a packet input timing shift, that is, a phase shift, etc. . For example, an amount corresponding to a fixed delay can be set as a data amount for 1.5 packets, and a data amount obtained by adding one packet can be set as a predetermined reference. In the present embodiment, it is assumed that a data amount obtained by adding one packet to 1.5 packets corresponding to a fixed delay is set as a predetermined reference. When packet data corresponding to a predetermined criterion is input, the memory monitoring unit 17 sends information indicating that a packet satisfying the predetermined criterion has been input to the memory control unit 18. When the memory control unit 18 receives information indicating that the predetermined criterion is satisfied, the packet is input to the second path 62 to the first adjustment memory unit 12 and the second adjustment memory unit 14. An instruction to output the data of the first packet is sent in accordance with the timing. Upon receiving an instruction to output data, the first adjustment memory unit 12 and the second adjustment memory unit 14 output data in a packet format. At that time, the output of the packet is performed in a burst manner.

  The first adjustment memory unit 12 and the second adjustment memory unit 14 start outputting in accordance with the timing at which packets are input to the first path 61 and the second path 62. Since the first adjustment memory unit 12 and the second adjustment memory unit 14 start outputting data simultaneously, the TS signals output from both paths have the same phase. Further, data output from the first adjustment memory unit 12 and the second adjustment memory unit 14 is performed in a burst manner, that is, in a method of continuously outputting one packet. At the time of input, data is input every 1 Byte, and at the time of output, data is output in bursts. Therefore, the output is faster than the input, and the first adjustment memory unit 12 and the second adjustment memory unit 14 do not have insufficient storage capacity.

  In the signal switching device 10 of the present embodiment, packets are output from the first storage unit 12 and the second storage unit 14 in accordance with the input timing of packets to the first route 61 and the second route 62. ing. Therefore, it is not necessary to input a clock signal in order to synchronize the phases of the packets output in the two paths. By eliminating the need to input a clock signal, it is not necessary to provide a rubidium oscillator or the like, and the apparatus configuration can be simplified.

  In the present embodiment, an example in which a TS signal in a packet format is input to the first path 61 and the second path 62 and is output from the first adjustment memory unit 12 and the second adjustment memory unit 14 is illustrated. It was shown in 2. 2 shows a packet included in the TS signal input to the first path 61 side. The second row from the top in FIG. 2 shows packets included in the TS signal input to the second path 62. The third and fourth stages in FIG. 2 show examples of TS packets output from the first adjustment memory section 12 of the first path 61 and the second adjustment memory section 14 of the second path 62. It is. The phases of signals input to the first path 61 and the second path 62 do not match as shown in FIG. In this embodiment, it is assumed that data for 1.5 packets is set as a fixed delay. Further, in the present embodiment, since a fixed delay of 1.5 packets plus one packet is set as a predetermined standard, the predetermined standard satisfies the condition at the third packet.

  In the second path 64, when the leading data of a packet that satisfies a predetermined criterion is input to the second adjustment memory unit 14, information indicating that the condition of the predetermined criterion is satisfied is sent to the memory control unit 18. It is done. When the memory control unit 18 receives the information that the predetermined standard is satisfied, the memory control unit 18 sends the data corresponding to the first packet among the stored data to the first adjustment memory unit 12 and the second adjustment memory unit 14. Send instructions to output. Upon receiving an instruction to output data, the first adjustment memory unit 12 and the second adjustment memory unit 14 output the stored data in a TS packet format in a burst manner. In response to an instruction from the memory control unit 18, data is output simultaneously from the first adjustment memory unit 12 and the second adjustment memory unit 14, so that the phases of the output data are aligned. The second packet stored in the first adjustment memory unit 12 and the second adjustment memory unit 14 is output when the next packet is input to the second adjustment memory 14 on the second path 62 side. Be started. The third and subsequent packets are sequentially output every time input of the next one packet starts. In addition, since the TS packet data is output in bursts in accordance with the input timing, the adjustment memory unit does not break.

  The operation when the presence or absence of abnormality of data included in the TS signal input to the signal switching device 10 is monitored and the path of the signal is switched when the abnormality is detected will be described. It is assumed that TS signals are input to the signal switching device 10 from two paths and input to the first path 61 and the second path 62, respectively. Signals input from the two paths are signals composed of packets each containing the same content data. The first input monitoring unit 11 of the first path 61 and the second input monitoring unit 13 of the second path 62 monitor whether or not there is an abnormality in the packet data included in the input TS signal. It is assumed that abnormal data is input to the first input monitoring unit 11 and the first input monitoring unit 11 detects the abnormality. Abnormality detection is performed, for example, when the header portion includes data that does not conform to the standard, or when the number added to the packet is not a sequential number.

  When the first input monitoring unit 11 detects an abnormality, the first input monitoring unit 11 transmits information indicating the occurrence of the abnormality to the signal switching unit 15. When the signal switching unit 15 receives information indicating the occurrence of an abnormality, the signal switching unit 15 determines whether the occurrence of the abnormality is a path through which the current signal flows or the other path. When the current route is a route for passing a signal from the first route 61, the signal switching unit 15 switches the signal route to the route from the second route 62 side. If the current route is a route from the second route 61, the signal switching unit 15 does not switch to the signal route. When the signal switching unit 15 performs path switching, a signal from the normal second path 62 side can be sent to the subsequent path instead of a signal from the abnormal first path 61 side. As a result, the signal output from the signal switching device 10 is a signal composed of TS packets including normal data.

  In the signal switching device according to the present embodiment, when a packet satisfying a predetermined criterion is input to one adjustment memory unit of the two paths, the output of the packet from each adjustment memory unit of the two paths is simultaneously performed, And it is done in a burst. Since the output from the adjustment memory unit of both paths is performed in accordance with the timing of input to one path, the phases of the output packets are synchronized. Further, the output of the adjustment memory unit is not broken by performing the output in a burst manner. As a result, the signal switching apparatus according to the present embodiment can absorb the phase difference between signals input to the two paths, and can perform seamless signal switching and output signals. In addition, when an abnormality is detected, the signal is output without interruption even when an abnormality occurs by switching from the signal of the path where the abnormality has occurred to the signal of the other path synchronized with it. be able to. Even when an abnormality occurs, a normal signal can be selected and output without any missing signal, and the transmission quality of the broadcast signal can be improved.

  In the signal switching device according to the present embodiment, output synchronization is performed in accordance with signal input timing, so that it is not necessary to input a clock signal for synchronization. This eliminates the need for a rubidium oscillator or the like for inputting a clock signal, and simplifies the device configuration.

  A second embodiment of the present invention will be described in detail with reference to FIG. FIG. 3 shows an outline of the configuration of the signal switching device 20 of the present embodiment. In the first embodiment, when an abnormality is detected from data included in the TS signal, information is directly transmitted from the input monitoring unit to switch the path of the signal switching device. In the present embodiment, the control unit performs the control of the adjustment memory unit and the control of the signal switching unit to switch signals more accurately.

  The signal switching device 20 according to the present embodiment includes a first input monitoring unit 21, a first adjustment memory unit 22, a second input monitoring unit 23, a second adjustment memory unit 24, and a signal switching unit 25. The memory control unit 26 and the control unit 27 are provided.

  The first input monitoring unit 21 has a function of monitoring an input TS signal and detecting whether there is an abnormality in data included in the TS signal. The first input monitoring unit 21 has a function of transmitting information indicating the occurrence of an abnormality to the control unit 27 when an abnormality is detected. The first adjustment memory unit 22 has a function of storing data included in the signal output from the first input monitoring unit 21. The first adjustment memory unit 22 has a function of outputting and erasing stored data in accordance with an instruction from the memory control unit 26. In the present embodiment, a signal path composed of the first input monitoring unit 21 and the first adjustment memory unit 22 is referred to as a first path 63. The second input monitoring unit 23 has the same function as the first input monitoring unit 21. The second adjustment memory unit 24 has the same function as the first adjustment memory unit 22. A signal path constituted by the second input monitoring unit 23 and the second adjustment memory unit 24 is referred to as a second path 64. The signal switching unit 25 has a switch function of selecting and outputting one of the signals input from the first path 63 and the second path 64 based on an instruction from the control unit 27.

  The memory control unit 26 has a function of monitoring data stored in the first adjustment memory unit 22 and the second adjustment memory unit 24. The memory control unit 26 has a function of sending a signal indicating instructions such as storage by data writing, output by reading, and erasure to the first adjustment memory unit 22 and the second adjustment memory unit 24. Data storage and output in the signal switching device 20 of the present embodiment are performed in the same manner as the signal switching device 10 of the first embodiment. That is, the packet output from the first path 63 and the packet output from the second path 64 are synchronized.

  The control unit 27 has a function of controlling each part of the signal switching device 20. The control unit 27 functions to switch the signal path by controlling the memory control unit 26 and the signal switching unit 25 based on information indicating abnormality from the first input monitoring unit 21 and the second input monitoring unit 23. Have

  In the signal switching device 20 according to the present embodiment, an operation when an abnormality is detected from packet data constituting an input signal and a path is switched will be described. In the first stage, it is assumed that the signal switching unit 25 selects and outputs a signal on the first path 63 side.

  It is assumed that the first input monitoring unit 21 of the first path 63 detects an abnormality of data included in the TS format packet of the input TS signal. The first input monitoring unit 21 sends information indicating the abnormality to the control unit 27. When the control unit 27 receives the information in which the abnormality has occurred, the control unit 27 sends the information in which the abnormality has occurred on the first path 63 side to the memory control unit 26. At the same time, an instruction to switch the signal path to the second path 64 side is sent to the signal switching unit 25. When receiving an instruction to switch the signal path, the signal switching unit 25 performs switching so as to select and output the signal on the second path 64 side. The signal switching unit 25 switches the signal path so that the signal from the first path 63 side is switched to the signal from the second path 64 side. . Therefore, seamless switching of signals composed of TS packets is possible. When the memory control unit 26 receives information indicating that an abnormality has occurred on the first path 63 side, the memory control unit 26 stores the data included in the packet input to the first adjustment memory unit 22 and outputs the stored data. Send instructions to stop. When receiving an instruction to stop data recording and output, the first adjustment memory unit 22 stops storing the input packet. Therefore, the first adjustment memory unit 22 does not store a packet in which an abnormality has occurred. At the same time, the first adjustment memory unit 22 stops outputting stored data.

  When the next packet in which an abnormality has occurred is input and the first input monitoring unit 21 detects that the packet is normal, the first input monitoring unit 21 transmits information that is a normal signal to the control unit 27. . When the control unit 27 receives information indicating that the signal is normal from the first input monitoring unit 21, the control unit 27 sends information for resuming storage and output of data in the first adjustment memory unit 22 to the memory control unit 26. . When the memory control unit 26 receives the information for resuming the storage and output of data, the memory control unit 26 sends an instruction to resume the storage and output of the data of the input packet to the first adjustment memory unit 22. When receiving an instruction to resume data storage, the first adjustment memory unit 22 resumes packet data storage. Further, the first adjustment memory unit 22 resumes data output in accordance with an instruction from the memory control unit 26. At that time, the memory control unit 26 sends an instruction to output data to the first adjustment memory unit 22 in accordance with the timing at which the same data is output from the second adjustment memory unit 24. At that time, the synchronization of the signal in accordance with the input timing to the second path 64 side is also considered at the same time.

  When the first input monitoring unit 21 detects an abnormality from the next packet in which an abnormality has occurred, the state in which data is not stored and output in the first adjustment memory unit 22 is continued. Until a packet including normal data is input to the first input monitoring unit 21, data storage and output are performed only on the second path 64 side. Further, when the output of data from the first adjustment memory unit 22 on the first path 63 side is resumed, it is performed in accordance with the input timing of the packet to the second path 64 side. That is, TS packets are output in synchronization from the first adjustment memory unit 22 and the second adjustment memory unit 24.

  In the above example, an abnormality has occurred on the first path 63 side. However, when an abnormality has occurred on the second path 64 side, the path is switched to the first path 63 side in the same manner. Is done.

  In the signal switching device of the present embodiment, TS signals input from two systems are monitored as in the first embodiment, and when a packet that satisfies a predetermined criterion is input to one path, Packets are simultaneously output from the path adjustment memory unit. Further, when an abnormality is detected in the packet data of the input TS signal, the output is switched to the other normal path. In the present embodiment, when an abnormality is detected from the packet data of the input TS signal, the storage of the packet data on the path on the side where the abnormality is detected is stopped. Since the packet data including abnormality is not stored in the adjustment memory unit, a packet including abnormal data is not erroneously output at the time of output. Therefore, normal data output from the signal switching device can be performed more reliably. As described above, even when an abnormality occurs in the input TS signal, a normal signal can be output without interruption, and the transmission quality of the broadcast signal can be improved.

  A third embodiment of the present invention will be described in detail with reference to FIG. FIG. 4 shows an outline of the configuration of the TS signal transmission system of this embodiment. Although the signal switching device has been described in the first and second embodiments, the present embodiment relates to a broadcasting TS signal transmission system including these signal switching devices.

  The TS signal transmission system according to this embodiment includes a transmission unit 30, a first reception unit 41, and a second reception unit. A broadcast signal is transmitted from the transmission unit 30 to the first reception unit 41 via the first transmission path 51. Further, the TS signal is transmitted from the transmission unit 30 to the second reception unit 41 via the second transmission path 52.

  The transmission unit 30 includes a broadcast signal transmission device 31, a first multiplexing device 32, a second multiplexing device 33, a first signal switching device 34, a distributor 35, and an oscillator 36. Yes. The broadcast signal transmission device 31 is a device for transmitting a TS signal for a broadcast program by a broadcaster or the like, and outputs a plurality of TS signal lines. Each of the first multiplexer 32 and the second multiplexer 33 has a function of receiving TS signals of a plurality of systems, multiplexing the input TS signals, and outputting them as one TS signal. The first signal switching device 34 has a function of selecting and outputting one of the signals from the first multiplexing device 32 and the second multiplexing device 33. The distributor 35 has a function of distributing the TS signal from the first signal switching device 34 and outputting it to a plurality of paths. In this embodiment, the distributor 35 distributes the input TS signal and outputs the TS signal to the first transmission path 51 and the second transmission path 52. At the time of distribution, the multiplexed signal is not divided and the data included in the TS signal before distribution and each TS signal after distribution is the same. The oscillator 36 has a function of outputting a clock signal for synchronizing signals in the first multiplexer 32, the second multiplexer 33, and the first signal switching device 34. For example, a rubidium oscillator can be used as the oscillator 36.

  The first receiving unit 41 includes a second signal switching device 43 and other necessary devices. The second receiving unit 42 is also composed of a third signal switching device 44 and other necessary devices. The other necessary devices include, for example, a signal amplifier, a device that generates a transmission signal, an antenna-related device, and the like when the first reception unit 41 is installed in a transmission facility. Further, the signal switching device shown in the first embodiment or the signal switching device shown in the second embodiment can be used for the second signal switching device 43 and the third signal switching device 44. The signal switching devices used for the second signal switching device 43 and the third signal switching device 44 may be the same or different.

  In the TS signal transmission system of this embodiment, an operation when a TS signal is transmitted and a signal is selected by a signal switching device of a receiving unit will be described. A plurality of TS signals such as broadcast programs are output from the broadcast signal transmission device 31, and the respective signals are input to the first multiplexing device 32 and the second multiplexing device 33. The first multiplexer 32 and the second multiplexer 33 multiplex a plurality of input TS signals and output them as one TS signal. The TS signals output from the first multiplexer 32 and the second multiplexer 33 are input to the first signal switching device 34. The first signal switching device 34 selects and outputs one of the signals from the first multiplexing device 32 or the second multiplexing device 33. A clock signal is input from the oscillator 36 to the first multiplexer 32, the second multiplexer 33, and the first signal switching device 43, and each signal is synchronized based on the clock signal. The distributor 35 distributes and outputs the signal from the first signal switching device 43 as TS signals to a plurality of paths. The data included in the TS signal is the same before and after being distributed by the distributor 35. In the present embodiment, the TS signal distributed by the distributor 35 is output to the first transmission path 51 and the second transmission path 52.

  The TS signal output from the transmission unit 30 passes through the first transmission path 51 or the second transmission path 52, and is sent to the first reception unit 41 or the second reception unit. A distributor is installed in the first transmission path 51, and the TS signal is distributed and input to the first receiving unit 41 and the second receiving unit 42. A distributor is also installed in the second transmission path 52, and the TS signal is distributed and input to the first receiving unit 41 and the second receiving unit 42. The TS signal is input to the first receiving unit 41 from the first transmission path 51 and the second transmission path 52. The TS signal is also input to the second receiving unit 42 from the first transmission path 51 and the second transmission path 52. The TS signal from the first transmission path 51 and the TS signal from the second transmission path 52 have the same data, but are out of phase due to signal delay on the transmission path There is.

  The TS signals input to the first receiving unit 41 from the two transmission paths are input to the second signal switching device 43. When a signal is input to the second signal switching device 43, the second signal switching device 43 receives either the TS signal input from the first transmission path 51 or the TS signal input from the second transmission path 52. Select either one and output. The second signal switching device 43 synchronizes two signals input by the same method as the signal switching device of the first embodiment or the second embodiment. Further, in the second signal switching device 43, as in the case of the signal switching device of the first embodiment or the second embodiment, when an abnormality occurs in the signal on the selected route side, the other signal switching device 43 Switching to a route signal is performed. As described above, the phase difference between the signals generated in the first transmission path 51 and the second transmission path 52 is corrected and synchronized by the second signal switching device 43. Further, when an abnormality occurs in a signal in the first transmission path 51, the second transmission path 52, or the like, a normal signal is selected and output by the second signal switching device 43. The TS signal output from the second signal switching device 43 is input to the next device provided in the first receiving unit 41.

  The TS signals input from the two transmission paths to the second receiving unit 42 are input to the third signal switching device 44. In the third signal switching device 44, either the TS signal input from the first transmission path 51 or the TS signal input from the second transmission path 52 is selected and output. In the third signal switching device 44 as well, the two signals inputted in the same manner as the signal switching device of the first embodiment or the second embodiment are synchronized and a normal signal is selected, and a TS signal is output. Is done. The TS signal output from the third signal switching device 44 is input to the next device provided in the second receiving unit 42.

  When the TS signal transmission system according to the present embodiment is used, a normal signal is selected in the signal switching unit of the receiving unit even if a signal abnormality occurs on the transmission path or the like. Further, the signals of the two systems are synchronized and switched, and even if an abnormality occurs and the signal system is switched, the output signal is not interrupted or lost. As a result, a TS signal transmission system with high signal transmission quality can be obtained.

  In the first to third embodiments, an example of a signal switching device that switches signals of two paths or a broadcast signal transmission system using the signal switching apparatus has been described. However, a configuration including three or more paths may be used. In that case, data output from the other adjustment memory units is performed simultaneously on the basis of data input to the adjustment memory unit of one of the plurality of routes, and synchronization of signals between the paths is performed. In addition, when an abnormality is detected from the data included in the signal, switching to another path where no abnormality has occurred is performed.

  In the first to third embodiments, examples of TS format broadcast signals have been shown, but broadcast signals of other formats may be used. The signal to be transmitted may be a signal for communication other than a broadcast signal.

  A fourth embodiment of the present invention will be described in detail with reference to FIG. FIG. 5 shows an outline of the configuration of the signal switching device of the present embodiment. The signal switching device of this embodiment includes a first storage circuit 71, a second storage circuit 72, and a signal switching unit 73. The first storage circuit 71 and the second storage circuit 72 are each provided with storage means 74 or storage means 75. The storage means 74 and the storage means 75 store data in a predetermined order included in the input broadcast signal and output the data in a predetermined order. The signal switching unit 73 selects and outputs one of the data output from the first storage circuit 71 and the second storage circuit 72. In addition, when the data input to either the first storage circuit 71 storage means 74 or the storage means 75 of the second storage circuit 72 meets a predetermined standard, the storage means 74 or the storage means 75 Data is output. When data is output, the storage means 74 of the first storage circuit 71 and the storage means 75 of the second storage circuit 72 simultaneously output data in the same order among the stored data in a predetermined order.

  In the signal switching device of the present embodiment, data of signals input to a plurality of paths are stored, and when the data input to any of the paths satisfies a predetermined standard, data is simultaneously output from the storage means of each path Is done. Further, the data output from the storage means is selected by the signal switching switch and the signal data of one path is selected and output. As a result, it is possible to absorb a phase difference between signals input from a plurality of systems, and to switch signals seamlessly and output signals. In the present invention, since the output is performed based on the timing at which the signal is input, it is not necessary to input a reference clock signal. Since it is not necessary to input a clock signal, an element such as an oscillator is not required, and the apparatus configuration can be simplified.

  INDUSTRIAL APPLICABILITY The present invention can be used for a broadcast signal, particularly a TS signal switching device used in a broadcasting station, a relay base, a transmission facility, and other broadcasting related facilities.

DESCRIPTION OF SYMBOLS 10 Signal switching device 11 1st input monitoring part 12 1st adjustment memory part 13 2nd input monitoring part 14 2nd adjustment memory part 15 Signal switching part 16 Switching control part 17 Memory monitoring part 18 Memory control part 20 Signal Switching device 21 First input monitoring unit 22 First adjustment memory unit 23 Second input monitoring unit 24 Second adjustment memory unit 25 Signal switching unit 26 Memory control unit 27 Control unit 30 Transmission unit 31 Broadcast signal transmission device 32 First multiplexer 33 Second multiplexer 34 First signal switching device 35 Distributor 36 Oscillator 41 First reception unit 42 Second reception unit 43 Second signal switching device 44 Third signal switching Device 51 First transmission path 52 Second transmission path 61 First path 62 Second path 63 First path 64 Second path 71 First storage circuit 72 Second memory circuit 73 Signal switching means 74 Memory means 75 Memory means

Claims (6)

A first storage circuit comprising: means for storing data in a predetermined order included in a broadcast signal input at intervals corresponding to a predetermined amount of data; and storage means having means for outputting the data in the predetermined order And a second memory circuit;
Signal switching means for selecting and outputting one of the data output from the storage means of the first storage circuit and the storage means of the second storage circuit ;
The first storage circuit and the second storage circuit comprise detection means for detecting whether there is an abnormality in the data in the predetermined order included in the input broadcast signal ,
The storage means of the first storage circuit and the second storage circuit further includes means for temporarily stopping storage of data and output of stored data when the detection means detects data abnormality. Have
When the data input to one of the storage means of the first storage circuit or the second storage circuit satisfies a predetermined standard, the storage means and the first storage circuit of the first storage circuit The storage means of the two storage circuits simultaneously burst-output one packet of data in the same order among the data in the predetermined order stored therein ,
When the detection unit of either the first storage circuit or the second storage circuit detects an abnormality in the data in the predetermined order, the signal switching unit is configured to detect the first storage circuit or the second storage circuit. Select and output data from the memory circuit of 2 that has no abnormality,
The storage means of the first storage circuit or the second storage circuit having the storage means for temporarily stopping the storage and output of data when the storage and output of data is temporarily stopped; After the detection means of the first storage circuit or the second storage circuit detects that there is no abnormality in the data in the predetermined order, the storage means that temporarily stops storing and outputting data stores the data and A signal switching device characterized by restarting output . 2. The signal switching device according to claim 1, wherein the predetermined reference is set by the number of packets or the data amount of the packets. In the output of the data in the predetermined order from the storage means, the later input data among the same order data newly input to the first storage circuit or the second storage circuit is When entered,
3. The storage means of the first storage circuit and the storage means of the second storage circuit simultaneously output the oldest stored data in the same order. The signal switching device described in 1. A broadcast signal transmission system comprising a plurality of broadcast signal transmission paths, wherein the broadcast signals transmitted through the plurality of transmission paths are input to the signal switching device according to claim 1. . Broadcast signals are input to the first memory circuit and the second memory circuit at intervals corresponding to a predetermined amount of data,
The first memory circuit and the second memory circuit each store data in a predetermined order included in the broadcast signal,
When the data input to either the first memory circuit or the second memory circuit satisfies a predetermined standard, the first memory circuit and the second memory circuit each store data. The data in the same order among the data in the predetermined order is output as a burst for one packet simultaneously as an output signal,
Selecting and outputting one of the output signals from the first memory circuit and the second memory circuit;
Before storing the data in the predetermined order included in the broadcast signal input to the first storage circuit and the second storage circuit, input to the first storage circuit and the second storage circuit Detecting whether there is an abnormality in the data in the predetermined order included in the broadcast signal,
When an abnormality is detected in either the first memory circuit or the second memory circuit, the data of the first memory circuit or the second memory circuit in which no abnormality has occurred is stored. Select and output
When the first storage circuit or the second storage circuit detects an abnormality in the data in the predetermined order, the storage of the data and the output of the stored data are suspended,
The first storage circuit or the second storage circuit, which has temporarily stopped storing and outputting data, further detects that there is no abnormality in the input data in the predetermined order. A signal switching method characterized by restarting output. In the output of the data in the predetermined order stored in the first memory circuit or the second memory circuit, the data in the same order newly input to the first memory circuit or the second memory circuit When the data that is input later is input,
6. The signal switching method according to claim 5, wherein the first memory circuit and the second memory circuit simultaneously output the oldest data stored in the same order.

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