JP6240225B2 - System and method for temperature-driven selection of voltage modes in portable computing devices - Google Patents

Description

  The present invention relates to systems and methods for temperature-driven selection of voltage modes in portable computing devices.

  Portable computing devices ("PCD") are becoming a necessity for people at the individual and professional level. These devices may include mobile phones, personal digital assistants (“PDAs”), portable game consoles, palmtop computers, and other portable electronic devices.

  The trend in PCD design is to increase functionality while reducing the form factor. As a result, current PCDs are usually limited in size from the early stages of the design process, and thus space for components within the PCD is often valuable. Thus, not surprisingly, a consideration for component selection by PCD designers and engineers is often the size of the component.

  The advantage over the inherent space savings provided by the relatively small components is that the power requirements are reduced. Advantageously, at normal operating temperatures, relatively small components often consume less power than their relatively large ones without sacrificing processing power. However, there is a trade-off relationship because relatively small components are susceptible to “temperature reversal effects” that slow down their processing speed when exposed to operating temperatures in a relatively low range of design specifications.

  For example, it is a normal requirement that the PCD be operable in the temperature range of -30 ° C to 85 ° C. For example, when operating below the 0 ° C. temperature point, other desirable low threshold power supply requirements for small components may be insufficient to maintain timing convergence. As a result, even if the smallest component fully meets the requirements at mid-range operating temperatures, the designer must select a component that is large enough to eliminate the temperature reversal effect in a relatively cold operating environment. It must be.

  Therefore, what is needed in the art is a system and method that enables the use of components having low power thresholds in low temperature operating environments, improving productivity and chipset robustness in PCD. More specifically, what is needed in the art is a system and method that avoids PCD timing convergence failures due to low operating temperatures by changing the supply voltage levels of processing components.

  Various embodiments of a method and system for minimum supply voltage level selection in a portable computing device (“PCD”), ie, a voltage mode selection technique, are disclosed. It is an advantage of various embodiments that the PCD designer can converge timing at a certain minimum supply voltage and an operating temperature threshold that is higher than the lowest end of the main operating temperature range where the PCD must function. . Advantageously, by converging timing at relatively high operating temperature thresholds, relatively small components that require relatively low power consumption are used in the PCD, thereby reducing the PCD threshold. When operating at operating temperatures above the value, an overall improved power consumption may be provided. In particular, in order to maintain functionality as the operating temperature falls below a threshold, the minimum supply voltage to the component is increased so that functionality is maintained throughout the main operating temperature range. As those skilled in the art will appreciate, the present system and method is a power consumption issue below the operating temperature threshold at the expense of reduced form factor and improved power efficiency at relatively higher, more general operating temperature conditions. At the expense of

  An exemplary method for voltage mode selection in a portable computing device (“PCD”) includes defining a first operating temperature threshold in the PCD. As described above, the first operating temperature threshold may represent a temperature at which one or more components in the PCD cannot maintain timing convergence at the first minimum supply voltage level. One or more temperature sensors are monitored, such as a die level sensor on the chip. If the temperature reading generated by the sensor indicates that the first operating temperature threshold has been exceeded, the minimum supply voltage can be adjusted. In particular, if the threshold is exceeded so that the measured operating temperature is below the threshold, the minimum supply voltage avoids delaying the component to the extent that the circuit cannot meet the timing convergence requirements. Can be adjusted upwards for this purpose. Similarly, if the threshold is exceeded so that the measured operating temperature exceeds the threshold, the minimum supply voltage can be adjusted downwards so that no extra power is consumed by the component.

  In the drawings, like reference numerals refer to like parts throughout the various figures unless otherwise specified. In the case of a reference number with a character designation such as “102A” or “102B”, the character designation can distinguish between two similar parts or elements present in the same figure. When a reference number is intended to encompass all parts having the same reference number in all figures, the character designation for the reference number may be omitted.

1 is a functional block diagram illustrating one embodiment of an on-chip system for implementing a voltage mode selection method in a portable computing device (“PCD”). FIG. Exemplary non-limiting aspect of the PCD of FIG. 1 in the form of a wireless telephone for implementing a method and system for changing a threshold voltage level supplied to a processing component based on a temperature reading It is a functional block diagram which shows. 3 is a functional block diagram illustrating an exemplary spatial configuration of hardware for the chip shown in FIG. 2. FIG. FIG. 3 is a schematic diagram illustrating an example software architecture of the PCD of FIG. 2 for voltage mode selection and minimum voltage level change. 2 is a logic flow diagram illustrating a method for voltage mode selection in the PCD of FIG. 6 is a logic flow diagram illustrating a sub-method or subroutine for applying static voltage scaling (“SVS”) based on voltage mode.

  The word “exemplary” is used herein to mean “serving as an example, instance, or illustration”. Any aspect described herein as "exemplary" is not necessarily to be construed as exclusive, preferred or advantageous over other aspects. Absent.

  As used herein, the term “application” may also include files with executable content, such as object code, scripts, bytecodes, markup language files, and patches. In addition, an “application” as referred to herein may include files that are not inherently executable, such as documents that may need to be opened, or other data files that need to be accessed.

  As used herein, the terms “component”, “database”, “module”, “system”, “processing component”, etc. refer to hardware, firmware, a combination of hardware and software, software, or It shall refer to a computer-related entity that is any piece of running software. For example, a component can be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components can reside in a process and / or thread of execution, one component can be localized on one computer, and / or distributed across two or more computers Is possible. In addition, these components can execute from various computer readable media having various data structures stored thereon. A component is a component that interacts with one or more data packets (e.g., signals to another component in a local system, distributed system, and / or to other systems across a network such as the Internet. Can be communicated by a local process and / or a remote process, such as following a signal having data from an element).

  In this specification, “central processing unit” (“CPU: central processing unit”), “digital signal processor (“ DSP ”)”, “graphical processing unit (“ GPU: graphical processing unit ”)”, And the term “chip” is used interchangeably. Moreover, a CPU, DSP, GPU or chip may consist of one or more separate processing components, generally referred to herein as a “core”. Furthermore, as long as the CPU, DSP, GPU, chip or core is a functional component within the PCD that consumes different levels of power to operate at different levels of functional efficiency, the use of these terms is disclosed. Those skilled in the art will recognize that application of such embodiments, or equivalents thereof, is not limited to the context of processing components within the PCD. That is, many of the embodiments are described in the context of processing components, but modal voltage selection methods include, but are not limited to, modems, cameras, wireless network interface controllers (“WNICs”), displays, video encoders, It is envisioned that it can be applied to any functional component within the PCD, including peripheral devices, batteries, and the like.

  As used herein, the terms “heat” and “thermal energy” are understood to be used in connection with a device or component capable of generating or dissipating energy that can be measured in units of “temperature”. Let's be done. Similarly, terms such as “operating temperature” and “ambient temperature” are generally used interchangeably to refer to a thermal state when measured in units of “temperature” to which the device or component is exposed. Is done. Thus, those skilled in the art will appreciate that the “operating temperature” to which a given device or component is exposed may be affected by the thermal energy dissipated from the device itself or other nearby thermal energy generating components. You will recognize. Furthermore, the term “temperature” may assume any measurement relative to some reference value that may indicate the relative warmth or lack of heat of the device or component that produces “thermal energy”. It will be further understood. For example, the “temperature” of two components is the same when the two components are “thermally” in equilibrium.

  As used herein, the terms “workload”, “process load”, and “process workload” are used interchangeably and generally relate to the processing burden associated with a given processing component of a given embodiment. Or target the percentage of processing burden. In addition to those defined above, a “processing component” or “thermal energy generation component” or “thermal aggressor” includes, but is not limited to, a central processing unit, a graphical processing unit, a core, a main core, a sub-core, It can be a processing area, a hardware engine, etc., or any component that is internal or external to an integrated circuit within a portable computing device.

  As used herein, the term “portable computing device” (“PCD”) is used to describe any device that operates from a limited capacity power source, such as a battery. Although battery-powered PCDs have been used for decades, the technological advancement of rechargeable batteries brought about with the advent of third-generation (`` 3G '') and fourth-generation (`` 4G '') wireless technologies Enables multiple PCDs with multiple functions. Thus, a PCD can be a laptop computer having a cellular phone, satellite phone, pager, PDA, smartphone, navigation device, smart book or reader, media player, combination of the above devices, and wireless connection, among others.

  As used herein, “timing convergence”, “timing timing”, “timing timing”, and similar terms refer to circuit design considerations related to component selection in consideration of threshold voltage supply levels. Those skilled in the art will appreciate that the matter is referred to. Further, those skilled in the art recognize that at a given threshold voltage supply level, there is a low operating temperature limit that prevents the function of a given component from being too slow to maintain circuit timing requirements. Will. Thus, “timing convergence” at some low operating temperature defines that the components in a given circuit are functional at the “timing convergence” temperature given the minimum supply voltage.

  Circuit designers and engineers specifically select components that are capable of operating at a given minimum or threshold voltage level while maintaining timing requirements over a specified range of operating temperatures. For example, a PCD designer designs a circuit that can function in an ambient environment ranging from -30 ° C to 85 ° C, and therefore, when selecting circuit components, the timing in the design at -30 ° C Often it must be converged. In particular, although the various embodiments are described herein in comparison to scenarios where the PCD has an operating temperature range of -30 ° C to 85 ° C, these embodiments are provided for illustration and as such. It will be appreciated that reference to a suitable operating range is not limited to applying these embodiments to a PCD designed for an operating range of -30 ° C to 85 ° C. Other operating ranges may be envisaged.

  For circuits that function properly over the entire operating temperature range, those skilled in the art will recognize that the timing margin must be maintained at all clock edges of the entire circuit. That is, for example, when a signal propagates through a chain of transistors, all transistors need to perform their function within the amount of time defined by the timing edge (ie, within a “time window”), otherwise If so, the circuit will not function properly.

  In particular, when the operating temperature of the transistor changes, the speed at which the transistor switches also changes. As described above, the amount of variation in switching speed over the target range of operating temperatures must be considered by the designer when selecting components. The temperature at which the designer chooses to converge timing dictates the choice of components such as transistor size. For example, if timing is converged at -30 ° C, the selected transistor will have the required switching speed at -30 ° C at whatever minimum voltage the designer intends to provide the circuit. It must be possible to handle. In particular, if the designer increases the threshold voltage, a relatively small transistor may be selected. On the other hand, if the designer chooses to operate with a relatively small minimum voltage to save power consumption, a relatively large transistor is required.

  Basically, timing convergence in circuit design can be: 1) the selection of a relatively large transistor that can function at a relatively low threshold power level when exposed to the lower end of the operating temperature range, or 2) Defines either the selection of a relatively small transistor that requires a relatively high threshold power level to function at the bottom. In particular, as those skilled in the art will appreciate, the trade-off relationship is the form factor size with respect to power consumption.

  To ensure that the circuit converges timing at the lowest temperature of the operating temperature range, selecting relatively large components increases the form factor when the PCD is operating at relatively high temperatures and It may guarantee functionality at low operating temperatures at the expense of unnecessary high power consumption. Conversely, selecting relatively small components saves space and power consumption at mid-range operating temperatures, but can risk loss of function at relatively low operating temperatures. Simply put, timing convergence considerations at relatively low operating temperatures are typically not considered the best choice when the PCD is operating at mid and high operating temperatures, during the PCD design phase. Specifies the selection of transistors.

  Advantageously, embodiments of the present system and method allow timing to converge at operating temperature breakpoints that are within a relatively wide operating temperature range for which the PCD is designed. Thus, it is possible to maintain timing at or above a temperature breakpoint given a certain minimum supply voltage, but a relatively low temperature in a relatively wide operating temperature range (assuming the same minimum supply voltage). A relatively small component can be used, which is not possible. Thus, some embodiments may be intended for PCDs that include nodes of 28 nm, 20 nm, and / or 16 nm, or smaller.

  In operation, the present system and method monitors the actual operating temperature and if the operating temperature reaches or falls below the temperature breakpoint, the minimum supply voltage for the various components can increase. Thus, assuming that the PCD can operate at most operating temperatures above the temperature breakpoint, the power savings and form factor benefits associated with relatively small components can be recognized. In particular, as those skilled in the art will recognize, it is rare that the PCD is required to function at an operating temperature below the breakpoint temperature, and therefore the minimum supply voltage when the operating temperature falls below the breakpoint temperature. The increase in power consumption due to the increase represents a favorable design trade-off relationship.

  A system and method for applying a voltage mode to a PCD component so that timing can be converged at an operating temperature that is within a relatively wide operating temperature range is disclosed in US Pat. It may be achieved by utilizing one or more sensor measurements that correlate to one or more of the temperature of the memory component, the temperature of the outer shell or “surface” of the PCD, etc. By closely monitoring the temperature associated with such components, the voltage mode selection module in the PCD increases or decreases the minimum supply voltage to the component to maintain functionality while optimizing average power consumption. May bring.

  In particular, although exemplary embodiments of voltage mode selection methods are described herein in the context of a single operating temperature breakpoint, some embodiments utilize multiple temperature thresholds or breakpoints. It is envisioned that this can be done, and thus the present disclosure is not limited to embodiments that monitor a single operating temperature threshold as a trigger to change voltage modes. For example, those skilled in the art will recognize that the timing of a given circuit must be converged at a selected temperature point, but some embodiments may have multiple temperature breakpoints below the temperature at which the timing is converged. It may be assumed that can be defined. In such embodiments, a series of voltage modes are defined in relation to the temperature range between the breakpoint and the minimum supply voltage that is changed each time the operating temperature measurement indicates a crossing over a given range. Can be done.

  As a non-limiting example of how voltage mode temperature driven selection can be applied in an exemplary PCD, sampling of the die level temperature sensor can occur when the PCD is first powered on. In doing so, the embodiment can determine the initial operating temperature of the PCD. The PCD is below the timing convergence breakpoint (for example, below the 0 ° C timing convergence breakpoint for a PCD designed to be functional over a relatively wide operating temperature range of -30 ° C to 85 ° C. ) Indicates the operating temperature determined from the first sampling, the voltage mode selection (`` VMS '') module is capable of static voltage scaling (`` SVS ") level can be increased. In particular, as those skilled in the art will appreciate, the various temperature sensors monitored by the voltage mode selection system may produce temperature readings that closely indicate the actual operating temperature of the component with which the sensor is associated. Or alternatively, it may generate a temperature reading from which the actual temperature of some components can be inferred.

  Returning to a non-limiting example, the PCD must be at or above the timing convergence breakpoint (e.g. designed to be functional over a relatively wide operating temperature range of -30 ° C to 85 ° C. The VMS module maintains timing convergence at an operating temperature above the temperature breakpoint if the operating temperature determined from the first sampling indicates that it is at or above the 0 ° C timing convergence breakpoint for PCD) It can be specified to keep the default SVS level at the relatively low minimum voltage supply value required to

  In another non-limiting example, embodiments of the VMS system and method may be implemented on a PCD that is in a reduced power state (eg, in “sleep” mode). As will be appreciated by those skilled in the art, in such a scenario, the PCD can sometimes “wake up” to monitor the paging channel on the modem, check the temperature sensor, and so on. During the start-up period, if it is recognized that the monitored temperature related to the PCD operating temperature has dropped below the temperature breakpoint, the VMS module will allow the PCD to be started and the minimum supply voltage increase to achieve proper timing convergence. It can be ensured to be maintained. Advantageously, starting PCD recognizes that the operating temperature has dropped below the temperature breakpoint and then increased the supply voltage, while PCD is at risk of malfunctioning due to low thermal energy levels. It may be possible to return to that sleep state without it.

  In particular, the various embodiments described herein include temperature readings associated with die level junction sensors, PoP sensors, and / or surface temperature sensors, although some embodiments of VMS systems may be junction points. It may be assumed that PoP and surface temperature may not be monitored. That is, it is envisioned that some embodiments may monitor temperatures associated with other combinations of components, and therefore, embodiments of VMS systems and methods are exemplary of the components shown herein. It is not limited to specifically monitoring the temperature associated with the combination.

  Returning to a non-limiting example, by monitoring the timing convergence temperature breakpoint, the VMS module can either raise or lower the minimum supply voltage to optimize power consumption and PCD functionality taking into account the operating temperature. Can be adjusted down.

  FIG. 1 is a functional block diagram illustrating an exemplary embodiment of an on-chip system 102 for temperature-based voltage mode selection in a portable computing device 100. To monitor the operating temperature against temperature thresholds related to timing convergence, the on-chip system 102 includes various features such as junctions of cores 222, 224, 226, 228, PoP memory 112A, and PCD shell 24. Various sensors 157 for measuring the temperature associated with the various components can be utilized. Advantageously, by monitoring the temperature associated with the various components and recognizing when the operating temperature crosses the temperature breakpoint associated with circuit timing convergence, the power consumption of PCD 100 is Can be optimized while exposed to operating temperatures above the breakpoint. In addition, a relatively small form factor typically requires a relatively small component capable of maintaining timing convergence at operating temperatures above the breakpoint to ensure functionality at the lower end of a relatively wide operating temperature range. Can be recognized when used instead of relatively large components.

  In general, the system uses the following two main modules, which in some embodiments can be included in a single module. (1) To analyze the temperature readings monitored by the monitoring module 114 (in particular, the monitoring module 114 and the VMS module 101 may be one and the same in some embodiments) and trigger a voltage mode adjustment Voltage mode selection (`` VMS '') module 101, and (2) static voltage scaling (`` '' to provide the minimum supply voltage delivered on the bus to individual components adjusted according to instructions received from VMS module 101. SVS ") Module 26. Advantageously, embodiments of systems and methods that include these two main modules utilize temperature data to optimize average power consumption within the PCD 100 while maintaining functionality over a wide operating temperature range.

  FIG. 2 illustrates an example of the PCD 100 of FIG. 1 in the form of a wireless telephone for implementing a method and system for changing the threshold voltage level supplied to a processing component based on a temperature reading. It is a functional block diagram which shows a non-limiting aspect. As shown, PCD 100 includes an on-chip system 102 that includes a multi-core central processing unit (“CPU”) 110 and an analog signal processor 126 coupled together. As will be appreciated by those skilled in the art, the CPU 110 may include a zeroth core 222, a first core 224, and an Nth core 230. Further, as will be appreciated by those skilled in the art, instead of the CPU 110, a digital signal processor (“DSP”) may also be utilized.

  In general, the static voltage scaling (“SVS”) module 26 optimizes its average power consumption when the PCD 100 operates at normal operating temperatures, while the operating temperature is below some temperature threshold In some cases, it may be responsible to increase or decrease the minimum supply voltage delivered to power consuming components such as the cores 222, 224, 230 to help maintain functionality.

  The monitoring module 114 communicates with a plurality of operating sensors (eg, thermal sensors 157A, 157B) distributed throughout the on-chip system 102, and the CPU 110 of the PCD 100, and the VMS module 101. In some embodiments, the monitoring module 114 can also monitor the surface temperature sensor 157C for temperature readings related to the contact temperature of the PCD 100 or the ambient environment temperature. In other embodiments, the monitoring module 114 can deduce the ambient temperature based on the delta expected from the readings taken by the chip temperature sensors 157A, 157B. The VMS module 101 may function with the monitoring module 114 to identify crossed temperature breakpoints and instruct the SVS module to reduce or increase the minimum supply voltage so that timing convergence is maintained.

  As shown in FIG. 2, a display controller 128 and a touch screen controller 130 are coupled to the digital signal processor 110. Touch screen display 132 external to on-chip system 102 is coupled to display controller 128 and touch screen controller 130. The PCD 100 may be a video encoder 134, such as a phase inversion line (“PAL”) encoder, a sequential color memory (“SECAM”) encoder, a National Television Standards Committee (“NTSC”) encoder, or any other type. A video encoder 134 may further be included. Video encoder 134 is coupled to a multi-core central processing unit (“CPU”) 110. A video amplifier 136 is coupled to the video encoder 134 and the touch screen display 132. Video port 138 is coupled to video amplifier 136. As shown in FIG. 2, a universal serial bus (“USB”) controller 140 is coupled to the CPU 110. The USB port 142 is coupled to the USB controller 140. Memory 112 and subscriber identification module (SIM) card 146 may also be coupled to CPU 110. Further, as shown in FIG. 2, a digital camera 148 may be coupled to the CPU 110. In the exemplary embodiment, digital camera 148 is a charge coupled device (“CCD”) camera or a complementary metal oxide semiconductor (“CMOS”) camera.

  As further shown in FIG. 2, a stereo audio codec 150 may be coupled to the analog signal processor 126. Further, an audio amplifier 152 may be coupled to the stereo audio codec 150. In the exemplary embodiment, first stereo speaker 154 and second stereo speaker 156 are coupled to audio amplifier 152. FIG. 2 shows that a microphone amplifier 158 can also be coupled to the stereo audio codec 150. In addition, a microphone 160 may be coupled to the microphone amplifier 158. In certain aspects, a frequency modulation (“FM”) radio tuner 162 may be coupled to the stereo audio codec 150. An FM antenna 164 is coupled to the FM radio tuner 162. Further, a stereo headphone 166 can be coupled to the stereo audio codec 150.

  FIG. 2 further illustrates that a radio frequency (“RF”) transceiver 168 may be coupled to the analog signal processor 126. RF switch 170 may be coupled to RF transceiver 168 and RF antenna 172. As shown in FIG. 2, a keypad 174 may be coupled to the analog signal processor 126. A microphone mono headset 176 may also be coupled to the analog signal processor 126. Further, a vibrator device 178 can be coupled to the analog signal processor 126. FIG. 2 also illustrates that a power source 188, such as a battery, is coupled to the on-chip system 102 via a PMIC 180. In certain embodiments, the power source includes a rechargeable DC battery or a DC power source derived from an AC-DC converter connected to an alternating current (“AC”) power source. The SVS module 26 may work with the PMIC 180 to reduce or increase the minimum supply voltage based on voltage mode changes triggered by temperature threshold crossings.

  CPU 110 may also be coupled to one or more internal on-chip thermal sensors 157A, as well as one or more external off-chip thermal sensors 157C. On-chip thermal sensor 157A is proportional to one or more absolute temperatures, usually dedicated to complementary metal oxide semiconductor (“CMOS”) very large scale integration (“VLSI”) circuits, based on a vertical PNP structure ("PTAT") A temperature sensor may be provided. The off-chip thermal sensor 157C can include one or more thermistors. The thermal sensor 157C may cause a voltage drop that is converted to a digital signal by an analog-to-digital converter (“ADC”) controller 103. However, other types of thermal sensors 157A, 157B, 157C can be utilized without departing from the scope of the present invention.

  SVS module 26 and VMS module 101 may include software executed by CPU 110. However, the SVS module 26 and the VMS module 101 can also be formed from hardware and / or firmware without departing from the scope of the present invention. The VMS module 101, in conjunction with the SVS module 26, is the minimum voltage supply that can help keep the PCD 100 functioning at the lower end of the operating temperature range while optimizing power consumption at relatively higher and more general operating temperatures May be responsible for prescribing changes.

  Touch screen display 132, video port 138, USB port 142, camera 148, first stereo speaker 154, second stereo speaker 156, microphone 160, FM antenna 164, stereo headphones 166, RF switch 170, RF antenna 172, key Pad 174, mono headset 176, vibrator 178, power supply 188, PMIC 180, and thermal sensor 157C are external to on-chip system 102. However, the monitoring module 114 may be used by the analog signal processor 126 and CPU 110 to assist in real-time management of resources operable on the PCD 100 from one or more of these external devices. It should be understood that an indication or signal can also be received.

  In certain aspects, one or more of the method steps described herein may be performed by executable instructions and parameters stored in memory 112 that form one or more VMS modules 101 and SVS modules 26. Can be implemented. These instructions forming modules 101, 26 may be executed by CPU 110, analog signal processor 126, or another processor, in addition to ADC controller 103, to perform the methods described herein. Further, the processors 110, 126, memory 112, instructions stored in the memory 112, or combinations thereof, may serve as a means for performing one or more of the method steps described herein.

  FIG. 3A is a functional block diagram illustrating an exemplary spatial configuration of hardware for the chip 102 shown in FIG. According to this exemplary embodiment, application CPU 110 is located in the far left region of chip 102, while modem CPUs 168, 126 are located in the far right region of chip 102. Application CPU 110 may include a multi-core processor, including zeroth core 222, first core 224, and Nth core 230. Application CPU 110 is executing VMS module 101A and / or SVS module 26A (when implemented in software) or VMS module 101A and / or SVS module 26A (when implemented in hardware) Can be included. Application CPU 110 is further illustrated to include an operating system (“O / S”) module 207 and a monitoring module 114. Further details about the monitoring module 114 are described below with respect to FIG. 3B.

  Application CPU 110 may be coupled to one or more phase-locked loops (“PLL”) 209A, 209B located adjacent to application CPU 110 and in the left region of chip 102. There may be an analog-to-digital (“ADC”) controller 103 next to the PLL 209A, 209B and under the application CPU 110, which works with the main modules 101A, 26A of the application CPU 110. It may include its own voltage mode selection module 101B and / or SVS module 26B.

  The VMS module 101B of the ADC controller 103 may be responsible for monitoring and tracking a plurality of thermal sensors 157 that may be provided “on chip 102” and “outside chip 102”. On-chip or internal thermal sensors 157A, 157B are located at various locations and components near that location (such as sensor 157A3 adjacent to the second thermal graphics processor 135B and third thermal graphics processor 135C). Or may be related to the operating temperature of a thermally sensitive component (such as sensor 157B1 adjacent to memory 112).

  As a non-limiting example, the first internal thermal sensor 157B1 may be located in the central region at the top of the chip 102, adjacent to the internal memory 112, between the application CPU 110 and the modem CPUs 168, 126. The second internal thermal sensor 157A2 may be located in the right region of the chip 102 under the modem CPU 168, 126. This second internal thermal sensor 157A2 may also be located between the evolved reduced instruction set computer (“RISC”) instruction set machine (“ARM”) 177 and the first graphics processor 135A. A digital-to-analog controller (“DAC”) 173 may be disposed between the second internal thermal sensor 157A2 and the modem CPU 168, 126.

  The third internal heat sensor 157A3 may be disposed in the far right region of the chip 102 between the second graphic processor 135B and the third graphic processor 135C. The fourth internal thermal sensor 157A4 may be disposed in the far right region of the chip 102 below the fourth graphics processor 135D. The fifth internal thermal sensor 157A5 may be located in the far left region of the chip 102, adjacent to the PLL 209 and the ADC controller 103.

  One or more external thermal sensors 157C may also be coupled to the ADC controller 103. The first external thermal sensor 157C1 may be located outside the chip and adjacent to the upper right quarter region of the chip 102 that may include the modem CPUs 168, 126, ARM 177, and DAC 173. The second external thermal sensor 157C2 may be disposed outside the chip and adjacent to the lower right quarter region of the chip 102 that may include the third graphic processor 135C and the fourth graphic processor 135D. In particular, one or more of the external thermal sensors 157C can be utilized to indicate the contact temperature or ambient temperature of the PCD 100.

  Those skilled in the art will recognize that various other spatial configurations of the hardware shown in FIG. 3A can be implemented without departing from the scope of the present invention. FIG. 3A shows one additional example spatial configuration, where the main VMS module 101A, the main SVS module 26A, and the ADC controller 103 having the VMS module 101B and the SVS module 26B are shown in FIG. 3A. It shows how to recognize the thermal operating conditions that are a function of the configuration, compare the temperature threshold or breakpoint with the operating temperature, and select the voltage mode.

  FIG. 3B is a schematic diagram illustrating an example software architecture of the PCD 100 of FIGS. 2 and 3A to support voltage mode selection and minimum voltage level changes. Although any number of algorithms can form or become part of at least one voltage change policy that can be applied by the VMS module 101 when several thermal conditions are met, a preferred embodiment Now, VMS module 101 works with SVS module 26 to increase the minimum voltage level for individual components in chip 102 when it is recognized that the operating temperature has fallen below the temperature breakpoint associated with timing convergence. To do. In particular, by increasing the minimum supply voltage when the PCD 100 is exposed to relatively low operating temperatures, the functionality of the PCD 100 is reduced when the PCD 100 is operating at temperatures above the breakpoint. Recognizing power savings from the supply voltage can be maintained at relatively low temperatures.

  As shown in FIG. 3B, the CPU or digital signal processor 110 is coupled to the memory 112 via a bus 211. As described above, the CPU 110 is a multi-core processor having N core processors. That is, the CPU 110 includes a 0th core 222, a first core 224, and an Nth core 230. As known to those skilled in the art, each of the 0th core 222, the first core 224, and the Nth core 230 is available to support a dedicated application or program. Alternatively, one or more applications or programs can be distributed for processing across two or more of the available cores.

  CPU 110 may receive commands from VMS module 101 and / or SVS module 26, which may include software and / or hardware. When implemented as software, modules 101, 26 include instructions executed by CPU 110 that issue commands to CPU 110 and other application programs being executed by other processors.

  The 0th core 222, the first core 224 to the Nth core 230 of the CPU 110 are integrated on a single integrated circuit die, or integrated or combined on separate dies in a multi-circuit package. There is a case. Designers can couple 0th core 222, 1st core 224 to Nth core 230 through one or more shared caches, such as bus, ring, mesh, and crossbar topologies Message or command transmission can be implemented via any network topology.

  As is known in the art, the bus 211 may include multiple communication paths via one or more wired or wireless connections. Bus 211 may have additional elements omitted for simplicity, such as controllers, buffers (caches), drivers, repeaters, and receivers, to allow communication. In addition, the bus 211 may include address, control, and / or data connections to allow proper communication between the above-described components.

  As shown in FIG. 3B, when the logic used by PCD 100 is implemented in software, start logic 250, management logic 260, voltage mode selection interface logic 270, applications in application store 280, and portions of file system 290 Note that one or more of the above may be stored on any computer-readable medium or device for use by or in connection with any computer-related system or method.

  In the context of this document, a computer-readable medium or device is an electronic, magnetic, which can contain or store computer programs and data for use by or in connection with a computer-related system or method. Formula, optical, or other physical device or means. Various logic elements and data stores may be used for instruction execution, such as, for example, computer-based systems, systems that include processors, or other systems that can fetch instructions and execute instructions from an instruction execution system, apparatus, or device. It can be incorporated into any computer readable medium for use by or in connection with the system, apparatus, or device. In the context of this document, a “computer-readable medium” is any means by which a program can be stored, communicated, propagated, or transferred for use by or in connection with an instruction execution system, apparatus, or device. It can be.

  The computer readable medium can be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples of computer-readable media (non-exhaustive list) include electrical connections with one or more wires (electronic), portable computer diskettes (magnetic), random access memory (RAM) ( Electronic), read-only memory (ROM) (electronic), erasable programmable read-only memory (EPROM, EEPROM, or flash memory) (electronic), optical fiber (optical), and portable compact disc read-only memory (CD-ROM) (optical) will be included. The program is recorded electronically, for example via optical scanning of paper or other media, then compiled, interpreted, or in some cases processed in an appropriate manner as required, and then stored in computer memory. Note that since readable, the computer readable medium can be paper on which the program is printed or even another suitable medium.

  In an alternative embodiment, when one or more of start logic 250, management logic 260, and possibly voltage mode selection interface logic 270 are implemented in hardware, the various logics are each in the art. The following well-known techniques: discrete logic circuits with logic gates for implementing logic functions on data signals, application specific integrated circuits (ASICs) with appropriate combinations of logic gates, programmable gate arrays (PGA), field programmable gate array (FPGA), etc., or a combination thereof.

  The memory 112 is a non-volatile data storage device such as a flash memory or solid state memory device. Although shown as a single device, the memory 112 may be a distributed memory device having a separate data store coupled to the digital signal processor 110 (or additional processor core).

  The start logic 250 is one or more executable instructions for selectively identifying, loading, and executing a selection program to manage or control the minimum supply voltage of various components within the PCD 100. including. Initiation logic 250 can identify, load, and execute a selection program based on a comparison of various temperature measurements with threshold temperature settings associated with PCD components or aspects by VMS module 101. . An exemplary selection program can be found in the program store 296 of the embedded file system 290 and is defined by a particular combination of an algorithm 297 and a set of parameters 298. An exemplary selection program is executed by the monitoring module 114 along with control signals provided by one or more of the VMS module 101 and the SVS module 26 when executed by one or more of the core processors in the CPU 110. Depending on the provided signal or signals, the minimum supply voltage of the various components can be operated to scale “up” or “down”. In this regard, the monitoring module 114 may provide one or more indicators such as events, processes, applications, resource state conditions, elapsed time, and temperature received from the VMS module 101.

  Management logic 260 terminates the program in one or more of each processor core, and selectively identifies, loads, and executes more suitable replacement programs to manage or control the minimum supply voltage Includes one or more executable instructions to do. The management logic 260 is configured to perform these functions at runtime or while the PCD 100 is powered and used by the device operator. The exchange program can be found in the program store 296 of the embedded file system 290.

  The exchange program, when executed by one or more of the core processors in the digital signal processor, is provided on one or more signals provided by the monitoring module 114, or on the respective control inputs of the various processor cores The minimum supply voltage for the component can be operated according to one or more signals that are generated. In this regard, the monitoring module 114 may provide one or more indicators, such as events, processes, applications, resource state conditions, elapsed time, temperature, etc., in response to control signals emanating from the VMS 101. it can.

  The interface logic 270 provides one or more executions for presenting, managing, and interacting with external inputs to observe, configure, or possibly update information stored in the embedded file system 290. Contains possible instructions. In one embodiment, interface logic 270 may operate with manufacturer input received via USB port 142. These inputs may include one or more programs that are to be deleted from or added to the program store 296. Alternatively, the input may include edits or changes to one or more of the programs in program store 296. Moreover, the input can identify one or more changes to one or both of start logic 250 and management logic 260, or a full exchange.

  Interface logic 270 allows manufacturers to controllably configure and adjust the end user experience under the defined operating conditions of PCD 100. When the memory 112 is a flash memory, one or more of the start logic 250, management logic 260, interface logic 270, application program in the application store 280, or information in the embedded file system 290 is edited and replaced, Or it may be modified in some cases. In some embodiments, interface logic 270 allows an end user or operator of PCD 100 to search and find information in start logic 250, management logic 260, applications in application store 280, and embedded file system 290. Can be modified, replaced. The operator can use the resulting interface to make changes that will be implemented at the next start of the PCD 100. Alternatively, the operator can use the resulting interface to make changes that are implemented at runtime.

  The embedded file system 290 includes a program store 296 arranged in a hierarchy. In this regard, the file system 290 may include a reserved portion of its total file system capacity for storing information for the configuration and management of various parameters 298 and algorithms 297 used by the PCD 100. As shown in FIG. 3B, the store 296 includes a component store 294, the component store 294 includes a program store 296, and the program store 296 includes one or more voltage mode selection programs.

  FIG. 4 is a logic flow diagram illustrating a method 400 for voltage mode selection in PCD 100. The method 400 of FIG. 4 begins at a first block 402 where a voltage mode trigger point is set. The trigger point is the operating temperature and can also be the temperature at which timing was converged during the design of the PCD 100. Thus, as described above, the PCD 100 may include components that maintain proper functioning at or above the trigger point temperature for a given minimum supply voltage. Conversely, the same components may be too slow to maintain proper timing convergence at temperatures below the trigger point without increasing the minimum supply voltage.

  Returning to method 400, at block 404, a temperature sensor, such as a die level sensor, that monitors the thermal energy level at or near the junction is monitored. In particular, the temperature reading generated by the temperature sensor may indicate an operating temperature condition. In decision block 406, the temperature reading is compared to the trigger point. If the temperature reading exceeds the trigger point, a “yes” branch follows decision block 412 and SVS module 26 may determine whether the minimum voltage level is set to the minimum voltage associated with the warm level voltage mode. it can. If the minimum voltage has already been set to a voltage level that matches the warm level voltage mode, a “yes” branch follows block 410 and the minimum voltage is maintained. Otherwise, a “no” branch follows block 414 and the SVS module 26 may work with the PMIC 180 to reduce the minimum voltage level so that power savings are optimized in the component. The method then returns to block 404 and temperature sensor monitoring continues.

  Returning to decision block 406, if the temperature reading is below the trigger point, a “no” branch follows decision block 408. The temperature reading below the trigger point may be a risk to the functionality of the PCD 100, especially if the trigger point is associated with an operating temperature that represents a lower bound for timing convergence given a certain minimum supply voltage level. Indicates. As a result, if it is determined at block 408 that the minimum voltage level is not set to a voltage level that matches the low temperature level voltage mode, the method proceeds to block 416 where the VMS module 101 and the SVS module 26 Works with PMIC 180 to increase the value. In doing so, various components within the PCD 100 may be able to meet timing convergence requirements and maintain functionality at operating temperatures below the trigger point. Subsequently, the method returns to block 404 and temperature sensor monitoring continues.

  Returning to decision block 408, if it is determined that the minimum supply voltage has already been set to a level that matches the low temperature level voltage mode, the “yes” branch continues to block 410 and the minimum supply voltage level is maintained. . The process returns and monitoring continues.

  In particular, as noted above, it may be envisioned that some embodiments may have multiple trigger points with an operating temperature range defined between operating temperatures associated with a voltage mode. The highest trigger point in an embodiment with multiple trigger points can also be related to the operating temperature that is timed during the PCD 100 design phase. The process by which the temperature reading is compared to the trigger point and the voltage mode selected for changing the minimum supply voltage according to these comparisons may be represented by the method 400.

  FIG. 5 is a logic flow diagram illustrating a sub-method or subroutine 414, 416 for applying static voltage scaling (“SVS”) based on voltage mode. As described above, SVS techniques may be exploited by VMS module 101 and / or SVS module 26 in voltage mode applications that change the minimum supply voltage setting. In some embodiments, SVS techniques can be applied to powering individual components, while in other embodiments, it can be applied to multiple components or even all components.

  Block 505 is the first step of the sub-method or subroutine 414, 416 for applying the SVS technique in the voltage mode framework. In this first block 505, the VMS module 101 and / or the monitoring module 114 violates a temperature threshold or trigger such as a junction operating temperature threshold based on the temperature reading provided by the temperature sensor 157A. Can be determined. Accordingly, the VMS module 101 may then initiate an instruction to the SVS module 26 asking to review the current SVS settings at block 510. Next, at block 515, the SVS module 26 may determine that the minimum supply power level of the processing component may be reduced or increased.

  Next, at block 520, the SVS module 26 may optionally adjust the current minimum supply voltage level to maintain functionality or optimize power consumption. Adjusting the settings may include adjusting or “scaling” the minimum supply voltage allowed in the SVS algorithm. In particular, although the monitoring module 114, the VMS module 101, and the SVS module 26 are described in the present disclosure as separate modules having separate functions, in some implementations various modules or aspects of various modules may be used. It will be appreciated that it can be combined into a common module for implementing an adaptive thermal management policy.

  Of course, in order for the present invention to function as described, certain steps within the process or process flow described herein are performed before other steps. However, the invention is not limited to the described order of steps if such order or sequence does not change the function of the invention. That is, certain steps may be performed before, after, or performed in parallel (substantially simultaneously) with other steps without departing from the scope and spirit of the present invention. Recognize that there is a case. In some cases, certain steps may be omitted or not performed without departing from the invention. Furthermore, terms such as “after”, “next”, “next” are not intended to limit the order of the steps. These terms are only used to guide the reader through the description of exemplary methods.

  In addition, those skilled in the art of programming can easily write the computer code or identify appropriate hardware and / or circuitry to facilitate the disclosed invention, for example, based on the flowcharts and associated descriptions within this specification. Can be implemented. Thus, disclosure of a particular set of program code instructions or detailed hardware devices is not considered necessary for a proper understanding of how to make and use the invention. The inventive features of the claimed computer-implemented processes are described in more detail in the above description and in conjunction with the drawings, which can show various process flows.

  In one or more exemplary aspects, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer readable media can be in the form of RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage device, or instructions or data structures. Any other medium that can be used to carry or store the desired program code and that can be accessed by a computer can be provided.

  Also, any connection is properly termed a computer-readable medium. For example, the software uses a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (“DSL”), or wireless technology such as infrared, wireless, and microwave to use a website, server, or other remote source Wireless technologies such as coaxial cable, fiber optic cable, twisted pair, DSL, or infrared, radio, and microwave are included in the media definition.

  As used herein, disk and disc are compact disc (CD), laser disc (registered trademark), optical disc, digital versatile disc (DVD), floppy (registered trademark) disc, and Including Blu-ray discs, the disk normally reproduces data magnetically, whereas the disc reproduces data optically with a laser. Combinations of the above should also be included within the scope of computer-readable media.

  Accordingly, although selected aspects have been shown and described in detail, various substitutions and modifications may be made in each aspect without departing from the spirit and scope of the invention as defined by the following claims. It will be understood that this can be done.

24 Outer shell of portable computing device (PCD)
26 Static Voltage Scaling (SVS) Module
26A SVS module
26B SVS module
100 Portable Computing Device (PCD)
101 Voltage mode selection (VMS) module
101A voltage mode selection module (main)
101B VMS module
102 On-chip system
103 ADC controller
110 Central processing unit (CPU), digital signal processor (DSP)
112 memory, internal memory
112A Package on Package (PoP) memory
114 monitoring module
126 Analog signal processor, CPU for modem
128 display controller
130 Touch screen controller
132 Touch screen display
134 Video encoder
135A first graphics processor
135B second graphics processor
135C 3rd graphics processor
135D 4th graphics processor
136 Video amplifier
138 video port
140 USB controller
142 USB port
146 SIM card
148 CCD / CMOS camera
150 stereo audio codecs
152 audio amplifier
154 Stereo speakers
156 Stereo speaker
157A temperature sensor
157A2 Second thermal sensor (inside)
157A3 Third thermal sensor
157A4 4th thermal sensor
157A5 Fifth thermal sensor
157B temperature sensor
157B1 First thermal sensor (inside)
157C temperature sensor
157C1 first external thermal sensor
157C2 thermal sensor
158 Microphone amplifier
160 microphone
162 FM radio tuner
164 FM antenna
166 Stereo headphones
168 RF transceiver, CPU for modem
170 RF switch
172 RF antenna
173 DAC
174 keypad
176 Mono headset with microphone
177 ARM
178 Vibrator
180 PMIC
182 GPU
188 power supply
207 O / S module
209A PLL
209B PLL
211 Bus
222 0th core
224 1st core
226 core
228 core
230 Nth core
250 start logic
260 Management logic
270 Voltage mode selection interface logic
280 Application Store
290 file system
294 Component Store
296 Program Store
297 Algorithm
298 parameters

Claims (15)

A method for voltage mode selection in a portable computing device (“PCD”) comprising:
A first operating temperature threshold in the PCD that represents a temperature at which one or more components in the PCD cannot maintain timing convergence at a first minimum supply voltage level at lower temperatures; Defining if the one or more components cannot maintain timing convergence, the PCD cannot maintain function with a low thermal energy level; and
Monitoring one or more temperature sensors in the PCD;
Receiving a signal from one of the one or more temperature sensors, the signal indicating that the first operating temperature threshold has been achieved;
In response to the first operating temperature threshold being achieved, the first minimum supply voltage level of one or more of the components is set to a first level so that the PCD remains functional. including the step of increasing the minimum supply level 2, method. Recognizing that the temperature threshold has been exceeded twice;
2. The method of claim 1, further comprising lowering the second minimum voltage supply level back to the first minimum voltage supply level.   The method of claim 1, wherein at least one of the one or more temperature sensors is a die level temperature sensor.   The method of claim 3, wherein the die level temperature sensor is associated with a junction.   The method of claim 1, wherein at least one of the one or more temperature sensors is associated with an outer shell surface of the PCD. A computer system for voltage mode selection in a portable computing device ("PCD") comprising:
A first operating temperature threshold in the PCD that represents a temperature at which one or more components in the PCD cannot maintain timing convergence at a first minimum supply voltage level at lower temperatures; Defining , where one or more components cannot maintain timing convergence, the PCD cannot maintain function with a low thermal energy level ; and
Monitoring one or more temperature sensors in the PCD;
Receiving a signal from one of the one or more temperature sensors, wherein the signal indicates that the first operating temperature threshold has been achieved. A voltage mode selection (`` VMS '') module configured to
In response to the first operating temperature threshold being achieved, the first minimum supply voltage level of one or more of the components is set to a first level so that the PCD remains functional. 2 of minimum supply level configured static voltage scaling to raise the ( "SVS") including a module, a computer system. The VMS module is
Further configured to recognize that the temperature threshold has been exceeded twice;
The SVS module is
Further configured to reduce the second minimum voltage supply level back to the first minimum voltage supply level;
The computer system according to claim 6.   7. The computer system of claim 6, wherein at least one of the one or more temperature sensors is a die level temperature sensor.   The computer system of claim 8, wherein the die level temperature sensor is associated with a junction.   The computer system of claim 6, wherein at least one of the one or more temperature sensors is associated with an outer shell surface of the PCD. A computer readable storage medium storing computer readable program code, wherein the computer readable program code is configured to be executed to implement a method for voltage mode selection in a portable computing device ("PCD"). And the method comprises
A first operating temperature threshold in the PCD that represents a temperature at which one or more components in the PCD cannot maintain timing convergence at a first minimum supply voltage level at lower temperatures; Defining if the one or more components cannot maintain timing convergence, the PCD cannot maintain function with a low thermal energy level; and
Monitoring one or more temperature sensors in the PCD;
Receiving a signal from one of the one or more temperature sensors, the signal indicating that the first operating temperature threshold has been achieved;
In response to the first operating temperature threshold being achieved, the first minimum supply voltage level of one or more of the components is set to a first level so that the PCD remains functional. including the step of increasing the minimum supply level of 2, a computer readable storage medium. Recognizing that the temperature threshold has been exceeded twice;
12. The computer-readable storage medium of claim 11, further comprising lowering the second minimum voltage supply level back to the first minimum voltage supply level.   The computer readable storage medium of claim 11, wherein at least one of the one or more temperature sensors is a die level temperature sensor.   The computer readable storage medium of claim 13, wherein the die level temperature sensor is associated with a junction.   The computer-readable storage medium of claim 11, wherein at least one of the one or more temperature sensors is associated with an outer shell surface of the PCD.

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