JP6210147B2 - Imaging display device and control method of imaging display device - Google Patents

Description

The present invention relates to a photographing apparatus and a control method thereof, and more particularly to live view display.

Conventionally, it is known that an image of a subject is displayed with a delay from the subject in a photographing apparatus that displays a live view. In Patent Document 1, the frame rate of the display element is set to 1 / integer of the frame rate of the image sensor, and the delay time until the image captured by the image sensor is displayed on the display element is controlled to be substantially constant. (Paragraphs 0038 to 0047). In addition, it is described that the delay time is controlled to be less than the frame period of the image sensor (paragraph 0037).

JP 2009-159067 A

On the display screen of the display unit, an image of the subject (live view) generated based on the output data of the shooting sensor is displayed, and information such as shooting conditions is displayed in a different area from the area where the live view is displayed. For example, various display objects can be displayed. When the aspect ratio of the shooting sensor is the same as that of the display screen of the display unit and no area other than the area for displaying the subject image is provided on the display screen, the shooting sensor and the display unit are synchronized (shooting It is considered that it is not so difficult to display one frame during a period having the same length as the frame imaging cycle of the sensor. However, when various display objects such as live view and information other than the live view are displayed on the display screen, it is not easy to synchronize the imaging sensor and the display unit. Japanese Patent Application Laid-Open No. 2004-228561 describes that control is performed so that the delay time in units of frames is substantially constant, but the configuration of the display screen is not particularly mentioned. The present invention has been made in view of the above problems, and displays image data generated based on output data of a photographing sensor and information other than the image data in a period having the same length as the frame imaging cycle of the photographing sensor. The purpose is to let you.

An imaging device for achieving the above object includes an image data generation unit, a buffer, and a display control unit. The image data generation unit generates image data indicating an image of the subject for each line of the display unit based on output data of a photographing sensor that captures the subject. The buffer has a capacity for storing the generated image data for a plurality of lines. The display control unit stores image data for a plurality of lines (one line or more) in the buffer in the first display area of the display screen of the display unit configured by the first display area and the second display area. Is displayed in a line display cycle having a length of a to b, and display data not including image data is displayed in a second display region in a line display cycle of length a. a indicates the shortest length of the line display cycle of the display unit having a higher frame rate as the display capability than the frame rate of the imaging sensor. b indicates the longest length of the cycle in which image data for one line is generated when the image sensor is operating at the frame rate of the image sensor. The time required to generate image data for one line can vary from line to line. “b” indicates the longest time that can be varied. The relationship is a <b. The first display area is an area composed of a plurality of lines, and the width (the length in the horizontal direction) is equal to the width of the display screen (the length in the horizontal direction). The second display area is an area composed of a plurality of lines, and the width (horizontal length) is equal to the width of the display screen (horizontal length). Note that the “frame rate as display capability” in the display unit actually displays an image for one frame when “the display start of the next display target line is not waited until the display condition is satisfied” to be described later. Means the frame rate that can be. The frame rate of the imaging sensor means the frame rate of the imaging sensor when performing so-called live view display in which image data generated based on output data of the imaging sensor is displayed on the display unit.

If the display of the first display area is started in a state where a plurality of lines have not been accumulated in the buffer, a problem occurs if an attempt is made to display a line for which generation of image data has not been completed. For example, generation of image data for one line By displaying the longest time (b) required for each line as the line display period of the first display area one line at a time, it is possible to avoid problems caused by trying to display ungenerated lines. However, in this case, it is not possible to shorten the period required for displaying the first display area, compared to the period in which the imaging sensor outputs output data for one frame. If the period required to display the first display area cannot be shortened compared to the period in which the image sensor outputs output data for one frame, the image can be captured within the same period as the frame image capturing period of the image sensor. It is not possible to provide a sufficient period for displaying information other than the image data in addition to the image data indicating the image of the subject generated based on the output data of the sensor. Therefore, in this configuration, display in the first display area is started after accumulation of image data for a plurality of lines in the buffer is completed. Since the image data already stored in the buffer can be displayed immediately, it can be displayed with the line display cycle of the shortest length a allowed by the display unit. Therefore, for example, in the case of this configuration, the period required for displaying the first display region can be shortened compared to a configuration in which all the lines of the first display region are displayed with a line display cycle of length b (and the first display region is also displayed). Display delay in each line of the area can be reduced). As a result, in addition to the period for displaying the image data indicating the image of the subject generated based on the output data of the imaging sensor, the period for displaying information other than the image data has the same length as the frame imaging cycle of the imaging sensor. It can be provided within this period. A second area for displaying information other than image data indicating an image of a subject generated continuously based on the output data of the imaging sensor in a moving image (for example, characters or figures indicating imaging conditions or a still image) is displayed. This is called a display area.

Further, in this configuration, in the second display area, all lines are displayed with a line display period of length a, so that the second display area is compared with a structure in which all lines are displayed with a line display period longer than a. The time required for displaying can be reduced. Since the time required for displaying the second display area can be shortened, the display of the second display area can be displayed in addition to the display period of the image data in the first display area within the same length as the frame imaging cycle of the image sensor. This can contribute to the achievement of the purpose of including the period. The second display area is an area for displaying display data that does not include image data generated based on the output data of the imaging sensor (for example, characters or graphics indicating imaging conditions). Information that can be displayed in advance is specified for the shooting conditions and the like. Therefore, display data to be displayed in the second display area can be recorded in the memory before the display is started. When recording of the display data in the memory is completed, the memory is referred to and the display data is displayed. By sequentially acquiring display data, display on the display unit becomes possible. For this reason, when displaying display data in the second display area, it is not necessary to provide a waiting period such as waiting for each line until the display data generation processing is completed, and the display unit has the shortest line display cycle. It is possible to display with the length a.

In this way, by starting display based on the image data in the first display area after the accumulation of the image data for a plurality of lines in the buffer is completed, the imaging sensor displays the display period of the first display area for one frame. This can be shorter than the period for outputting the output data. The time earned by being able to be shortened can be used for the display period of the second display area. In addition, since the second display area can be displayed with the line cycle of the shortest length a, the second display area has the same length as the frame imaging period of the imaging sensor in addition to the display period of the first display area. It is easy to include the display period of the two display areas. Therefore, in the case of this configuration, information other than the image data indicating the image of the subject generated based on the output data of the imaging sensor is also displayed in addition to the image data during a period having the same length as the frame imaging cycle of the imaging sensor. be able to. That is, display of the first display area of the display unit is started after a predetermined display delay time from the output start timing of output data for one frame in the imaging sensor, and the length of the frame imaging cycle is equal to the length of the frame display cycle. Thus, shooting and display can be performed in a state where synchronization is maintained. If the synchronization between the two cannot be maintained, the display delay time (the time from when the image sensor is captured until the image data based on the image is displayed) may also vary greatly from frame to frame, and the movement of the subject is inconsequential. Usability as a live view is bad because it looks natural. However, in the case of this configuration, the movement of the subject can be shown naturally in the first display area, and the second display area can be displayed in addition to the first display area in one frame.

Further, in the photographing apparatus for achieving the above object, the display control unit waits for the display start of the next display target line until the display condition for displaying the next display target line is satisfied, and the display condition is set. The next display target line may be displayed after satisfying the condition. The processing time of the image data generation process can vary from line to line. Therefore, in the first display area, a configuration is adopted in which the display of the next display target line is waited until the display condition for displaying the next display target line is satisfied, and the display is satisfied after the display condition is satisfied. As a result, when compared with a configuration in which every line is displayed with the same line display cycle of the same length, it is possible to wait even more uselessly even though it is ready for display, or a line that is not ready for display. It is possible to prevent the occurrence of problems caused by displaying. Further, as compared with a configuration in which display is uniformly performed with a line display cycle of the longest length b for any line, this configuration can shorten the period required for displaying the first display region.

The display condition for displaying the next display target line may be any condition that indicates that the next display target line is ready to be displayed (no problem occurs even if displayed). Various modes can be adopted depending on the internal specifications of the photographing apparatus. Also, the configuration for acquiring the determination material for the display control unit to determine whether or not the display condition is satisfied can adopt various modes according to the internal specifications of the photographing apparatus. In addition, in the case where a phase difference having a common length is provided for each line (for example, in Japanese Patent Application Laid-Open No. 2007-243615, ΔT is given to each frame period in the same mode, and all lines of an image to be displayed are displayed. A common phase difference is given for the period.
), The display condition may be considered to be satisfied when the time corresponding to the phase difference has elapsed. In addition, as disclosed in Japanese Patent Application Laid-Open No. 2009-159067, when a common phase difference is provided for each line, the display condition may be considered to be satisfied when the time corresponding to the phase difference has elapsed. good.

Furthermore, in the imaging device for achieving the above object, the display control unit waits for the display start of the next display target line until the display condition for displaying the next display target line is satisfied in the first display area. If there is no need to do this, the current display target line is displayed with a line display period of length a. That is, when there is no need to wait, the display of the current display target line is completed in the line display cycle of the shortest length a, and the process immediately shifts to the line display cycle for displaying the next display target line. it can. Therefore, it is possible to contribute to shortening the period required for displaying the first display area. In addition, it is equipped with the structure which displays a display object line after waiting until it satisfy | fills display conditions, and when it is not necessary to wait, it is equipped with the structure displayed by the shortest length a, By the line display in a 1st display area | region The period varies within a range from a to b for each line (maximum length b, or if the length b does not take as much time, the period is shorter than b and the minimum is length a).

Furthermore, in the photographing apparatus for achieving the above object, the image data generation unit sequentially outputs the generated image data to a buffer. In addition, when the first display area is an area of continuous m lines (m is a natural number), the display control unit starts i lines after the image data of the first line of the first display area starts to be accumulated in the buffer. After image data up to the eye (i is a natural number satisfying 1 ≦ i ≦ m) has been accumulated in the buffer, the first to m-th lines in the first display area are a based on the image data accumulated in the buffer. The display is performed with a line display cycle having a length of b or less.

By starting the display of the first display area in a state where image data for the i-th line (for multiple lines) has already been accumulated from the first line in the buffer, at least the first line to the (i-1) -th line Since the image data can be displayed immediately, it can be displayed in the line display cycle of the shortest length a. Therefore, it is possible to contribute to shortening the period required for displaying the first display area.

In addition, another imaging apparatus for achieving the above object includes an image data generation unit, a buffer, and a display control unit as described below. The image data generation unit generates image data indicating an image of the subject for each line of the display unit based on output data of a photographing sensor that captures the subject. The buffer stores the generated image data. The display control unit displays the display data including the image data in the first display area of the display screen of the display unit, and displays the display data not including the image data in the second display area of the display screen. In this configuration, the line display cycle of the display unit is shorter than the cycle in which the image data for one line is generated when the imaging sensor is operating at the frame rate of the imaging sensor. Further, in this configuration, the display control unit is configured to display the image data at a first frame rate higher than the frame rate of the imaging sensor after the image data is accumulated for a plurality of lines in the buffer. The first display area and the second display area are displayed at the first frame rate.

In another imaging device for achieving the above object, the display control unit starts displaying the next display target line until a display condition for displaying the next display target line is satisfied in the first display area. And the next display target line is displayed after the display condition is satisfied. Further, the display control unit displays the first display area and the second display area at a second frame rate lower than the first frame rate until image data for a plurality of lines is accumulated in the buffer.

In another imaging device for achieving the above object, the buffer is provided for a plurality of lines of the (N + 1) th frame while the display control unit is displaying the Nth frame at the second frame rate. Image data is stored.

In another imaging device for achieving the above object, the display control unit controls the display of the first display area and the second display area after the image data for a plurality of lines is accumulated in the buffer. To do. The buffer only needs to achieve its intended purpose, and may be configured using VRAM (video RAM) as the buffer.

Further, as in the present invention, display data including image data is displayed in the first display area of the display screen with a line display cycle having a length of a to b, and the image data is included in the second display area of the display screen. A method for displaying non-display data with a line display period of length a is also established as an invention of a program or method. In addition, the apparatus, program, and method as described above may be realized as a single apparatus, or may be realized using a shared component in an apparatus having multiple functions. Is included.

The block diagram which shows the structure of an imaging device. (2A) is a schematic diagram showing readout pixels in the live view mode of the image sensor, and (2B) is a schematic diagram showing a configuration in the live view mode of the display screen of the display unit. The timing chart which shows operation | movement of the imaging | photography sensor and display part at the time of live view mode. (4A) and (4B) are timing charts showing display timing on the display unit. The timing chart which shows operation | movement of the imaging | photography sensor and display part at the time of the live view mode concerning 2nd embodiment. (6A) and (6B) are schematic views showing a configuration example of a display screen according to another embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the same code | symbol is attached | subjected to the corresponding component in each figure, and the overlapping description is abbreviate | omitted. 1. First embodiment 1-1. Configuration of Imaging Device FIG. 1 is a block diagram showing a configuration of an imaging device 1 according to an embodiment of the present invention. The photographing apparatus 1 includes an optical system 10, a photographing sensor 15, an ASIC 200, a timing control unit 30, a display unit 40, a CPU 50, a VRAM 51, an SD-RAM 52, a ROM 53, a RAM 54, and an operation unit 55. The CPU 50 can execute a program recorded in the ROM 53 by appropriately using the VRAM 51, the SD-RAM 52, and the RAM 54, and the CPU 50 allows the subject to be photographed by the photographing sensor 15 in response to an operation on the operation unit 55. A function for generating image data indicating the above is executed. The operation unit 55 includes a shutter button, a dial switch as a mode switching unit for switching modes, a dial switch for switching between an aperture and a shutter speed, and push buttons for operating various setting menus. The user can give various instructions to the photographing apparatus 1 by operating the operation unit 55.

The optical system 10 includes a lens 11, an aperture 12, a shutter 13, and a low-pass filter 14 that form a subject image on the photographing sensor 15. Among these, the lens 11 and the diaphragm 12 are interchangeably attached to a housing (not shown). Although the lens 11 is simply represented by one lens in FIG. 1, the lens 11 includes a plurality of lenses arranged in the optical axis direction, and each lens is supported by an outer edge portion. The low-pass filter 14 prevents moiré in a photographed image by blocking a spatial high-frequency component of the photographing light in the photographing sensor 15. The diaphragm 12 is composed of a plurality of light shielding plates whose opening diameter can be changed. The shutter 13 is a mechanical focal plane shutter.

The imaging sensor 15 includes, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor, a CCD (Charge Coupled), which includes a color filter arranged in a Bayer array and a plurality of photodiodes that accumulate charges corresponding to the amount of light for each pixel by photoelectric conversion. Device) A solid-state image sensor such as an image sensor is used. The position of the pixel of the imaging sensor 15 is defined by coordinates in the orthogonal coordinate system, and a line is constituted by a plurality of pixels arranged in a direction parallel to one coordinate axis, and the plurality of lines are arranged in a direction parallel to the other coordinate axis. It is configured. In this specification, a direction parallel to the line is called a horizontal direction, and a direction perpendicular to the line is called a vertical direction. One screen composed of all the pixels of the image sensor 15 is called one frame.

The timing control unit 30 includes a sensor control unit 31 and a display control unit 32. In the present embodiment, the photographing sensor 15 performs an operation synchronized with various signals output from the sensor control unit 31 of the timing control unit 30. That is, the sensor control unit 31 defines a period for reading out the detection result of the photodiode for one frame, a vertical synchronization signal (SVsync), and specifies a period for reading out the detection result of the photodiode for one line. A dot clock signal (SDotclock) that defines the synchronization signal (SHsync) and the readout timing of image data of each pixel is output. The imaging sensor 15 starts outputting output data for one frame in accordance with the vertical synchronization signal SVsync, and one of the imaging sensors 15 at a timing according to the dot clock signal SDotclock within a period defined by the horizontal synchronization signal SHsync. The output data (SD) indicating the detection result of the photodiode corresponding to the pixel of the part is sequentially read.

The ASIC 200 uses line buffers 52a to 52d for a plurality of lines reserved in advance in the SD-RAM 52, and performs processing for generating image data for displaying an object image on the display unit 40 by pipeline processing. The image data generation part 20 comprised by these is provided. The line buffers 52a to 52d for a plurality of lines may be provided in the image data generation unit 20 or the like. The ASIC 200 includes an image data output unit 21. The image data output unit 21 displays image data (DD) recorded in the line buffer 52d when displaying a line belonging to a first display area R1 described later. Are sequentially output to the display unit 40. As a result, an image of the subject photographed by the photographing sensor 15 is displayed in the first display area R1. The image data output unit 21 outputs line-sequentially the OSD data recorded in the VRAM 51 to the display unit 40 as image data (DD) when displaying lines belonging to the second display region R2. As a result, characters and figures such as shooting conditions are displayed in the second display area R2. The user can check the subject while using the display unit 40 as an EVF.

The display unit 40 is an EVF (Electronic View Finder) that displays an image showing a subject to be photographed and allows the user to grasp information such as the state of the subject before photographing and photographing conditions, and the photographing according to the present embodiment. The apparatus 1 is a mirrorless digital camera equipped with EVF. The display unit 40 includes an interface circuit (not shown), a liquid crystal panel driver 41, a liquid crystal panel 42, an eyepiece (not shown), and the like. In the present embodiment, the liquid crystal panel 42 is a high-temperature polysilicon TFT (Thin Film Transistor) having three sub-pixels corresponding to three color filters for each pixel, and the position of the pixel is defined by coordinates in an orthogonal coordinate system. The In addition, a line is constituted by a plurality of pixels arranged in a direction parallel to one coordinate axis, and the plurality of lines are arranged in a direction parallel to the other coordinate axis. In this specification, a direction parallel to the line is referred to as a horizontal direction, a direction perpendicular to the line is referred to as a vertical direction, and one screen constituted by all pixels of the liquid crystal panel 42 is referred to as one frame.

The liquid crystal panel driver 41 applies a voltage to each subpixel and outputs a signal for driving the liquid crystal to the liquid crystal panel 42. The liquid crystal panel 42 includes a gate driver and a source driver (not shown). The gate driver controls the display timing in each pixel of each line according to a signal output from the liquid crystal panel driver 41, and the source driver determines the display timing. Display is performed by applying a voltage corresponding to the image data of each pixel to each pixel in the line. That is, the liquid crystal panel driver 41 performs various signals for display on the liquid crystal panel 42, for example, a vertical synchronization signal (DVsync) that defines a period for performing display for one frame, and displays for one line. Horizontal synchronization signal (DHsync) that defines the period of data, data active signal (DDactive) that defines the period for capturing image data within each line, dot clock signal (DDotclock) that defines the timing for capturing image data for each pixel, etc. The image data (DD) of each pixel is output.

Note that the above-described vertical synchronization signal DVsync, horizontal synchronization signal DHsync, data active signal DDactive, and dot clock signal DDotclock are generated by the display control unit 32 of the timing control unit 30. In the present embodiment, the output timing of the horizontal synchronization signal DHsync is variable, and the output timing is determined depending on the processing result of the image data generation unit 20 as will be described later.

FIG. 2A is a schematic diagram showing readout pixels in the live view mode of the imaging sensor 15 in the present embodiment. In the live view mode, thinning readout that is thinned out in a predetermined method in the horizontal direction and the vertical direction is performed without reading out the detection results of the photodiodes corresponding to all the pixels in the effective area of the imaging sensor 15. In the live view mode, as a result of the thinning-out reading, output data corresponding to a total of k × j pixels of k pixels in the horizontal direction and j pixels in the vertical direction is output from the image sensor 15 (actually, shooting is performed). In order to output k × j pieces of output data from the sensor 15, a ring pixel for performing image processing is required around the effective pixel, so that data of k pixels in the horizontal direction in FIG. Needs to read k + α pixels larger than k, and j + β pixels larger than j need to be read in order to output vertical j line data, and α pixels in the horizontal direction and β pixels in the vertical direction The output data of k × j pixels is output from the image sensor 15. Here, for the sake of simplicity, the data of k pixels in the horizontal direction and j pixels in the vertical direction are output for convenience. Described as being force.). The aspect ratio k: j is different from the aspect ratio of the first display region R1 described later. Further, the number j of lines is larger than the number m of lines in the first display area R1 described later.

FIG. 2B is a schematic diagram showing a screen configuration in the live view mode of the display screen of the liquid crystal panel 42 in the present embodiment. In the present embodiment, the liquid crystal panel 42 is a panel having l effective pixels in the horizontal direction and (m + n) in the vertical direction, and adjusts the content and output timing of the image data DD output by the liquid crystal panel driver 41. As a result, gradation display corresponding to DD can be performed at an arbitrary position. In the present embodiment, an image of the subject is displayed on the first display area R1 that is an area for m lines from the top line of the liquid crystal panel 42 based on the output data of the imaging sensor 15, and continues to the first display area R1. Characters and figures indicating information such as photographing conditions are displayed in the second display area R2 which is an area for n lines. In other words, the liquid crystal panel 42 displays OSD (On Screen Display) characters and figures indicating information such as shooting conditions as well as the image of the subject. The aspect ratio l: (m + n) of the display screen of the liquid crystal panel 42 of the display unit 40 is, for example, 4: 3. The aspect ratio l: m of the first display region R1 is, for example, 3: 2.

When the user operates the operation unit 55 to give a shooting instruction, the shooting sensor 15 starts outputting output data for one frame according to the vertical synchronization signal SVsync in response to the shooting instruction, Output data indicating the detection results of the photodiodes corresponding to all the effective pixels of the imaging sensor 15 are sequentially read out at a timing corresponding to the dot clock signal SDotclock within a period defined by the synchronization signal SHsync. The image data generation unit 20 generates image data in a format such as JPEG using the SD-RAM 52 and the like, and records the generated image data in a not-shown removable memory or the like. That is, the user can generate image data indicating the subject.

1-2. Live View Display FIG. 3 is a timing chart showing operations of the image sensor 15 and the display unit 40 in the live view mode. In the live view mode, the image sensor 15 outputs output data for one frame in the vertical synchronization period Tsv (frame imaging cycle) defined by the vertical synchronization signal SVsync. More specifically, output data SD for one line of the image sensor 15 is output during a horizontal synchronization period (line imaging cycle) defined by the horizontal synchronization signal SHsync during the vertical synchronization period Tsv. The output data SD is temporarily recorded in the line buffer 52a. In the live view mode, the display unit 40 updates the display for one frame in the vertical synchronization period Tdv (frame display cycle) defined by the vertical synchronization signal DVsync. More specifically, the display for one line on the display unit 40 is updated during the horizontal synchronization period (line display cycle) defined by the horizontal synchronization signal DHsync during the vertical synchronization period Tdv.

A procedure for generating the image data DD based on the output data SD output from the imaging sensor 15 will be described with reference to FIG. When the output data SD is output from the imaging sensor 15 to the line buffer 52a, the image data generation unit 20 acquires the output data SD output from the imaging sensor 15 from the line buffer 52a. The pixel interpolation unit 20a performs interpolation processing using the gradation values of the peripheral pixels of the pixel of interest for the pixel of interest, whereby two channels different from the color of the color filter provided in the photoelectric conversion element corresponding to each pixel The tone value of the color is calculated. As a result, data in which three channel gradation values are associated with each pixel is generated. The color reproduction processing unit 20b performs color conversion processing for reproducing a more correct color by performing a 3 × 3 matrix operation on the gradation value of each pixel of the data for which pixel interpolation has been completed.
Data generated by the color conversion process is temporarily recorded in the line buffer 52b.

The filter processing unit 20c performs filter processing such as sharpness adjustment and noise removal processing on the data that has been subjected to the color reproduction processing and is temporarily recorded in the line buffer 52b. The gamma correction unit 20d performs processing for correcting gradation characteristics when outputting an image. That is, the gamma correction for correcting the color indicated by the gradation value of the output data of the photographing sensor 15 by the gamma function corresponding to the color characteristic in the display unit 40 is performed on the data for which the filter processing has been completed. The data after the gamma correction process is temporarily recorded in the line buffer 52c. The resizing processing unit 20e sequentially refers to the data after the gamma correction processing that is temporarily recorded in the line buffer 52c, and resizes to the target size. In this embodiment, the image is resized to the size of the first display area R1 shown in FIG. 2B. When resizing is completed in the resizing processing unit 20e, image data DD in which each image processing in the ASIC 200 is completed can be generated. The image data DD generated after the resizing process is temporarily recorded in the line buffer 52d. The line buffer is a FIFO type line buffer, and the image data is read in line units in the order of the previously recorded image data.

By the way, in order to display on the liquid crystal panel 42 by minimizing the delay period based on the output data output line-sequentially from the image sensor 15, in this embodiment, display is performed on each line of the liquid crystal panel 42. The horizontal synchronization signal DHsync for displaying the line is output after satisfying the display condition for the display. Specifically, the display control unit 32 of the timing control unit 30 acquires from the resize processing unit 20e the line number Ld for which the image data generation processing in the resize processing unit 20e has been completed and output has been completed in the line buffer 52d. Is possible. That is, the line number Ld means that lines before the line number indicated by Ld (lines from the first line to the Ld line) may be displayed. Since the image data is generated line-sequentially, it means that the image data of a line having a number smaller than that line number in one frame has already been generated and output to the line buffer 52d. Therefore, if the number Ln of the next display target line is equal to or less than Ld, the display condition for displaying the next display target line is satisfied. It is assumed that the line buffer 52d has a size capable of recording image data for at least m lines.

Therefore, the display control unit 32 of the timing control unit 30 starts displaying lines that satisfy the display condition on the liquid crystal panel 42 by outputting the horizontal synchronization signal DHsync in synchronization with the timing that satisfies the display condition for each line. It is set as the structure made to do. According to this configuration, the display of each line is not started before the preparation of the image data is completed, and each line can be displayed immediately when the display preparation of each line is completed.

The value of the number Ln of the next display target line is counted up every time the display control unit 32 displays one line. The range of the value of the next display target line number Ln is 1 ≦ Ln ≦ (m + n). The value of the line number Ld is counted up every time the resize processing unit 20e completes outputting the image data line by line to the line buffer 52d and is notified to the display control unit 32. The range of the line number Ld is 0 ≦ Ld ≦ m. When the value of Ld is 0, it means that no image data has been output to the line buffer 52d within one frame. Note that when the value of Ld reaches m (Ld = m), the frame data output completion flag Ldf flag becomes On, and the value of Ld is reset to 0 (Ld = 0). Even if Ld = 0, the period of Ldf flag = On means that all the image data in the first display region R1 has already been output to the line buffer 52d, and the display side then displays the number Ln of the next display target line. May be displayed. Note that the Ldf flag is reset when it is determined that the display of the m-th line is completed, and the Ldf flag returns to Off.

The operation will be described in detail with reference to FIG. In FIG. 3, after the vertical synchronization signal SVsync is output from the sensor control unit 31 at the timing p1, the output data of the first line of the imaging sensor 15 is acquired at the timing p2 when the period Tsv0 of a predetermined length has elapsed. The horizontal synchronization signal SHsync is output from the sensor control unit 31. When the output data of the first line of the imaging sensor 15 is output to the line buffer 52a, the pipeline processing is performed by the image data generation unit 20 as described above, and the image data DD after the resize processing is sequentially performed on the line buffer 52d. Is output and accumulated. ΔT1 means a time required at least from the start timing p2 of the output period of the output data for one frame in the imaging sensor 15 to the start of display of the first line in the first display region R1 of the display unit 40. ΔT1 includes pipeline processing by the image data generation unit 20 and the like.

4A is a timing chart showing display timing in the vertical synchronization period Tdv of the frame D1 of the display unit 40 shown in FIG. In the frame D1 corresponding to the first frame after the start of the live view mode, the image data of the first line is immediately displayed without waiting any longer if the display condition of the image data of the first line is satisfied. Accordingly, when it is confirmed that the value of the line number Ld is equal to the number Ln (= 1) of the next display target line, the display control unit 32 outputs the horizontal synchronization signal DHsync for displaying the first line (timing). p3) The first line of image data DD is displayed. Similarly, when it is confirmed that the display conditions are satisfied, the display control unit 32 outputs and displays the horizontal synchronization signal DHsync. The length of the cycle in which the value of the line number Ld is updated is equal to the length of time required to generate image data for one line. Since the time required to generate image data for one line varies, the length of the cycle in which the value of the line number Ld is updated also varies. Line number L
Let b be the longest length of the period in which d is updated. For example, FIG. 4A shows that the length of the period in which the value of the line number Ld is 1 is b. This indicates that the generation of the image data for the first line is completed and the output to the line buffer 52d is This means that the time from the completed timing p3 to the timing p3 ″ when generation of the image data for the second line is completed and output to the line buffer 52d is b is the longest length b. The display control unit 32 waits until the next display target line number Ln ≦ line number Ld and outputs the horizontal synchronization signal DHsync in accordance with the timing when Ln ≦ Ld. The longest length of the (cycle) is also b. Note that, after the display control unit 32 confirms that the value of the line number Ld has changed from 0 to 1, the vertical synchronization signal DVsync for starting the frame D1 may be generated.

Specifically, the display control unit 32 outputs the horizontal synchronization signal DHsync at the timing p3 and then displays image data for one line for each pixel in synchronization with a dot clock signal DDotclock (not shown). At the timing p3 ′ at which the length a has elapsed from the timing p3, the display of the image data for one line has already been completed, and the value of the number Ln of the next display target line is 2. However, since the value of the line number Ld is still 1 at the timing p3 ′, the display control unit 32 extends Ln by extending the length of the front porch period Tdh2 of the line display cycle of the first line that is the current display target line. It waits for the output of the horizontal synchronizing signal DHsync for displaying the next display target line until ≦ Ld. Specifically, for example, the length of the front porch period Tdh2 is extended by generating a dummy dot clock signal DDotclock or extending the period of the dot clock signal DDotclock. When it is not necessary to wait until the display condition for displaying the next display target line is satisfied in the first display region R1, the line display cycle of the current display target line is finished with the shortest length a. For example, in the cycle of displaying the m-th line in FIG. 4A, it is not necessary to wait until the display condition of the (m + 1) -th line that is the next display target line is satisfied, as will be described later. The length of the line display cycle of a certain m-th line is the shortest length a. Specifically, in the cycle for displaying the m-th line in FIG. 4A, the frame data output completion flag Ldf flag is On. During the period of the Ldf flag = On, since all the image data in the first display area R1 has been output to the line buffer 52d, the display side may display the number Ln of the next display target line. The length of the cycle to be displayed is the shortest length a. As will be described later, the length of the display cycle of the (m + 1) line to (m + n) line is also the shortest length a.

As shown in FIG. 2, the output data for j lines of the image sensor 15 is resized to image data for m lines by the resizing processing unit 20e. Therefore, as shown in FIG. 4A, during a period Tdv1 from the start timing p3 of the horizontal synchronization period for displaying the image data of the first line to the end timing p6 of the horizontal synchronization period for displaying the image data of the mth line, The display to the image data for m lines, that is, the first display area R1 is completed. As shown in FIG. 4A, when the display data for one line is generated and output to the line buffer 52d, when the operation of displaying the line is repeated, the first display region R1 in the frame D1 as shown in FIG. The length of the display period Tdv1 is substantially equal to the length of the period Tsv1 for outputting output data for one frame (output data for j lines).

After the display in the first display area R1 is completed, the display in the second display area R2 is performed after the (m + 1) th line. Here, the frame rate Fdmax as the display capability of the display unit 40 is higher than the frame rate Fs of the imaging sensor 15 (Fdmax> Fs). That is, when the display unit 40 is driven at the frame rate Fdmax without waiting for the output of the horizontal synchronization signal DHsync until the display condition is satisfied, the vertical synchronization period (frame display cycle) of the display unit 40 is in the imaging sensor 15. Shorter than the vertical synchronization period (frame imaging cycle). In addition, the length of the horizontal synchronization period when the display unit 40 is driven at the frame rate Fdmax (that is, the minimum length of the line display period allowed in the display unit 40) a is that the imaging sensor 15 is driven at the frame rate Fs. In this case, it is shorter than the longest length b of the cycle in which image data for one line is generated (a <b).

Character and graphic data (OSD data) indicating information such as shooting conditions displayed in the second display area R2 and still images other than the live view are independent information regardless of the operation of the shooting sensor 15. It can be created and recorded in the VRAM 51. Alternatively, OSD data and still images can be created and recorded in the VRAM 51 at any time independently of the live view display. Therefore, even if display based on OSD data or a still image is executed in a short horizontal synchronization period, it is possible to perform appropriate display without causing overtaking of data reading. Therefore, when OSD data is displayed in the second display region R2, the second is displayed in a line display cycle (horizontal synchronization period) having a length shorter than b and the shortest length a allowed in the display unit 40. Each line of the display area R2 is displayed.

As shown in FIG. 4A, the display control unit 32 outputs DHsync at the line display cycle of length a from the (m + 1) th line to the (m + n) th line, and 1 at the line display cycle of length a. Display OSD data line by line. As a result, the second display region R2 can be displayed in a shorter period Tdv2 than when the (m + 1) -th to (m + n) -th lines are displayed with a line display period longer than a. As shown in FIG. 3, after the display period Tdv2 of the second display region R2 ends at the timing p7 and the front porch period Tdv3 of the frame D1 elapses, the display control unit 32 outputs the vertical synchronization signal DVsync. As shown in FIG. 3, the vertical synchronization period Tdv of the frame D1 includes a back porch period Tdv0, a display period Tdv1 of the first display area R1, a display period Tdv2 of the second display area R2, and a front porch period Tdv3. The vertical synchronization period Tsv of the image sensor 15 includes a period Tsv0 having a predetermined length, an output period Tsv1 for one frame, and a period Tsv2 having a predetermined length. The length of the output period Tsv1 of the frame S1 and the length of the display period Tdv1 of the first display region R1 of the frame D1 are substantially equal (the sensor has an extra output period unique to the sensor, and is not exactly equal). Nevertheless, the frame D1 still needs to display the second display region R2, and the front porch period Tdv3 must also be included in the frame D1. However, the length of (period Tdv2 + period Tdv3) is longer than the length of the remaining period Tsv2 of the vertical synchronization period Tsv of the image sensor 15. Therefore, the vertical synchronization period Tdv of the display unit 40 is longer in the frame D1 than the length (1 / Fs) of the vertical synchronization period Tsv of the image sensor 15.

Therefore, in the frame D2 immediately after the frame D1 in which the vertical synchronization period Tdv of the display unit 40 is longer than the length (1 / Fs) of the vertical synchronization period Tsv of the image sensor 15, the timing when ΔT1 has elapsed from the timing p5. In p8, the display of the first display area R1 of the next frame is not yet started (timing p8 is still in the period of the previous frame D1 in FIG. 3). Compared with the fact that the display of the first display area R1 can be started at the timing p3 when ΔT1 has elapsed from the timing p2 in the frame D1, the display start timing of the first display area R1 is further increased by ΔT2 than the frame D1. It will be late. On the other hand, after the timing p8 when ΔT1 has elapsed from the start timing p5 of the output period Tsv1 of the frame S2, image data for the first line and thereafter starts to be output to the line buffer 52d. In the period of ΔT2 from timing p8 to timing p9, image data for a plurality of lines from the first line (here, i lines are assumed, i is a natural number of 1 ≦ i ≦ m) is already output to the line buffer 52d. (That is, ΔT2 can be rephrased as the time required to store image data for i lines from the first line in the line buffer 52d). Therefore, as shown in FIG. 4B, the value of the line number Ld is i at timing p9.

As shown in FIG. 4B, at the timing p9, that is, at the timing p9 where the number Ln of the next display target line is 1 and the value of the line number Ld is i, the timing p9 is satisfied to satisfy the display condition (Ln ≦ Ld). The display control unit 32 outputs DHsync for displaying the first line and displays the first line with the shortest length a. In the second and subsequent lines as well, when it is not necessary to extend the line display period longer than a and wait until the display condition (Ln ≦ Ld) is satisfied, the horizontal synchronization signal DHsync is output with the period of the shortest length a. Since the cycle in which the value of the line number Ld is updated is longer than a, the display condition is not satisfied while the horizontal synchronization signal DHsync is output in the cycle of the length a, that is, a timing that satisfies Ln> Ld occurs. sell. For example, after outputting the horizontal synchronization signal DHsync for displaying the (m−1) -th line at the timing p10 shown in FIG. 4B, the number Ln of the next display target line at the timing p11 when the length of a has elapsed. Although m, the value of the line number Ld is still (m−1), so Ln> Ld. In this case, the display control unit 32 waits for the output of the horizontal synchronization signal DHsync until Ln ≦ Ld, and after Ln ≦ Ld, outputs the horizontal synchronization signal DHsync (timing p12).

After outputting the horizontal synchronization signal DHsync for displaying the last line of the first display region R1 at the timing p12, the display of the second display region R2 is performed in the same manner as described above. That is, display is performed with a period of length a for each line. As described above, in the first display region R1 of the frame D2, when the display of the first line is started, the image data for i lines from the first line is already stored in the line buffer 52d, and the shortest length is obtained. There are at least (i-1) lines that can be displayed in the line display period a. Therefore, the length of the display period Tdv1 ′ of the first display region R1 of the frame D2 is such that only the image data of the first line is accumulated in the line buffer 52d when starting the display of the first line as in the frame D1. In this case, the length becomes shorter than the length of the display period Tdv1 of the first display region R1 (see FIG. 3). Note that the display period Tsv2 of the second display region R2 has the same length in any frame because the number of lines (n lines) and the horizontal synchronization period (length a) do not change.

As a result, the vertical synchronization period Tdv ′ of the frame D2 is shorter than the vertical synchronization period Tdv of the frame D1. In the frame D2, if the following expression (1) is satisfied, the vertical synchronization period Tdv ′ of the frame D2 can be set to the same length as the vertical synchronization period Tsv of the image sensor 15. Length of display period Tdv1 ′ ≦ (length of vertical synchronization period Tsv of image sensor 15) − (length of period Tdv0 + length of period Tdv2 + reference length of period Tdv3) (1) Expression (1) It is obvious that the vertical synchronization period Tdv ′ of the frame D2 has the same length as the vertical synchronization period Tsv of the image sensor 15 when the left side of) = the right side of the expression (1). Even when the left side of equation (1) <the right side of equation (1), the front porch period Tdv3 of the frame D2 is extended beyond a predetermined reference length (for example, a dummy horizontal synchronization signal DHsync is generated). Or by extending the length of one or more horizontal synchronization periods in the front porch period Tdv3), the vertical synchronization period Tdv ′ of the frame D2 can be made to be the same as the vertical synchronization period Tsv of the image sensor 15. it can.

The length of the display period Tdv1 ′ of the first display region R1 of the frame D2 is affected by the number of lines already accumulated in the line buffer 52d at the timing p9. It suffices if the number of lines is the number of lines that satisfies the expression (1). As described above, the image data of the lines already accumulated in the line buffer 52d in the first display region R1 is displayed with the shortest length a of the line display cycle in the display unit 40 (the image data of the lines that have not been accumulated is the display condition). The display period of the first display region R1 can be shortened from the period Tsv1. Further, in the second display region R2, by displaying all lines with the shortest length a, the time required for display can be shortened compared with the case where all lines are displayed with a period longer than a. As a result, display data such as OSD can be displayed in addition to the image data based on the output data of the image sensor 15 during the period of the same length as the vertical synchronization period Tsv of the image sensor 15. Can be operated in synchronization with each other. Also after the frame D2, the time difference (display delay time) between the start timing of the output period Tsv1 of the imaging sensor 15 and the start timing of the display period Tdv1 ′ of the first display region R1 of the display unit 40 is ΔT1 + ΔT2. The imaging sensor 15 and the display unit 40 can be operated in synchronization. Note that, from the first frame after the start of the live view mode, the time difference (display delay time) between the start timing of the output period Tsv1 of the imaging sensor 15 and the start timing of the display period of the first display region R1 of the display unit 40 is ΔT1 + ΔT2. The operation timing of the display unit 40 may be controlled so that That is, in the example using FIG. 3, it has been described that the time difference is controlled to be ΔT1 + ΔT2 from the second frame onward, but it is needless to say that the time difference is controlled to be ΔT1 + ΔT2 from the first frame.

In this way, the length of the frame display period changes in accordance with the change in phase difference (ΔT1 in frames S1 and D1 but ΔT1 + ΔT2 in frames S2 and D2). By temporarily changing the frame display cycle, it is possible to realize synchronization between the image sensor 15 and the display unit 40 in the subsequent frame.

In addition, since the length a of the shortest line display cycle becomes shorter as the frame rate Fdmax is higher, the length of the display period of the second display region R2 can also be shortened. As a result, the phase difference between the imaging sensor 15 and the display unit 40 is also reduced, and the display delay time is also shortened. Further, since the phase difference is reduced, the capacity of the buffer for storing the image data of the first display area R1 of the next frame can be reduced. Further, the display delay time can be shortened as the shortest length a of the line display cycle is shorter than the longest length b of the cycle in which image data for one line is generated. The larger the number of lines in the second display area R2, the longer the display delay time in the next frame. However, the shorter the shortest length a of the line display period, the shorter the image data in the first display area R1 in the next frame is stored. The buffer capacity can be reduced, and the display delay time can be shortened.

2. Second Embodiment FIG. 5 is a timing chart showing operations of the image sensor and the display unit in the live view mode according to the second embodiment. The frame DD1 does not start displaying the first display area R1 until the image data for a plurality of lines is accumulated in the line buffer 52d, but the image data of the first line in the first display area R1 is stored in the line buffer 52d. As soon as the image data is output, the image data of the first line is displayed. Thereafter, the image data is displayed every time image data for one line is output to the line buffer 52d. This is the same operation content as the frame D1 of FIG. 3 in the first embodiment. As a result, the length of the frame display period (vertical synchronization period) Tdv of the frame DD1 of FIG. 5 of the second embodiment is the same as the frame D1 of FIG. 3 from the frame imaging period (vertical synchronization period) Tsv of the image sensor 15. Also gets longer. That is, the frame rate (second frame rate) when the length of the frame display period Tdv of the frame DD1 continues as it is is lower than the frame rate of the imaging sensor 15.

Here, after finishing the display period Tdv1 of the first display area R1 and the display period Tdv2 of the second display area R2 of the frame DD1, the vertical synchronization signal DVsync for starting the frame DD2 is generated with a delay for some reason. To do. That is, it is assumed that the vertical synchronization signal DVsync is output at a timing q9 slightly delayed from the timing q8 at which the front porch period Tdv3 of the frame DD1 ends. Due to a slight delay in the output of the vertical synchronization signal DVsync for starting the frame DD2, the vertical synchronization is performed at the start timing q10 of the display period Tdv1 ′ of the first display region R1 of the frame DD2 after the back porch period Tdv0 of the frame DD2. Compared with the case where the signal DVsync is generated at the timing q8 without delay, the image data of many lines is accumulated in the line buffer 52d. That is, the number of lines accumulated at timing q10 when ΔT1 (period required for generating image data of the first line) has elapsed from timing q5 at which output of output data for one frame of frame SS2 starts. Is greater than the number of accumulated lines at a timing (not shown) after a period ΔT1 has elapsed from timing q5 and after a period shorter than ΔT3.

Therefore, as compared with the case where the vertical synchronization signal DVsync is generated at the timing q8 without delay, the number of lines that can be displayed in the line display cycle of the shortest length a is increased, so that the display of the first display region R1 in the frame DD2 The length of the period Tdv1 ′ is shortened. The length of the display period Tdv2 of the second display region R2 is the same as that of the frame DD1. Assuming that the vertical synchronization signal DVsync for starting the frame DD3 is generated at the timing q11 when the front porch period Tdv3 has elapsed without delay, the length of the frame display period Tdv ′ of the frame DD2 is the frame imaging period of the imaging sensor 15. It becomes shorter than the length of Tsv. That is, the frame rate (first frame rate) when the length of the frame display period Tdv ′ of the frame DD2 continues as it is is higher than the frame rate of the imaging sensor 15. Since the frame rate of the imaging sensor 15 and the frame rate of the display unit 40 can be equal after the frame DD3, the description is omitted.

Further, the image data for a plurality of lines of the frame DD2 (N + 1 frame) can be accumulated within the period in which the frame DD1 (N frame) is displayed at the second frame rate. That is, a part of a period ΔT3 in which image data for a plurality of lines in the first display region R1 of the frame DD2 is accumulated is included in the frame display period Tdv of the frame DD1. Further, as shown in the frame DD2, the display of the first display area R1 and the second display area R2 is performed after the image data for a plurality of lines is accumulated (after the period ΔT3).

3. Other Embodiments The technical scope of the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications can be made without departing from the scope of the present invention. For example, in the above embodiment, regarding the determination of the display condition, the display control unit 32 acquires the line number Ld for which the generation processing of the image data is completed and the output is completed to the line buffer 52d from the resize processing unit 20e, and the next display target line Ln A configuration is adopted in which it is determined that the display condition is satisfied when the relationship is (Ln ≦ Ld), but various other embodiments are conceivable. For example, the image data generation unit outputs a pulse signal to the display control unit when generation of image data for one line is completed and output to a predetermined buffer, and the display control unit outputs the pulse signal within one frame. It may be determined that the display condition is satisfied if the number of lines is counted and the line number indicated by the number is equal to or greater than the number of the next display target line.

For example, the image data generation unit counts up the counter at the timing when the processing of the resizing processing unit is completed and the image data of the Nth line is generated, and sets the value of the counter to N. The image data generation unit outputs a pulse signal to the display control unit at the timing when the counter is counted up to notify that the counter has been counted up. The display control unit acquires the value of the counter indicating the line for which generation of image data has been completed (indicating how many lines have been generated) at the timing when the pulse signal is acquired. The display control unit may determine that the display condition is satisfied if the number of the next display target line is equal to or less than the counter value.

The screen configuration of the display unit 40 is not limited to the configuration employed in the first embodiment. For example, as shown to FIG. 6A, 1st display area R1 and 2nd display area R2 may be reverse to 1st embodiment. That is, the area for n lines from the first line of the display screen is the second display area R2 for displaying OSD data, and the area for m lines following the second display area R2 is based on the output data of the imaging sensor 15. It may be the first display area R1 for displaying the generated image data. In this case, the second display region R2 is displayed in a line display cycle of length a as in the above embodiment. Since several lines of image data to be displayed in the first display area R1 are accumulated in the line buffer 52d during the period during which the second display area R2 is being displayed, the first display area R1 is stored in the line buffer 52d. Can be displayed in a line display cycle of length a, and the display period of the first display region R1 can be shortened as in the above embodiment. As a result, display data such as OSD can be displayed in addition to the image data based on the output data of the imaging sensor 15 during the period of the same length as the vertical synchronization period of the imaging sensor 15. Can be operated in synchronization. In the above embodiment, the first display area is an area composed of a plurality of lines, and the width (the length in the horizontal direction) is equal to the width of the display screen (the length in the horizontal direction), but is shorter than the width of the display screen. May be.

In the first embodiment and the example of FIG. 6A, the image data generated based on the output data of the imaging sensor 15 is displayed over the entire horizontal width of the display screen, but the live view image display area of FIG. 6B. As shown in 101, the width of the area where the image data generated based on the output data of the imaging sensor 15 is displayed may be narrower than the width of the display screen. In the case of the example in FIG. 6B, an area composed of lines including the live view image display area 101 (the width is the same as the width of the display screen) is generated based on the first display area R1 (output data of the imaging sensor 15). Display data including image data), and other areas (the width is the same as the width of the display screen) include the second display area R2 (image data generated based on the output data of the image sensor 15). Area where no display data is displayed). Display data of an area other than the live view image display area 101 (display areas of histograms 1, 2, 3, display areas for shooting information, and other background parts) is created and stored in the VRAM 51. The image data output unit 21 acquires image data from the line buffer 52 d when displaying the live view image display area 101, and acquires data from the VRAM 51 and outputs it to the display unit 40 when displaying other areas. . Since the first display area R1 includes the live view image display area 101, it can be displayed with the shortest length a if image data for a plurality of lines is accumulated in the line buffer 52d, but until the display condition is not satisfied, it is satisfied. Need to wait for display. Therefore, the first display region R1 is displayed with a line display cycle having a length of a to b. On the other hand, the second display area R2 can be displayed with a line display period of length a.

In addition, even when the screen configuration (layout) is changed during the live view mode (when the arrangement and ratio of the first display area R1 and the second display area R2 are switched), the above-described embodiment shows. A configuration (including a buffer for accumulating a plurality of lines of image data of the first display area and displaying image data that has been accumulated with a length a shorter than b and display data of the second display region R2) is provided. As a result, the imaging sensor 15 and the display unit 40 can be synchronized after a minimum of one frame has elapsed. In other words, even if the screen configuration is switched during the live view mode, the imaging sensor 15 and the display unit 40 can be stably synchronized in the shortest two frames after the switching.

In the first embodiment, an example in which the imaging sensor 15 and the display unit 40 are operated in synchronization when Fdmax> Fs and a <b is described. However, when Fdmax = Fs, the imaging sensor is described. Of course, it is possible to operate 15 and the display unit 40 in synchronization. For example, if the display is started from the first line of the first display area R1 after the accumulation of image data for m lines to be displayed in the first display area R1 in the line buffer 52d is completed, the length of the first display area R1 is increased. It is possible to display m lines in the line display cycle of a (since it is not necessary to wait for the display condition for any line). In this case, the length a is not necessarily shorter than the length b, for example, a = b. As for the second display region R2, as in the first embodiment, the display for n lines can be performed with the line display cycle of length a using the OSD data recorded in the VRAM 51. Thus, if the frame rate Fdmax of the display unit 40 when the horizontal synchronization signal DHsync is output in the line display cycle of the length a is the same as the actual frame rate Fs of the image sensor 15, the length of the vertical synchronization period is equal. Therefore, it goes without saying that the imaging sensor 15 and the display unit 40 can be synchronized. However, in this example, since the display from the first line of the first display area R1 is started after the image data for m lines of the first display area R1 is accumulated in the line buffer 52d, the photographing sensor 15 is 1 The display delay time from when the output data of the line is output until the display of the first display region R1 is started is longer than that of the first embodiment. Therefore, in order to shorten the display delay time as much as possible and to synchronize the image sensor 15 and the display unit 40, the first embodiment in which Fdmax> Fs and a <b is desirable.

DESCRIPTION OF SYMBOLS 1 ... Imaging device, 10 ... Optical system, 11 ... Lens, 13 ... Shutter, 14 ... Low pass filter, 15 ... Image sensor, 20 ... Image data generation part, 20 ... Image data generation part, 20a ... Pixel interpolation part, 20b ... Color reproduction processing unit, 20c ... filter processing unit, 20d ... gamma correction unit, 20e ... resize processing unit, 21 ... image data output unit, 30 ... timing control unit, 31 ... sensor control unit, 32 ... display control unit, 40 ... Display unit 41 ... Liquid crystal panel driver 42 ... Liquid crystal panel 50 ... CPU 51 ... VRAM 52 52 SD-RAM 52a-52d Line buffer 53 ... ROM 54 54 RAM 55 Operation unit 101 Live view image display area, R1 ... first display area, R2 ... second display area

Claims (4)

  An imaging sensor for imaging a subject and outputting imaging data for one frame at a first frame rate;
  A display unit configured to perform display based on imaging data for one frame at a frame rate between a second frame rate higher than the first frame rate and a third frame rate lower than the first frame rate; ,
  The display unit
  A first display area for displaying a live view image based on the shooting data;
  A second display area for displaying information other than the live view image;
  A display control unit for controlling display of the first display area and the second display area;
  The display control unit
  In the display unit, when a frame rate when one frame is displayed is lower than the first frame rate, at least a part of the first display area and the frame in the frame following the one frame The second display area is displayed with the shortest line display period of the display unit.
  An imaging display device characterized by that.   The display control unit
  In the display unit, when a frame rate when one frame is displayed is higher than the first frame rate, a front porch period of the one frame is extended to set the one frame rate to the first frame rate. Set the frame rate to
  The imaging display device according to claim 1.   An imaging sensor for imaging a subject and outputting imaging data for one frame at a first frame rate;
  A display unit configured to perform display based on imaging data for one frame at a frame rate between a second frame rate higher than the first frame rate and a third frame rate lower than the first frame rate; ,
  The display unit
  A first display area for displaying a live view image based on the shooting data;
  A second display area for displaying information other than the live view image;
  A method for controlling an imaging display device including a display control unit that controls display of the first display area and the second display area,
  In the display unit, when a frame rate when one frame is displayed is lower than the first frame rate, at least a part of the first display area and the frame in the frame following the one frame The second display area is displayed with the shortest line display period of the display unit.
  A control method for an imaging display device.   In the display unit, when a frame rate when one frame is displayed is higher than the first frame rate, a front porch period of the one frame is extended to set the one frame rate to the first frame rate. Set the frame rate to
  The method for controlling an imaging display device according to claim 3.

Images