JP6183078B2 - Load drive circuit - Google Patents

Load drive circuit Download PDF

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JP6183078B2
JP6183078B2 JP2013185352A JP2013185352A JP6183078B2 JP 6183078 B2 JP6183078 B2 JP 6183078B2 JP 2013185352 A JP2013185352 A JP 2013185352A JP 2013185352 A JP2013185352 A JP 2013185352A JP 6183078 B2 JP6183078 B2 JP 6183078B2
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circuit
path
load
mounting surface
transistor
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JP2015053604A (en
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佑樹 杉沢
佑樹 杉沢
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Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
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Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
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Description

本発明は、電源電圧が与えられる誘導負荷の低圧側に接続され、誘導負荷の電源電圧をスイッチングするトランジスタを備え、回路基板に実装された負荷駆動回路に関するものである。   The present invention relates to a load drive circuit that is connected to a low-voltage side of an inductive load to which a power supply voltage is applied and includes a transistor that switches the power supply voltage of the inductive load and is mounted on a circuit board.

車両に搭載されたモータでは、電源電圧が与えられるモータの低圧側に接続され、モータの電源電圧をスイッチングするトランジスタにより駆動されるものがある。このようなモータ駆動回路では、トランジスタと、トランジスタがオンであるときにモータ電流が流れる負荷電流回路と、トランジスタがオフであるときに、モータが発生させた誘導電流を平滑して電源へ還流させる還流回路とは、同じ回路基板に実装されることが多い。また、大電流が流れる経路にはバスバーが使用される。   Some motors mounted on vehicles are connected to a low voltage side of a motor to which a power supply voltage is applied and are driven by a transistor that switches the power supply voltage of the motor. In such a motor drive circuit, the transistor, the load current circuit through which the motor current flows when the transistor is on, and the induced current generated by the motor when the transistor is off are smoothed and returned to the power source. The reflux circuit is often mounted on the same circuit board. A bus bar is used for a path through which a large current flows.

特許文献1には、略四角の平板形状のプリント基板の実装側の面に、抵抗素子、マイクロコンピュータ及びMOSトランジスタを含む全ての実装部品を配置した1枚のPWMモジュール基板を備えたPWMモジュール構造が開示されている。PWMモジュール基板を、実装面をヒートシンクに向けて、また、非実装側の面を外側方に向けて、ヒートシンクを有するケース内に収容固定する。   Patent Document 1 discloses a PWM module structure including a single PWM module substrate in which all mounting components including a resistance element, a microcomputer, and a MOS transistor are arranged on a mounting-side surface of a substantially square flat plate-shaped printed circuit board. Is disclosed. The PWM module substrate is housed and fixed in a case having a heat sink with the mounting surface facing the heat sink and the non-mounting surface facing outward.

特開2005−259757号公報JP 2005-259757 A

上述したようなモータ駆動回路では、還流回路のループが形成する平面の面積が大きいので、大きな電磁界エミッションが発生し、また、モータ電流が高速にオン/オフするので、それによる磁界が発生するという問題がある。
本発明は、上述したような事情に鑑みてなされたものであり、還流回路のループが形成する平面の面積が小さく、大きな電磁界エミッションが発生せず、また、負荷電流が高速にオン/オフすることによる磁界を抑制できる負荷駆動回路を提供することを目的とする。
In the motor drive circuit as described above, since the area of the plane formed by the loop of the reflux circuit is large, a large electromagnetic field emission occurs, and the motor current is turned on / off at a high speed, thereby generating a magnetic field. There is a problem.
The present invention has been made in view of the circumstances as described above, and has a small plane area formed by the loop of the reflux circuit, does not generate a large electromagnetic field emission, and the load current is turned on / off at high speed. An object of the present invention is to provide a load drive circuit that can suppress a magnetic field caused by the operation.

第1発明に係る負荷駆動回路は、電源電圧が与えられる誘導負荷の低圧側に接続され、該誘導負荷の電源電圧をスイッチングするトランジスタと、該トランジスタがオンであるときに負荷電流が流れる負荷電流回路と、前記トランジスタがオフであるときに、前記誘導負荷が発生させた誘導電流を平滑して電源へ還流させる還流回路とを備え、前記負荷電流回路及び還流回路は、それぞれ回路基板の一側の実装面に実装された第1経路を有する負荷駆動回路において、前記負荷電流回路及び還流回路は、それぞれ前記回路基板の他側の実装面に前記第1経路と平行に実装された第2経路を有し、前記第1経路及び第2経路は、電流が互いに逆向きに流れるように構成してあることを特徴とする。   A load driving circuit according to a first aspect of the present invention is connected to a low voltage side of an inductive load to which a power supply voltage is applied, a transistor for switching the power supply voltage of the inductive load, and a load current through which a load current flows when the transistor is on A circuit and a reflux circuit that smoothes the induced current generated by the inductive load and circulates it back to a power source when the transistor is off, and each of the load current circuit and the reflux circuit is provided on one side of the circuit board. In the load driving circuit having the first path mounted on the mounting surface, the load current circuit and the return circuit are each mounted on the other mounting surface of the circuit board in parallel with the first path. The first path and the second path are configured such that currents flow in opposite directions.

この負荷駆動回路では、トランジスタが、電源電圧が与えられる誘導負荷の低圧側に接続され、誘導負荷の電源電圧をスイッチングし、トランジスタがオンであるときに、負荷電流回路に負荷電流が流れ、トランジスタがオフであるときに、還流回路が、誘導負荷が発生させた誘導電流を平滑して電源へ還流させる。負荷電流回路及び還流回路は、それぞれの第1経路が回路基板の一側の実装面に実装されている。負荷電流回路及び還流回路は、それぞれ第1経路と平行に実装された第2経路が回路基板の他側の実装面に第1経路と平行に実装されており、第1経路及び第2経路は、電流が互いに逆向きに流れる。   In this load driving circuit, the transistor is connected to the low voltage side of the inductive load to which the power supply voltage is applied, switches the power supply voltage of the inductive load, and when the transistor is on, the load current flows through the load current circuit, and the transistor When is turned off, the return circuit smoothes the induced current generated by the inductive load and returns it to the power source. Each of the load current circuit and the return circuit is mounted on the mounting surface on one side of the circuit board. In the load current circuit and the return circuit, the second path mounted in parallel with the first path is mounted in parallel with the first path on the other mounting surface of the circuit board, and the first path and the second path are , Currents flow in opposite directions.

第2発明に係る負荷駆動回路は、電源電圧が与えられる誘導負荷の低圧側に接続され、該誘導負荷の電源電圧をスイッチングするトランジスタと、該トランジスタがオンであるときに負荷電流が流れる負荷電流回路と、前記トランジスタがオフであるときに、前記誘導負荷が発生させた誘導電流を平滑して電源へ還流させる還流回路とを備え、前記負荷電流回路は、平行に積層された複数の回路基板の内の一の実装面に実装された第1経路を有し、前記還流回路は、前記実装面に実装された第2経路を有する負荷駆動回路において、前記負荷電流回路は、前記複数の回路基板の内の他の実装面に前記第1経路と平行に実装された第3経路を有し、前記還流回路は、前記一の実装面以外の実装面に前記第2経路と平行に実装された第4経路を有し、前記第1経路及び第3経路と、前記第2経路及び第4経路とは、それぞれ電流が互いに逆向きに流れるように構成してあることを特徴とする。   A load driving circuit according to a second invention is connected to a low voltage side of an inductive load to which a power supply voltage is applied, and switches a power supply voltage of the inductive load, and a load current through which a load current flows when the transistor is on A circuit and a reflux circuit that smoothes the induced current generated by the inductive load when the transistor is off, and circulates it back to the power source, and the load current circuit includes a plurality of circuit boards stacked in parallel. And the return circuit has a second path mounted on the mounting surface, and the load current circuit includes the plurality of circuits. A third path mounted in parallel with the first path on the other mounting surface of the substrate; and the reflux circuit is mounted in parallel with the second path on a mounting surface other than the one mounting surface. Have a fourth route , Said first path and the third path, wherein the second path and the fourth path, characterized in that each current are constituted so as to flow in opposite directions.

この負荷駆動回路では、トランジスタが、電源電圧が与えられる誘導負荷の低圧側に接続され、誘導負荷の電源電圧をスイッチングし、トランジスタがオンであるときに、負荷電流回路に負荷電流が流れ、トランジスタがオフであるときに、還流回路が、誘導負荷が発生させた誘導電流を平滑して電源へ還流させる。負荷電流回路は、第1経路が、平行に積層された複数の回路基板の内の一の実装面に実装され、還流回路は、第2経路が、一の実装面に実装されている。負荷電流回路は、第3経路が、複数の回路基板の内の他の実装面に第1経路と平行に実装され、還流回路は、第4経路が、一の実装面以外の実装面に第2経路と平行に実装されている。第1経路及び第3経路と、第2経路及び第4経路とは、それぞれ電流が互いに逆向きに流れる。   In this load driving circuit, the transistor is connected to the low voltage side of the inductive load to which the power supply voltage is applied, switches the power supply voltage of the inductive load, and when the transistor is on, the load current flows through the load current circuit, and the transistor When is turned off, the return circuit smoothes the induced current generated by the inductive load and returns it to the power source. The load current circuit has a first path mounted on one mounting surface of a plurality of circuit boards stacked in parallel, and the reflux circuit has a second path mounted on one mounting surface. In the load current circuit, the third path is mounted on the other mounting surface of the plurality of circuit boards in parallel with the first path, and in the reflux circuit, the fourth path is mounted on the mounting surface other than the one mounting surface. It is mounted parallel to the two paths. In the first path, the third path, and the second path, the fourth path, currents flow in opposite directions.

本発明に係る負荷駆動回路によれば、還流回路のループが形成する平面の面積が小さく、大きな電磁界エミッションが発生せず、また、負荷電流が高速にオン/オフすることによる磁界を抑制できる負荷駆動回路を実現することができる。   According to the load driving circuit of the present invention, the area of the plane formed by the loop of the reflux circuit is small, no large electromagnetic field emission occurs, and the magnetic field due to the load current being turned on / off at high speed can be suppressed. A load driving circuit can be realized.

本発明に係る負荷駆動回路の実施の形態の概略構成を示す回路図である。It is a circuit diagram which shows schematic structure of embodiment of the load drive circuit which concerns on this invention. 本発明に係る負荷駆動回路の実施の形態の回路基板への実装形態を示す分解斜視図である。It is a disassembled perspective view which shows the mounting form to the circuit board of embodiment of the load drive circuit which concerns on this invention. 図2に示す回路基板の構成を示す斜視図である。It is a perspective view which shows the structure of the circuit board shown in FIG. 本発明に係る負荷駆動回路の動作を示す説明図である。It is explanatory drawing which shows operation | movement of the load drive circuit which concerns on this invention. 本発明に係る負荷駆動回路の動作を示す説明図である。It is explanatory drawing which shows operation | movement of the load drive circuit which concerns on this invention.

以下に、本発明をその実施の形態を示す図面に基づき説明する。
図1は、本発明に係る負荷駆動回路の実施の形態の概略構成を示す回路図である。
この負荷駆動回路は、電源9の電圧が与えられる負荷(誘導負荷)4の低圧側に、NチャネルMOS型FET(Field Effect Transistor)3のドレインが接続され、FET3のソースは接地されている。負荷4は例えば直流モータである。FET3のゲートは、ゲート駆動回路2に接続され、ゲート駆動回路2は、外部からの入力信号が与えられる制御部1により制御される。
Hereinafter, the present invention will be described with reference to the drawings illustrating embodiments thereof.
FIG. 1 is a circuit diagram showing a schematic configuration of an embodiment of a load driving circuit according to the present invention.
In this load driving circuit, the drain of an N-channel MOS FET (Field Effect Transistor) 3 is connected to the low voltage side of a load (inductive load) 4 to which the voltage of the power source 9 is applied, and the source of the FET 3 is grounded. The load 4 is a DC motor, for example. The gate of the FET 3 is connected to the gate drive circuit 2, and the gate drive circuit 2 is controlled by the control unit 1 to which an input signal from the outside is given.

FET3のドレインには、ダイオードDのアノードが接続され、ダイオードDのカソードは、平滑コンデンサCのプラス端子、及び平滑コイルLの一方の端子に接続されている。平滑コンデンサCのマイナス端子は接地され、平滑コイルLの他方の端子は、電源9及び負荷4の高圧側に接続されている。
上記の、負荷4を除くFET3、ゲート駆動回路2、制御部1、ダイオードD、平滑コンデンサC及び平滑コイルLは、回路基板5に実装されている。
The anode of the diode D is connected to the drain of the FET 3, and the cathode of the diode D is connected to the plus terminal of the smoothing capacitor C and one terminal of the smoothing coil L. The negative terminal of the smoothing capacitor C is grounded, and the other terminal of the smoothing coil L is connected to the power source 9 and the high voltage side of the load 4.
The FET 3 excluding the load 4, the gate drive circuit 2, the control unit 1, the diode D, the smoothing capacitor C, and the smoothing coil L are mounted on the circuit board 5.

このような負荷駆動回路では、ゲート駆動回路2がFET3をPWM制御して、負荷4を駆動する。FET3がオンであるとき、負荷電流は、電源9、負荷4、FET3、接地の経路(第1経路)で流れる。FET3がオフであるとき、ダイオードDが導通し、負荷4で発生した誘導電流が、平滑コンデンサC、平滑コイルL、電源9の経路(第1経路)で還流する。   In such a load driving circuit, the gate driving circuit 2 performs PWM control on the FET 3 to drive the load 4. When the FET 3 is on, the load current flows through the power source 9, the load 4, the FET 3, and the ground path (first path). When the FET 3 is off, the diode D conducts, and the induced current generated in the load 4 flows back through the path of the smoothing capacitor C, the smoothing coil L, and the power source 9 (first path).

図2は、本発明に係る負荷駆動回路の実施の形態の回路基板5への実装形態を示す分解斜視図である。回路基板5は、実際には図3に示すように1枚であるが、表面と裏面とを示す為に、表面側5a及び裏面側5bに分解してある。尚、制御部1、ゲート駆動回路2、負荷4及び電源9は図示を省略してある。
図2の分解斜視図では、表面側5aの実装面に、長方形の回路パターンP1〜4を、一側からP4,P3,P2,P1の順に並列させて設けてある。
FIG. 2 is an exploded perspective view showing a mounting form of the load driving circuit according to the embodiment of the present invention on the circuit board 5. The circuit board 5 is actually one as shown in FIG. 3, but is disassembled into a front surface side 5a and a back surface side 5b in order to show the front surface and the back surface. The control unit 1, the gate drive circuit 2, the load 4 and the power source 9 are not shown.
In the exploded perspective view of FIG. 2, rectangular circuit patterns P1 to P4 are provided in parallel on the mounting surface on the front surface side 5a in the order of P4, P3, P2, and P1 from one side.

回路パターンP1,P4は、接地用であり、回路パターンP1は、スルーホール7により、回路パターンP4は、スルーホール8により、裏面側5bの実装面の略全面に設けられた回路パターンP5(第2経路)にそれぞれ接続されている。
FET3は、ソースが回路パターンP4に、ドレインが回路パターンP3にそれぞれ接続されて実装されている。
ダイオードDは、アノードが回路パターンP3に、カソードが回路パターンP2にそれぞれ接続されて実装されている。
The circuit patterns P1 and P4 are for grounding, the circuit pattern P1 is provided by the through hole 7, and the circuit pattern P4 is provided by the through hole 8 so that the circuit pattern P5 (the first pattern) is provided on the entire back surface 5b. 2 paths).
The FET 3 is mounted with its source connected to the circuit pattern P4 and its drain connected to the circuit pattern P3.
The diode D is mounted with its anode connected to the circuit pattern P3 and its cathode connected to the circuit pattern P2.

平滑コイルLは、一方の端子が回路パターンP2に接続され、他方の端子が図示しない電源9に接続されて実装されている。
平滑コンデンサCは、プラス端子が回路パターンP2に、マイナス端子が回路パターンP1にそれぞれ接続されて実装されている。
The smoothing coil L is mounted with one terminal connected to the circuit pattern P2 and the other terminal connected to a power source 9 (not shown).
The smoothing capacitor C is mounted with a positive terminal connected to the circuit pattern P2 and a negative terminal connected to the circuit pattern P1.

このように実装された負荷駆動回路では、FET3がオンであるとき、負荷電流が、図4に示すように、回路パターンP3から、FET3、回路パターンP4、スルーホール8、回路パターンP5、スルーホール7、回路パターンP1、平滑コンデンサC、回路パターンP2、平滑コイルLの経路で流れる。回路パターンP1、平滑コンデンサC、回路パターンP2、平滑コイルLに流れる電流は平滑電流である。 In the load driving circuit thus mounted, when the FET 3 is on, the load current is changed from the circuit pattern P3 to the FET 3, the circuit pattern P4, the through hole 8, the circuit pattern P5, and the through hole as shown in FIG. 7. It flows through the path of the circuit pattern P1, the smoothing capacitor C, the circuit pattern P2, and the smoothing coil L. The current flowing through the circuit pattern P1, the smoothing capacitor C, the circuit pattern P2, and the smoothing coil L is a smooth current.

この場合、回路パターンP3、FET3、回路パターンP4に流れる電流、及び回路パターンP1、平滑コンデンサC、回路パターンP2に流れる電流は、表面側5aの実装面の他側から一側に流れ、回路パターンP5に流れる電流は、裏面側5bの実装面の一側から他側に流れる。
従って、表面側5aの実装面に流れる電流と、裏面側5bの実装面に流れる電流とは、回路基板5の厚さ分のみ離隔して平行に流れ、しかも、互いに逆向きであるから、それぞれにより発生する電磁界が打ち消し合うことになる。また、両電流によるループが形成する平面の面積も小さく、放射電磁界エミッションも抑制される。
In this case, the current flowing through the circuit pattern P3, FET3, and circuit pattern P4 and the current flowing through the circuit pattern P1, the smoothing capacitor C, and the circuit pattern P2 flow from the other side of the mounting surface of the front surface side 5a to the one side. The current flowing through P5 flows from one side of the mounting surface on the back surface side 5b to the other side.
Therefore, the current flowing through the mounting surface on the front surface side 5a and the current flowing through the mounting surface on the back surface side 5b flow in parallel by being separated by the thickness of the circuit board 5, and are opposite to each other. The electromagnetic fields generated by the two cancel out each other. In addition, the area of the plane formed by the loops of both currents is small, and radiated electromagnetic field emissions are also suppressed.

FET3がオフであるとき、誘導電流が、図5に示すように、回路パターンP3から、ダイオードD、回路パターンP2、平滑コイルLの経路、及び回路パターンP3から、ダイオードD、回路パターンP2、平滑コンデンサC、回路パターンP1、スルーホール7、回路パターンP5、スルーホール8、回路パターンP4の経路で流れる。 When FET3 is off, the induced current is, as shown in FIG. 5, the circuit pattern P3, the diode D, the circuit pattern P2, the path of the smoothing coil L, and the circuit pattern P3, the diode D, the circuit pattern P2, smooth It flows through the path of the capacitor C, the circuit pattern P1, the through hole 7, the circuit pattern P5, the through hole 8, and the circuit pattern P4.

この場合、回路パターンP3から、ダイオードD、回路パターンP2、平滑コンデンサC、回路パターンP1に流れる電流は、表面側5aの実装面の一側から他側に流れ、回路パターンP5に流れる電流は、裏面側5bの実装面の他側から一側に流れる。
従って、表面側5aの実装面に流れる電流と、裏面側5bの実装面に流れる電流とは、回路基板5の厚さ分のみ離隔して平行に流れ、しかも、互いに逆向きであるから、それぞれにより発生する電磁界が打ち消し合うことになる。また、両電流によるループが形成する平面の面積も小さく、放射電磁界エミッションも抑制される。
In this case, the current that flows from the circuit pattern P3 to the diode D, the circuit pattern P2, the smoothing capacitor C, and the circuit pattern P1 flows from one side of the mounting surface of the surface side 5a to the other side, and the current that flows to the circuit pattern P5 is It flows from the other side of the mounting surface of the back side 5b to one side.
Therefore, the current flowing through the mounting surface on the front surface side 5a and the current flowing through the mounting surface on the back surface side 5b flow in parallel by being separated by the thickness of the circuit board 5, and are opposite to each other. The electromagnetic fields generated by the two cancel out each other. In addition, the area of the plane formed by the loops of both currents is small, and radiated electromagnetic field emissions are also suppressed.

尚、本実施の形態では、回路基板5の表面及び裏面を実装面としてあるが、例えば、複数の回路基板を平行に積層する場合、2つの回路基板の2つの表面を、回路基板5の表面及び裏面の2つの実装面と同様に実装しても、同様の効果を得ることができる。また、2つの回路基板の内の一の実装面及びそれ以外の実装面を、回路基板5の表面及び裏面の2つの実装面と同様に実装しても、同様の効果を得ることができる。   In the present embodiment, the front and back surfaces of the circuit board 5 are used as mounting surfaces. For example, when a plurality of circuit boards are stacked in parallel, the two surfaces of the two circuit boards are replaced with the front surface of the circuit board 5. The same effect can be obtained by mounting in the same manner as the two mounting surfaces on the back surface. Even if one mounting surface and the other mounting surface of the two circuit boards are mounted in the same manner as the two mounting surfaces of the front surface and the back surface of the circuit substrate 5, the same effect can be obtained.

1 制御部
2 ゲート駆動回路
3 FET
4 負荷(誘導負荷)
5 回路基板
7 スルーホール
9 電源
C 平滑コンデンサ
D ダイオード
L 平滑コイル
P1,P2,P3,P4,P5 回路パターン
DESCRIPTION OF SYMBOLS 1 Control part 2 Gate drive circuit 3 FET
4 load (inductive load)
5 Circuit board 7 Through hole 9 Power supply C Smoothing capacitor D Diode L Smoothing coil P1, P2, P3, P4, P5 Circuit pattern

Claims (2)

電源電圧が与えられる誘導負荷の低圧側に接続され、該誘導負荷の電源電圧をスイッチングするトランジスタと、該トランジスタがオンであるときに負荷電流が流れる負荷電流回路と、前記トランジスタがオフであるときに、前記誘導負荷が発生させた誘導電流を平滑して電源へ還流させる還流回路とを備え、前記負荷電流回路及び還流回路は、それぞれ回路基板の一側の実装面に実装された第1経路を有する負荷駆動回路において、
前記負荷電流回路及び還流回路は、それぞれ前記回路基板の他側の実装面に前記第1経路と平行に実装された第2経路を有し、前記第1経路及び第2経路は、電流が互いに逆向きに流れるように構成してあることを特徴とする負荷駆動回路。
A transistor that is connected to the low voltage side of an inductive load to which a power supply voltage is applied and that switches the power supply voltage of the inductive load, a load current circuit through which a load current flows when the transistor is on, and when the transistor is off And a return circuit for smoothing the induced current generated by the inductive load and returning it to the power source, wherein the load current circuit and the return circuit are each mounted on a mounting surface on one side of the circuit board. In a load drive circuit having
Each of the load current circuit and the return circuit has a second path mounted in parallel to the first path on the other mounting surface of the circuit board, and the first path and the second path have currents mutually connected to each other. A load driving circuit configured to flow in the reverse direction.
電源電圧が与えられる誘導負荷の低圧側に接続され、該誘導負荷の電源電圧をスイッチングするトランジスタと、該トランジスタがオンであるときに負荷電流が流れる負荷電流回路と、前記トランジスタがオフであるときに、前記誘導負荷が発生させた誘導電流を平滑して電源へ還流させる還流回路とを備え、前記負荷電流回路は、平行に積層された複数の回路基板の内の一の実装面に実装された第1経路を有し、前記還流回路は、前記実装面に実装された第2経路を有する負荷駆動回路において、
前記負荷電流回路は、前記複数の回路基板の内の他の実装面に前記第1経路と平行に実装された第3経路を有し、前記還流回路は、前記一の実装面以外の実装面に前記第2経路と平行に実装された第4経路を有し、前記第1経路及び第3経路と、前記第2経路及び第4経路とは、それぞれ電流が互いに逆向きに流れるように構成してあることを特徴とする負荷駆動回路。
A transistor that is connected to the low voltage side of an inductive load to which a power supply voltage is applied and that switches the power supply voltage of the inductive load, a load current circuit through which a load current flows when the transistor is on, and when the transistor is off And a reflux circuit for smoothing the induced current generated by the inductive load and returning it to the power source, and the load current circuit is mounted on one mounting surface of a plurality of circuit boards stacked in parallel. In the load driving circuit having the second path mounted on the mounting surface, the return circuit includes:
The load current circuit has a third path mounted in parallel with the first path on another mounting surface of the plurality of circuit boards, and the reflux circuit is mounted on a mounting surface other than the one mounting surface. A fourth path mounted in parallel with the second path, and the first path and the third path, and the second path and the fourth path are configured such that currents flow in opposite directions, respectively. And a load driving circuit.
JP2013185352A 2013-09-06 2013-09-06 Load drive circuit Expired - Fee Related JP6183078B2 (en)

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