JP6136605B2 - Mounting structure of surface mount semiconductor package - Google Patents

Description

The present invention includes a circuit board, a lead electrically connected to the circuit board, and a mold resin that covers each of the lead and the circuit board, and is mounted on the wiring board via solder. This is related to the mounting structure.

  Conventionally, as disclosed in Patent Document 1, for example, a surface-mounted semiconductor package that is surface-mounted on a printed circuit board with conductive bumps has been proposed. A semiconductor device is provided inside the surface-mount semiconductor package, and a signal electrode that is electrically connected to the semiconductor device and an auxiliary electrode that is not electrically connected to the semiconductor device are provided on the mounting surface of the printed circuit board. It has been. The auxiliary electrode is thicker than the signal electrode.

  With the above configuration, when a surface mount semiconductor package is placed on a printed circuit board so that the auxiliary electrode is in contact with the printed circuit board, the thickness of the auxiliary electrode is increased between the signal electrode and the printed circuit board land. A gap is formed by subtracting the film thickness of the electrode. For this reason, when solder bonding is performed by the reflow method, solder having a thickness corresponding to the gap is formed between the signal electrode and the land. As described above, even if the weight of the surface mount semiconductor package is large, the solder thinning is suppressed. As a result, the surface mount semiconductor package can be surface mounted on the printed circuit board with high reliability.

JP H10-242386

  As described above, in the surface mount semiconductor package disclosed in Patent Document 1, an auxiliary electrode that is not electrically connected to the semiconductor device is provided on the mounting surface, in addition to the signal electrode that is electrically connected to the semiconductor device. The auxiliary electrode ensures the thickness of the solder. However, in this configuration, it is necessary to prepare two electrodes (leads), that is, a signal electrode and an auxiliary electrode, and there is a concern that the number of parts increases. In addition, the size of the surface mount semiconductor package may increase due to the auxiliary electrode.

The present invention has been made in view of the above problems, and an object thereof is to provide an inhibiting surface mount type semiconductor package mounting structure of increased growth and size of the parts.

In order to achieve the above-described object, the present invention covers the circuit board (10), the lead (20) electrically connected to the circuit board, the connection portion of the lead to the circuit board, and the circuit board. A portion of the lead exposed to the outside from the mold resin electrically and via the wiring pattern (111) and the solder (120) formed on the surface of the wiring substrate (110). A surface-mount semiconductor package that is mechanically connected , a wiring board (110), and a solder (120), and the surface-mount semiconductor package is electrically and mechanically connected to the wiring board via solder. the mounting structure of the surface mount type semiconductor package, leads are exposed to the outside from the surface facing the wiring board in the mold resin (31), Mall Plural protrusions (40) for ensuring the thickness of the solder are integrally formed on the opposing surface of the resin, and the opposing surface has a central region (32) including its own geometric center, and It is composed of an annular surrounding region (33) surrounding the central region, and a plurality of leads are exposed in the surrounding region, arranged along the circumferential direction along the edge of the opposing surface, and the plurality of protrusions are formed in the central region. And the opposing surface of the mold resin has a polygonal shape, and leads are exposed from each of the three or more sides that border the opposing surface, and at least one of the plurality of protrusions is a side that borders the opposing surface. Located on a line connecting the center and the geometric center of the opposing surface, the mounting surface (110a) on the wiring board on which the surface mounting type semiconductor package is mounted is electrically and mechanically connected to the lead via solder. The first land (113) A second land (114) the tip parts are contacted, is formed, and the first lands and the second lands made of the same material, characterized in that have the same thickness.

  As described above, according to the present invention, the protrusion (40) for ensuring the thickness of the solder (120) is formed integrally with the mold resin (30). According to this, unlike the structure having the protrusions separately from the mold resin, an increase in the number of parts is suppressed and the manufacturing process is simplified. Furthermore, for example, unlike a configuration in which a part of a lead is used as a protrusion, it is not necessary to prepare different types of leads (lead used for electrical connection and lead used as a protrusion). Thus, an increase in the number of parts is suppressed. Further, the increase in the size of the surface mount semiconductor package (100) is suppressed due to the different types of leads.

  In addition, although the elements described in the claims and the means for solving the problems are attached with parentheses, the parentheses are attached to each component described in the embodiment. This is to simply show the correspondence with the elements, and does not necessarily indicate the elements themselves described in the embodiments. The description of the reference numerals with parentheses does not unnecessarily narrow the scope of the claims.

It is sectional drawing which shows schematic structure of the surface mount-type semiconductor package which concerns on 1st Embodiment. It is a bottom view which shows the lower surface of a surface mounted semiconductor package. It is a bottom view which shows the modification of the lower surface of a surface mount type semiconductor package. It is a bottom view which shows the modification of the lower surface of a surface mount type semiconductor package. It is a bottom view which shows the modification of the lower surface of a surface mount type semiconductor package. It is a bottom view which shows the modification of the lower surface of a surface mount type semiconductor package. It is sectional drawing which shows the modification of a surface mount type semiconductor package.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
Based on FIG. 1 and FIG. 2, the surface mount semiconductor package according to the present embodiment will be described. In FIG. 1, a solder 120 and a wiring board 110 are shown in addition to the surface mount semiconductor package 100, and a mounting structure of the surface mount semiconductor package is shown. In FIG. 2, in order to clarify the constituent elements, the leads 20 exposed to the outside from the mold resin 30 are hatched, and the leads 20 that are not effective for electrical connection with the wiring board 110 are indicated by broken lines. Hereinafter, the three directions orthogonal to each other are referred to as an x direction, a y direction, and a z direction. A plane defined by the x direction and the y direction is referred to as a defined plane.

  As shown in FIG. 1, the surface mount semiconductor package 100 includes a circuit board 10, leads 20, and a mold resin 30. The circuit board 10 and the lead 20 are electrically connected to each other, and the circuit board 10 and the lead 20 are covered with the mold resin 30. A portion of the lead 20 that is connected to the circuit board 10 is covered with the mold resin 30, and a part thereof is exposed to the outside from the mold resin 30. A portion of the lead 20 exposed to the outside from the mold resin 30 is electrically and mechanically connected to the wiring pattern 111 formed on the mounting surface 110 a of the wiring substrate 110 via the solder 120. Thereby, the surface mount type semiconductor package 100 is mounted on the mounting surface 110a.

  As shown in FIG. 1, the wiring substrate 110 is formed by forming a wiring pattern 111 on the surface and inside of a substrate 112 made of an insulating material. A first land 113 is formed at an end of the wiring pattern 111 formed on the mounting surface 110 a of the wiring substrate 110, and the wiring pattern 111 and the surface mount semiconductor package 100 are interposed via the first land 113 and the solder 120. Are electrically and mechanically connected.

  Although not shown in detail, the circuit board 10 is obtained by integrating electronic elements on a semiconductor substrate. The circuit board 10 is mounted on a land 21 made of the same material as the lead 20, and is electrically connected to each of the lead 20 and the land 21 via a wire 11.

  The lead 20 electrically connects the circuit board 10 provided inside the mold resin 30 and an external device. As shown in FIG. 1, the connection portion of the lead 20 with the circuit board 10 (connection portion with the wire 11 and the wire 11) is covered and protected by the mold resin 30, and a part thereof is exposed to the outside. .

  The mold resin 30 covers and protects the leads 20 together with the circuit board 10. As shown in FIGS. 1 and 2, when the surface mount semiconductor package 100 is mounted on the wiring board 110, one surface of the mold resin 30 faces the wiring board 110. The facing surface 31 of the mold resin 30 facing the wiring substrate 110 has a polygonal shape, and a part of the lead 20 is exposed from each of three or more sides that border the facing surface 31. In the present embodiment, the facing surface 31 has a quadrangular shape, and a plurality of leads 20 are exposed from each of the four sides forming the quadrangular shape. The facing surface 31 includes a central region 32 (a region surrounded by a one-dot chain line in FIG. 2) including its own geometric center GC, and an annular surrounding region 33 surrounding the central region 32. The plurality of leads 20 are exposed to the outside from the surrounding region 33 and are arranged side by side along the circumferential direction along the edge of the facing surface 31. The central region 32 is formed with a projection 40 described later. The central region 32 includes a projection formation region where the projection 40 is formed and a non-projection formation region where the projection 40 is not formed. It is divided into and.

  As shown in FIGS. 1 and 2, a plurality of protrusions 40 for ensuring the thickness of the solder 120 are integrally formed on the mold resin 30. The protrusion 40 is formed together with the mold resin 30 by injecting molten resin into a predetermined mold and cooling and solidifying it. The protrusion 40 has a columnar shape, and the tip thereof forms a hemisphere. The diameter of the protrusion 40 is approximately 200 to 500 μm, the height is approximately 50 μm, and the accuracy of the height is approximately ± 1 μm.

  In the present embodiment, three protrusions 41 to 43 are formed in the central region 32 of the facing surface 31. As shown by a broken line in FIG. 2, a triangle is formed by connecting the tips of these three protrusions 41 to 43 in a single stroke. As shown in FIG. 1, the mold resin 30 and the wiring board 110 are arranged in the z direction, and the center line CL that penetrates the center of gravity of the surface-mount semiconductor package 100 in the z direction in which both are arranged has three protrusions 41. Through the triangle formed by ~ 43. In the present embodiment, the triangle formed by connecting the tips of the three protrusions 41 to 43 is a regular triangle, and the center line CL passes through the geometric center GC of the regular triangle. The geometric center GC of the equilateral triangle composed of the protrusions 41 to 43 and the geometric center GC of the facing surface 31 coincide with each other on the specified plane. For this reason, in the present embodiment, both are not particularly distinguished and are indicated by the same reference numerals.

  In the following, the correspondence relationship between the three protrusions 41 to 43 and the wiring pattern 111 will be described, but in order to simplify the description, it is formed in a region facing the central region 32 on the mounting surface 110a of the wiring substrate 110. The formed wiring pattern 111 is referred to as a first wiring pattern 111a, and the wiring pattern 111 formed in a region facing the surrounding region 33 is referred to as a second wiring pattern 111b. The second wiring pattern 111 b has the same shape as the lead 20 exposed to the outside from the surrounding region 33, but the shape of the first wiring pattern 111 a is determined according to the arrangement of the protrusions 40. In the figure, the above-described symbols 111a and 111b are not shown.

  As shown in FIG. 2, three projections 41 to 43 are formed in the central region 32, and a region (projection formation region) in which the first projection 41 is located above the paper surface and a surrounding region 33 are formed. Are adjacent to each other, and no non-projection part forming region exists between them. Therefore, in order to electrically connect the second wiring pattern 111b and the first wiring pattern 111a corresponding to the lead 20 adjacent to the first protrusion 41 in the y direction (the lead 20 indicated by a broken line in FIG. 2), The first wiring pattern 111a must be formed in a region facing the protruding portion formation region in the wiring substrate 110 in the z direction. However, when the first wiring pattern 111a is formed in the region facing the protruding portion formation region, there is a possibility that thermal stress generated by thermal expansion / contraction due to the thermal cycle is applied to the first wiring pattern 111a. Therefore, the lead 20 adjacent to the first protrusion 41 is not directly connected to the first wiring pattern 111a. The lead 20 (second wiring pattern 111b) described above is electrically connected to the first wiring pattern 111a via the wiring pattern 111 formed inside the wiring substrate 110. As shown in FIG. 2, unlike the other protrusions 42 and 43, the first protrusion 41 is different from the other protrusions 42 and 43 in the center of one of the four sides constituting the opposite surface 31 and the geometric center of the opposite surface 31. It is located on the line connecting GC.

With respect to the arrangement of the first protrusions 41 described above, each of the protrusion-forming areas where the second protrusions 42 located on the left side of the paper and the third protrusions 43 located on the right-hand side of the paper are formed, Are separated from each other by a predetermined distance on the defined plane, and there is a non-projection forming region between them. As shown in FIG. 1, a region for forming the first wiring pattern 111 a is formed in a region of the wiring substrate 110 that is opposed to the non-projection portion forming region located between the two. Although not shown in detail, the first wiring pattern 111 a formed in this region is a first located in the center of the contact region between the second wiring pattern 111 b electrically connected to the lead 20 and the protrusion 40. In order to connect to the wiring pattern 111a, it is designed to bypass the contact area with the protrusion 40. As described above, in the present embodiment, the first wiring pattern 111a is not formed in the region facing the protruding portion forming region on the mounting surface 11 0 a (the region where the tip of the protruding portion 40 contacts). In addition, although it showed that each projection part formation area | region in which each projection part 42 and 43 was each formed and the surrounding area | region 33 was separated by predetermined distance, the space | interval between both is about 1-2 mm.

  Next, functions and effects of the surface mount semiconductor package 100 according to the present embodiment will be described. As described above, the protrusion 40 for ensuring the thickness of the solder 120 is formed integrally with the mold resin 30. According to this, unlike the structure having the protrusions separately from the mold resin, an increase in the number of parts is suppressed and the manufacturing process is simplified. Furthermore, for example, unlike a configuration in which a part of a lead is used as a protrusion, it is not necessary to prepare different types of leads (lead used for electrical connection and lead used as a protrusion). Thus, an increase in the number of parts is suppressed. Further, the increase in the size of the surface mount semiconductor package 100 due to the different types of leads is suppressed.

  The center line CL passes through the triangle formed by the three protrusions 40. According to this, the surface mount semiconductor package 100 can be stably mounted on the wiring board 110 as compared with the configuration in which the center line CL does not penetrate the triangle.

  In the present embodiment, the center line CL passes through the triangular geometric center GC formed by connecting the tips of the three protrusions 40. According to this, since the triangular geometric center GC and the center of gravity of the surface mount semiconductor package 100 are aligned in the z direction, the mounting of the surface mount semiconductor package 100 on the wiring board 110 by the three protrusions 40 is stable. It becomes.

  Each of the projecting portion forming regions where the projecting portions 42 and 43 are formed and the surrounding region 33 are separated from each other by a predetermined distance, and a non-projecting portion forming region exists between them. A region for forming the first wiring pattern 111a is formed in a region facing the non-projection portion forming region in the wiring substrate 110.

  According to this, unlike the configuration in which there is no non-projection formation region between the projection formation region and the surrounding region, the first wiring pattern 111a is not formed in the contact region with the projection 40 in the wiring substrate 110. The second wiring pattern 111b and the first wiring pattern 111a can be electrically connected. As a result, application of thermal stress to the first wiring pattern 111a due to expansion and contraction of the protrusion 40 due to the cooling / heating cycle is suppressed, and disconnection of the first wiring pattern 111a is suppressed.

  The projecting portion forming region where the first projecting portion 41 is formed and the surrounding region 33 are adjacent to each other, and there is no non-projecting portion forming region therebetween. Thus, the first protrusion 41 is farther from the center of the facing surface 31 of the mold resin 30 than the protrusions 42 and 43, respectively. In other words, the first protrusion 41 is close to the corner of the facing surface 31. It is the corner of the facing surface 31 that changes most greatly due to thermal expansion due to the cooling and heating cycle. Accordingly, when the protrusion 41 that supports the surface-mounting type semiconductor package 100 on the wiring board 110 is separated from the corner, the distance and proximity distance between the corner and the wiring board 110 due to thermal expansion and contraction are increased according to the distance. Become. Therefore, the first protrusion 41 is moved away from the center of the facing surface 31 as described above. In other words, the first protrusion 41 is brought closer to the corner. By doing so, even if the corner changes due to thermal expansion and contraction, it can be absorbed by the first protrusion 41. As a result, application of stress due to expansion and contraction of the corners to the solder 120 is suppressed, and a decrease in the reliability of electrical connection between the surface mount semiconductor package 100 and the wiring board 110 is suppressed.

  The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

  In the present embodiment, an example in which the facing surface 31 has a quadrangular shape is shown. However, the shape of the facing surface 31 may be a polygonal shape and is not limited to the above example.

  In the present embodiment, the first protrusion 41 located on the upper surface of the paper is adjacent to the surrounding area 33, and the protrusion formed with the second protrusion 42 located on the left side of the paper and the third protrusion 43 located on the right side of the paper. An example is shown in which each of the part formation regions and the surrounding region 33 are separated from each other by a predetermined distance on the specified plane. However, as shown in FIGS. 3 to 6, the number of protrusions 40 is not limited to the above example, and the formation position is not limited to the above example. If the surface mount type semiconductor package 100 is stably supported on the wiring board 110, the number of the protrusions 40 may be two, or may be plural. For example, as shown in FIGS. 5 and 6, a configuration in which four protrusions 40 are formed in the mold resin 30 can be employed.

  In the present embodiment, an example in which an equilateral triangle is formed by connecting the tips of the three protrusions 41 to 43 in a single stroke is shown. However, as shown in FIGS. 3 and 4, not only a regular triangle but also an isosceles triangle, for example, can be adopted as a triangle formed by connecting the tips of the three protrusions 41 to 43 in a single stroke. Further, as shown in FIGS. 5 and 6, squares and rectangles can be adopted by connecting the tips of the four protrusions 41 to 44 in a single stroke.

  In the configuration shown in FIG. 3, each of the protrusions 42 and 43 is located on a line connecting the two corners formed by the four sides bordering the facing surface 31 and the geometric center GC. In the configuration shown in FIG. 4, each of the protrusions 41 to 44 is located on a line connecting the center of the four sides that border the opposing surface 31 and the geometric center GC. In the configuration shown in FIG. 5, each of the protrusions 41 to 44 is positioned on a line connecting the four corners formed by the four sides bordering the facing surface 31 and the geometric center GC.

  As described above, it is the corner portion of the facing surface 31 that changes most greatly due to the thermal expansion due to the cooling cycle. Therefore, when the protrusions 41 to 43 that support the surface-mounting type semiconductor package 100 on the wiring board 110 are separated from the corners, the distance between the corners and the wiring board 110 due to thermal expansion and contraction and the proximity distance according to the distance. Becomes larger. Therefore, as shown in FIGS. 3 and 4, the protrusions 42 and 43 are farthest away from the center of the facing surface 31. Further, as shown in FIG. 6, each of the protrusions 41 to 44 is farthest away from the center of the facing surface 31. In other words, in the configuration shown in FIGS. 3 and 4, the protrusions 42 and 43 are brought closest to the corner, and in the configuration shown in FIG. 6, the protrusions 41 to 44 are brought closest to the corner. By doing so, even if the corner changes due to thermal expansion and contraction, it can be absorbed by the protrusions 42 and 43 or the protrusions 41 to 44. As a result, application of stress due to expansion and contraction of the corners to the solder 120 is suppressed, and a decrease in the reliability of electrical connection between the surface mount semiconductor package 100 and the wiring board 110 is suppressed. As shown by broken lines in FIGS. 3, 4, and 6, when the protrusion 40 is formed closest to the corner, the second wiring pattern 111b located at the corner is changed to the first wiring pattern 111a. It becomes impossible to connect directly. However, in the case of the configuration shown in FIG. 5, it is impossible to directly connect the second wiring pattern 111b located at the center to the first wiring pattern 111a, but compared with the configurations shown in FIGS. 3, 4, and 6. And the number decreases. Therefore, the design restrictions on the wiring pattern 111 are reduced.

  In the present embodiment, an example is shown in which the center line CL penetrates the geometric center GC of an equilateral triangle formed by connecting the tips of the three protrusions 41 to 43 in one stroke. However, as shown in FIG. 3, the geometric center GC, the intersection CP where the triangle formed by connecting the tips of the protrusions 41 to 43 in a single stroke and the center line CL intersect, and the tip of the first protrusion 41 However, it is also possible to adopt a configuration in which they are arranged in one direction along the prescribed plane. According to this, as compared with the configuration in which the geometric center GC, the intersection CP, and the tip of the first protrusion 41 are not aligned in one direction, the surface mount semiconductor package 100 including the plurality of protrusions 41 to 43 is formed. Mounting on the wiring board 110 is stabilized. More generally speaking, when three or more protrusions 40 are formed on the mold resin 30, the center line CL just passes through a polygon formed by connecting the tips of the three or more protrusions 40 in a single stroke. It is also possible to adopt the configuration. In this general configuration, the center line CL may pass through the geometric center GC, and at least one of the geometric center GC, the intersection CP, and the tips of the three or more protrusions 40 is defined. A configuration arranged in one direction along the plane can be employed.

  When the circuit board 10 generates a large amount of heat, a configuration in which the heat sink 50 is provided on the mold resin 30 can be employed as shown in FIGS. 4 and 5. Although the installation location of the heat sink 50 is not particularly limited, for example, as shown in FIGS. 4 and 5, a configuration in which the heat sink 50 is provided on the facing surface 31 and a part thereof is exposed can be employed. In the case of this configuration, the thickness of the heat sink 50 exposed from the mold resin 30 in the z direction is shorter than the length of the protrusion 40 in the z direction. For this reason, a gap is formed between the heat sink 50 and the wiring board 110.

  In the present embodiment, an example in which the first land 113 is formed on the mounting surface 110a of the wiring board 110 is shown. However, as shown in FIG. 7, in addition to the first land 113, a configuration in which a second land 114 that does not contribute to electrical connection is formed on the mounting surface 110a may be employed. The first land 113 is electrically and mechanically connected to the lead 20 via the solder 120, but the tip of the protrusion 40 is in contact with the second land 114. The first land 113 and the second land 114 are made of the same material and have the same thickness. According to this, a variation in the distance between the facing surface 31 of the mold resin 30 and the mounting surface 110a of the wiring board 110 due to a manufacturing error of the first land 113 is suppressed. In other words, variation in the thickness of the solder 120 is suppressed. Thereby, it is suppressed that a thin part is locally formed in the solder 120, and the electrical connection reliability between the surface mount semiconductor package 100 and the wiring board 110 is suppressed from being lowered.

DESCRIPTION OF SYMBOLS 10 ... Circuit board 20 ... Lead 30 ... Mold resin 31 ... Opposite surface 40 ... Projection part 100 ... Surface mount type semiconductor package 110 ... Wiring board 111 ... Wiring pattern 120 ... Solder

Claims (9)

A circuit board (10);
A lead (20) electrically connected to the circuit board;
A connecting portion of the lead to the circuit board and a mold resin (30) covering each of the circuit boards;
Surface mounting in which the portion of the lead exposed to the outside from the mold resin is electrically and mechanically connected to the wiring pattern (111) formed on the surface of the wiring substrate (110) via solder (120) Type semiconductor package ,
A wiring board (110);
A mounting structure of a surface-mounting semiconductor package, wherein the surface-mounting semiconductor package is electrically and mechanically connected to the wiring board via the solder,
The lead is exposed to the outside from the surface (31) facing the wiring board in the mold resin,
A plurality of protrusions (40) for ensuring the thickness of the solder are integrally formed on the facing surface of the mold resin,
The opposing surface comprises a central region (32) including its own geometric center and an annular surrounding region (33) surrounding the central region,
A plurality of the leads are exposed in the enclosed region, and are arranged along a circumferential direction along an edge of the facing surface;
The plurality of protrusions are formed in the central region,
The facing surface of the mold resin has a polygonal shape,
The leads are exposed from each of three or more sides that border the opposing surface;
At least one of the plurality of protrusions is located on a line connecting a center of a side bordering the facing surface and a geometric center of the facing surface ;
On the mounting surface (110a) on which the surface-mount type semiconductor package is mounted on the wiring board, a first land (113) electrically and mechanically connected to the lead via the solder, and the protrusion A second land (114) with which the tip of the
Mounting structure of said first lands and the second lands made of the same material, a surface mount type semiconductor package characterized by have the same thickness. A circuit board (10);
A lead (20) electrically connected to the circuit board;
A connecting portion of the lead to the circuit board and a mold resin (30) covering each of the circuit boards;
The part exposed to the outside from the mold resin in the lead is electrically and mechanically connected via the wiring pattern (111) formed on the surface of the wiring substrate (110) and the solder (120),
The lead is exposed to the outside from the surface (31) facing the wiring board in the mold resin,
A surface-mounting type semiconductor package in which a plurality of protrusions (40) for securing the thickness of the solder are integrally formed on the opposing surface of the mold resin;
The wiring board (110);
A mounting structure of a surface-mounting semiconductor package, wherein the surface-mounting semiconductor package is electrically and mechanically connected to the wiring board via the solder,
On the mounting surface (110a) on which the surface-mount type semiconductor package is mounted on the wiring board, a first land (113) electrically and mechanically connected to the lead via the solder, and the protrusion A second land (114) with which the tip of the
Mounting structure of said first lands and the second lands made of the same material, you characterized as having the same thickness surface mount type semiconductor package. The opposing surface comprises a central region (32) including its own geometric center and an annular surrounding region (33) surrounding the central region,
A plurality of the leads are exposed in the enclosed region, and are arranged along a circumferential direction along an edge of the facing surface;
The mounting structure for a surface-mounted semiconductor package according to claim 2, wherein the plurality of protrusions are formed in the central region . The wiring board portion formed in a region opposed to the said central region in the wiring pattern, according to claim 1 or 3, characterized in that provided to avoid the area facing the protruding portion Mounting structure of surface mount semiconductor package. The central region is divided into a projecting portion forming region where the projecting portion is formed and a non-projecting portion forming region where the projecting portion is not formed,
A part of the non-projection part formation region is located between at least one of the plurality of projection part formation regions and the surrounding region,
A region for forming the wiring pattern is formed in a region opposite to the non-projection part formation region located between the projection part formation region and the surrounding region in the wiring board. Item 5. The mounting structure of the surface-mounting type semiconductor package according to Item 1, 3 or 4 . The facing surface of the mold resin has a polygonal shape,
The leads are exposed from each of three or more sides that border the opposing surface;
The at least one of the plurality of protrusions is located on a line connecting a corner formed by three or more sides bordering the facing surface and a geometric center of the facing surface . mounting structure of a surface mounting type semiconductor package according to any one of 3-5. Three or more projecting portions are formed on the mold resin, and three or more center lines (CL) penetrating the center of gravity of the surface mount semiconductor package (100) in the direction in which the mold resin and the wiring substrate are arranged. The mounting structure for a surface-mounting type semiconductor package according to any one of claims 1 to 6, characterized in that it penetrates a polygon formed by tying the tips of the protrusions in a single stroke . 8. The surface-mounting type semiconductor package according to claim 7, wherein the center line passes through a polygonal geometric center (GC) formed by connecting the tips of three or more protrusions in one stroke. Implementation structure. A polygonal geometric center (GC) formed by connecting the tips of three or more protrusions in a single stroke, and a polygon formed by connecting the tips of three or more protrusions in a stroke and the center line 8. The surface according to claim 7, wherein at least one of a crossing point (CP) at which the crossing points and at least one of the tips of the three or more protrusions are arranged in one direction along the facing surface of the mold resin. Mounting structure of mounting type semiconductor package.

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