JP6126181B2 - Light switch - Google Patents

Description

  The present invention relates to an optical switch that is an important optical component for supporting a large-capacity optical communication network.

  In recent years, the enormous power consumption of electrical routers has become a major issue due to the rapid increase in communication traffic. In view of this, an N-input N-output (hereinafter referred to as N × N) optical switch that switches input light (optical packet) as it is to a desired output port for each packet in a router has been proposed. , Because it can switch optical packet signals with a high bit rate such as 40 Gbit / s and 100 Gbit / s without requiring optical-electrical conversion and electrical-optical conversion, which is effective for reducing power consumption and delay of routers. Expected to be an optical component.

The N × N optical switch can be configured, for example, by connecting N 1 × N optical switches 131 _{1 to} 131 _N and N N × 1 optical couplers 132 _{1 to} 132 _N as shown in FIG. . Optical input port PI ₁ ~PI _N from input input light (optical packets), 1 × with N optical switch element 131 ₁ ~131 _{N, N} × ₁ connected to a desired optical output port PO ₁ ~PO _N is outputted to the optical coupler 132 ₁ to 132 _N, is output as output light from the desired light output port PO ₁ ~PO _N.

  As a prior art of an optical switch element constituting such an N × N optical switch, for example, a 2 × 2 optical switch element shown in Patent Document 1 below has been proposed. FIG. 14 is a perspective view of a conventional 2 × 2 optical switch element. The conventional 2 × 2 optical switch element shown in FIG. 14 is a directional coupler type optical switch element. On the n-InP substrate 6, an optical input unit (I in the figure) and an optical switch unit II), a light output section (III) and a light absorption section (IV) are provided.

More specifically, in the conventional 2 × 2 optical switch element, an i-MQW layer 5, an i-InP clad layer 4, and a p-InP clad layer 3 are sequentially laminated on an n-InP substrate 6, and p- The InP cladding layer 3 has a structure as shown in FIG. 14 and is formed in a thin line shape. Further, on both the p-InP cladding layer 3 above p-InP cladding layer 3 of one of the optical switching unit II and the light absorbing portion IV is, p ⁺ -InGaAs capping layer 2 is formed, p ⁺ -InGaAs cap P-type electrodes 1, 10, 11 are formed on the layer 2, respectively. An n-type electrode 7 is formed on the back surface of the n-InP substrate 6. Reference numeral 9 denotes an electrical separation groove.

  Input signal light such as an optical packet is guided through a portion of the i-MQW layer 5 positioned below the p-InP clad layer 3 formed in a thin line shape. Hereinafter, the i-MQW layer 5 positioned below the p-InP cladding layer 3 provided in the light input part I, the light switch part II, the light output part III, and the light absorption part IV is respectively connected to the input optical waveguide and the optical switch conductor. These are referred to as a waveguide, an output optical waveguide, and a light absorption waveguide.

  Input signal light is input to one of the input optical waveguides (A or B in the figure) and guided to the optical switch waveguide. In the optical switch waveguide, a desired voltage is applied between the p-type electrode 1 and the n-type electrode 7 provided in the optical switch part II, for example, due to a multiple quantum well (MQW) structure. By changing the refractive index of the optical switch waveguide below the p-type electrode 1 by the quantum well confined stark effect (QCSE), signal light is output only from one of the optical switch waveguides. That is, the optical path is switched.

  In the light absorption part IV, a desired electric field is applied between the p-type electrode 10 or 11 provided in a light absorption waveguide different from the light absorption waveguide to which signal light is input, and the n-type electrode 7. Thereby, the crosstalk light leaking from the optical switch waveguide is absorbed by the light absorption waveguide, while the signal light output from the optical switch waveguide is guided to the output optical waveguide (C or D in the figure). . As described above, by providing the light absorbing portion IV, an optical switch element capable of reducing the influence of leaked light from the optical switch waveguide is realized.

JP-A-6-59294

In order to construct a 1 × N optical switch using the structure of the conventional optical switch element shown in FIG. 14, 2 × 2 optical switches 151 _{1 to} 151 ₃ (in FIG. 14, the optical switch section). II optical couplers) may be arranged in a tree shape, and electric field application light absorption gates 152 _{1 to} 152 ₄ may be provided in N optical output ports PO _{1 to} PO ₄ . FIG. 15 shows a case where N = 4. The input signal light input from the optical input port PI _{1 is transferred} to _one of the desired optical output ports PO _{1 to} PO ₄ (PO _{1 in the} figure) by switching the optical path of the 2 × 2 optical switches 151 _{1 to} 151 ₃ . Waveguided. On the other hand, the other light output port _{PO 1 ~PO 4 (PO 2 ~PO} 4 in the drawing), by applying an electric field light-absorbing gate 152 _{1-152 4} (152 _{2 to} 152 ₄ in the figure), 2 × 2 Absorbs crosstalk light leaking from the optical switches 151 _{2 to} 151 ₃ to realize low optical crosstalk.

As another configuration, as shown in FIG. 16, a 1 × N optical switch may be configured as a distribution selection type using a 1 × N optical coupler 161 and N electric field application light absorption gates 162 _{1 to} 162 _4. good. FIG. 16 also shows a case where N = 4. In this case, the input signal light input from the optical input port PI ₁ is equally distributed to the optical output ports PO _{1 to} PO ₄ by the 1 × N optical coupler 161. While the electric field applied light absorbing gate 162 _{1-162 4} desired optical output port PO ₁ ～PO ₄ for outputting a signal light (in the figure 162 ₁₎ is 0V, the other (N-1) application of an electric field light absorbing gate 162 _{1-162 4} (162 ₂ to 162 ₄ in the figure) is cut off the signal light by applying a reverse bias voltage.

When controlling the tree-type 1 × N optical switch shown in FIG. 15, 2 × 2 optical switches 151 _{1 to} 151 _{3 for} switching optical paths and electric field application light absorption gates 152 _{1 to} 152 ₄ for quenching leakage light Switching operation is performed by applying reverse bias voltages to the control terminals independently. For example, when an 8 × 8 optical switch is realized with the configuration shown in FIG. 13, the number of control terminals of the tree-type 1 × 8 optical switch as shown in FIG. The entire switch requires 120 control terminals. When expanding to a 16 × 16 optical switch, at least 31 control terminals are required for the 1 × 16 optical switch, and 496 control terminals are required for the entire 16 × 16 optical switch. Generalizing with the optical switch scale N, the number of control terminals of the 1 × N optical switch is at least 2N−1, and the total number of N × N optical switches is N × (2N−1).

Usually, when an electric field application type optical device is driven in an apparatus such as a router, an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), an external signal, for example, TTL (Transistor-Transistor Logic), etc. An analog signal having a desired voltage amplitude is generated using an electronic circuit such as a conversion circuit for converting the signal from the digital circuit into a digital-analog converter or an operational amplifier. For example, as shown in FIG. 17, an analog signal having a desired voltage amplitude is generated from the signal from the FPGA 171 using buffers 172 _{1 to} 172 _N and drivers 173 _{1 to} 173 _N.

When the above-described optical switch 174 (for example, a 16 × 16 optical switch) and a drive circuit (for example, drivers 173 _{1 to} 173 _N ) are mounted on a PCB (Printed-Circuit Board), voltage control is required independently. The number of such terminals is the number described above, and the electronic circuit scale is inevitably large, and the physical distance between the optical switch 174 and the drive circuit (for example, the drivers 173 _{1 to} 173 _N ) needs to be at least several cm to several tens of cm It becomes.

  On the other hand, in order to switch an optical packet having a high bit rate of 100 Gbit / s, high-speed on / off switching of 1 ns or less is required. That is, it is necessary to transmit a switching signal having a bandwidth of about 1 GHz from the FPGA 171 to the optical switch 174, but it is difficult to handle as a lumped constant circuit at the above-described distance of several tens of centimeters. Therefore, it is conceivable to mount as a distributed constant circuit in which the characteristic impedance (for example, 50Ω) of the transmission line to the optical switch 174 is matched with the impedance of the optical switch 174.

However, since the above-described optical switch is an electric field application type device, and its element has a high resistance (up to several MΩ), in order to match impedance, bias application terminals TB _{1 to} TB _{N as} shown in FIG. And a terminal resistor RT (in this case 50Ω) in parallel with each element (2 × 2 optical switch elements SW _{1 to} SW _N or electric field application light absorption gates GA _{1 to} GA _N ) between the ground terminal TG _{1 to} TG _N Need to be placed.

If a voltage of −5 V is applied to the control terminals (bias application terminals TB _{1 to} TB _N ) of the 2 × 2 optical switch elements SW _{1 to} SW _N , a current of 100 mA flows through the 50Ω termination resistor RT, Consumes 0.5 W per control terminal. The above-described tree type and distribution selection type 1 × 16 optical switches have a desired electric field application light absorption gate that outputs signal light among the 16 electric field application light absorption gates provided in the optical output port, and the others These 15 electric field application light absorption gates need to block the signal light by applying a voltage. That is, at least 15 × 0.5 W = 7.5 W is always consumed by the termination resistor RT.

  This power becomes 240 W when a 16 × 16 optical switch is configured, and the power generated by the termination resistor RT increases as the switch scale N increases, that is, the number of control terminals increases. The increase in power consumption accompanying the expansion of the switch scale is a major problem because it increases the power consumption of the router and further the power consumption of the entire network. It is essential to save power in the optical switch including the drive circuit. It is. Thus, from the viewpoint of high speed and power consumption, how to control a multi-electrode optical switch at high speed and low power is an important issue.

  The present invention has been made in view of the above problems, and an object thereof is to provide an optical switch that enables high-speed switching and has extremely low power consumption including a drive circuit.

An optical switch according to a first invention for solving the above-mentioned problems is
In an optical switch for branching signal light input to one input optical waveguide into N pieces with N being an integer of 2 or more by a branch element, and outputting from one of the N output optical waveguides.
An electric field application light absorption type optical gate element that is provided in each of the N output optical waveguides and that passes or blocks the signal light by application of an electric field by two electrodes;
A first transistor; a second transistor having a drain connected to a source of the first transistor; a source of the first transistor; a drain of the second transistor; and the anode side of the photogate element. An inverter circuit having a capacitor having one end connected to an electrode and the other end grounded, and using the capacitor, a voltage applied between the electrode on the cathode side of the optical gate element is controlled N first drive circuits that
Integrating the input optical waveguide, the output optical waveguide, the branch element, the optical gate element and the first drive circuit on the same semiconductor substrate;
The first drive circuit switches the state of the optical gate element from blocking to passing based on a control signal from a terminal circuit of a distributed constant line input to the gates of the first transistor and the second transistor. Only when a current flows between the source and drain of the first transistor to charge the capacitor, the potential of one end of the capacitor after charging is made equal to the potential of the electrode on the cathode side of the photogate element. In the state where no electric field is applied to the optical gate element, the signal light is allowed to pass, and only when the state of the optical gate element is switched from passing to blocking, a current is passed between the source and drain of the second transistor. The capacitor is discharged, and the electric potential of one end of the capacitor after the discharge is changed to the electric potential of the electrode on the cathode side of the photogate element. And lower, in a state where an electric field is applied to the optical gate device, wherein <br/> blocking the signal light.

An optical switch according to a second invention for solving the above-mentioned problems is as follows.
In the optical switch according to the first invention,
The branch element is a 1-input N-output optical coupler.

An optical switch according to a third invention for solving the above-mentioned problem is as follows.
In the optical switch according to the first invention,
The branch element includes at least one two-input two-output MZI (Mach Zehnder Interferometer). When the branch element includes a plurality of the two-input two-output MZI, two optical output ports of the two-input two-output MZI in the previous stage One of two optical input ports of the latter two-input two-output MZI is connected to each of the two, and a plurality of the two-input two-output MZIs are connected in multiple stages in a tree shape.

An optical switch according to a fourth invention for solving the above-mentioned problems is as follows.
In the optical switch according to the third invention,
A second drive circuit using a third transistor for applying a current or a voltage to an electrode provided on at least one of the two arm optical waveguides of the two-input two-output MZI;
And further integrating the second drive circuit on the semiconductor substrate;
The second drive circuit turns on or off the gate of the third transistor according to the control signal from the termination circuit of the distributed constant line.

An optical switch according to a fifth invention for solving the above-described problem is
In the optical switch according to any one of the first to fourth inventions,
The first transistor and the second transistor are HEMTs (High Electron Mobility Transistors).

An optical switch according to a sixth invention for solving the above-described problems is
In the optical switch according to any one of the first to fifth inventions,
The distributed constant line is LVDS (Low Voltage Differential Signaling).

An optical switch according to a seventh invention for solving the above-described problem is
In the optical switch according to any one of the first to sixth inventions,
The termination circuit is further integrated on the semiconductor substrate.

  According to the present invention, the capacitor is used for the first drive circuit that drives the optical gate element, and the power is consumed only during the switching operation of the applied voltage of the optical gate element. It is possible to realize an optical switch that is extremely low.

  In addition, according to the present invention, at least the branch element, the optical gate element, and the first drive circuit are integrated on the same semiconductor substrate (one-chip integration), and between the optical gate element and the first drive circuit. Since the distance is reduced, high-speed switching becomes possible.

1 is a configuration diagram illustrating a configuration of an optical switch and its peripheral circuits as an example of the embodiment of the present invention (Example 1). FIG. 3 is a cross-sectional view showing a layer structure of a HEMT used in Example 1. FIG. 1 is a cross-sectional view showing a layer structure of a HEMT integrated optical switch element used in Example 1. FIG. 3 is a diagram illustrating a layer structure of an optical switch layer used in Example 1. FIG. 3 is a cross-sectional view showing an optical waveguide that constitutes an optical switch element used in Example 1. FIG. 6 is a graph showing the transmittance with respect to the applied voltage of the light absorption gate used in Example 1. 2A and 2B are diagrams for explaining the operation of the drive circuit used in the first embodiment, where FIG. 3A is when signal light is transmitted, and FIG. FIG. 3 is a circuit diagram illustrating an example of a light absorption gate drive circuit including an LVDS termination circuit used in the first embodiment. It is a block diagram which shows the structure of the optical switch using 2 * 2MZI as another example (Example 2) of embodiment of this invention. 6 is a graph showing transmittance with respect to an injection current of 2 × 2 MZI used in Example 2. FIG. 4A and 4B are diagrams for explaining the operation of the drive circuit used in the second embodiment. FIG. 4A shows a time when there is no change in refractive index, and FIG. 5B shows a time when there is a change in refractive index. FIG. 6 is a circuit diagram illustrating an example of a 2 × 2 MZI driving circuit including an LVDS termination circuit used in the second embodiment. It is a block diagram which shows the structure of a NxN optical switch. It is a perspective view which shows the conventional 2 * 2 optical switch element. It is a block diagram which shows the structure of a tree-type 1xN optical switch in case of N = 4. It is a block diagram which shows the structure of the distribution selection type 1xN optical switch in the case of N = 4. It is a block diagram which shows the structure of the conventional optical switch and its peripheral circuit. It is a block diagram which shows the structure of the control terminal used with the conventional optical switch.

  Hereinafter, embodiments of an optical switch according to the present invention will be described with reference to the drawings.

[Example 1]
The optical switch of this embodiment is a drive circuit integrated optical switch in which inverter circuits using transistors are monolithically integrated. The configuration of such a drive circuit integrated optical switch and its peripheral circuits is shown in FIG. As shown in FIG. 1, an FPGA 101 serving as a peripheral circuit and a drive circuit integrated optical switch 102 are provided, and the FPGA 101 and the drive circuit integrated optical switch 102 are connected using a distributed constant line. An ASIC may be used instead of the FPGA 101.

  The drive circuit integrated optical switch 102 has the configuration of the distribution selection type 1 × N optical switch shown in FIG. That is, a 1 × N optical switch having one optical input port (input optical waveguide) and N optical output ports (output optical waveguides) where N is an integer equal to or greater than 2, as described later. The 1 × N coupler (branch element) for branching the optical waveguide through which the signal light input to the optical input port is guided into N pieces and the N optical output ports are provided respectively to block or block the signal light. This is a configuration having a light absorption gate (light gate element) to be performed and N inverter circuits (first drive circuit) for driving the light absorption gate. As the light absorption gate, for example, an electric field applied light absorption type optical gate element is used.

  In this embodiment, voltage driving is assumed as the optical switch element, and an inverter circuit using a high electron mobility transistor (HEMT) capable of realizing a high-speed voltage amplification circuit is used as the driving circuit, for example. Configure.

In the conventional optical switch and its peripheral circuit shown in FIG. 17, as shown in FIG. 18, 2 × 2 optical switch elements SW _{1 to} SW _N (or electric field application light absorption gates GA ₁ to GA _{1) as} optical switch elements. A termination resistor RT is arranged in parallel with GA _N ), and a transmission line in which impedance is matched from the drive circuit (for example, drivers 173 _{1 to} 173 _N ) to the optical switch 174 is used.

  On the other hand, in this embodiment, a distributed constant line is used as a line for propagating a control signal generated from the FPGA 101 functioning as a control circuit. Here, as an example of the distributed constant line, the drive circuit integrated optical switch 102 that is integrated with the drive circuit is operated using LVDS (Low Voltage Differential Signaling) that is a differential signal system using two transmission lines. . This enables high-speed signal transmission up to several GHz, low power consumption (3.5 mA drive, signal amplitude 350 mV), and high noise resistance (cancel common-mode noise by differential signals).

  The layer structure of the HEMT used in this example is shown in FIG. On a semi-insulating (SI) -InP substrate 21, i-InGaAs and i-InAlAs are formed as a buffer layer 22, and i-InP, i-InAlAs, Siδ doping layer, i-InAlAs are formed as a channel layer 23. The n-InGaAs and n-InAlAs are formed as the cap layer 24, the gate electrode 25g is formed on the channel layer 23, and the source electrode 25s and the drain electrode 25d are formed on the cap layer 24. Is made.

  In the HEMT of this embodiment, the gate length is 0.1 μm and the gate width is 25 μm. These design values are important parameters that determine the characteristics of the HEMT. Although the HEMT response speed is determined by the gate length, it is known that the operation corresponding to the high-speed signal up to GHz is realized with the gate length of 0.1 μm in this embodiment. Further, the current value flowing between the source and the drain can be determined depending on the size of the gate width.

  FIG. 3 shows the layer structure of the HEMT integrated optical switch element constituting the drive circuit integrated optical switch 102 of this embodiment. As shown in Patent Document 1, a conventional optical switch element is usually produced on an n substrate. In this embodiment, a HEMT layer 20 is produced on an SI-InP substrate 21, and further, An optical switch layer 30 is formed thereon.

  For example, as shown in FIG. 14, the optical switch element on the n substrate can form a ground electrode (n-type electrode 7) on the back surface of the substrate. However, in this embodiment, since it is necessary to realize an optical switch element (optical switch) on an SI (semi-insulating) substrate, the back surface of the SI substrate having a high resistivity cannot be grounded.

Therefore, in this embodiment, the layer structure of the optical switch layer 30 is changed to n for an optical switch at the boundary between the HEMT layer 20 and the optical switch layer 30 on the SI-InP substrate 21 as shown in the right diagram of FIG. A structure in which the ground electrode 36g is formed on the surface of the n-contact layer 31 is realized by providing the contact layer 31 and etching the upper surface of the n-contact layer 31. That is, on the SI-InP substrate 21 and the HEMT layer 20, an n ⁺ -InGaAsP contact layer 31, an n-InP lower cladding layer 32 serving as an n layer, and an InGaAsP core layer 33 having a bulk 1.4Q composition serving as an i layer (photo A laminated structure in which a luminescence peak wavelength of 1.4 μm and a thickness of 0.3 μm), a p-InP upper cladding layer 34 to be a p layer, and a p ⁺ -InGaAsP contact layer 35 are formed in this order. A signal electrode 36 s for controlling a light absorption gate, which will be described later, is formed on the p ⁺ -InGaAsP contact layer 35 to be a p-type electrode, and the ground electrode 36 g is on the n ⁺ -InGaAsP contact layer 31. To form an n-type electrode. 4 shows an optical switch element in which a ground electrode is formed on the back surface of the substrate for comparison.

The n ⁺ -InGaAsP contact layer 31 here is an n-type quaternary contact layer, and is a layer having a low resistivity by increasing the doping concentration. That is, the n ⁺ -InGaAsP contact layer 31 functions as a low-resistance ground layer. Since the n ⁺ -InGaAsP contact layer 31 is common to the entire surface of the optical switch, the ground electrode 36g is formed on the surface thereof, so that a single ground layer (n ⁺ -InGaAsP contact) is formed in the same manner as the ground electrode on the back surface. Only the layer 31) enables a switching operation.

  The optical waveguide constituting the optical switch element was manufactured by etching the same layer structure as that of the optical switch layer 30 to the lower side of the InGaAsP core layer 33, thereby forming a high mesa waveguide having a pin double heterojunction structure. FIG. 5 shows a cross-sectional structure of the optical waveguide. The optical waveguide heights of the input optical waveguide, 1 × 4 optical coupler, light absorption gate, and output optical waveguide were 4 μm. The optical waveguide widths of the input optical waveguide, the light absorption gate, and the output optical waveguide were 1.4 μm. The length of the light absorption gate in the waveguide direction (that is, the length of the p-type electrode provided on the light absorption gate) was 1000 μm. The 1 × 4 optical coupler is a multimode interference (MMI) optical coupler, and the size thereof is 31 × 7.6 μm (the length in the waveguide direction is 31 μm). Further, as shown in FIG. 4, the ground electrode 36g is formed at the bottom of the groove by forming a groove having a depth of 4.5 μm in the vicinity of the optical waveguide serving as a light absorption gate.

  Here, the operation of the light absorption gate of this embodiment will be described. For example, when the ground electrode 36g is grounded (potential = 0V) and a negative voltage is applied to the signal electrode 36s which is a p-type electrode provided in the light absorption gate, absorption in the InGaAsP core layer 33 is caused by the FK (Franz-Keldysh) effect. The edge shifts and the absorption coefficient at the signal light wavelength propagating through the light absorption gate increases.

  Therefore, for example, 0 V is applied to one p-type electrode (signal electrode 36s) of the light absorption gate, and a desired absorption rate (attenuation) is applied to the remaining p-type electrode (signal electrode 36s) of the light absorption gate at the signal light wavelength. By applying a minus voltage that can be obtained, the input signal light input to the optical input port is output only from the optical output port connected to the 0 V applied light absorption gate. That is, a voltage of 0 V is applied to the p-type electrode (signal electrode 36s) of the light absorption gate connected to the optical output port to be output, and a negative voltage is applied to the p-type electrode (signal electrode 36s) of the other light absorption gates. Thus, since the optical output port to be output can be selected, the optical switching operation can be performed by controlling the voltage applied to the light absorption gate.

  When the voltage applied to the light absorption gate is 0 V and the signal light wavelength is 1.55 μm, the absorption edge of the light absorption gate is more than 100 nm away from the signal light wavelength, and the propagation loss in the light absorption gate is It is sufficiently small as 0.5 dB / mm.

  In the light absorption gate of this embodiment, as shown in FIG. 6, an extinction ratio of 20 dB can be obtained with an applied voltage of −3V. By combining the 1 × N optical switch on the input side and the N × 1 optical switch on the output side, an extinction ratio of 40 dB or more can be obtained for the entire N × N optical switch.

  A similar function can be realized by using a semiconductor optical amplifier as the light absorption gate. However, when an electric field application type light absorption gate is used, deterioration of the input signal due to a pattern effect or a nonlinear optical effect is avoided. It is possible.

  In the electric field application type light absorption gate, the applied voltage is set to 0 V only when the signal passes, and therefore all the ports other than the port through which the signal passes must be in the electric field application state. In the normal configuration, the electric field is applied by passing a current through the drive circuit, and thus power is continuously consumed while the electric field is applied to the light absorption gate. However, in this embodiment, the electric power is applied only during the switching operation of the applied voltage. By adopting a consuming configuration, low power consumption operation is realized. That is, since the current flows through the circuit only for 1% of the time of the optical packet signal, a significant power reduction can be achieved.

FIGS. 7A and 7B show circuit configurations including an inverter circuit serving as a drive circuit for driving the light absorption gate. 7A and 7B, an LVDS termination circuit 71 is provided at the end of the distributed constant line (here, LVDS), and the inverter circuit 72 (first drive) is provided from the LVDS termination circuit 71. Circuit). The inverter circuit 72 includes a transistor T ₁₁ (first transistor), a transistor T ₁₂ of the drain to the source of the transistor T ₁₁ is connected to the (second transistor), and the drain of the source and the transistor T ₁₂ of the transistor T ₁₁ And a capacitor C having one end connected to the point A1 of the connection line connecting the two and the other end grounded.

In the inverter circuit 72, one output of the LVDS termination circuit 71 is input to the gate of the transistor T _11, the other output from the LVDS termination circuit 71 is input to the gate of the transistor T _12. A voltage V _D1 is applied to the drain of the transistor T ₁₁ , and a voltage V _S1 is applied to the source of the transistor T ₁₂ . The anode of the light-absorbing gate D ₁₁ a diode is connected to the point A1 in the inverter circuit 72, the voltage V _E is applied to the cathode of the light-absorbing gate D _11. Here, FIG. 3, referring to FIG. 4, the signal electrode 36s of the p-type electrode is the anode side of the light-absorbing gate D _11, the ground electrode 36g is the cathode side of the light-absorbing gate D _11.

The operation of the circuit configuration shown in FIGS. 7A and 7B will be described in more detail. In the circuit configuration shown in FIGS. 7A and 7B, a voltage of 3 V is applied to the voltage V _D1 and the voltage V _E , and a voltage of 0 V is applied to the voltage V _S1 , and a signal from the LVDS termination circuit 71 is used. by opening and closing the gates of T ₁₁ and transistor T _12, to change the charge state of the capacitor C, switching the voltage to be applied to the light-absorbing gate D ₁₁ (switching operation).

For example, FIG. 7A shows a state where a signal is sent to the gate of the transistor T ₁₁ . In this case, when the current i _a flows between the source and drain of the transistor T ₁₁ and the charge of the capacitor C is accumulated, the potential at the point A1 becomes V _A1 ≈V _D1 and this current i _a does not flow. At this time, V _E ≈V _A1 , and no voltage is applied to the light absorption gate D ₁₁ , and the signal light passes. In contrast, FIG. 7 (b) shows a state in which the signal is sent to the gate of the transistor T _12. In this case, when the current i _b flows between the source and drain of the transistor T ₁₂ and the charge of the capacitor C is released, the potential at the point A1 becomes V _A1 ≈V _S1 , and this current i _b does not flow. At this time, V _A1 <V _E , and a reverse bias voltage is applied to the light absorption gate D ₁₁ . As a result, light absorption due to the FK effect occurs and the signal light is blocked.

FIG. 8 shows an example of a circuit configuration of a light absorption gate drive circuit including an LVDS termination circuit. In FIG. 8, the transistor T ₁₁ , the transistor T ₁₂ and the capacitor C constitute the inverter circuit 72 described above, and the transistor T ₂₁ , transistor T ₂₂ , resistor R ₂₁ , resistor R ₂₂ and termination resistor RT are described above. and it constitutes an LVDS termination circuit 71, the anode of the light-absorbing gate D ₁₁ is connected to the connection line connecting the drain of the source and the transistor T ₁₂ of the transistor T _11.

In the LVDS termination circuit shown in FIG. 8, the termination resistor RT is connected in parallel to the distributed constant line (LVDS), the gate of the transistor T ₂₁ is connected to one of the distributed constant lines, and the transistor T ₂₂ is connected to the other of the distributed constant lines. The gate is connected, the source of the transistor T ₂₁ is connected to the source of the transistor T ₂₂ , the drain of the transistor T ₂₁ is connected to the source of the transistor T ₁₁ and one end of the resistor R ₂₁ , and the drain of the transistor T ₂₂ is connected to the transistor T _11. is the connection to the gate and one end of the resistor R _22, the other end of the resistor R ₂₁ is connected to the other end of the resistor R _22.

In the circuit configuration shown in FIG. 8, LVDS differential signal is a differential signal of 350mV amplitude centered on 1.2V, when it is 1.375V applied to the gate of the transistor T _21, to the gate of the transistor T ₂₂ is 1.025V is applied. At this time, the gate of the transistor T ₁₁ is opened and the gate of the transistor T ₁₂ is closed. Then, as described with reference to FIG. 7A, the current i _a flows between the source and drain of the transistor T ₁₁ and the capacitor C is charged, whereby the potential of the drain of the transistor T ₁₁ rises, and the current i _a No longer flows. As a result, the voltage of the light-absorbing gate D ₁₁ is not applied, the signal light passes through.

On the other hand, when 1.025 V is applied to the gate of the transistor T ₂₁ , 1.375 V is applied to the gate of the transistor T _22. At this time, the gate of the transistor T ₁₁ is closed and the gate of the transistor T ₁₂ is opened. . Then, as described with reference to FIG. 7 (b), the source of the transistor T _12, the current i _b flows between the drain, that the charge of capacitor C is opened, lower the source potential of the transistor T _12, the current i _{b stops} flowing. As a result, by applying a reverse bias voltage to the light-absorbing gate D _11, blocking the signal light.

Thus, by switching the LVDS differential signal, the gates of the transistors T ₁₁ and T ₁₂ are opened and closed, and the capacitor C is charged and discharged, thereby switching the voltage applied to the light absorption gate D ₁₁ and switching. Realize operation. As described above, the drive circuit (inverter circuit 72) using HEMT for the optical switch element is monolithically integrated on the same substrate, and further, the LVDS termination circuit 71 and the like are monolithically integrated on the same substrate. Thus, the distance between the optical switch element and the drive circuit can be reduced to the order of several millimeters (see FIG. 1), and can be controlled with a high-speed signal up to several GHz.

  When the optical switch is driven using the inverter circuit 72 as shown in FIGS. 7A and 7B, for example, for an optical packet having a length of about 100 ns, the inverter circuit is used for about 1 ns. In this configuration, a current is supplied to 72 to generate power consumption. Since the charge is accumulated in the capacitor C, the amount of current to flow increases, but when averaged over time, power consumption can be greatly reduced. In the distribution selection type 1 × N optical switch shown in FIG. 16, for example, in the case of the 1 × 16 optical switch, the power consumption can be suppressed to 24 mW. When such an operation is realized, the total power consumption of the entire optical switch is 768 mW even with the 16 × 16 optical switch, and the power consumption is greatly reduced as compared with the conventional power consumption (for example, 240 W) described above. Therefore, an optical switch with extremely low power consumption can be realized.

From the characteristics shown in FIG. 6, the voltage applied to the light absorption gate D ₁₁ is suitably 0 to −7 V as a range where the quenching effect can be obtained, and the values of the voltages V _D1 and V _E are 0 to 7 V. preferable. In this embodiment, the unipolar transistor using HEMT has been described. However, other bipolar transistors such as HBT (Hetero-junction Bipolar Transistor) may be used.

  Next, a method for manufacturing the optical switch element (optical switch layer 30) of this example will be described with reference to FIGS.

First, on the SI-InP substrate 21 and the HEMT layer 20, an n ⁺ -InGaAsP contact layer 31, an n-InP lower clad layer 32, a bulk i-InGaAsP core layer 33 having a 1.4Q composition of 0.3 μm thickness, p- The InP upper clad layer 34 and the p ⁺ -InGaAsP contact layer 35 are grown by metal organic vapor phase epitaxy (MOVPE). Next, a high mesa waveguide structure is collectively formed by photolithography and dry etching. As described above, MOVPE growth for forming an optical switch element and formation of an optical waveguide structure can be performed at once.

Then, benzocyclobutene (BCB), which is an organic material that can be embedded in a local region and has excellent planarization, is applied by spin coating, and RIE (Reactive Ion using an O ₂ / C ₂ F ₆ mixed gas) is applied. Etching) etches back until the surface of the substrate before embedding is exposed, and planarizes the substrate surface. Then, a groove for forming the ground electrode 36g is formed by photolithography and dry etching, and an n-type electrode to be the ground electrode 36g is formed in the groove. Finally, a p-type electrode serving as the signal electrode 36s on the part of the p ⁺ -InGaAsP contact layer 35 made of a light absorbing gate D _11.

  In this embodiment, an InGaAsP core layer 33 having a thickness of 0.3 μm and a width of 1.4 μm and a 1.4Q composition is used. These design values are important parameters that determine the optical characteristics of the optical switch element. The following conditions (1) to (3) are satisfied in order to operate with an input signal light wavelength of, for example, 1.53 μm to 1.57 μm and realize low loss, high speed, and low power consumption. It is preferable.

(1) The thickness of the InGaAsP core layer 33 is a single mode waveguide condition with respect to the input signal light, and a condition having sufficient light confinement in the InGaAsP core layer 33, and is 0.1 μm to 0.4 μm. A range of is desirable.
(2) The width of the InGaAsP core layer 33 is a single mode waveguide condition for the input signal light, and is preferably in the range of 0.8 μm to 3 μm.
(3) from the viewpoint of reducing the power consumption of the driving circuit, a condition in which the absolute value of the voltage applied to the light-absorbing gate D ₁₁ is 7V or less, the composition of InGaAsP core layer 33 in 1.3Q~1.5Q The electrode length is preferably in the range of 100 μm to 2000 μm.

In the optical switch of the present embodiment it has been described to use a bulk layer as InGaAsP core layer 33 of the light-absorbing gate D _11, may be a multiple quantum well structure. In that case, quenching can be performed with high efficiency in the light absorption gate D ₁₁ by the quantum confined Stark effect. Further, although the optical waveguide structure is a high mesa type optical waveguide structure, other structures such as a ridge waveguide structure may be manufactured. Alternatively, an embedded optical waveguide structure or a rib optical waveguide structure in which both sides of the InGaAsP core layer 33 are embedded with a semiconductor may be used.

  In this embodiment, an InP-based compound semiconductor has been described. However, a GaAs-based compound semiconductor may be used. A similar optical switch element can also be realized by using a material system capable of changing the refractive index and absorption coefficient in the order of nanoseconds, such as a silicon fine wire waveguide. In this case, MOSFET etc. are mentioned as a transistor which comprises a drive circuit.

[Example 2]
Similarly to the first embodiment, the optical switch of the present embodiment is also an monolithically integrated inverter circuit using a HEMT. Hereinafter, the configuration and operation will be described in detail with reference to the drawings.

  The optical switch of this embodiment has the configuration shown in FIG. As will be described in detail later, this is a 1 × N optical switch having one optical input port (input optical waveguide) and N optical output ports (output optical waveguides) where N is an integer of 2 or more, At least one 2 × 2 optical switch element (branch element) connected so as to branch into N optical waveguides for guiding signal light input to the optical input port, and N optical output ports are provided respectively. The light-absorbing gate (light gate element) that passes or blocks the signal light and the N inverter circuits (first driving circuit) that drive the light-absorbing gate. The light absorption gate here is an electric field applied light absorption type optical gate element. Further, the inverter circuit of the present embodiment may be equivalent to the inverter circuit described in the first embodiment.

  When two or more 2 × 2 optical switch elements are used, one of the two optical input ports of the subsequent 2 × 2 optical switch element is connected to each of the two optical output ports of the upstream 2 × 2 optical switch element. Then, a 2 × 2 optical switch element is connected in a tree shape in a multistage manner to form a 1 × N branch element.

  The input signal light input to the 1 × N optical switch is guided to the desired optical output port by switching the optical path of the 2 × 2 optical switch element, while the other optical output ports absorb the electric field applied light. The crosstalk light leaking from the 2 × 2 optical switch element is absorbed by the gate to realize low optical crosstalk.

Here, FIG. 9 illustrates a 1 × 2 optical switch as a minimum configuration of the optical switch of the present embodiment. Referring to FIG. 9, the optical switch of this embodiment is composed of at least 2 × 2 MZI 91 (branch element), electric field application light absorption gates 96 ₁ and 96 _2, and output optical waveguide 98, which are the same SI− It is formed on the InP substrate and the HEMT layer.

Although the configuration details of the 2 × 2MZI91 described later, the two have an optical input port PI _1, PI _2, the input signal light is input to one optical input port PI _1, PI _2. The electric field application light absorption gates 96 ₁ and 96 ₂ perform the same operation as that of the light absorption gate described in the first embodiment. That is, the input light is transmitted or attenuated according to the application of a negative voltage. The signal light output from the electric field application light absorption gates 96 ₁ and 96 ₂ is guided to the output optical waveguide 98 (optical output ports PO ₁ and PO ₂ ) and output from the end faces. The 2 × 2 MZI 91, the electric field application light absorption gates 96 ₁ and 96 _2, and the output optical waveguide 98 all have the same cross-sectional structure as shown in FIG. MZI (Mach Zehnder Interferometer) is a Mach-Zehnder interferometer.

The 2 × 2 MZI 91 includes a 2 × 2 optical coupler 92 and a 2 × 2 optical coupler 93 that split an input signal into two branches, two output optical waveguides of the 2 × 2 optical coupler 92, and a 2 × 2 optical coupler 93. The two input optical waveguides are respectively connected to two arm optical waveguides 94 having the same length. A p-type electrode serving as a current injection electrode 95 is formed on each of the p ⁺ -InGaAsP contact layers 35 on the two arm optical waveguides 94, and a current can be injected into the InGaAsP core layer 33 by applying a positive voltage. (See FIG. 5). Each of the arm optical waveguides 94 on which the current injection electrodes 95 are formed has a length of 200 μm. The current injection electrode 95 may be configured to apply a voltage instead of a current.

  When current is injected through the p-type electrode (current injection electrode 95), the injection current is efficiently confined in the InGaAsP core layer 33, the refractive index changes due to the plasma effect, and the distance between the two arm optical waveguides 94 increases. Is given a phase difference.

FIG. 10 shows the transmission characteristics of 2 × 2MZI91. When the injection current into the two arm optical waveguides 94 is 0 mA, the input signal light input to the 2 × 2 MZI 91 is output to the optical output port PO ₁ side in FIG. When a current is injected into one of the p-type electrodes (current injection electrode 95), the refractive index of the injected arm optical waveguide 94 changes, and the phase of light propagating through the arm optical waveguide 94 changes. When the injection current into the arm optical waveguide 94 is 5 mA, the output from the optical output port PO ₁ is minimum, and the optical output to the optical output port PO ₂ is maximum. At this time, the ratio of the optical output to the optical output port PO ₁ and the optical output to the optical output port PO ₂ was 20 dB or more.

As described above, in the 2 × 2 MZI 91 of this embodiment, the injection current is switched between the two states of 0 mA and 5 mA, that is, the two values are digitally switched, so that the optical output port PO ₁ or the optical output port PO _{2 has} a desired value. Signal light can be output to the port.

  As described above, in order to operate the 2 × 2 MZI 91, it is only necessary to inject a current into one of the two arm optical waveguides 94. Therefore, the p-type electrode (current injection electrode 95) is used as one arm optical waveguide. It may be provided only at 94.

In the optical switch of this embodiment, electric field application light absorption gates 96 ₁ and 96 ₂ having an optical waveguide layer having the same structure and the same composition as 2 × 2 MZI 91 are connected to each of two optical output ports of 2 × 2 MZI 91. I have to. Both the electric field application light absorption gate 96 ₁ and the electric field application light absorption gate 96 ₂ have a length of 1000 μm in the waveguide direction. Similarly to the first embodiment, the electric field application light absorption gate 96 ₁ and the electric field application light absorption gate 96 ₂ are respectively applied to the p ⁺ -InGaAsP contact layer 35. A p-type electrode serving as a working electrode 97 is provided (see FIG. 3).

Similarly to the first embodiment, when a negative voltage is applied to the electric field application electrodes 97 of the electric field application light absorption gates 96 ₁ and 96 ₂ , the absorption edge in the InGaAsP core layer 33 is shifted due to the FK effect. absorption coefficient at the signal wavelength propagating in the _1, 96 ₂ is increased. In the electric field application light absorption gates 96 ₁ and 96 _{2 of} this embodiment, as shown in FIG. 6, an extinction ratio of 20 dB can be obtained with an applied voltage of −3V. Together with the extinction ratio of 20 dB of 2 × 2MZI91, an extinction ratio of 40 dB or more can be obtained with the entire optical switch.

The same function can be realized by using a semiconductor optical amplifier as the electric field application light absorption gates 96 ₁ and 96 _2. However, when an electric field application type light absorption gate is used, a pattern effect or a nonlinear optical effect is obtained. It is possible to avoid the deterioration of the input signal due to.

The electric field application light absorption gates 96 ₁ and 96 ₂ are capable of high-speed operation by the circuit described in the first embodiment (see FIGS. 7A, 7B, and 8), and power is applied during switching operation of the applied voltage. Power saving is realized by the circuit configuration that generates consumption.

Next, the circuit configuration of the 2 × 2 MZI 91 drive circuit integrated on the same substrate as the electric field application light absorption gates 96 ₁ and 96 ₂ will be described with reference to FIGS. In the circuit configurations of FIGS. 11A and 11B, an LVDS termination circuit 111 is provided at the end of the distributed constant line (here, LVDS), and from this LVDS termination circuit 111, a transistor T ₃₁ (third A control signal is output to the driver circuit 112 (second driver circuit) having a transistor.

In the driving circuit 112, the output from the LVDS termination circuit 111 is input to the gate of the transistor T _31, to the drain of the transistor T ₃₁ is the voltage V _D2 applied, arm optical guide is a diode to the source of the transistor T ₃₁ The anode of the waveguide D ₃₁ is connected, and the voltage V _S2 is applied to the cathode of the arm optical waveguide D ₃₁ . The arm optical waveguide D ₃₁ corresponds to the arm optical waveguide 94 in FIG.

The operation of the circuit configuration shown in FIGS. 11A and 11B will be described in more detail. In the circuit configuration shown in FIGS. 11A and 11B, the voltage V _D2 is 2 V and the voltage V _S2 is 0 V, and the signal from the LVDS termination circuit 111 is used to gate the transistor T ₃₁ . by opening and closing the switches the current injected into the arm optical waveguide D ₃₁ (switching operation).

For example, FIG. 11 (a) shows a state where the gate of the transistor T ₃₁ is closed. Since no current flows through the driving circuit 112, the arm optical waveguide D ₃₁ current is not injected, the light is output to the optical output port PO _1. On the other hand, FIG. 11B shows a state where the gate of the transistor T ₃₁ is opened. In the drive circuit 112, since a current flows from the voltage V _D2 toward the voltage V _S2 , the current is injected into the arm optical waveguide D ₃₁ and the refractive index changes due to the plasma effect. At this time, since the phase difference between the two arm optical waveguides 94 is provided, the light is output to the optical output port PO _2.

FIG. 12 shows an example of a circuit configuration of a 2 × 2 MZI drive circuit including an LVDS termination circuit. In FIG. 12, the transistor T ₃₁ constitutes the drive circuit 112 described above, and the transistor T ₄₁ , transistor T ₄₂ , resistor R ₄₁ , resistor R _42, and termination resistor RT constitute the LVDS termination circuit 111 described above. doing.

In the LVDS termination circuit shown in FIG. 12, a termination resistor RT is connected in parallel to the distributed constant line (LVDS), the gate of the transistor T ₄₁ is connected to one of the distributed constant lines, and the transistor T ₄₂ is connected to the other of the distributed constant lines. The gate is connected, the source of the transistor T ₄₁ is connected to the source of the transistor T ₄₂ , the drain of the transistor T ₄₁ is connected to the drain of the transistor T ₃₁ and one end of the resistor R ₄₁ , and the drain of the transistor T ₄₂ is connected to the transistor T _31. is the connection to the gate and one end of the resistor R _42, the other end of the resistor R ₄₁ is connected to the other end of the resistor R _42.

In the circuit configuration shown in FIG. 12, LVDS differential signal is a differential signal of 350mV amplitude centered on 1.2V, when it is 1.375V applied to the gate of the transistor T _41, to the gate of the transistor T ₄₂ is 1.025V is applied. At this time, the gate of the transistor T ₄₂ is closed, since the source of the transistor T _42, the drain current does not flow, not generated voltage to the gate of the transistor T _31, to the state in which the gate of the transistor T ₃₁ is closed Become. That is, as described in FIG. 11 (a), the arm optical waveguide D ₃₁ current is not injected, the light is output to the optical output port PO _1. Meanwhile, when it is 1.025V applied to the gate of the transistor T _41, is 1.375V applied to the gate of the transistor T _42, this time, the source of the transistor T _42, a current flows between the drain and the gate of the transistor T ₃₁ a voltage is applied to, a state in which the gate is open the transistor T _31. That is, as described in FIG. 11 (b), the current is injected into the arm optical waveguides D _31, the light is output to the optical output port PO _2.

In this way, by switching the LVDS differential signals, it performs the opening and closing of the gate of the transistor T _31, to realize the switching operation of the optical output port. As described above, the driving circuit using the HEMT (inverter circuit 72 and driving circuit 112) is monolithically integrated with the optical switch element, and further includes the LVDS termination circuits 71 and 111 on the same substrate. By integrating, the distance between the optical switch element and the drive circuit can be reduced to the order of several millimeters (see FIG. 1), and it can be controlled with a high-speed signal up to several GHz.

  In this embodiment, the 1 × 2 optical switch using one 2 × 2 MZI as the optical switch element has been described. However, as shown in FIG. 15, a plurality of 2 × 2 MZIs are connected in a multi-stage in a tree shape. A 1 × N optical switch having a configuration in which N electric field application light absorption gates are provided at the optical output port in the final stage may be used. Various application configurations may be handled in the same manner as in the first embodiment.

  The present invention is suitable for an optical switch.

20 HEMT layer 30 Optical switch layer 71, 111 LVDS termination circuit 72 Inverter circuit 91 2 × 2MZI
96 ₁ , 96 ₂ electric field application light absorption gate 102 drive circuit integrated optical switch 112 drive circuit

Claims (7)

In an optical switch for branching signal light input to one input optical waveguide into N pieces with N being an integer of 2 or more by a branch element, and outputting from one of the N output optical waveguides.
An electric field application light absorption type optical gate element that is provided in each of the N output optical waveguides and that passes or blocks the signal light by application of an electric field by two electrodes;
A first transistor; a second transistor having a drain connected to a source of the first transistor; a source of the first transistor; a drain of the second transistor; and the anode side of the photogate element. An inverter circuit having a capacitor having one end connected to an electrode and the other end grounded, and using the capacitor, a voltage applied between the electrode on the cathode side of the optical gate element is controlled N first drive circuits that
Integrating the input optical waveguide, the output optical waveguide, the branch element, the optical gate element and the first drive circuit on the same semiconductor substrate;
The first drive circuit switches the state of the optical gate element from blocking to passing based on a control signal from a terminal circuit of a distributed constant line input to the gates of the first transistor and the second transistor. Only when a current flows between the source and drain of the first transistor to charge the capacitor, the potential of one end of the capacitor after charging is made equal to the potential of the electrode on the cathode side of the photogate element. In the state where no electric field is applied to the optical gate element, the signal light is allowed to pass, and only when the state of the optical gate element is switched from passing to blocking, a current is passed between the source and drain of the second transistor. The capacitor is discharged, and the electric potential of one end of the capacitor after the discharge is changed to the electric potential of the electrode on the cathode side of the photogate element. And lower, in a state where an electric field is applied to the optical gate device, an optical switch according to claim <br/> blocking the signal light. The optical switch according to claim 1 ,
The branching element is a 1-input N-output optical coupler. The optical switch according to claim 1 ,
The branch element includes at least one two-input two-output MZI (Mach Zehnder Interferometer). When the branch element includes a plurality of the two-input two-output MZI, two optical output ports of the two-input two-output MZI in the previous stage One of two optical input ports of the latter two-input two-output MZI is connected to each of the plurality of two-input two-output MZIs, and a plurality of the two-input two-output MZIs are connected in multiple stages in a tree shape. switch. The optical switch according to claim 3 ,
A second drive circuit using a third transistor for applying a current or a voltage to an electrode provided on at least one of the two arm optical waveguides of the two-input two-output MZI;
And further integrating the second drive circuit on the semiconductor substrate;
The optical switch, wherein the second drive circuit turns on or off the gate of the third transistor according to the control signal from the termination circuit of the distributed constant line. The optical switch according to any one of claims 1 to 4 , wherein:
The optical switch, wherein the first transistor and the second transistor are HEMTs (High Electron Mobility Transistors). The optical switch according to any one of claims 1 to 5 ,
The distributed switch is an LVDS (Low Voltage Differential Signaling). The optical switch according to any one of claims 1 to 6 ,
An optical switch, wherein the termination circuit is further integrated on the semiconductor substrate.

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