JP6118094B2 - Pixel peripheral recording image sensor - Google Patents

Description

  The present invention relates to a pixel peripheral recording type imaging device.

  As a high-speed imaging device used for high-speed imaging, a pixel peripheral recording type imaging device having an oblique linear CCD memory capable of ultra-high-speed imaging with a maximum imaging speed of 1 million images / second is conventionally known. (For example, refer to Patent Document 1).

  In addition, as a conventional pixel peripheral recording type imaging device capable of high-speed photography, there is a device having a zigzag wiring structure called a lightning bus line in order to reduce the wiring area and increase the integration of the element. It is known (see, for example, Patent Document 2).

  Further, a pixel peripheral recording type imaging device having a maximum photographing speed of 2 million frames / second is known by dividing driving and reducing wiring resistance (for example, see Patent Document 3). In this pixel peripheral recording type image pickup device, the pixel portion is driven in four divisions, and the pixel wiring resistance is reduced to one half of the conventional one.

  FIG. 12 schematically shows a wiring configuration around a part of the pixel region 400 of the pixel peripheral recording type image pickup element described in Patent Document 3. As shown in FIG. A pixel region 400 shown in FIG. 12 is one block obtained by dividing the pixel region of the entire image sensor into four blocks. In the sub-pixel area of the pixel area 400, 80 pixels are arranged in the X direction and 410 pixels are arranged in the Y direction. Throughout the specification, the X direction and the Y direction mean coordinate axes of orthogonal coordinates.

  The wiring configuration around a part of the sub-pixel region of the pixel region 400 shown in FIG. 12 is a configuration in which the electrode pad portions of the input electrodes 510 to 580 of the input electrode unit 500 and the output electrodes 710 to 780 are connected. Yes. Note that the output electrodes 710 to 780 are provided in the package 700 of the driver circuit 120 a that is disposed at a position facing the Y direction end of the pixel region 400.

  The output electrodes 710 to 780 are eight kinds of drive system signals output from a pulse generation unit (not shown) of the driver circuit 120a, that is, exposure pulses φPG1, φPG2, accumulation transfer pulses φM1, φM2, φM3, φM4, and vertical transfer pulses. The electrodes output φV2 and φV4.

  The input electrodes 510 to 580 of the input electrode unit 500 are made of, for example, an aluminum film, and are each composed of a substantially rectangular electrode pad portion and a narrow aluminum wiring portion extending from the electrode pad portion in a substantially X direction.

  The electrode pad portions of the input electrodes 510 to 580 are adjacent to each other in the X direction, and each electrode pad portion is close to the aluminum wiring portion of the input electrode adjacent in the Y direction. Note that the set of the input electrodes 510 to 580 is electrically disconnected from the input electrodes of the adjacent subpixel regions, and each subpixel region is driven by a separate driver circuit.

  The electrode pad portions of the input electrodes 510 to 580 and the output electrodes 710 to 780 are electrically connected by bonding wires 610 to 680, respectively.

  Further, between the input electrodes 510 to 580 and each pixel electrode in the pixel region 400, as will be described later, tungsten wirings 510 a to 580 a and tungsten wirings 510 b to 580 b (hereinafter simply referred to as “ The wirings 510 a to 580 a and the wirings 510 b to 580 b ”are electrically connected.

  FIG. 13 is a schematic diagram of a peripheral wiring configuration unit related to the output electrodes 710 and 720 of the driving system wirings of the exposure pulses φPG1 and φPG2 among the output electrodes 710 to 780 of the eight types of driving system wirings.

  The output electrodes 710 and 720 and the input electrodes 510 and 520 are electrically connected by bonding wires 610 and 620, respectively. The input electrodes 510 and 520 are electrically connected to each pixel electrode of each pixel column in the Y direction in the sub-pixel region of the pixel region 400 by wirings 510a to 580a and the like.

  Wiring by the input electrodes 510 and 520 including the electrode pad portion is referred to as peripheral wiring, and is connected from the input electrodes 510 and 520 to each pixel electrode of each pixel column in the Y direction in the sub-pixel region of the pixel region 400. The wirings 510a to 580a are referred to as internal wirings. Further, the wiring resistance between the pixels is referred to as pixel wiring resistance.

  FIG. 14 is a cross-sectional view schematically showing the configuration of the cross section along line AA in FIG. As shown in FIG. 14, an insulating film 24 is formed on the semiconductor substrate 25, and a plurality of internal wirings 510 a, 520 a, 510 b, 520 b and peripheral wirings for the input electrode 530 are arranged in the insulating film 24. Since the internal wirings 510a, 520a, 510b, and 520b and the input electrodes 530 of the peripheral wirings have different wiring layers, they are electrically connected at portions connected by contact holes (not shown). Note that for simplification and clarification of the drawing, in FIG. 14, display of cross sections of the semiconductor substrate 25, the insulating film 24, the wiring 510 a and the like and the input electrode 530 is omitted.

JP 2001-345441 A JP 2009-49146 A JP 2011-239278 A

  As shown in FIG. 13, the output electrode 710 is connected to the electrode pad portion of the input electrode 510 via the bonding wire 610. A wiring 510a for one phase (φPG1) of the drive signal is connected from this electrode pad portion to each pixel in each of the pixel columns in which 10 pixels and 410 pixels are arranged in the X direction and Y direction, respectively.

  Further, as shown in FIG. 13, from a narrow wiring portion extending in the X direction from the electrode pad portion, 1 of the drive signal is supplied to each pixel of each pixel column adjacent to the pixel column to which the wiring 510a is connected. A wiring 510b for the phase (φPG1) is connected. This adjacent pixel column is a pixel column in which 10 pixels and 410 pixels are arranged in the X direction and the Y direction, respectively.

  As shown in FIG. 13, each wiring 510a is connected to the end face of the electrode pad portion on the side close to the pixel region 400. Therefore, the lower end surface of the electrode pad portion of the input electrode 510 is closer to the pixel region 400 side than the left end surface as it goes to the right in the X direction.

  Further, as can be seen from FIG. 12, the lower end surface of the narrow wiring portion extending in the X direction from the electrode pad portion is shifted to the right side from the position shifted upward from the right end in the X direction of the lower end surface of the electrode pad portion. As it goes, it is closer to the pixel region 400 side than the shifted position.

  Thus, the position of the lower end face of the electrode pad portion and the narrow wiring portion approaches the pixel region 400 side as it goes to the right in the X direction.

  For this reason, the length of the left pixel column wiring 510a on the lower end face of the electrode pad portion is gradually shorter than the length of the right pixel column wiring 510a on the end face.

  The length of the right wiring 510b among the wirings 510b connected to the lower end surface of the narrow wiring portion extending in the X direction from the electrode pad portion is gradually shorter than the length of the left wiring 510b. Yes.

  On the other hand, the output electrode 710 and the electrode pad portion of the input electrode 510 are connected by a single bonding wire 610, and the electrode pad portion and the wiring portion extending from the electrode pad portion are sufficient for the amount of current passing. Has a cross-sectional area. For this reason, the electrical resistance value from the output electrode 710 to each wiring 510a, 510b is substantially the same.

  Accordingly, the difference in resistance value of the wiring from the input electrode 510 to each pixel electrode in each pixel column in the sub-pixel area of the pixel area 400 is determined by the difference in length between the wirings 510a and 510b. That is, if the length of each of the wirings 510a and 510b is large, the resistance value of the wiring from the bonding wire 610 to each pixel electrode of each pixel column in the sub-pixel region of the pixel region 400 increases.

  FIG. 15 shows the wiring from the bonding wire 610 in one block (subpixel region) of the pixel region 400 of the image sensor shown in FIG. 12 to each pixel electrode of each pixel column in the Y direction of the subpixel region of the pixel region 400. The result of measuring the resistance value shows the relationship between the position of each pixel in each pixel column and the resistance value of the wiring to each pixel.

  In FIG. 15, the wiring is specified by the drive signal. That is, for example, a wiring for supplying the drive signal φPG1 to each pixel is represented as “PG1”.

  The resistance value of the wiring includes the resistance value of the peripheral wiring and the internal wiring and the pixel wiring resistance. The pixel means an optical element and a CCD memory element for the optical element.

  Referring to the graph of FIG. 15, when a waveform indicating the resistance value of the wiring relating to the output electrode 710 (φPG1) is seen, in FIG. 13, the position of the pixel column in the X direction is from the first column to the tenth column. The resistance value of the wiring relating to 710 (φPG1) gradually decreases.

  As described above, as shown in FIG. 15, the resistance value from the first column to the tenth column of the pixel column gradually decreases as shown in FIG. This corresponds to the fact that the length of each wiring 510a connected to the end surface becomes shorter toward the right side of the lower end surface of the electrode pad portion.

  Further, as can be seen from FIG. 15, when the pixel position is between the 10th column and the 11th column, the resistance value of each wiring greatly changes from about 217 ohms to about 276 ohms. When the pixel position is from the 11th column to the 80th column, the resistance value of each wiring decreases linearly.

  In this way, the pixel position is between the 10th column and the 11th column, and the resistance value is greatly different from the wiring connected to the pixel in the 10th column is the wiring 510a. The wiring connected to the pixels in the eleventh column corresponds to a wiring 510b longer than that.

  Further, the resistance values of the respective wirings in the pixel column positions from the 11th column to the 80th column are gradually decreased because each of the wirings connected to the lower end face of the wiring portion extending from the electrode pad portion. This corresponds to the fact that the length of the wiring 510b becomes shorter toward the right side of the lower end face of the wiring portion.

  The resistance value of the wiring connected to the output electrodes 720, 730, etc. from which the other output pulses PG2, M1, etc. are output is also from the bonding wire 610 connected to the output electrode 710 to the pixel column in the pixel region 400. Similar to the resistance value of the wiring, the resistance value of the wiring connected to the electrode pad portion and the resistance value of the wiring connected to the narrow wiring portion extending to the right in the X direction from the electrode portion as shown in FIG. As shown in FIG. 15, the transition portion is greatly different, and the other portions are reduced to the right.

  As described above, according to the conventional device, even in the pixel columns connected to the common input electrode, if the positions of the pixel columns are different, the resistance values of the wirings to the pixel electrodes are different from each other. As a result, the RC time constant, which is the product of the resistance of the pixel wiring and the electrode capacitance, differs according to the difference in the position of the pixel column.

  Thus, if the RC time constant of the wiring differs depending on the position of the pixel column, the amount of voltage drop varies depending on the pixel column when the period of the rectangular wave voltage waveform for driving the pixel electrode is shortened. As a result, the amount of charge transfer during high-speed driving differs for each pixel column, causing vertical stripe noise on the screen.

  Further, in the conventional device, since the input electrode has an electrode pad portion, the wiring from the input electrode to the pixel electrode of the pixel column has to be long, and the resistance value of the wiring is relatively high. This is one of the factors that hinder the increase in the imaging speed of the back-illuminated pixel peripheral recording type imaging device.

  Therefore, an object of the present invention is to provide a pixel peripheral recording type image pickup device that can not only suppress vertical stripe noise but can further improve the photographing speed.

  The imaging device of the present invention includes a plurality of light receiving elements arranged in a matrix in the X direction and the Y direction, a plurality of memories directly connected to each light receiving element, and a light receiving signal recorded in the memory. A pixel peripheral recording type imaging device having a pixel region including a circuit and whose operation at the time of imaging is controlled by a drive signal supplied from an external drive circuit, wherein the pixel region is in an X direction, a Y direction, or an X direction And each of the sub-pixel regions divided in the Y direction has a bonding pad for inputting the drive signal at one end in the Y direction, and the plurality of light receiving elements included in the sub-pixel region from the bonding pad, The sub-pixel region from the bonding pad of a drive signal wiring that is a wiring for supplying the drive signal to a plurality of memories and the readout circuit Wherein the plurality of light receiving elements in the Y direction end, and wherein the equal length to the plurality of memory and the readout circuitry.

  With this configuration, the imaging element of the present invention can not only suppress vertical stripe noise but also can further improve the shooting speed.

  In the imaging device of the present invention, the number of drive electrodes is the same as the number of drive signals for supplying the drive signals to the plurality of light receiving elements, the plurality of memories, and the readout circuit, The driving signal electrode extends in the X-direction full width of the sub-pixel region and is arranged in parallel between the bonding pad and the sub-pixel region, and the driving signal wiring includes the bonding pad and the driving signal electrode. You may make it consist of the surrounding wiring to connect, and the internal wiring which connects the said drive signal electrode, the said several light receiving element, these memories, and the said read-out circuit.

  In the imaging device of the present invention, the bonding pad and the drive signal electrode may be connected by a plurality of peripheral wires.

  In the imaging device of the present invention, the imaging device includes the light receiving device formed on the back surface of the semiconductor substrate, the memory and the readout circuit formed on the surface of the semiconductor substrate, and at least one layer on the surface. A back-illuminated type in which wiring layers are laminated may be used.

  According to the present invention, it is possible to provide a pixel peripheral recording type image pickup device that can not only suppress vertical stripe noise but also can further improve the photographing speed.

1 is a plan view schematically showing a structure of a pixel peripheral recording type image pickup device according to an embodiment of the present invention viewed from the surface side. FIG. 3 is a plan view schematically illustrating a wiring configuration around one block among eight divided blocks of the pixel peripheral recording type image pickup device according to the embodiment of the present invention. It is the top view which modeled the structure which looked at the one part block of one block among the blocks divided into 8 of the pixel periphery recording type image pick-up element which concerns on one embodiment of this invention from the surface side. FIG. 3 is an equivalent circuit diagram for one phase of a CCD memory of one block among eight divided blocks of a pixel peripheral recording type image pickup device according to an embodiment of the present invention. FIG. 3 is an enlarged plan view schematically illustrating a wiring configuration around two types of wiring in one block among eight divided blocks of the pixel peripheral recording type image pickup device shown in FIG. 2. 2 shows the relationship between the resistance value from one bonding wire to each pixel electrode and the position of the pixel column in the eight divided blocks of the pixel peripheral recording type imaging device according to the embodiment of the present invention shown in FIG. FIG. It is a figure which shows the example of an imaging at 16.7 million pieces / second by the pixel periphery recording type imaging device which concerns on one embodiment of this invention. It is a figure which shows the gray scale of the example of imaging at 16.7 million sheets / second by the pixel periphery recording type imaging device which concerns on one embodiment of this invention shown in FIG. It is a drive voltage waveform diagram of a predetermined circuit portion when imaging at 16.7 million images / second is performed by the pixel peripheral recording type imaging device according to the embodiment of the present invention. It is a figure for demonstrating the imaging speed dependence of a saturation signal level. It is a figure for demonstrating the relationship between the pixel count of various kinds of high-speed image sensors including the pixel periphery recording type image sensor which concerns on one embodiment of this invention, and an imaging speed. It is the top view which modeled the wiring structure around 1 block of the pixel part of the conventional pixel periphery recording type image pick-up element. FIG. 13 is a plan view schematically showing a wiring configuration around two types of wiring portions of a package portion in one block of a pixel portion of the conventional pixel peripheral recording type imaging device shown in FIG. 12. FIG. 14 is a cross-sectional view schematically showing a configuration of a cross section taken along line AA in FIG. It is a figure for demonstrating the relationship between the resistance value from the bonding wire of 1 block of each pixel part of the pixel part of the conventional pixel periphery recording type image pick-up element shown in FIG. 12, and each pixel electrode, and the position of a pixel.

  Hereinafter, an ultra-high-speed backside-illuminated pixel peripheral recording type imaging device according to an embodiment of the present invention will be described.

  FIG. 1 is a plan view schematically showing the configuration of a back-illuminated pixel peripheral recording type image pickup device 20 viewed from the front side. The back-illuminated pixel peripheral recording image pickup device 20 has a pixel region 40 composed of a plurality of pixels.

  The pixel region 40 is divided into four in the X direction (left and right direction toward FIG. 1), and further divided into two in the Y direction (up and down direction toward FIG. 1), and is divided into eight subpixel regions. . The upper and lower portions of the pixel peripheral recording type image pickup device 20 divided in the vertical direction from the center of the pixel region 40 have a mirror configuration with the center as a boundary.

  For this reason, the drive circuit 10 is connected to each sub-pixel region of the pixel peripheral recording type image pickup device 20, but from the viewpoint of simplification of the drawing, the drive circuit for the upper four divided blocks in FIG. 10 is shown, and the drive circuit of the lower four divided block is not shown.

  Further, as will be described in detail later, a plurality of bonding pads 30 are provided for each sub-pixel region, and the bonding pads 30 and the driver circuits 12 are connected by bonding wires 60, respectively. From the standpoint of realizing, only a part of the bonding pad 30 and the bonding wire 60 are shown and others are omitted.

  Hereinafter, the description of the drive circuit 10 is also applied to the lower four blocks of the pixel region 40 (not shown).

  The drive circuit 10 includes an FPGA (Field Programmable Gate Array) 11 and a driver circuit 12. The FPGA 11 is configured to generate and output timing pulses TP1 to TP4 having a voltage amplitude of about 3.3 Vp-p, for example.

  The driver circuit 12 includes driver circuits 12a to 12d, and each driver circuit has eight types of drive system signals, that is, an exposure pulse φPG1, φPG2, an accumulation transfer pulse φM1, φM2, φM3, φM4, and a vertical signal. An output unit (not shown) for outputting transfer pulses φV2 and φV4 is provided.

  The pixel peripheral recording type image pickup device 20 includes a semiconductor substrate 25 and a pixel region 40 in which 320 pixels and 760 pixels are arranged in the X direction and the Y direction, respectively.

  The pixel area 40 is divided into eight blocks of subpixel areas, and each subpixel area has a configuration in which 80 pixels and 380 pixels are arranged in the X direction and the Y direction, respectively. Each sub-pixel region is driven by each driver circuit 12a to 12d.

  A bonding pad 30 and a drive signal electrode unit 50 are provided at a position on the semiconductor substrate 25 facing the driver circuit 12 in the Y direction of the pixel in the pixel region 40. The drive signal electrode unit 50 includes drive signal electrodes 51 to 58 (FIG. 2).

  The driver circuits 12a to 12d include output electrodes 71 to 78 (FIG. 2), which will be described later, and the output electrodes 71 to 78 and the bonding pad 30 are connected by a single bonding wire 60, respectively.

  As will be described in detail later, the bonding pads 31 to 38 and the drive signal electrodes 51 to 58 are connected by a plurality of wirings.

  On the semiconductor substrate 25, there are provided an HCCD 46 for horizontal reading for reading out signal charges from the pixels of each block in the Y direction, and an amplifier 46a for taking out signal charges from the HCCD.

  As described above, the pixel area 40 shown in FIG. 1 includes 320 × 760 pixels arranged in a matrix in the X direction and the Y direction, and is divided into eight blocks of subpixel areas. Each sub-pixel region includes 80 × 380 pixels, and partially includes the pixel structure shown in FIG. 3.

  FIG. 2 is a plan view schematically showing a wiring configuration (shown by “B” in FIG. 1) around one sub-pixel region of the back-illuminated pixel peripheral recording type imaging device according to the embodiment of the present invention. The figure is shown.

  The wiring configuration around the sub-pixel region shown in FIG. 2 is a configuration in which the output electrodes 71 to 78 provided in the package 70 of the driver circuit 12a and the drive signal electrode unit 50 are connected.

  The output electrodes 71 to 78 are eight kinds of drive system signals generated from a pulse generator (not shown) of the driver circuit 12a, that is, exposure pulses φPG1, φPG2, accumulation transfer pulses φM1, φM2, φM3, φM4, and vertical transfer pulses. The electrodes output φV2 and φV4.

  The drive signal electrode unit 50 includes drive signal electrodes 51 to 58. The drive signal electrodes 51 to 58 are made of, for example, an aluminum film, and are aluminum wirings that extend in the horizontal direction and are arranged in parallel to each other.

  The drive signal electrodes 51 to 58 are connected to the bonding pads 31 to 38 by wiring, as will be described later. Note that the set of drive signal electrodes 51 to 58 is electrically disconnected from the drive signal electrode of the adjacent block, and each block is driven by a separate driver circuit.

  The bonding pads 31 to 38 and the drive signal electrodes 51 to 58 constitute a peripheral wiring portion.

  The output electrodes 71 to 78 are connected to bonding pads 31 to 38 via bonding wires 61 to 68, respectively.

  Further, as described later, the drive signal electrodes 51 to 58 are electrically connected to the respective electrodes in the pixel region 40 by tungsten wirings 51a to 58a, tungsten wirings 51b to 58b, etc. for each vertical column of pixels. (See FIG. 5).

  FIG. 3 is a plan view schematically showing the structure of a part of the pixel region 40 (shown by “C” in FIG. 1) of the back-illuminated pixel peripheral recording image pickup device 20 as viewed from the front side.

  As shown in FIG. 3, the optical element of each pixel has a pixel width Pw and a pixel length pd. Each pixel includes a charge collection gate 1 (CG1) 41, a charge collection gate 2 (CG2) 42, an overflow drain gate (OFD) 43, a drain 44, a skewed linear CCD memory 45, a merge unit 47, and an overwrite gate 48. Prepare.

  The overwriting gate 48 for each pixel is connected to a VCCD 49 for vertical reading provided for each pixel column, the VCCD 49 for vertical reading is connected to an HCCD 46 for horizontal reading, and the HCCD 46 for horizontal reading is It is connected to an amplifier 46a for signal extraction.

  FIG. 4 is an equivalent circuit diagram of the CCD memory 1 phase in one sub-pixel region of the pixel peripheral recording type image pickup device 20 including the drive circuit 10. One sub-pixel region is composed of 80 pixels and 380 pixels in the X direction and the Y direction, respectively. The equivalent circuit includes an FPGA 11, a driver circuit 12, and one subpixel region 13.

  One sub-pixel region 13 is composed of a peripheral wiring resistance Rs, an internal wiring resistance Ri, a pixel wiring resistance Rp, and an electrode capacitance Qg for each pixel column in the Y direction from the viewpoint of electrical elements. The total value of the peripheral wiring resistance Rs and the internal wiring resistance Ri for each pixel column in the Y direction is constant.

  From the viewpoint of pixel connection, a pixel group 16 in which 10 pixels are arranged in the X direction constitutes a pixel group 15 that is arranged in 380 columns in the Y direction, and this pixel group 15 is arranged in 8 rows in the X direction (14-1 To 14-8) One sub-pixel region 13 is formed.

  FIG. 5 is a schematic diagram for explaining a part of the output electrodes 71 to 78 of the eight types of drive system wirings shown in FIG. Some of the wirings are wirings from the output electrodes 71 and 72 of the two types of exposure pulses φPG1 and φPG2 among the eight types of driving system wirings to the pixel electrodes of each pixel column in the pixel region 40. is there.

  The output electrodes 71 and 72 are connected to the bonding pads 31 and 32 by bonding wires 61 and 62. The bonding pads 31 and 32 to the drive signal electrodes 51 and 52 are wired by a plurality of wirings 50a and 50b. The wiring connecting the bonding pads 31 and 32 and the drive signal electrodes 51 and 52 is referred to as a peripheral wiring.

  In the present embodiment, by separating the bonding pads 31 and 32 and the drive signal electrodes 51 to 58, the width in the arranged direction (width in the vertical direction) is widened, and the resistance value of the drive signal electrode is reduced. ing.

  The drive signal electrodes 51 and 52 to the pixel electrodes of the pixel columns in the pixel region 40 are connected by wirings 51a and 52a. This wiring is called internal wiring. Further, the wiring resistance between the pixels is referred to as pixel wiring resistance.

  As shown in FIG. 5, the electrical connection from the bonding pad 31 to each pixel electrode of each pixel column in the pixel region 40 includes a plurality of peripheral wirings 50a from the bonding pad 31 to the drive signal electrode 51, and a drive signal. This is achieved by the wiring 51 a from the electrode 51 to each pixel electrode of each pixel column in the pixel region 40.

  As shown in FIG. 5, the electrical connection from the bonding pad 32 to each pixel electrode of each pixel column in the pixel region 40 includes a plurality of peripheral wirings 50 b from the bonding pad 32 to the drive signal electrode 52, and This is achieved by the wiring 52 a from the drive signal electrode 52 to each pixel electrode of each pixel column in the pixel region 40.

  Thus, the bonding pad is connected to the corresponding drive signal electrode. For this reason, the length of the wiring connecting the bonding pads 31 and 32 and the drive signal electrodes 51 and 52 is different for each drive signal.

  On the other hand, as shown in FIG. 5, the wiring 50 b that connects the bonding pad 32 and the drive signal electrode 52 is longer than the wiring 50 a that connects the bonding pad 31 and the drive signal electrode 51. However, the wiring 52a from the driving signal electrode 52 to each pixel electrode of each pixel column in the pixel region 40 is equal to the length of the wiring 50b from the driving signal electrode 51 to each pixel column in the pixel region 40. It is shorter than the wiring 51a to each pixel electrode.

  Therefore, in the imaging element shown in FIG. 5, the total length of one wiring 50a and wiring 51a is equal to the total length of the other wiring 50b and wiring 51b. In other words, a drive that is a wiring from the bonding pads 31 and 32 to each pixel electrode of each pixel column in the pixel region 40 regardless of the combination of connection between the drive signal electrodes 51 and 52 and the internal wirings 51a and 52a. The total length of the signal wiring is constant.

  Since the bonding pads 31 and 32 to the drive signal electrodes 51 and 52 are connected by a plurality of peripheral wirings 50a and 50b, the resistance value from the bonding pads 31 and 32 to the drive signal electrodes 51 and 52 is determined by bonding. This can be made lower than the case where the pads 31 and 32 to the drive signal electrodes 51 and 52 are connected by a single bonding wire.

  6 shows the wiring from the bonding wire 61 of one block (subpixel region) of the pixel region 40 of the image sensor shown in FIG. 2 to each pixel electrode of each pixel column in the Y direction of the subpixel region of the pixel region 40. The result of measuring the resistance value shows the relationship between the position of each pixel in each pixel column and the resistance value of the wiring to each pixel.

  In FIG. 6, the wiring is specified by the drive signal. That is, for example, a wiring for supplying the drive signal φPG1 to each pixel is represented as “PG1”.

  The resistance value of the wiring includes the resistance value of the peripheral wiring and the internal wiring and the pixel wiring resistance. The pixel means an optical element and a CCD memory element for the optical element.

  The positions of the pixel columns are numbered 1 to 80 for each pixel column from the left side in the X direction to the right side in the sub-pixel region shown in FIG.

  As described above, in the pixel peripheral recording type imaging device 20 shown in FIG. 5, the length of the wiring from the bonding pads 31 and 32 to each pixel electrode of each pixel column in the pixel region 40 is divided into pixel groups for each pixel column. It is constant regardless.

  According to FIG. 6, the resistance value of the wiring from the bonding wire 61 or the like connected to the output electrode 71 or the like to which the driving pulse PG1 or the like is output to each pixel electrode of each pixel column of the pixel unit 40 is related to the position of the pixel. Each is almost constant. The difference in the resistance value of each wiring corresponds to the difference in the length of the wiring accompanying the difference in the position of the drive signal electrode to which each wiring is connected.

  Further, the maximum resistance value of the wiring is the value of the wiring to which the driving pulse PG1 is input, and is about 160 ohms. On the other hand, as shown in FIG. 15, in the conventional apparatus, the maximum value of the resistance value of the wiring is the value of the wiring to which the drive pulse PG1 is input, and is about 278 ohms.

  As described above, according to the back-illuminated pixel peripheral recording type image pickup device 20 according to the present embodiment, the length of the wiring from the bonding pads 31 and 32 to each pixel electrode of each pixel column in the pixel region 40 is set to the pixel. Not only can it be constant for each column, but the maximum resistance value of the wiring can be reduced from about 278 ohms to about 160 ohms, about 58% thereof.

  FIG. 7 shows an example of imaging at 16.7 million images / second of the backside illuminated pixel peripheral recording type imaging element 20 according to the present embodiment. This image pickup device 20 is a pixel peripheral recording type image pickup device having a slanted linear CCD memory, and is a back-illuminated type, and is driven in 8 divisions and greatly reduces the resistance of the wiring as described above.

  The shooting speed was 16.7 million frames / second, and the gray scale shown in FIG. 8 was shot. FIG. 7 shows a photographed gray scale. In FIG. 7, the white circular portion is due to the reflection of strobe light emission.

  FIG. 9 shows a charge collection gate 2 (CG2) 42, an overflow drain gate (OFD) 43, and a CCD memory 3 of the pixel peripheral recording type image pickup device when image pickup is performed at 16.7 million images / second, which is shown in FIG. The measurement result of the drive voltage waveform of (M3) is shown.

  As shown in FIG. 9, when operating with a driving pulse of one period of 60 nanoseconds, driving voltage waveforms appear in CG2 and M3. 16.7 million frames / second is a photographing speed when operated with a driving pulse of 60 nanoseconds per cycle. Thus, the fact that the imaging of FIG. 7 has been performed is also because the driving voltage waveforms of CG2 and M3 appear when operating with a driving pulse of one period of 60 nanoseconds as shown in FIG. it is obvious.

  The drive voltage waveforms of CG2 and M3 are voltage waveforms with a duty ratio of 50%, and the phase of the drive voltage waveform of M3 is slightly delayed from the phase of the drive voltage waveform of CG2. A constant voltage is applied to the drive voltage waveform of the OFD.

  FIG. 10 shows the measurement result of the saturation signal level with respect to the photographing speed due to the difference in elements. From this, it is understood that the saturation signal level of the element depends on the photographing speed. That is, FIG. 10 shows what percentage of the saturation signal level at each photographing speed by different elements when the saturation signal level at 10,000 frames / second is 100%.

  From FIG. 10, it can be seen that the saturation signal level is zero at the imaging speed of 16.7 million images / second in the surface irradiation type 1 and 2 elements. In contrast, the back-illuminated type 3 element maintains a saturation signal level of 100% even at a shooting speed of 16.7 million frames / second. The back-illuminated type 3 element is the back-illuminated pixel peripheral recording type image sensor 20 according to the present embodiment.

  Note that the measurement shown in FIG. 10 was performed by extracting the signal level of a region where the light intensity is high and the video signal is saturated as the saturation signal level at each photographing speed. Further, the saturation signal level at each photographing speed was standardized by the saturation signal level at 10,000 frames / second.

  FIG. 11 is a graph showing the relationship between the number of pixels of various high-speed image sensors and the shooting speed. As a performance index indicating the characteristics of the high-speed image sensor, the value of the number of pixels × shooting speed is used. The unit is pixels / second. There are a continuous readout type and a pixel peripheral recording type in the imaging device.

  The continuous readout type has a characteristic that the number of pixels that can be read out decreases when the imaging speed is increased. For this reason, in the graph of FIG. 11, the line connecting the upper left and the lower right indicates the characteristics of the same image sensor. As a result, in the continuous reading type, the number of pixels, which is a performance index × shooting speed, becomes almost the same value.

  On the other hand, in the pixel peripheral recording type, the performance depends on the maximum number of pixels and the maximum shooting speed. The graph shows one point of maximum performance. In FIG. 11, the higher the performance is, the higher the performance becomes.

  The back-illuminated pixel peripheral recording type image sensor 20 according to the present embodiment is shown as “diamond 3” of the element 3 of the E company in FIG. 11, and has a number of pixels of 760 pixels in the vertical direction × 411 pixels in the horizontal direction. It has a total of 31360 pixels. Since the maximum photographing speed of the pixel peripheral recording type image pickup device 20 is 16.7 million images / second, the performance index is 5.2 terapixels / second.

  Therefore, the back-illuminated pixel peripheral recording type imaging element 20 has the highest performance among the elements shown in FIG. 11 as a solid-state imaging element from the viewpoint of photographing speed and the number of pixels.

  Thus, according to the backside illumination type pixel peripheral recording type image pickup device 20 according to the present embodiment, the number of pixels × shooting speed, which is a performance index of the solid-state image pickup device, can be increased.

  Further, according to the back-illuminated pixel peripheral recording type image pickup device 20 according to the above-described embodiment, the length of the wiring from the bonding pads 31 and 32 to each pixel electrode of each pixel column in the pixel region 40 is determined by the pixel column. Can be constant for each.

  As a result, the amount of charge transfer during high-speed driving is constant for each pixel column, and noise can be prevented from being generated on the screen.

  Further, since the bonding pads 31 and 32 to the drive signal electrodes 51 and 52 are connected by a large number of wirings 50a and 50b, the bonding pads 31 and 32 are connected to the drive signal electrodes 51 and 52 in the pixel region 40 via the drive signal electrodes 51 and 52. The resistance value of the wiring to each pixel electrode of each pixel column can be reduced.

  As a result, the imaging speed can be further improved.

  The resistance values and the like of the wirings listed when describing the above-described embodiment of the present invention are merely examples, and are not intended to exclude values other than the numerical values. Further, although the embodiment of the present invention has been described with respect to the peripheral wiring portion of the back-illuminated pixel peripheral recording image pickup device, the present invention is not limited to the specifically disclosed embodiment, Various modifications and changes can be made without departing from the scope of the claims.

10 drive circuit 11 FPGA
12, 12a to 12d Driver circuit 13 1 block of element (sub-pixel region)
20 pixel peripheral recording type image pickup device 24 insulating film 25 semiconductor substrate 30, 31 to 38 bonding pad 40 pixel region 46 HCCD
46a Amplifier
48 Overwrite gate 49 VCCD
50 drive signal electrode 50a, 50b wiring (peripheral wiring) (driving signal wiring)
51-58 Drive signal electrodes 51a-58a Tungsten wiring (internal wiring) (drive signal wiring)
51b to 58b Tungsten wiring (internal wiring) (drive signal wiring)
60, 61-68 Bonding wire 70 Package 71-78 Output electrode 120a Driver circuit 400 Pixel region 500 Input electrode part 510-580 Input electrode 510a-580a Tungsten wiring 510b-580b Tungsten wiring 610-680 Bonding wire 700 Package 710-780 Output electrode

Claims (4)

A pixel area including a plurality of light receiving elements arranged in a matrix in the X direction and the Y direction, a plurality of memories directly connected to each light receiving element and recording a light reception signal, and a readout circuit for reading the light reception signal recorded in the memory. In addition, a pixel peripheral recording type image pickup device whose operation at the time of image pickup is controlled by a drive signal supplied from an external drive circuit,
A bonding pad for inputting the drive signal to one end of the Y direction for each sub-pixel region obtained by dividing the pixel region in the X direction or the Y direction or the X direction and the Y direction;
The sub-pixel region from the bonding pad of the drive signal wiring that is a wire for supplying the drive signal to the plurality of light receiving elements, the plurality of memories, and the readout circuit included in the sub-pixel region from the bonding pad An image sensor having the same length to the plurality of light receiving elements, the plurality of memories, and the readout circuit at the other end in the Y direction. To supply the drive signals to the plurality of light receiving elements, the plurality of memories, and the readout circuit, the same number of drive electrodes as the number of the drive signals, each extending to the full width in the X direction of the sub-pixel region A driving signal electrode disposed in parallel between the bonding pad and the sub-pixel region;
The drive signal line includes a peripheral line that connects the bonding pad and the drive signal electrode, and an internal line that connects the drive signal electrode to the plurality of light receiving elements, the plurality of memories, and the readout circuit. The imaging device according to claim 1. The imaging device according to claim 2 , wherein the bonding pad and the drive signal electrode are connected by a plurality of peripheral wirings.   The imaging element is a back-illuminated type in which the light receiving element is formed on the back surface of a semiconductor substrate, the memory and the readout circuit are formed on the surface of the semiconductor substrate, and at least one wiring layer is stacked on the surface. The imaging device according to any one of claims 1 to 3.