JP6115435B2 - Image processing apparatus and program - Google Patents

Description

  The present invention relates to an image processing apparatus and a program.

  For example, in a print data generation system that generates raster image data to be supplied to a printer from print data described in a page description language or the like, a portion suitable for hardware processing is included in a hardware image processing device (hardware). Often implemented as an accelerator). In this type of system, data generated by software processing by the CPU of the print data generation system is read into an input buffer of an image processing apparatus that is a hardware accelerator. The input data read into the input buffer is read and processed by a circuit for image processing in the image processing apparatus. Data resulting from the processing by the circuit is held in the output buffer, and is supplied from the output buffer to software that performs downstream processing.

  In the conventional image processing apparatus of this type, the sizes of the input buffer and the output buffer are fixed.

  On the other hand, image processing performed by the image processing apparatus includes processing for each image object. For example, a process of rasterizing an image object expressed in intermediate language data such as a display list on a base image (a process of drawing as a raster image) is an example. In this processing, the data of the portion corresponding to the image object in the background image is read into the input buffer. The circuit for image processing rasterizes the intermediate language data of the image object, and multiplies the value of each pixel of the rasterized result with the value of the corresponding pixel of the background image read from the input buffer (in the case of overprinting). .

  Since the image processing apparatus performs image processing after reading data for the buffer size once into the input buffer, if the size of the image object to be processed does not match the buffer size, useless data not to be processed is stored in the buffer. Will be read. If there is a lot of useless data reading, the time required for image processing will be unnecessarily increased by the time required for the reading.

  As a conventional technique related to buffer control in an image processing apparatus, a technique disclosed in Patent Document 1 is known.

  Patent Document 1 discloses a technique for controlling an input buffer in accordance with the state of an output buffer in order to reduce the time required to perform image processing on image data read from a memory and store the image processing result in the memory. ing. In this technique, if any of the plurality of output line memories is in an idle state that is not in a data input waiting state, a data input state, or a data output state, one of the input line memories in the input buffer Output from is allowed. It is highly probable that the output line memory is empty, and the output waiting time for outputting image data from the input line memory can be shortened.

JP 2011-205176 A

  In an image processing apparatus that performs image processing for each image object, the amount of wasted data that is read into the input buffer but is not used for image processing is made smaller than when the size of the input buffer that holds input data is fixed. For the purpose.

  According to the first aspect of the present invention, there is provided an input buffer, an image processing circuit that executes image processing using input data input from the outside and held in the input buffer, and a size of data corresponding to an image object to be processed. Obtaining means for obtaining, calculating means for calculating an optimum size of a portion used for holding data corresponding to the image object in the input buffer based on the size obtained by the obtaining means, and for the input buffer, An image processing apparatus comprising: reading control means for controlling to read data of the optimum size as the input data corresponding to the image object from the outside.

  According to a second aspect of the present invention, in the case where the use size of the input buffer is changed by unit size, the calculation unit has a minimum remainder obtained by dividing the size of data corresponding to the image object by the use size. The image processing apparatus according to claim 1, wherein a use size of the input buffer is an optimum size of the input buffer corresponding to the image object.

  The invention according to claim 3 is characterized in that, when there are a plurality of use sizes that minimize the remainder, the calculating means determines the maximum one of the plurality as the optimum size. The image processing apparatus described in the above.

  According to a fourth aspect of the present invention, when the size of data corresponding to the image object is equal to or smaller than the upper limit size of the input buffer, the calculation unit determines the size of data corresponding to the image object as the optimum size. The image processing apparatus according to claim 1, wherein:

  According to the fifth aspect of the present invention, the computer stores the data corresponding to the image object among the acquisition means for acquiring the size of the data corresponding to the image object to be processed, and the input buffer for holding the input data for the image processing circuit. The calculation unit for calculating the optimum size of the portion used for the acquisition based on the size acquired by the acquisition unit, and reading the data of the optimal size from the outside as the input data corresponding to the image object to the input buffer It is a program for functioning as a read control means for controlling the above.

  According to the first, second, fourth, and fifth aspects of the invention, the amount of useless data that is read into the input buffer but is not used for image processing is smaller than when the size of the input buffer that holds the input data is fixed. Can also be reduced.

  According to the third aspect of the present invention, the number of times of reading the data corresponding to the same image object into the input buffer by the optimum size is reduced, and the processing time of the read request is less than when not using the present invention. As a result, the time required to read all the data is reduced.

It is a figure for demonstrating the dummy data in case the size of an object is smaller than bank size. It is a figure for demonstrating the dummy data in case the size of an object is larger than bank size. It is a figure for demonstrating the relationship between an object and a bounding box. It is a figure which shows the example of a function structure of the image processing apparatus of embodiment. It is a figure which shows an example of the process sequence of the optimal bank size calculation part. It is a figure for demonstrating the shortening effect of the reading time of image data at the time of using the optimal bank size calculation of embodiment.

  First, with reference to FIGS. 1 to 3, problems of the conventional method (buffer size fixed) will be described. Hereinafter, a case where the image processing apparatus reads and processes raster image data in units of objects will be described as a representative example.

  For example, when converting (rasterizing) print data of a page expressed in an intermediate data format into raster format image data that can be handled by the printer, each object is rasterized in the order of appearance of the objects in the print data of the page. . Thereby, the overlapping order is rasterized in order from the lower object. When such rasterization is realized by a hardware circuit, considering the case where objects overlap each other, the circuit first reads a raster image of a portion serving as a background of the object to be rasterized from the page memory, and then the raster image of the background The rasterization result of the target object is written above, and the raster image of the writing result is written back to the page memory. The image on the page memory after this rewriting is the background image for the next object. By repeating such processing for each object in order from the top object in one page, a raster image for one page is formed.

  The intermediate data format is a data format that expresses an image with an intermediate granularity between the page description language and the raster format, and a display list is an example. The intermediate data format is generally suitable for processing in a hardware circuit. The object in the image data in the intermediate data format is generally obtained by dividing the object in the page description language data into a plurality of units, and the object in the intermediate data format is a smaller unit than the object in the page description language data.

  An image processing apparatus that executes such rasterization processing with a hardware circuit is connected as a hardware accelerator to, for example, a computer that converts print data in a page description language format into raster image data. That is, in this example, the computer converts the print data in the page description language format into an intermediate data format by software processing, and the image processing apparatus, which is a hardware accelerator, converts the print data in the intermediate data format as a conversion result into a raster format. Convert to. In this case, the image processing apparatus receives the print data in the intermediate data format held on the main memory of the computer, rasterizes the print data for each object, and the page memory in which the rasterization result is secured on the same main memory. Write to the area. Here, since the objects may overlap, in the rasterizing process, as described above, the background image is read from the page memory area for each object, and the rasterization result of the object is written on the background image for each pixel. It will be.

  For this reason, the image processing apparatus reads, from the page memory, an image of a portion serving as a background of an object to be rasterized into a built-in input buffer. The value of each pixel obtained by rasterizing the object is combined with the value of the corresponding pixel in the background image read from the input buffer (for example, the former is overwritten with the former or the former is multiplied with the latter). Thus, a raster image reflecting the rasterization result of the object is obtained. An image obtained as a result of the rasterizing process by the image processing apparatus is written in an output buffer built in the image processing apparatus. When the rasterization process for an object is completed, raster image data held in the output buffer is written back to the page memory area managed by the host computer.

  Here, in this type of image processing apparatus, an input buffer and an output buffer are each configured as a double buffer, and the time required for writing to the buffer is concealed by performing a ping-pong operation on both. Hereinafter, the two buffers constituting the double buffer are also referred to as “banks”. In the ping-pong operation, while reading from one of the two banks of the double buffer, writing to the other is performed. When such a ping-pong operation is performed, the write destination cannot be switched to the other bank until after the capacity is filled to one bank.

  Conventionally, in such an image processing apparatus, the size (data capacity) of the input buffer and the output buffer has been fixed. For this reason, when the size of the target object is different from the buffer size, when the background image is read to the full capacity of the buffer, the image in the range where the pixels of the object do not exist is also read. The time required for this is substantially wasted time.

  For example, in FIGS. 1 and 2, when the size of the buffer (bank size) is 4K (kilo) bytes, the size of an object to be rasterized (hereinafter referred to as “target object”) is smaller than 4K ( FIG. 1 shows a case where waste occurs for each of the cases where the value is larger than 4K (FIG. 2).

  In the example of FIG. 1, the target object has a width of 100 bytes per line (scan line) and a height of 3 lines, and the size of the object is 300 bytes. Note that the size of the object is equal to the size of the bounding box of the object. As shown in FIG. 3, the bounding box 12 of the object 10 is a minimum rectangle that includes the object 10 and includes a side perpendicular to the side parallel to the scanning line. The print data in the page description language format or the intermediate data format generally includes bounding box information (for example, the coordinates of the vertices of the upper left corner and the lower right corner of the rectangle) as part of the data representing the object.

  In the example of FIG. 1, for a 4K-byte bank, a 300-byte background image corresponding to the bounding box range of the target object is read from the page memory (a write process for the buffer) is 4K bytes. To fill this bank, it is necessary to read 3796 bytes of images outside the range. Since the image outside the bounding box never overlaps the object, it is completely unnecessary data for rasterization. Data unnecessary for such processing will be referred to as dummy data.

  Here, assuming that the data transfer rate from the main memory to the buffer of the image forming apparatus is 8 bytes per clock and the clock frequency is 200 MHz, the time required to fill a 4 Kbyte bank is 4096 bytes. ÷ 8 bytes × 5 ns (nanoseconds) = 2.56 μs (microseconds). On the other hand, the time required to read 3796 bytes of dummy data is 3796 bytes ÷ 8 bytes × 5 ns (nanoseconds) = 2.37 μs.

  After a 4 Kbyte background image (3796 bytes of dummy data) is written (written) to the buffer, the buffer is switched to a read target.

  Suppose that there are 10,000 objects of such a size of about 300 bytes in one page (in the intermediate data format, the granularity of the object is much smaller than in the page description language, so 10,000 in one page) Is often included). In this case, the time used for reading the dummy data when rasterizing one page is 2.37 μs × 10000, that is, about 24 ms (milliseconds). On the other hand, assuming that 2000 pages are printed per minute, the time required for printing per page is 33.3 ms. Therefore, the above-described dummy data reading time of 24 ms for one page is 73% of the required printing time of 33.3 ms per page.

  In the example of FIG. 2, the size of the target object is 2048 bytes (= 2 Kbytes) × 3 lines = 6144 bytes (6 Kbytes). In this case, as shown in the figure, after writing 2 lines (2 Kbytes × 2) of the 6 Kbyte background image corresponding to the object to one bank of the double buffer, the first and second lines from the bank are written. The line is read and processed, and the third line of the object and dummy data (2 Kbytes) are written to the other bank. When the writing is completed, the third line is read from the bank that has been written so far, and processing is performed. In this case, the time required for writing 2 Kbytes of dummy data is 2048 bytes ÷ 8 bytes × 5 ns = 1.28 μs. Therefore, in the case of a page including 10,000 such objects, the time of about 12 ms per page is used for reading dummy data. This 12 ms corresponds to 36% of the time required for printing one page of 33.3 ms.

  As shown in FIG. 2, when the size of the object is larger than the size of the bank, the data corresponding to the object is divided into several times and put into the bank. Then the bank does not fill up. Therefore, dummy data is put in the vacant part of the bank.

  The time for reading the dummy data described above is a completely useless time for image processing performed by the image processing apparatus, and it is desirable that such a useless time be as small as possible.

  As described above, the problem due to the fixed buffer size has been described using the input buffer as a representative example, but the output buffer has the same problem.

  Therefore, in the present embodiment, for each target object, an optimal bank size corresponding to the size of the object is calculated, and when processing the target object, the optimal bank size corresponding to the object among the physical maximum capacity of the bank is calculated. Use only the bank size part. The “optimal bank size” corresponding to an object is the size of the bank when the amount of data corresponding to the size of the object is transferred between the memory and the bank and the time required for the transfer is the shortest That is. In this embodiment, the largest size among the bank sizes that minimizes the amount of dummy data is obtained as the optimum bank size. The smaller the dummy size, the more efficient the transfer of useless data. Of the bank sizes with the smallest amount of dummy data, the largest bank size is set as the optimum bank size. If data of the same data amount is written (or read), the larger the bank size is, the larger the bank size is written (or read). This is because the number of times decreases. For writing (or reading) to the buffer, it is necessary to make preparations such as acquiring the right to use the bus for data transfer, and it takes a certain amount of time for the preparation, so the amount of dummy data is the same. Then, the smaller the number of preparations, the shorter the time required for processing the entire object.

  FIG. 4 shows an example of a functional configuration of the image processing apparatus 100 according to the present embodiment.

  In FIG. 4, an SDRAM (Synchronous Dynamic Random Access Memory) 200 is a main memory of a computer to which the image processing apparatus 100 is connected. Although an SDRAM has been described as an example, the main memory may be a memory other than the SDRAM.

  The DRAM controller 102 is a device that controls reading and writing with the SDRAM 200. The DRAM controller 102 has an arbiter function for acquiring the right to use the bus to which the SDRAM 200 and the DRAM controller 102 are connected in order to access (read or write) the SDRAM 200. The DRAM controller 102 has a function of performing burst transfer of data between the SDRAM 200 and the input buffer 110 and the output buffer 130.

  The DRAM read address generation unit 104 generates read address information when reading data from the SDRAM 200. In this embodiment, the minimum base image corresponding to the target object is read from the page memory area in the SDRAM 200. For this reason, the DRAM read address generation unit 104 determines the read address information, for example, the top address to be read and the amount of data to be read (the amount corresponds to the size of the bounding box from the information on the position and size of the bounding box of the target object. )

  The read request unit 106 issues a read request in units of bank size to the DRAM controller 102 based on the read address information generated by the DRAM read address generation unit 104. The DRAM controller 102 reads data of the address and size indicated in the read request from the SDRAM 200 and transfers them to the input buffer 110.

  Here, in this embodiment, the bank size is controlled according to the size of the object. That is, the read request unit 106 issues a read request for each optimum bank size obtained by the optimum bank size calculation unit 150.

  The buffer write counter 108 counts the amount of data written from the SDRAM 200 to each bank 112a, 112b of the input buffer 110. The buffer read counter 114 counts the amount of data read from the banks 112 a and 112 b of the input buffer 110 to the processing circuit 120.

  The input buffer 110 is a buffer that holds data to be processed by the processing circuit 120 read from the SDRAM 200 (background image in this example). In this example, the input buffer 110 has a double buffer configuration including two banks 112a and 112b. FIG. 1 shows a state in which data is written from the SDRAM 200 to the first bank 112a and data is supplied from the second bank 112b to the processing circuit 120. When the bank to be read / written is switched by the ping-pong operation, the count targets of the buffer write counter 108 and the buffer read counter 114 are also switched accordingly.

  The processing circuit 120 is a hardware circuit that executes image processing performed by the image processing apparatus 100. In this example, the processing circuit 120 executes an object rasterization process. The processing result of the processing circuit 120 is written to the write target bank 132 a or 132 b in the output buffer 130.

  The output buffer 130 is a buffer that holds processing result data of the processing circuit 120 (in this example, an image obtained by rasterizing a target object on a base image). In this example, the output buffer 130 is also configured as a double buffer including two banks 132a and 132b. FIG. 1 shows a state in which data is written from the processing circuit 120 to the second bank 132b and data is written back from the first bank 132a to the SDRAM 200.

  The buffer write counter 134 counts the amount of data written from the processing circuit 120 to the banks 132 a and 132 b of the output buffer 130. The buffer read counter 136 counts the amount of data read from the banks 132 a and 132 b of the input buffer 110 and written back to the SDRAM 100.

  The DRAM write address generation unit 138 generates write address information when writing data from the output buffer 130 to the SDRAM 200. In this embodiment, the processing circuit 120 writes the rasterization result of the target object on the background image read from the page memory area in the SDRAM 200, and the background image on the page memory area originally stores the image data of the writing result. Write back to where it was. Therefore, the write address information generated by the DRAM write address generation unit 138 has the same content as the read address information generated by the DRAM read address generation unit 104 for the same target object.

  The write request unit 140 issues a write request for each bank size to the DRAM controller 102 based on the write address information generated by the DRAM write address generation unit 138. The DRAM controller 102 reads the data of the size indicated in the write request from the read target bank of the output buffer 130 and writes the data to the address indicated in the write request in the SDRAM 200.

  Note that the write request unit 140 issues a write request for each optimum bank size obtained by the optimum bank size calculation unit 150, similar to the read request unit 106.

  The image processing apparatus 100 according to the present embodiment includes an optimum bank size calculation unit 150 in addition to the configuration described above. The optimum bank size calculation unit 150 calculates the size of the portion actually used for processing the target object (that is, “optimum bank size”) in the banks of the input buffer 110 and the output buffer 130. The optimal bank size is calculated for each object. The optimal bank size calculation unit 150 reads the size information of the target object from the object data 160 of the page read into the memory in the image processing apparatus 100 prior to the page rasterization process, and uses this size information to perform the optimal bank size calculation. Find the bank size. The object data 160 is read one by one from the top by the processing circuit 120, rasterized, and written to the background image.

  FIG. 5 shows an example of a processing procedure executed by the optimum bank size calculation unit 150.

  In this procedure, first, the size information of the next target object is obtained from the object data 160 (S10). Since the object data 160 includes information on the coordinates of the vertices of the upper left corner and the lower right corner of the bounding box of each object (for example, expressed in units of pixels), the vertical and horizontal pixels of the bounding box are obtained from this information. And the data size of the bounding box can be obtained from the number of vertical and horizontal pixels and the data amount per pixel.

  Next, the optimum bank size calculation unit 150 compares the object size obtained in S10 with the upper limit size of the bank, and determines whether the former is equal to or less than the latter (S12). The upper limit size of the bank is the upper limit data capacity that can be taken by the individual banks 112a, 112b, 132a, 132b of the input buffer 110 and the output buffer 130, that is, the physical maximum capacity of each bank. That is, in the present embodiment, all or a part of the physical capacity of a bank provided in the image processing apparatus 100 is used for processing each object, but the total capacity of the bank is used. Is the upper limit size in S12. The upper limit sizes of the banks 112a, 112b, 132a, 132b are equal.

  If it is found in S12 that the object size is equal to or smaller than the upper limit size of the bank, the optimum bank size calculation unit 150 determines the object size as the optimum bank size (S14).

  If it is found in S12 that the object size is larger than the upper limit size of the bank, the optimum bank size calculation unit 150 sets the upper limit size of the bank in the variable “current bank size” indicating the current bank size (S16). . Then, the object size is divided by the current bank size (S18), and it is determined whether or not the object size is divisible (S20). When it is found that it is divisible in S20, the optimum bank size calculation unit 150 determines the current bank size as the optimum bank size (S22). On the other hand, when it is found that it is not divisible in S20, the optimum bank size calculation unit 150 stores the remainder (remainder) of the result of the division in S18 in association with the current bank size (S24). This remainder is the size of the dummy data. That is, when the data corresponding to the object is divided into a plurality of times (the result of the division in S18) by the current bank size and put into the bank, in the last round, in addition to a part of the data, the remainder An amount of dummy data will be put in the bank. For example, when the quotient of the division in S18 is n and the remainder is m bytes, the object data is transferred n + 1 times, and valid data used for object processing is stored in the bank from the first to the nth time. The dummy data of m bytes is put into the bank at the last (n + 1) th time.

  Next, the optimum bank size calculation unit 150 reduces the current bank size by one burst length (S26). Here, the burst length is a transfer data amount per cycle at the time of burst transfer between the SDRAM 200 and the input buffer 110 or the output buffer 130. If the current bank size is reduced by one burst length, the time required to fill a bank of the current bank size is shortened by one cycle. Since the burst length is managed by the DRAM controller 102, it may be acquired from the DRAM controller 102.

  After S26, the optimum bank size calculation unit 150 determines whether or not the current bank size is equal to or smaller than the lower limit value (S28). The lower limit value of the current bank size may be 0, for example, or a value greater than 0. If the determination result in S28 is Yes when the lower limit is 0, the current bank size immediately before the determination is 1 burst length. In this case, it is determined whether the object size can be divided by the current bank size while reducing the current bank size in increments of 1 burst length until the current bank size reaches the burst length from the upper limit size (S20).

  Moreover, you may obtain | require an appropriate value as a lower limit by experiment or simulation. The smaller the optimal bank size, the smaller the dummy size (since the dummy size is less than the bank size), so the useless data transfer time is reduced. On the other hand, the number of read requests and write requests issued to the SDRAM 200 increases. , The time for processing those requests increases. In this trade-off relationship, if the optimal bank size is further reduced, the effect of shortening the transfer time due to the decrease in dummy data is negated by the increase in processing time due to the increase in the number of requests. Ask. Since this limit changes depending on the combination of various environmental factors such as the performance of SDRAM 200, bus transfer frequency, burst length during transfer, etc., one system (system in which SDRAM 200 and image processing apparatus 100 are connected by a bus) is designed. Then, the system is obtained by experiments or the like. Then, a value obtained by subtracting one burst length from the size of the limit point may be used as the lower limit value used in S28.

  If it is found in S28 that the current bank size is larger than the lower limit value, the optimum bank size calculation unit 150 returns to S18 and repeats the same processing. When it is found in S28 that the current bank size has become equal to or smaller than the lower limit value, the optimum bank size calculation unit 150 calculates the dummy data from the pair of the current bank size and the size of the dummy data stored so far. The current bank size with the smallest amount is specified, and the specified current bank size is determined as the optimum bank size (S30). When there are a plurality of current bank sizes with the smallest amount of dummy data, the largest current bank size is determined as the optimum bank size.

  As described above, when the optimum bank size is determined in S14, S22, or S30, the optimum bank size determination process for the object is terminated.

  The optimum bank size calculation unit 150 supplies the optimum bank size obtained in this way to the read request unit 106, the write request unit 140, the buffer write counters 108 and 134, and the buffer read counters 114 and 136. The read request unit 106 and the write request unit 140 generate a request for reading or writing for each optimum bank size. The buffer write counters 108 and 134 write data to the write target bank each time the amount of data written to the write target bank 112a, 112b, 132a, or 132b reaches the optimum bank size. Is stopped, and the bank to be written and the bank to be read can be switched. Similarly, the buffer read counters 114 and 136 read data from the read target bank each time the amount of data read from the read target bank 112a, 112b, 132a, or 132b reaches the optimum bank size. It stops and enables switching between the bank to be written and the bank to be read. When writing to the bank to be written in one buffer 110 or 130 is completed and reading from the bank to be read is completed, the bank to be written and the bank to be read are switched.

  According to the method of this embodiment, for example, when an object having a size of 6 Kbytes is processed when the upper limit size of the bank is 4 Kbytes, the optimum bank size is 3 Kbytes as shown in FIG. (= 3096 bytes). In this case, 6 Kbytes of the background image data corresponding to the object is written into the banks 112 a and 112 b of the input buffer 110 in sequence by 3 Kbytes twice, and no dummy data is generated. When the writing of 3 Kbytes of data to one bank 112a is completed, the writing target is switched to the other back, and reading of data from the bank that has been written so far is started. If the writing speed to the bank is the same as the reading speed and the other conditions are the same as in the example of FIG. 2, the background image is read into the input buffer 110 for rasterization of the object, and the read background image is The time required to read all data from the input buffer 110 is 5.82 μs as shown.

  On the other hand, if the bank size is fixed at 4 Kbytes as in the example of FIG. 2, it is necessary to read 1 Kbytes of dummy data into the bank as shown in FIG. In this case, the time required from once reading the 6 Kbyte background image corresponding to the object to the input buffer 110 to reading (and processing) it is 7.68 μs as shown in the figure.

  Comparing (a) and (b) of FIG. 6, the method of the present embodiment requires that the time required to process the object is 1.86 μs shorter than the case where the bank size is fixed to 4 Kbytes. (The processing circuit 120 is a hardware circuit, and since the data is processed by the circuit at the same time that the data is read from the input buffer 110, the time required for the processing is equal to the time for reading the data). Therefore, if there are 10,000 similar objects in one page, the time required to process the page is about 19 ms shorter in this embodiment than in the case where the bank size is fixed at 4 Kbytes. Assuming that the processing time per page is 33.3 ms as described above, a reduction of about 19 ms corresponds to a reduction of about 57% of the processing time of one page.

  The optimal bank size calculation unit 150 described above is realized by, for example, a processor (not shown) included in the image processing apparatus 100 executing a program describing the processing of the optimal bank size calculation unit 150. While the processing circuit 120, which is a hardware circuit, is performing rasterization processing on an object, the processor calculates the optimal bank size for the next or subsequent object of the object, thereby calculating the optimal bank size. The time required for is hidden.

  For example, the image processing apparatus 100 can also be configured using a dynamic reconfigurable processor (DRP) such as the DAP / DNA architecture introduced in Japanese Patent Laid-Open No. 2009-3765. In this case, the processing circuit 120 is configured using a matrix of PE (processor elements) called DNA (Distributed Network Architecture) whose configuration can be dynamically changed. In addition, the input buffer 110, the output buffer 130, the buffer write counters 108 and 134, the buffer read counters 114 and 136, the main memory that holds the object data 160, the nonvolatile memory that holds programs, setting values, and the like are fixed. Built in DRP as a hardware circuit. The optimum bank size calculation unit 150 is realized by executing a program stored in the nonvolatile memory by a processor called DAP (Digital Application Processor). The DAP / DNA architecture is merely an example.

  In the above example, the bank sizes of both the input buffer 110 and the output buffer 130 are controlled in accordance with the size of the object, but only one of them may be controlled.

  In the above description, the process of rasterizing an object and writing it on the underlying raster image is taken as an example, but the optimum bank size determination method of the present embodiment is not limited to such an application example. For example, when performing filter processing such as an average value filter or edge enhancement filter on an image, the image data for each object is banked even when the type of filter to be applied and the filter parameter are switched for each object type. (Buffer) need to be put. Even in such a case, the optimum bank size can be obtained using the method of the present embodiment.

DESCRIPTION OF SYMBOLS 100 Image processing apparatus, 102 DRAM controller, 104 Reading address generation part, 106 Reading request part, 108 Buffer write counter, 110 Input buffer, 112a, 112b, 132a, 132b Bank, 114 Buffer reading counter, 120 Processing circuit, 130 Output Buffer, 134 Buffer write counter, 136 Buffer read counter, 138 DRAM write address generation unit, 140 Write request unit, 150 Optimal bank size calculation unit, 160 Object data, 200 SDRAM

Claims (5)

An input buffer;
An image processing circuit that performs image processing using input data that is input from outside and held in the input buffer;
Acquisition means for acquiring the size of data corresponding to the image object to be processed;
A calculating unit that calculates an optimum size of a portion used for holding data corresponding to the image object in the input buffer based on the size acquired by the acquiring unit;
Reading control means for controlling the input buffer to read data of the optimum size as the input data corresponding to the image object from the outside;
An image processing apparatus.   The calculation means calculates the used size when the remainder obtained by dividing the size of data corresponding to the image object by the used size is minimum when the used size of the input buffer is changed by unit size. The image processing apparatus according to claim 1, wherein an optimum size of the input buffer corresponding to the input buffer is set.   3. The image processing apparatus according to claim 2, wherein, when there are a plurality of use sizes that minimize the remainder, the calculation unit determines the maximum one of the plurality as the optimum size.   The calculation means, when the size of data corresponding to the image object is equal to or smaller than the upper limit size of the input buffer, determines the size of data corresponding to the image object as the optimum size. Item 8. The image processing apparatus according to Item 1. Computer
Acquisition means for acquiring the size of data corresponding to the image object to be processed;
A calculating means for calculating an optimum size of a portion used for holding data corresponding to the image object in an input buffer for holding input data to the image processing circuit based on the size acquired by the acquiring means;
Read control means for controlling the input buffer to read data of the optimum size as the input data corresponding to the image object from the outside,
Program to function as.

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