JP6091403B2 - Digital output device - Google Patents

Description

  The present invention relates to a digital output device, for example, a digital output device used for a programmable controller of a plant monitoring control system.

  For example, in a plant monitoring control system, an illegal output of a digital signal in a digital output device causes a malfunction of a plant facility and has a great influence on the entire plant, such as facility stoppage or equipment damage. For this reason, prevention of unauthorized output is a very important and indispensable function in the plant monitoring control system. As a control device as a conventional digital output device, for detecting an abnormal location including reference data for abnormality determination regarding transition of an output reference pattern and an input expected pattern of a control device corresponding to each output reference pattern in the reference data for abnormality determination Reference data is created and stored in advance, and the presence or absence of abnormality in the system controlled by the control device is verified by comparing the output pattern transition of the control device with the reference data for abnormality determination during operation of the control device. Is known (see, for example, Patent Document 1).

JP-A-5-134740 (paragraph numbers 0013, 0018, 0039-0044, FIGS. 1 and 8)

  A control device as a conventional digital output device is configured as described above, and the presence or absence of an abnormality in the system controlled by the control device is determined by comparing the transition of the output pattern of the control device with the reference data for abnormality determination. Therefore, it is necessary to produce a program that matches the transition of the output pattern of the control device with the abnormality determination reference data according to the specification of the control device. In addition, every time the program of the control device is changed, it is necessary to change the application program for determining the presence / absence of an abnormality, and there is a problem that a great deal of time and labor is required to determine the presence / absence of an abnormality. there were.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a digital output device that can detect unauthorized output without using an application program.

The digital output device according to the present invention is a digital output device having an arithmetic device, a setting device, and a detection device,
The arithmetic device has a plurality of digital circuits for outputting digital signals to the outside,
The setting device sets a reference logical value as a reference,
Wherein the detection device, the logic value of the signal of interest is subject to the detection of the digital signal determines whether they meet the reference logic values at the logic circuit, when matched with the reference logic values It is determined that the target signal is illegal.

  Since the digital output device according to the present invention is configured as described above, it is possible to obtain a digital output device that can detect unauthorized output without using an application program.

It is a block diagram which shows the structure of the output card | curd which is Embodiment 1 of this invention. It is a block diagram which shows the structure of the output card which is Embodiment 2 of this invention. It is a block diagram which shows the structure of the output card which is Embodiment 3 of this invention. It is a block diagram which shows the structure of the output card which is Embodiment 4 of this invention. It is a block diagram which shows the structure of the output card which is Embodiment 5 of this invention. It is explanatory drawing for demonstrating operation | movement of the detection circuit of FIG. It is a block diagram which shows the structure of the output card which is Embodiment 6 of this invention. It is explanatory drawing for demonstrating operation | movement of the detection circuit of FIG. It is a block diagram which shows the structure of the output card which is Embodiment 7 of this invention.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram showing the configuration of an output card as an embodiment for carrying out the present invention. In FIG. 1, an output card 100 as a digital output device includes a connector 2, an internal arithmetic circuit 3 as an arithmetic device, an inverter 4, a photocoupler 5 as an insulating device, a detection circuit 6, an electromagnetic relay 7 as an output prohibiting device, An external interface unit 13 is included. The connector 2 is connected to a power supply that supplies power for operation of the host CPU and the output card 100 (not shown). The internal arithmetic circuit 3 has digital terminals 3a and output terminals L1, L2,... Ln for outputting a digital signal D1. The detection circuit 6 includes an AND circuit 6a as a logic circuit, a NOR circuit 6b, and an OR circuit 6c, and has an illegal output detection function. The electromagnetic relay 7 has a normally closed contact 7b provided in the common line of the exciting coil 7a and the photocoupler 5 (digital signal D2). The external interface unit 13 has terminals T1, T2,..., Tn and a common terminal COM.

  Next, the operation will be described. In the output card, a signal from a host CPU (not shown) is input to the digital circuit 3a of the internal arithmetic circuit 3 via the connector 2, and the digital signal D1 is output from the digital circuit 3a. The digital signal D1 output from the digital circuit 3a is output to the photocoupler 5 as an output insulation circuit via the inverter 4 and to the detection circuit 6. The digital signal D1 input to the photocoupler 5 is insulated by the photocoupler 5 and output as a digital signal D2 from the external interface unit 13 (terminals T1, T2,..., Tn, COM). Further, the digital signal D1 is input to the AND circuit 6a and the NOR circuit 6b of the detection circuit 6 as a target signal to be detected. In this embodiment, all digital signals D1 are targeted signals for fraud detection.

  The AND circuit 6a outputs a logical value 1 when the logical values of the input digital signal D1 are all 1. The NOR circuit 6b outputs a logic value 1 when all the logic values of the input digital signal D1 are 0. When the output results of the AND circuit 6a and the NOR circuit 6b are input to the OR circuit 6c, the OR circuit 6c outputs 1 when either or both of the AND circuit 6a and the NOR circuit 6b become 1. That is, the detection circuit 6 determines that the digital signal D1 output from the digital circuit 3a, that is, the target signal is illegal when the logical values of the input digital signal D1 are all 0 or all 1, and the unauthorized output determination signal S1. 1 is output as the logical value of. In this embodiment, the level of the logical value 1 is DC 24 [V], and the level of the logical value 0 is DC 0 [V].

  The unauthorized output determination signal S1 output from the detection circuit 6 is input to the electromagnetic relay 7. When the improper output determination signal S1 is 1, the electromagnetic coil 7 is energized by the exciting coil 7a with a direct current of 24 [V], opens its normally closed contact 7b, and opens the common line of the photocoupler 5. Therefore, when the logical values of the digital signal D1 are all 0 or all 1, the detection circuit 6 determines that the output from the internal arithmetic circuit 3 is invalid and prohibits the digital signal D2 from being output from the external interface unit 13. To do.

  Depending on the parts used and the circuit configuration, the digital signal D2 may be output prior to the operation of opening the common line of the photocoupler 5 by the electromagnetic relay 7. In this case, although not shown, a signal delay circuit is provided before or after the photocoupler 5.

  As described above, since the unauthorized output is detected by the logic circuit of the detection circuit 6 with respect to the digital signal D1, it is not necessary to prepare an application program for detecting the unauthorized output. In addition, since an illegal output is detected by a logic circuit, a high-speed operation is possible as compared with a successive comparison by an application program.

Embodiment 2. FIG.
FIG. 2 is a configuration diagram illustrating a configuration of an output card according to the second embodiment. In FIG. 2, an output card 200 as a digital output device is obtained by adding a notification circuit 8 as a notification device to the output card 100 in the first embodiment. The notification circuit 8 includes an LED 8a as a display unit and an alarm output terminal 8b. The LED 8a is lit when the logical value of the unauthorized output determination signal S1 of the detection circuit 6 is 1, and is not lit when 0. The unauthorized output determination signal S1 is output to the outside as an alarm signal ALM from the alarm output terminal 8b. Since other configurations are the same as those of the first embodiment shown in FIG. 1, the same reference numerals are given to the corresponding components and the description thereof is omitted.

  Next, the operation will be described. In the first embodiment of FIG. 1, even when the detection circuit 6 of the output card 100 is operating normally, the digital signal D2 from the external interface unit 13 is externally operated by the normal operation of the detection circuit 6. It is impossible to determine whether the digital signal D2 is blocked due to a failure of the output card 100 or the like. Therefore, in the output card 200 of this embodiment, the unauthorized output determination signal S1 output from the detection circuit 6 is input to the electromagnetic relay 7 and input to the LED 8a. When the logical value of the unauthorized output determination signal S1 is 1, the LED 8a Lights up. Thereby, it can be visually confirmed from the outside whether or not the detection circuit 6 determines that the output from the internal arithmetic circuit 3 is illegal. Furthermore, an electrical signal is transmitted to an external circuit (not shown) by outputting the logical value 1 of the unauthorized output determination signal S1 as the alarm signal ALM from the alarm output terminal 8b.

Embodiment 3 FIG.
FIG. 3 is a configuration diagram showing the configuration of the output card according to the third embodiment. In FIG. 3, an output card 300 as a digital output device is obtained by providing the output card 100 in the first embodiment with a temporary prohibition circuit 11. The temporary prohibition circuit 11 includes a reset circuit 11a and an OR circuit 11b. The OR circuit 11b receives the unauthorized output determination signal S1 output from the detection circuit 6 and the output of the reset circuit 11a. The electromagnetic relay 7 and the temporary prohibition circuit 11 are the temporary prohibition device in the present invention. Since other configurations are the same as those of the first embodiment shown in FIG. 1, the same reference numerals are given to the corresponding components and the description thereof is omitted.

  Next, the operation will be described. In the first embodiment, if the voltage immediately after the output card 100 is turned on is unstable, the detection circuit 6 may malfunction. Therefore, the temporary prohibition circuit 11 is installed in the output card 300 in this embodiment, and the normally closed contact 7b of the electromagnetic relay 7 is forcibly opened for a certain time after the power is turned on. The reset circuit 11a is set to output a logical value 1 immediately after power-on, and to output 0 after a lapse of a fixed time. The output and the illegal output determination signal S1 output from the detection circuit 6 are ORed. 11b, and the output of the OR circuit 11b is input to the electromagnetic relay 7.

  As a result, the output from the reset circuit 11a becomes 1 for a certain time after the power is turned on, regardless of the output state of the detection circuit 6, the logical value 1 is input to the electromagnetic relay 7, and the normally closed contact 7b is opened. Since the common line of the photocoupler 5 is forcibly opened, the output of the digital signal D2 from the external interface unit 13 is prohibited. When a certain time has elapsed after the power is turned on, the output from the reset circuit 11a becomes 0, and if the logical value of the unauthorized output determination signal S1 output from the detection circuit 6 is 0, the logical value is output from the OR circuit 11b to the electromagnetic relay 7. 0 is output to close the common line of the photocoupler 5. If the logical value of the unauthorized output determination signal S1 output from the detection circuit 6 is 1, the logical value 1 is output from the OR circuit 11b to the electromagnetic relay 7, and the common line of the photocoupler 5 is kept open. . Therefore, the output card 300 becomes a steady operation state after a certain time has elapsed after the power is turned on, and it is possible to avoid the risk that the detection circuit 6 malfunctions. Needless to say, the output card 300 may be combined with the notification circuit 8 of the second embodiment.

Embodiment 4 FIG.
FIG. 4 is a configuration diagram illustrating a configuration of an output card according to the fourth embodiment. In FIG. 4, an output card 400 as a digital output device is provided with a designation circuit 12 as a designation device before the detection circuit 6. The designation circuit 12 includes a designation switch 12a and an opening / closing contact 12b. By closing the switching contact 12b with the designation switch 12a, the digital signal D1 to be detected among the digital signals D1 is designated. When the open / close contact 12b is closed by the designation switch 12a, the digital signal D1 of the digital circuit 3a in which the open / close contact 12b is closed is input to the detection circuit 6 as the target signal D5 to be detected. Since other configurations are the same as those of the first embodiment shown in FIG. 1, the same reference numerals are given to the corresponding components and the description thereof is omitted.

  Next, the operation will be described. In the output card 100 of the first embodiment, all the digital signals D1 output from the internal arithmetic circuit 3 are input to the detection circuit 6 as target signals, and the input digital signals D1 have all logical values 0 or all 1s. Sometimes the digital signal D1 output from the internal arithmetic circuit 3 is determined to be illegal. However, depending on the operation state of the plant monitoring and control system, there may be a state where even if the logical values of the digital signal D1 are all 0 or all 1, it cannot be determined as an illegal output. Therefore, in the output card 400 in this embodiment, the target signal D5 to be detected is designated from the digital signal D1 by the designation circuit 12, and an unauthorized output is detected for the target signal D5.

  For example, consider a case where there are eight digital circuits 3 a of the internal arithmetic circuit 3. Among the digital signal D1, the designation switch 12a of the first circuit and the second circuit is closed. In this case, the digital signal D1 of the first circuit and the second circuit among the digital signals D1 output from the internal arithmetic circuit 3 is input to the detection circuit 6, and the digital signal D1 of the input first circuit and second circuit is input. Only when both of the logical values are 0 or 1, the logical value of the unauthorized output determination signal S1 output from the detection circuit 6 becomes 1, and the electromagnetic relay 7 opens the common line of the photocoupler 5 from the external interface unit 13. The digital signal D2 is prohibited from being output. The designation switch 12a can designate any digital circuit 3a, and can simultaneously open or close the plurality of switching contacts 12b. Further, the digital signal D1 other than the digital signal D1 designated as the detection target by the designation switch 12a can be excluded from the detection target by the detection circuit 6.

  As described above, since the digital signal D1, which is a target for detecting fraud among the digital signal D1, that is, the target signal is arbitrarily designated and the fraudulent output is detected by the logic circuit of the detection circuit 6, the fraudulent output is detected. There is no need to create an application program. In addition, since an illegal output is detected by a logic circuit, a high-speed operation is possible as compared with a successive comparison by an application program.

Embodiment 5. FIG.
5 and 6 show the fifth embodiment. FIG. 5 is a configuration diagram showing the configuration of the output card, and FIG. 6 is an explanatory diagram for explaining the operation. In FIG. 5, an output card 500 as a digital output device is provided with a detection circuit 17 instead of the detection circuit 6 of the output card 100 in the first embodiment. The detection circuit 17 includes a reference value setting switch 17a as a setting device and a logic circuit 17b. The reference value setting switch 17a designates a reference logical value D6 to be a reference for comparison with respect to the logical value of the digital signal D1 output from the internal arithmetic circuit 3. The logic circuit 17b compares the logic value of the digital signal D1 as the target signal with the reference logic value D6 designated by the reference value setting switch 17a. Since other configurations are the same as those of the first embodiment shown in FIG. 1, the same reference numerals are given to the corresponding components and the description thereof is omitted.

  In the output card 100 of the first embodiment, all the digital signals D1 output from the internal arithmetic circuit 3 are input to the detection circuit 6 as detection target signals, and all the logical values of the input digital signals D1 are 0 or When all the values are 1, the signal (output) is judged to be illegal from the internal arithmetic circuit 3, and 1 is output as the logical value of the illegal output determination signal S1. However, depending on the operation state of the plant monitoring control system, when the logical values of the digital signal D1 are all 0 or all 1, there may be cases where the output cannot be invalid. Therefore, in the output card 500 of this embodiment, a detection circuit 17 is provided instead of the detection circuit 6 of FIG.

  Next, the operation will be described. Since the operation other than the detection circuit 17 is the same as that of the first embodiment, only the operation of the detection circuit 17 will be described. A reference logical value D6 that is used as a reference for the illegal output pattern is set by the reference value setting switch 17a, and the digital signal D1 from the internal arithmetic circuit 3 and the reference logical value D6 set by the reference value setting switch 17a are logically set. The signal is input to the circuit 17b, and the logical value of the digital signal D1 is compared with the reference logical value D6. This comparison process is always executed, and when the logical value of the digital signal D1 output from the internal arithmetic circuit 3 matches the reference logical value D6, the digital signal D1 is determined to be illegal and 1 is set as the logical value of the illegal output determination signal S1. Output.

  For example, it is assumed that there are eight digital circuits 3a of the internal arithmetic circuit 3. As shown in FIG. 6 (a), the reference logic value pattern (reference pattern) P01 for determining that the output is illegal is set to [1,0,1,0,0,0] for the first to eighth circuits. , 0, 1]. On the other hand, the logical value of the digital signal D1 output from the internal arithmetic circuit 3 is a pattern P1 as shown in FIG. 6B, that is, the first to eighth circuits are [1,0,1,0,0, 0, 0, 1]. Then, although not shown in detail, the logic circuit 17b determines that the pattern P1 matches the reference pattern P01 by an internal logic circuit, and determines that the output is illegal as the logical value of the illegal output determination signal S1. 1 is output.

  The detection circuit 17 can arbitrarily set the reference pattern. A plurality of detection circuits 17 may be provided to set a plurality of patterns. For example, two detection circuits 17 are provided, one reference pattern is set to [1, 1, 1, 1, 1, 1, 1, 1], and the other reference pattern is set to [0, 0, 0, 0, [0, 0, 0, 0] and obtaining the logical sum of the outputs of the two detection circuits 17, the same operation as the detection circuit 6 of the first embodiment is performed.

  As described above, the reference pattern P01 for detecting the output fraud and the logical value pattern P1 of the digital signal D1 from the internal arithmetic circuit 3 are always compared using the logic circuit to detect the fraudulent output. Therefore, it is not necessary to create an application program for detecting unauthorized output. In addition, since an illegal output is detected by a logic circuit, a high-speed operation is possible as compared with a successive comparison by an application program.

Embodiment 6 FIG.
7 and 8 show the sixth embodiment, FIG. 7 is a block diagram showing the configuration of the output card, and FIG. 8 is an explanatory diagram for explaining the operation. In FIG. 7, an output card 600 as a digital output device is provided with a detection circuit 19 in place of the detection circuit 6 of the output card 100 in the first embodiment. The detection circuit 19 includes a reference value setting switch 19a, an open / close contact 19b, and a logic circuit 19c. The reference value setting switch 19a sets a reference logical value D7 to be a reference for comparison with respect to the logical value of the digital signal D1 output from the internal arithmetic circuit 3, and from any digital circuit 3a with respect to the switching contact 19b. A command for designating whether the output digital signal D1 is to be detected is issued.

  The switching contact 19b receives a command from a reference value setting switch 19a as a setting device (described later), closes the circuit of the digital signal D1 to be detected, and designates the designated digital signal D1 as the target signal D5 as a logic circuit 19c. Output to. The logic circuit 19c compares the logical value of the target signal D5 input from the switching contact 19b with the reference logical value D7 designated by the reference value setting switch 19a. The reference value setting switch 19a and the switching contact 19b are the designation device in the present invention. Since other configurations are the same as those of the first embodiment shown in FIG. 1, the same reference numerals are given to the corresponding components and the description thereof is omitted.

  Next, the operation will be described. Since the operation other than the detection circuit 19 is the same as that of the first embodiment, only the operation of the detection circuit 19 will be described. A reference logical value D7 used as a reference for detecting signal fraud is set by the reference value setting switch 19a, and the digital signal D1 from the internal arithmetic circuit 3 and the reference set by the reference value setting switch 19a are set. The logic value D7 is input to the logic circuit 19c, and the logic value of the digital signal D1 is compared with the reference logic value D7. This comparison process is always executed, and when the logical value of the digital signal D1 output from the internal arithmetic circuit 3 coincides with the reference logical value D7, the digital signal D1 is determined to be illegal and 1 is set as the logical value of the illegal output determination signal S1. Output.

  For example, it is assumed that there are eight digital circuits 3a of the internal arithmetic circuit 3. As shown in FIG. 8 (a), the reference logic value pattern (reference pattern) P02 for determining that the output is illegal is designated as [1, x, 1, 0, x, 0] for the first to eighth circuits. , X, 1]. However, “x” in [] means that the digital signal D1 output from the digital circuit 3a is not subject to detection. On the other hand, the logical value of the digital signal D1 output from the digital circuit 3a is a pattern P2 as shown in FIG. 8B, that is, the first to eighth circuits are [1, ×, 1,0, ×, 0]. , ×, 1]. Then, although not shown in detail, the logic circuit 19c determines that the pattern P2 matches the reference pattern P02 by an internal logic circuit, and determines that the output is illegal as the logical value of the illegal output determination signal S1. 1 is output.

  The detection circuit 19 can arbitrarily set a reference pattern. In addition, a plurality of detection circuits 19 can be provided to set a plurality of patterns. For example, two detection circuits 19 are provided, one reference pattern is set to [1, ×, 1,1, ×, 1, ×, 1], and the other reference pattern is set to [0, ×, 0,0, [X, 0, x, 0] and the logical sum of the outputs of the two detection circuits 17 is obtained, the same operation as the detection circuit 6 of the first embodiment is performed with respect to the designated digital signal D1, that is, the target signal. It will be.

  In this way, the reference pattern P02 for detecting the output fraud and the logical value pattern P2 of the digital signal D1 from the internal arithmetic circuit 3 are always compared using a logic circuit to detect the fraudulent output. Therefore, it is not necessary to create an application program for detecting unauthorized output. In addition, since an illegal output is detected by a logic circuit, a high-speed operation is possible as compared with a successive comparison by an application program.

Embodiment 7 FIG.
FIG. 9 is a configuration diagram illustrating a configuration of an output card according to the seventh embodiment. In FIG. 9, the output card 700 as a digital output device sets the extraction position of the digital signal D <b> 1 input to the detection circuit 6 to the secondary side (output side) of the photocoupler 5.

  Next, the operation will be described. Although the operation is the same as that of the output card 100 of the first embodiment, in the output card 700 of this embodiment, the extraction position of the digital signal D1 input to the detection circuit 6 is set to the secondary side (output) In addition to detecting whether the digital signal D1 output from the internal arithmetic circuit 3 is illegal, it is also possible to detect unauthorized output due to an abnormality in the photocoupler 5. Since other configurations are the same as those of the first embodiment shown in FIG. 1, the same reference numerals are given to the corresponding components and the description thereof is omitted.

  In the present invention, the above-described embodiments can be freely combined within the scope of the invention, or each embodiment can be appropriately changed or omitted.

3 internal arithmetic circuit, 3a digital circuit, 5 photocoupler, 6 detection circuit,
6a AND circuit, 6b NOR circuit, 6c OR circuit, 7 electromagnetic relay,
8 Notification circuit, 11 Temporary prohibition circuit, 12 Designation circuit, 17 Detection circuit,
17a reference value setting switch, 17b logic circuit, 19 detection circuit,
19a Reference value setting switch, 19b Open / close contact, 19c Logic circuit,
100, 200, 300, 400, 500, 600, 700 Output card.

Claims (7)

A digital output device having an arithmetic device, a setting device, and a detection device,
The arithmetic device has a plurality of digital circuits for outputting digital signals to the outside,
The setting device sets a reference logical value as a reference,
Wherein the detection device, the logic value of the signal of interest is subject to detection of the digital signal determines whether they meet the reference logic values at the logic circuit, when matched with the reference logic values A digital output device that determines that a target signal is illegal. A designation device for designating the target signal from the digital signals is provided.
The digital output device according to claim 1 . The arithmetic unit receives operation power from a power source,
3. The digital output device according to claim 1, further comprising a temporary prohibiting device that prohibits the digital signal from being output to the outside for a certain period of time after the power is turned on. According to any one of claims 1 to 3 wherein the target signal is what the output prohibiting device for prohibiting the the target signal is outputted to the outside when it is determined that the illegal provided Digital output device. The digital output device according to any one of claims 1 to 4 , further comprising a notification device that notifies that when the target signal is determined to be illegal. An insulation device is provided,
The digital output device according to any one of claims 1 to 5 , wherein the digital signal is output to the outside from the digital circuit through the insulating device. The setting device, a digital output device according to any one of claims 6 the reference logical value of claims 1 All is for setting to 0 or all 1.

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