JP6083191B2 - Manufacturing method of semiconductor device - Google Patents

Description

The present invention relates to the production how the semiconductor device.

  Conventionally, as a technique for manufacturing a semiconductor device, there is a technique for transferring a semiconductor processed into a fine shape such as a thin film element such as a thin film transistor (TFT) or a light emitting element such as an organic EL (Electro Luminescence) to a substrate. Has been developed.

  For example, a release layer and a thin film element are sequentially formed on a glass substrate, a plastic substrate serving as a transfer destination and a thin film element on the glass substrate are bonded with an adhesive, and then the release layer and the glass substrate are peeled off. Thus, a technique for transferring a thin film element to a plastic substrate has been disclosed (for example, Patent Document 1).

  In addition, an electrode is formed on the transfer destination substrate, a light absorption layer and a light emitting element are sequentially formed on the transfer source substrate, and the laser is applied from the transfer source substrate side with the light emitting element and the electrode facing each other. A technique for thermally transferring a light emitting element onto an electrode of a transfer destination substrate by irradiating light is disclosed (for example, Patent Document 2).

JP 2004-140383 A Japanese Patent No. 4449890

  However, in the techniques described in Patent Documents 1 and 2 described above, a release layer and a light absorption layer must be formed only for transfer, and this requires a process and cost. In addition, the release layer and the light absorption layer may become impurities, which may impede the functions of the thin film element and the light emitting element, or may reduce the transparency of the substrate and inhibit the function of the semiconductor device itself.

The present invention has been made in view of such problems, as well as simplifying the process, to suppress the inclusion of impurities, the manufacturing how a semiconductor device capable of transferring the processed semiconductor fine shape substrate It is intended to provide.

In order to solve the above problems, a method of manufacturing a semiconductor device according to the present invention grows a plurality of nanostructures on a surface of a first substrate so as to extend in a direction perpendicular to the surface of the first substrate. A step of forming a nanostructure layer, a step of filling a void in the nanostructure layer with a semiconductor, a step of forming a conductive layer on the surface of the second substrate, and a semiconductor on the first substrate. A step of bringing the applied nanostructure layer into contact with the conductive layer in the second substrate with the hole transport layer interposed; a step of drying the hole transport layer; and a nanostructure layer filled with a semiconductor seen containing a step of peeling the first substrate, from, nanostructures, characterized in that it is a carbon nano-wall is a single layer, or multi-layer of graphene sheet.

  The semiconductor may be a mixture of an n-type semiconductor and a p-type semiconductor.

The semiconductor may be an n-type semiconductor, including a step of doping the nanostructure layer with B before performing the step of filling the void formed in the nanostructure layer with the semiconductor.

The semiconductor may be a p-type semiconductor, including a step of doping the nanostructure layer with N before performing the step of filling the void formed in the nanostructure layer with the semiconductor.

  The semiconductor may be a light emitting polymer.

  According to the present invention, it is possible to simplify the process, suppress the mixing of impurities, and transfer a semiconductor processed into a fine shape to a substrate.

It is a flowchart for demonstrating the flow of a process of the manufacturing method of the semiconductor device concerning 1st Embodiment. It is a figure for demonstrating the flow of a process of the manufacturing method of the semiconductor device concerning 1st Embodiment. It is a figure for demonstrating the schematic structure of carbon nanowall. It is a flowchart for demonstrating the flow of a process of the manufacturing method of the semiconductor device concerning 2nd Embodiment.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The dimensions, materials, and other specific numerical values shown in the embodiments are merely examples for facilitating the understanding of the invention, and do not limit the present invention unless otherwise specified. In the present specification and drawings, elements having substantially the same function and configuration are denoted by the same reference numerals, and redundant description is omitted, and elements not directly related to the present invention are not illustrated. To do.

(First embodiment)
FIG. 1 is a flowchart for explaining a processing flow of the semiconductor device manufacturing method according to the first embodiment, and FIG. 2 shows a processing flow of the semiconductor device manufacturing method according to the first embodiment. It is a figure for demonstrating. In FIG. 2 of the present embodiment, the X axis, the Y axis, and the Z axis (vertical direction) that intersect perpendicularly are defined as illustrated.

  As shown in FIG. 1, the nanostructure manufacturing method according to the present embodiment includes a nanostructure layer deposition step S110, a semiconductor coating step S120, a conductive layer deposition step S130, a contact step S140, and a drying step. S150 and peeling process S160 are comprised. Hereinafter, each process is explained in full detail.

(Nanostructure layer deposition step S110)
In the nanostructure layer deposition step S110, a plurality of nanostructures 220 (FIG. 2) are formed using a plasma CVD (Chemical Vapor Deposition) method, a MOCVD (Metal Organic CVD) method, or the like, as shown in FIG. In the middle, shown in black fill) so as to extend in the vertical direction (Z-axis direction in FIG. 2) with respect to the surface of the first substrate 210 serving as a transfer source (hereinafter referred to as transfer source substrate 210), A nanostructure layer 230 is formed by growing on the surface of the transfer source substrate 210. The nanostructure layer 230 only needs to extend in a direction substantially perpendicular to the surface of the transfer source substrate 210, and may be inclined to about ± 10 ° when the vertical direction is 0 °.

  The transfer source substrate 210 is made of, for example, silicon (Si), titanium (Ti), tantalum (Ta), zircon (Zr), niobium (Nb), aluminum (Al), or the like. Although the material of the transfer source substrate 210 is not limited, as will be described later, the nanostructure 220 is composed of carbon (C) such as carbon nanowalls (also referred to as carbon nanoflakes or carbon nanoflowers) or carbon nanotubes. In this case, it is preferable to include an element that easily forms carbides such as silicon (Si), titanium (Ti), tantalum (Ta), zircon (Zr), and niobium (Nb). Here, the transfer source substrate 210 made of Si, which is widely used as a semiconductor material, will be described as an example.

  The nanostructure 220 is a compound whose thickness L in the direction (X-axis direction in FIG. 2) orthogonal to the stretching direction (Z-axis direction in FIG. 2) is nanometer size (nanometer order). Here, the nanometer size means about several nm to several tens of nm.

  The nanostructure 220 is a carbon nanowall or a carbon nanotube, and is preferably a carbon nanowall.

  FIG. 3 is a view for explaining a schematic structure of the carbon nanowall. The carbon nanowall is composed of a graphene sheet as shown in FIG. 3A (the carbon atom C is indicated by a white circle in FIG. 3A), and the surface of the transfer source substrate 210 as shown in FIG. It grows in a direction perpendicular to the surface (in the Z-axis direction in FIG. 3B), and is a monolayer or multilayer of a graphene sheet. When the nanostructure layer 230 is formed, a graphite layer or an amorphous carbon layer is formed at the interface between the transfer source substrate 210 and the nanostructure layer 230.

  Here, as described above, since the transfer source substrate 210 includes an element (here, Si) that easily forms carbides, the graphite layer is located at the interface between the transfer source substrate 210 and the graphite layer. Either an event that elutes in Si constituting the surface of 210 and an event in which Si that constitutes the transfer source substrate 210 thermally diffuses into the graphite layer, or both events may occur. A plurality of carbon nanowalls are formed so as to extend in a direction perpendicular to the surface of the transfer source substrate 210 via a graphite layer or an amorphous carbon layer.

  Returning to FIG. 2A, the thickness L of the carbon nanowall and the distance D between the carbon nanowalls will be described. A direction parallel to the transfer source substrate 210 of the carbon nanowall (X-axis direction in FIG. 2). The thickness L is about several nm to several tens of nm, and the distance D between the carbon nanowalls in FIG. 2 in the X-axis direction is also about several nm to several tens of nm.

  That is, when carbon nanowalls are grown on the surface of the transfer source substrate 210, the bonding area between the transfer source substrate 210 and the carbon nanowalls is the bonding surface between the transfer source substrate 210 and the carbon nanowalls (the extending direction of the carbon nanowalls). The cross-section is perpendicular to the area) and is as small as a square nanometer. Therefore, the bonding strength between the transfer source substrate 210 and each carbon nanowall can be reduced, and the carbon nanowall (nanostructure 220) can be easily peeled from the transfer source substrate 210 in the peeling step S160 described later. Is possible.

  Since the carbon nanowall has a self-organizing function, the nanostructure layer 230 can be easily formed on the surface of the transfer source substrate 210 without performing any treatment for organizing a nanometer-sized structure. Can grow. Further, in the process of growing the carbon nanowall, a nanometer-sized void 240 is formed between the plurality of carbon nanowalls without any treatment.

  In other words, by forming a nanometer-sized void 240 between the plurality of nanostructures 220 by simply forming a carbon nanowall as the nanostructure 220 on the transfer source substrate 210 with a plasma CVD apparatus, The nanostructure 220 can be grown so as to extend in a direction perpendicular to the surface of the transfer source substrate 210.

(Semiconductor coating process S120)
In the semiconductor coating step S120, the semiconductor 250 is applied (attached) to the nanostructure layer 230. When the semiconductor 250 is applied to the nanostructure layer 230, the gap 250 is filled with the semiconductor 250 as shown in FIG. When the semiconductor 250 is applied, an existing technique such as spin coating or ink jet can be used.

Here, the semiconductor 250 is a mixture of an n-type semiconductor and a p-type semiconductor, or a light emitting polymer. The n-type semiconductor is, for example, [6,6] -Phenyl C ₆₁ butyric acid methyl ester; aka [60] PCBM, [6,6] -Pentadeuterophenyl C ₆₁ butyric acid methyl ester; aka d ₅ -PCBM, [6, 6] -Phenyl C ₆₁ butyric acid butyl ester; aka PCBB, [6,6] -Phenyl-C ₆₁ butyric acid octyl ester; aka PCB-C ₈ , [60] ThPCBM, (6,6) -Phenyl C ₇₁ butyric acid methyl ester; also known as [70] PCBM, (6,6) -Phenyl C ₈₅ butyric acid methyl ester; also known as [84] PCBM.

  The p-type semiconductor is, for example, Poly [2-methoxy-5- (3 ', 7'-dimethyloctyloxy) -1,4-phenylenevinylene]; also known as MDMO-PPV, Poly [2-methoxy-5- (2-ethylhexyloxy) -1,4-phenylenevinylene]; also known as MEH-PPV, Poly (3-hexylthiophene-2,5-diyl); also known as P3HT.

  Examples of the light-emitting polymer include Poly [2-methoxy-5- (2-ethylhexyloxy) -1,4-phenylenevinylene], Poly [2- (2 ', 5'-bis (2 "-ethylhexyloxy) -phenyl) -1 , 4-phenylenevinylene], Poly (2,5-bis (1,4,7,10-tetraoxaundecyl) -1,4-phenylenevinylene), Poly [2,5-bis (3 ', 7'-dimethyloctyloxy) -1 , 4-phenylenevinylene], Poly [(2,5-bisoctyloxy) -1,4-phenylenevinylene], Poly (2,5-dihexyloxy-1,4-phenylenevinylene), Poly (2,5-dioctyl-1,4- phenylenevinylene), Poly [2-methoxy-5- (3 ', 7'-dimethyloctyloxy) -1,4-phenylenevinylene], Poly {[2- [2', 5'-bis (2 "-ethylhexyloxy) phenyl]- 1,4-phenylenevinylene] -co- [2-methoxy-5- (2'-ethylhexyloxy) -1,4-phenylenevinylene]}, Poly [(m-phenylenevinylene) -alt- (2-methoxy-5- (2 -ethylhexyloxy) -p-phenylenevinylene)], Poly [(p-phenylenevinylene) -alt- (2-methoxy-5- (2-ethylhexyloxy) -p-phenylenevinylene)], Poly [(o-phenylenevinylene) -alt- ( 2-methoxy-5- (2-ethylhexyloxy) -p-phenylenevinylene)], Poly [(m-phenylenevinylene) -alt- (2,5-dihexyl-p-phenylenevinylene)], Poly [tris (2,5-bis (hexyloxy) -1,4-phenylenevinylene) -al Polyphenylenevinylene compounds such as t- (1,3-phenylenevinylene)], Poly [9,9-bis- (2-ethylhexyl) -9H-fluorene-2,7-diyl], Poly (9,9-di- n-hexylfluorenyl-2,7-diyl), Poly (9,9-di-n-octylfluorenyl-2,7-diyl), Poly (9,9-di-n-dodecylfluorenyl-2,7-diyl), Poly It is a polyfluorene compound such as (9,9-N-dihexyl-2,7-fluorene-alt-9-phenyl-3,6-carbazole).

(Conductive layer deposition step S130)
In the conductive layer forming step S130, the second substrate 310 (hereinafter referred to as a transfer destination) serving as a transfer destination is used by using an electron beam evaporation method, a physical vapor deposition method, a sputtering method, or the like, as shown in FIG. A conductive layer 320 is formed on the surface of the front substrate 310).

  There is no limitation on the glass transition point (temperature at which glass transition occurs in the amorphous solid material) or melting point of the transfer destination substrate 310, but in this embodiment, the transfer destination substrate 310 has a glass transition point or melting point. It is composed of a material of less than 700 ° C.

The conductive layer 320 is a transparent conductive film, for example, indium oxide-based (ITO: tin-doped indium oxide), zinc oxide-based (AZO: aluminum-doped zinc oxide, GZO: gallium-doped zinc oxide), tin oxide-based. It is a transparent conductive film of (SnO ₂ ) or titanium oxide (TiO ₂ ).

(Contacting step S140)
In the contact step S140, the nanostructure layer 230 coated with the semiconductor 250 on the transfer source substrate 210 and the conductive layer 320 on the transfer destination substrate 310 are brought into contact with the hole transport layer 350 interposed therebetween. More specifically, a hole transport layer 350 is applied to one or both of the nanostructure layer 230 in the transfer source substrate 210 and the conductive layer 320 in the transfer destination substrate 310, for example, in the transfer source substrate 210. The nanostructure layer 230 is returned vertically downward to bring the nanostructure layer 230 into contact with the conductive layer 320.

  Then, as illustrated in FIG. 2D, a stacked body 360 in which the transfer destination substrate 310, the conductive layer 320, the hole transport layer 350, the nanostructure layer 230 coated with the semiconductor 250, and the transfer source substrate 210 are stacked in this order. Will be formed.

  The hole transport layer 350 includes, for example, a water-dispersed polythiophene derivative (PEDOT) using polystyrene sulfonic acid (PSS) as a water-soluble polymer and 3,4-ethylenedioxythiophene (EDOT) as a conductive polymer monomer. -PSS).

(Drying step S150)
In the drying step S150, the hole transport layer 350 is dried.

(Peeling step S160)
In the peeling step S160, the transfer source substrate 210 is peeled from the nanostructure layer 230 to which the semiconductor 250 is applied.

  As described above, when the nanostructure 220 is composed of carbon nanowalls, the peelability between the transfer source substrate 210 and the nanostructure layer 230 can be increased. Therefore, by using the nanostructure 220 as the carbon nanowall, the transfer source substrate 210 can be easily peeled from the nanostructure layer 230 coated with the semiconductor 250 in the peeling step S160.

  In this way, as shown in FIG. 2E, a semiconductor device 370 in which the conductive layer 320, the hole transport layer 350, and the nanostructure layer 230 coated with the semiconductor 250 are sequentially formed on the transfer destination substrate 310 is manufactured. . The semiconductor device 370 manufactured in this manner can be used as a solar cell when the semiconductor 250 is a mixture of an n-type semiconductor and a p-type semiconductor, and an LED (Light Emitting Diode) when the semiconductor 250 is a light emitting polymer. Or as a laser.

  As described above, according to the method for manufacturing a semiconductor device according to the present embodiment, the nanostructure 220 such as a carbon nanowall having high releasability is used as the compound having a fine shape, whereby the transfer source substrate 210 is peeled off. Even without forming a layer, the nanostructure layer 230 can be easily peeled from the transfer source substrate 210 in the peeling step S160. Therefore, it is possible to transfer a semiconductor having a fine shape to a substrate while reducing the steps for forming a release layer.

  In addition, since it is not necessary to form a release layer that does not contribute to the function of the semiconductor device or inhibits the function, it is possible to suppress the mixing of impurities. Therefore, it is possible to avoid a situation where the yield decreases when the semiconductor device 370 is manufactured.

  The semiconductor device 370 in which the nanostructure 220 and the conductive layer 320 are formed through the hole transport layer 350 can be preferably manufactured by the method for manufacturing a semiconductor device according to the present embodiment.

  For example, a method of forming the nanostructure layer 230 after forming the conductive layer 320 and the hole transport layer 350 on the transfer destination substrate 310 is also conceivable. However, the deposition temperature of the conductive layer 320 is less than 200 ° C., and the deposition temperature of the nanostructure layer 230 (when carbon nanowall is used) is about 500 ° C. Therefore, when the nanostructure layer 230 is formed, the temperature of the conductive layer 320 also rises to about 500 ° C., oxygen is released from the transparent conductive film in the conductive layer 320, and the function (conductivity) of the conductive layer 320 is increased. Will fall.

  Therefore, according to the manufacturing method of the semiconductor device according to the present embodiment, it is possible to manufacture the semiconductor device 370 on which the nanostructure layer 230 is formed without reducing the function of the conductive layer 320.

  Further, the transfer source substrate 210 on which the nanostructure 220 is formed is different from the transfer destination substrate 310 on which the nanostructure 220 is transferred, and the transfer (contact process S140, drying process S150, peeling process S160) is also performed at room temperature ( For example, since it can be performed at a low temperature of about 250 ° C., a substrate (transfer destination substrate 310) made of a material not having high heat resistance (a glass transition point or a material having a melting point of less than 700 ° C.) is used. The nanostructure 220 can be formed.

(Second Embodiment)
In the first embodiment described above, the manufacturing method for manufacturing the semiconductor device 370 as a solar cell by using a mixture of an n-type semiconductor and a p-type semiconductor as the semiconductor 250 has been described. In the present embodiment, a semiconductor device manufacturing method for manufacturing a solar cell without using a mixture of an n-type semiconductor and a p-type semiconductor will be described.

  FIG. 4 is a flowchart for explaining a process flow of the semiconductor device manufacturing method according to the second embodiment.

  As shown in FIG. 4, the nanostructure manufacturing method according to the present embodiment includes a nanostructure layer deposition step S110, a doping step S410, a semiconductor coating step S420, a conductive layer deposition step S130, and a contact step. S140, drying process S150, and peeling process S160 are comprised. Note that the nanostructure layer film forming step S110, the conductive layer film forming step S130, the contact step S140, the drying step S150, and the peeling step S160, which have already been described in the first embodiment, are substantially the same. The overlapping description is omitted, and here, the doping process S410 and the semiconductor coating process S420, which are different in processing, will be described in detail.

(Doping step S410)
In the doping step S410, the nanostructure layer 230 is doped with atoms. The atoms to be doped are selected depending on whether the nanostructure layer 230 is a p-type semiconductor or an n-type semiconductor. Here, the nanostructure layer 230 composed of carbon nanowalls will be described as an example.

  When the carbon nanowall (nanostructure layer 230) is a p-type semiconductor, B (boron) is doped. When the carbon nanowall (nanostructure layer 230) is an n-type semiconductor, N (nitrogen) is doped.

  When doping boron (B), for example, the following four methods can be mentioned, and when doping nitrogen (N), for example, the following two methods can be mentioned. Hereinafter, specific processing of the doping method will be described.

(Method 1 of doping boron)
Boron is implanted into the carbon nanowall (nanostructure layer 230) by high energy ion implantation of 10 keV or higher, and then the boron is thermally diffused by a laser or a heating furnace to recover the crystallinity of the carbon nanowall. . With the configuration utilizing ion implantation, boron can be doped into the carbon nanowall by a dry process, and contamination of impurities can be minimized. Further, since boron is implanted with high energy of 10 keV or more, a large amount of crystal defects can be formed in the carbon nanowall, and a site for doping (substitution) of boron can be formed.

(Method 2 of doping boron)
After the boron diffusion liquid is applied to the carbon nanowall by spin coating or the like, it is heated with a laser or a heating furnace. With this configuration, boron can be easily doped into the carbon nanowall without using a large-scale apparatus.

(Method 3 of doping boron)
Boron is formed on the surface of the carbon nanowall by sputtering or vapor deposition (for example, a film thickness of less than 1 nm), and then boron is thermally diffused by a laser or a heating furnace, thereby carbon nanowall. To restore the crystallinity. With the configuration in which boron is formed, boron can be doped into the carbon nanowall by a dry process, and contamination of impurities can be minimized. Further, boron can be doped on the entire surface of the carbon nanowall.

(Method 4 of doping boron)
In a gas atmosphere of an organic boron compound such as trimethylboron or triethylboron, the carbon nanowall is heated using a laser to thermally decompose the organic boron compound on the surface of the carbon nanowall. With this configuration, boron can be selectively doped only in the portion of the carbon nanowall heated by the laser.

(Method 1 of doping nitrogen)
Nitrogen is implanted into the carbon nanowall (nanostructure layer 230) by ion implantation, and then the crystallinity of the carbon nanowall is recovered by thermally diffusing nitrogen with a laser or a heating furnace. With the configuration using ion implantation, carbon nanowalls can be doped with nitrogen in a dry process, and contamination of impurities can be minimized. Further, since nitrogen is implanted with high energy such as 10 keV or more, a large amount of crystal defects can be formed in the carbon nanowall, and a site for doping (substitution) of nitrogen can be formed.

(Method 2 of doping nitrogen)
The carbon nanowall is exposed in a nitrogen plasma atmosphere. Thereby, nitrogen can be doped into the carbon nanowall by a dry process, and contamination of impurities can be minimized. Further, nitrogen can be easily doped into the carbon nanowall.

(Semiconductor coating process S420)
In the semiconductor coating step S420, an n-type semiconductor or a p-type semiconductor is applied (attached) to the nanostructure layer 230 as the semiconductor 250. In the doping step S <b> 410 described above, when the nanostructure layer 230 is doped with B atoms to make the nanostructure layer 230 a p-type semiconductor, an n-type semiconductor is applied as the semiconductor 250. On the other hand, in the above-described doping step S 410, when the nanostructure layer 230 is doped with N atoms to make the nanostructure layer 230 an n-type semiconductor, a p-type semiconductor is applied as the semiconductor 250. The n-type semiconductor and the p-type semiconductor are composed of the above-described compounds, for example.

  The nanostructure layer in which the conductive layer 320, the hole transport layer 350, and the semiconductor 250 are applied to the transfer destination substrate 310 through the conductive layer film forming step S130, the contact step S140, the drying step S150, and the peeling step S160. A semiconductor device having 230 deposited in this order is manufactured. The semiconductor device manufactured in this way can be used as a solar cell.

  As described above, according to the semiconductor device manufacturing method of the present embodiment, it is possible to transfer a semiconductor having a fine shape to a substrate while reducing the steps for forming a release layer.

  As mentioned above, although preferred embodiment of this invention was described referring an accompanying drawing, it cannot be overemphasized that this invention is not limited to this embodiment. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Is done.

  For example, in the above-described embodiment, an organic semiconductor is described as an example of the semiconductor 250, but an inorganic semiconductor can be applied to the nanostructure layer 230. In this case, nano ink (ink in which inorganic semiconductor nanoparticles are dispersed in a solvent) may be used as the coating agent.

  The laser used when doping boron or nitrogen may be a pulse laser or a CW (Continuous Wave) laser, but a pulse laser is more preferable. If a pulsed laser is used, low-melting glass is adopted as the transfer source substrate 210, and even when carbon nanowalls are formed on the low-melting glass (transfer source substrate 210), the transfer source substrate 210 is melted by heating. This is because destruction can be prevented.

  Note that the steps of the semiconductor device manufacturing method of the present specification do not necessarily have to be processed in time series in the order described in the flowchart.

The present invention can be utilized in the manufacture how the semiconductor device.

S110 ... Nanostructure layer deposition step S120 ... Semiconductor coating step S130 ... Conductive layer deposition step S140 ... Contact step S150 ... Drying step S160 ... Stripping step 210 ... Transfer source substrate (first substrate)
220 ... nanostructure 230 ... nanostructure layer 250 ... semiconductor 310 ... transfer destination substrate (second substrate, substrate)
320 ... conductive layer 350 ... hole transport layer 370 ... semiconductor device

Claims (5)

Forming a nanostructure layer by growing a plurality of nanostructures on the surface of the first substrate so as to extend in a direction perpendicular to the surface of the first substrate;
Filling the voids formed in the nanostructure layer with a semiconductor;
Forming a conductive layer on the surface of the second substrate;
Contacting the nanostructured layer coated with the semiconductor on the first substrate and the conductive layer on the second substrate with a hole transport layer interposed therebetween;
Drying the hole transport layer;
Peeling the first substrate from the nanostructured layer filled with the semiconductor;
Only including,
The method of manufacturing a semiconductor device, wherein the nanostructure is a carbon nanowall that is a monolayer or a multilayer of graphene sheets . The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor is a mixture of an n-type semiconductor and a p-type semiconductor. Before performing the step of filling the voids formed in the nanostructure layer with a semiconductor,
Doping the nanostructure layer with B;
The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor is an n-type semiconductor. Before performing the step of filling the voids formed in the nanostructure layer with a semiconductor,
Doping the nanostructure layer with N;
The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor is a p-type semiconductor. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor is a light emitting polymer.

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