JP6080490B2 - Information processing apparatus, activation method, and program - Google Patents

Description

  The present invention relates to a technique for rapidly starting an information processing apparatus having a hibernation mechanism.

  In recent years, hibernation that can reduce power consumption in a standby state in an information processing apparatus has attracted attention. Hibernation is a system interruption mechanism. While the system is activated, memory, CPU register, and device information (hereinafter referred to as a hibernation image) is saved in a non-volatile storage device such as a hard disk. Even if the power is turned off, the hibernation image is restored to the same state as before by reading the saved hibernation image at the next startup (hereinafter referred to as hibernation startup). Hibernation is sometimes used for the purpose of shortening the startup time of the system.

  There are two main types of system activation methods by hibernation. There are a method of performing recovery using a BIOS function or a boot loader function, and a method of performing recovery using a kernel function of an operating system.

  In the hibernation activation by the kernel function, after the kernel is initialized, the hibernation image stored in advance in the nonvolatile storage device is read to restore the state before the hibernation transition. Compared with BIOS hibernation, the device is initialized by executing a normal startup sequence, which is superior in versatility.

  Here, the hibernation by the kernel function requires a longer processing time than the hibernation by the BIOS or the boot loader, so that the startup time is long. Therefore, as in Patent Document 1, there is a method of compressing the entire hibernation image and saving it in a nonvolatile storage device.

JP 2001-022464 A

  When a DMA controller (direct memory access controller) is used, information can be read and written between storage devices in parallel with specific processing by the CPU. Therefore, if the DMAC can be incorporated in the hibernation activation, the hibernation image can be read in parallel with the kernel initialization, and the hibernation activation time can be shortened. However, on a kernel having a complicated memory management mechanism such as Linux (registered trademark), it is difficult for the DMA controller to access an unspecified area specified by the kernel or an area managed by the kernel. It is difficult to write data in Therefore, in the conventional hibernation activation method, it is difficult to read the hibernation image in parallel with kernel initialization and DMAC.

  For example, in order to realize the reading of compressed data in parallel with the kernel initialization using the technology for compressing the hibernation image as in Patent Document 1, an area to be read is necessary. It is difficult to simply secure from the free space at the time of kernel initialization. This is because the decompressed data must be arranged at the same address as before the hibernation transition, and this decompression destination may collide with the read destination of the compressed data.

  In a multi-core environment, another core can perform different processing while a specific core performs processing. If hibernation is activated, it is considered effective to decompress the compressed image in parallel with the kernel initialization. However, for the same reason as the DMA controller, it is difficult for the remaining cores to write the hibernation image to an arbitrary memory area while the kernel initialization is performed by a specific core. Therefore, with the conventional hibernation activation method, it is difficult to decompress the compressed image in parallel with the kernel initialization.

A volatile memory, a compression unit that compresses at least a portion of data held in the volatile memory into compressed data, uncompressed data that has not been compressed by the compression unit, and the compressed data as a hibernation image The compressed data held in the nonvolatile memory is stored in the nonvolatile memory in parallel with the nonvolatile memory to be held and the initialization of the kernel performed using a part of the volatile memory. Initialization data reading means for reading into an unused area that was not used when generating the hibernation image in an area not used for kernel initialization, and compression read into the volatile memory in parallel with the initialization of the kernel data, the volatile memory, the hibernation image production in a region not used to initialize the kernel And when the data expansion means initialization of expanding to at data before compression was present region, and characterized in that it has a starting means for starting the system by using the decompressed data by the initialization time of data decompression means To do.

  According to the present invention, a multi-core can be efficiently used to enable faster startup.

It is the schematic which shows the structure of information processing apparatus. It is the schematic which shows the function structure of the hibernation mechanism of this invention. It is a flowchart which shows the production | generation process of a hibernation image. It is a figure which shows the format of a hibernation image. It is a flowchart which shows the starting process of a system. It is a figure shown about the flow of the hibernation image at the time of kernel initialization. It is a flowchart which shows the return process of a hibernation image. It is a figure shown about the virtual memory at the time of hibernation starting.

  FIG. 1 shows a schematic configuration of the information processing apparatus 100. The CPU 101 and the direct memory access controller (hereinafter referred to as DMAC) 102 read / write data from / to the volatile memory 103 including a DRAM (including a DDR SDRAM). An input / output control unit (hereinafter referred to as an I / O controller) 104 reads / writes data in / from a nonvolatile storage device (flash memory, HDD, SSD, etc.) 105 as a nonvolatile memory based on a request from the CPU 101 or the DMAC 102. . The device 106 is a peripheral device that is initialized by the CPU 101, and various devices such as a PCI-connected graphic board, a USB-connected scanner, and a printer can be used as the device 106. The device 106 includes a status register that holds its own state and a configuration register that holds values used for processing (values corresponding to image processing parameters and values indicating processing modes). Note that there may be a plurality of devices 106.

  The CPU 101 includes a plurality of processor cores, expands a program included in the nonvolatile storage device 105 to the memory 103, fetches the program from the memory 103, and executes processing described later.

  The kernel initialization is performed mainly using a specific processor core of the CPU 101. This processor core is referred to as a boot core in the following description. A core other than the boot core is referred to as a slave core in the following description.

  Hibernation is a technique for saving the system state and restoring the saved system state, and data indicating the saved and restored system state is called a hibernation image (the format of the hibernation image will be described later). The hibernation image is stored in the nonvolatile storage device 105.

  Here, the flow of a general hibernation process is shown. When a user (or user application) requests a system interruption, a hibernation image is generated based on the data written in the memory 103, the data indicating the state of the other device 106, and the register value of the CPU 101. Is written to the volatile storage device 105. When the information processing apparatus is turned off and restarted, kernel initialization is started. Immediately after the initialization of the kernel, the hibernation image is read from the nonvolatile storage device 105 to the memory 103, and the state immediately before the system interruption is restored. In the following description, the activation sequence using the hibernation image is referred to as hibernation activation.

  In this embodiment, the speedup of hibernation activation will be described using Linux (registered trademark) version 2.6.18 as a conventional method.

  In Linux (registered trademark), memory management is performed in units of pages. The area described below means a memory range composed of one or a plurality of pages.

  FIG. 2 is a diagram illustrating a configuration of the hibernation mechanism according to the present embodiment. In (A) to (E), each state of hibernation in the same system is shown.

  (A) A case where a hibernation image is generated will be described. Reference numeral 203 denotes a compression unit. The in-use area in the memory 200 is compressed page by page and output to the nonvolatile storage device 201 as part of the hibernation image. However, some pages have a low compression ratio, and it is desirable that compression is not performed. Therefore, if the page has a low compression rate, it is output to the nonvolatile storage device 201 as a part of the hibernation image without being compressed. However, an area for storing a variable for performing hibernation processing (hereinafter referred to as a hibernation processing area) is not included in the hibernation image. In order to prevent the address value from changing even when the system is restarted, the hibernation processing area is statically secured from an area (described later) that is used for kernel management when hibernation starts.

  Reference numeral 202 denotes a work area data generation unit (area information generation unit). In this embodiment, since all compressed data is read during kernel initialization, an area for the reading is secured from an unused area when the hibernation image is generated. Therefore, the work area data generation unit 202 collects addresses of unused areas in the memory 200, collects this information in a page conversion table, and outputs the information to the nonvolatile storage device 201 as part of the hibernation image. The data of the page conversion table is called work area data (or area information), and the area indicated by the data is called a work area.

  (B) Shown at the start of kernel initialization. Reference numeral 204 denotes a memory restriction unit, and 205 denotes a memory initialization mechanism. The memory restriction unit 204 instructs the memory initialization mechanism 205 to restrict the memory area managed by the operating system, and the memory initialization mechanism 205 initializes the memory 200 based on this information. Due to this limitation, the memory 200 is divided into a kernel management area and a non-kernel management area. The purpose of this limitation is to intentionally create a non-kernel management area so that data can be read and decompressed in the non-kernel management area in parallel with the kernel initialization processing by the boot core.

  Reference numeral 206 denotes a work area validation unit. First, the work area data generated by the work area data generation unit 202 is read into an area outside the kernel management in the memory 200. Then, by overwriting a part of this information on the currently used page conversion table, the work area for storing the compressed data can be used.

  (C) Kernel initialization is shown. Reference numeral 207 denotes a kernel initialization mechanism. The kernel is initialized by the boot core within the range of the kernel management area initialized by the memory initialization mechanism 205 of the memory 200. Reference numeral 208 denotes an initialization data reading unit, and reference numeral 209 denotes a DMAC. The initialization data reading unit 208 uses the DMAC 209 to read hibernation images stored in the nonvolatile storage device 201 sequentially into the work area in parallel with the initialization process by the kernel initialization mechanism 207. However, uncompressed data is read into the area where the data originally existed when the hibernation image was generated. Reference numeral 210 denotes an initialization data decompression unit (primary decompression unit). The compressed data read into the memory 200 by the data reading unit at the time of initialization is further expanded in parallel with the kernel initialization by the slave core to the area of the memory 200 where the data originally existed when the hibernation image was generated.

  (D) Shown after kernel initialization. Reference numeral 211 denotes a data reading unit after initialization. First, when the initialization data reading unit 208 has not finished reading data other than uncompressed data, the data reading is completed. Reference numeral 212 denotes a post-initialization data decompression unit (secondary decompression unit). Uncompressed compressed data read into the memory 200 is expanded to the area of the memory 200 where the data originally existed when the hibernation image was generated. In parallel with the decompression by the post-initialization data decompression unit 212, the post-initialization data reading unit 211 uses the DMAC 209 to transfer the uncompressed data to the area of the memory 200 where the data originally existed when the hibernation image was generated. Read. The post-initialization data reading unit 211 need not distinguish between the kernel management area and the non-kernel management area.

  (E) After the hibernation is started. By the processing from (B) to (D), the memory 200 is returned to the same state as in (A) except for the hibernation processing area. In the following description, the process of the post-initialization data reading unit 211 is referred to as a memory restoration process.

  In addition, the work area data generation unit 202 and compression unit 203, the memory restriction unit 204, the memory initialization mechanism 205, the kernel initialization mechanism 207, the work area validation unit 206, the initialization data reading unit 208, and the initialization data decompression The unit 210, the post-initialization data reading unit 211, and the post-initialization data decompression unit 212 are processed based on a program stored in the nonvolatile storage device.

  From here, the flow of hibernation image generation in this embodiment is shown.

  FIG. 3 is a flowchart showing the processing flow of the CPU 101 from when the user (or user application) requests to enter the system interruption state until the system stops. First, the outline will be described. In step S300, the CPU 101 stops the process scheduler. In step S301, the CPU 101 stops each device and restricts interrupts to the CPU 101. In step S302, the CPU 101 saves the CPU register. In step S303, the CPU 101 generates and outputs a hibernation image. In step S304, the CPU 101 stops the system.

  In the following description, step S300, step S301, and step S302 are referred to as system interruption processing, and the details of the flowchart of FIG. 3 will be described. In step S300, when the CPU 101 stops all processes, the memory contents are not changed by process processing thereafter. In step S301, the CPU 101 stores the state of each device in the memory, and invalidates access to the subsequent devices. In step S302, the CPU 101 saves the contents of the CPU register on the memory. By this system interruption process, all information representing the system state is stored in the memory. Therefore, save this memory content in a nonvolatile storage device, read it to the memory as necessary, reset the state of each saved device and CPU register, restart the interrupt and process scheduler, The system state can be restored.

  In step S303, the CPU 101 generates a hibernation image from the memory area where the system state is held by the system interruption process, and outputs the hibernation image to the nonvolatile storage device. FIG. 4 is a diagram showing the format of the hibernation image. The header 400 is information regarding the hibernation image, and includes an identifier indicating whether the image is a valid hibernation image, the size of uncompressed data, and the size of compressed data. The work area data 401 stores page conversion table data. The compressed data 403 stores a compressed page, a size after compression, and an expansion destination address. Uncompressed data 404 stores an uncompressed page, and uncompressed data address 402 stores a read destination address of uncompressed data 404.

  Next, the format of the work area data 401 is shown.

  The work area data 401 is data indicating a work area into which a hibernation image is read when hibernation is activated, and is stored as a page conversion table. By storing in this way, discontinuous unused pages on the physical memory can be handled as a continuous area on the virtual memory. The page conversion table is composed of one or more conversion pages in stages. In the following description, the first conversion page is referred to as a page global directory, and the second and subsequent conversion pages are referred to as page tables.

  In an item corresponding to the work area of the page global directory 409, physical memory addresses and status flags of a plurality of page tables 410 are described. Then, according to the stage as the page conversion table, they are arranged and connected in order from the first stage conversion page.

  Furthermore, the page conversion table of the work area data 401 includes mapping information of the kernel management area when the hibernation image is generated. This information is used to access the decompression destination of the compressed data when hibernation is activated.

  Next, the formats of the uncompressed data address 402 and the uncompressed data 406 are shown.

  The non-compressed data address 402 and the non-compressed data 406 have a correspondence relationship, and the location where the Nth stored data of the uncompressed data 406 is arranged is the Nth stored address of the uncompressed data address 402. The non-compressed page address 411 stored in the Nth and the non-compressed page 412 stored in the Nth are in a correspondence relationship. The number of information of the uncompressed data address 402 is equal to the number of information of the uncompressed data 406.

  The uncompressed data 406 includes two types of data: uncompressed data 407 to be restored to the non-kernel management area and uncompressed data 408 to be restored to the kernel management area. The reason for this division is that the hibernation image that can be read at the time of kernel initialization is limited to the header 400 to the uncompressed data 407, and the uncompressed data 408 can be read only after the kernel initialization. . Therefore, the non-compressed data 407 is arranged ahead of the non-compressed data 408. Until the kernel initialization is completed, the header 400 to the uncompressed data 407 are read.

  Finally, the format of the compressed data 403 will be described.

  Reference numeral 413 denotes information generated when one page of data is compressed, and includes a compressed page size 414, a compressed page address 415, and a compressed page 416. Compression is performed in units of pages. Based on these pieces of information, data for one page can be restored to the memory.

  For example, in a CPU having an address size of 32 bits, the compressed page size 414 is set to 12 bits, and the compressed page address 415 is set to 20 bits (a size capable of specifying a page of 4 GB). In this case, the compressed page 416 must be less than 4096 bytes that can be expressed in 12 bits. If the size after compression is 4096 bytes or more, the page before compression is stored in the uncompressed data 406.

  Next, pages stored in the compressed data 403 and the uncompressed data 406 will be described. The size of the compressed data 403 may be specified in advance by the user (or user application) as an upper limit size. In the work area, not only the compressed data 403 but also the non-compressed data address 402 and the stack at the time of decompressing the compressed data are stored. Therefore, the size of the compressed data 403 must be smaller than the value obtained by removing these sizes from the work area size. When the size of the compressed data 403 reaches the upper limit and no more pages can be stored, an unstored page is stored in the uncompressed data 406.

  Similar to the non-compressed data 406, the compressed data 403 is composed of two types of compressed data 404 to be restored to the non-kernel management area and compressed data 405 to be restored to the kernel management area. The reason for dividing in this way is the same as the reason for dividing the non-compressed data 406. Until the kernel initialization is completed, only the compressed data 405 is targeted for decompression.

  The hibernation image generated by the above processing is stored in a physically continuous state in a format independent of the file system in a designated area after enabling the nonvolatile storage device.

  Next, the flow of hibernation activation in this embodiment is shown. When the information processing apparatus is turned on, the BIOS and the boot loader perform processing as necessary, and kernel initialization is started.

  FIG. 5 is a flowchart from the start of kernel initialization to the restoration of the hibernation image and a flowchart showing details of the system restoration process in the present embodiment. First, the former is shown. In step S500, the DMAC 102 reads information in a predetermined area of the non-volatile storage device, and the CPU 101 confirms that a valid hibernation image exists in the predetermined area of the non-volatile storage device in the read information. In step S501, the CPU 101 initializes the memory management mechanism. In step S502, the CPU 101 initializes the interrupt mechanism. In step S503, the CPU 101 initializes the slave core. In step S504, the CPU 101 starts parallel reading of the hibernation image and expansion of the compressed data. In step S505, the CPU 101 initializes other functions, and in parallel, the DMAC 102 reads the uncompressed data address 402, the compressed data 403, and the uncompressed data 407 in order. In step S506, the CPU 101 and the DMAC 102 perform memory restoration processing and preparation.

  In step S500, the CPU 101 initializes the DMAC 102 and the I / O controller 104, and the DMAC 102 reads the hibernation image header 400 stored in a predetermined area of the nonvolatile storage device into the memory. When the identifier included in the header 400 is valid, the CPU 101 determines that the hibernation image is stored in the nonvolatile storage device. FIG. 5 is a flowchart showing a case where a hibernation image exists in the nonvolatile storage device. When it is determined that the hibernation image is not stored in the nonvolatile storage device, the system is normally started.

  In step S501, the CPU 101 limits the memory range managed by the kernel to a specified size, and initializes the memory management mechanism. Specifically, the range of the kernel management area is limited by changing the memory map. It is determined from the minimum necessary memory size required for the kernel initialization process, and the limit size is secured at least larger than the size necessary for kernel initialization. With this process, two types of areas, a kernel management area and a non-kernel management area, are secured in the memory. This restriction is removed by completing the memory restoration process.

  In step S501, the CPU 101 generates a page conversion table for accessing the kernel management area. The page global directory of this page conversion table is referred to as a kernel PGD (Page Global Directory). Further, the page conversion table of the work area data 401 is read into the memory. The page global directory of this page conversion table is referred to as hibernation PGD. Then, the information regarding the work area of the hibernation PGD is overwritten on the area not used in the kernel initialization of the kernel PGD, thereby ensuring that the work area can be used.

  However, the page conversion table of the work area data 401 read into the memory must not be overwritten with kernel initialization data, compressed data, uncompressed data, and decompressed data. Therefore, since there is always one page global directory in the work area data 401, it is read into the hibernation processing area. Thereby, overwriting can be prevented. However, since the number of page tables in the work area data 401 is not fixed, it is difficult to reserve an area for holding in the kernel management area. Therefore, each page table is read into the kernel management area, and then the non-kernel management area is temporarily made available from the kernel, and each page table is moved to a predetermined area of the kernel management area.

  In step S504, parallel reading of the hibernation image and decompression of the compressed data are started. First, the interrupt mechanism initialized in step S502 of the DMAC 102 is used as means for performing parallel reading. In the DMAC, it is necessary to specify a physical address instead of a virtual address. Therefore, using the page conversion table, the virtual address that is the reading destination of the work area is converted into a physical address and specified in the DMAC 102. Next, the slave core initialized in S503 is used as a means for performing decompression. The compressed data 404 of the hibernation image read by the DMAC 102 is expanded.

  FIG. 6 is a diagram showing the flow of the hibernation image at the time of kernel initialization. Reference numeral 600 denotes a memory having a kernel management area 601 and a non-kernel management area 602. Reference numeral 603 denotes a boot core, and the boot core 603 accesses only the kernel management area 601. Therefore, the non-kernel management area 602 is not accessed from the boot core 603 and can be used as an independent area. Reference numeral 604 denotes a DMAC, and reference numeral 605 denotes a nonvolatile storage device. The DMAC 604 stores the uncompressed data address 402 and the compressed data 403 in order from the head of the work area of the kernel non-management area 602 in parallel with the initialization of the kernel by the boot core 603. Read. When all the data has been read, the uncompressed data 407 is then read according to the uncompressed data address 402. As described above, the page of the non-compressed data 407 returns to the area excluding the work area and the non-kernel management area 602, so that the work area and the kernel management area are not overwritten. A slave core 606 further decompresses the compressed data 404 read by the DMAC 604 in parallel with the initialization of the kernel by the boot core 603. Similar to the parallel reading, the decompression process does not overwrite the work area and the kernel management area. However, the decompression destination of the compressed data 405 is the kernel management area 601, and if decompression is performed at the time of kernel initialization, the kernel management area 601 is overwritten, so the decompression of the compressed data 405 cannot be performed yet. When a plurality of slave cores are available, the decompression process may be performed in multiple.

  In general, when a DMA specifies parameters (transfer source address, transfer destination address, data size) used for data transfer, the DMAC performs transfer from the nonvolatile storage device to the memory asynchronously with the CPU. In addition, since the DMAC has a size that can be transferred at a time, it is necessary to designate a new parameter again by the CPU for each transfer of a specific size. Therefore, in the present embodiment, an interrupt notification for notifying the completion of transfer by the DMAC 102 is used, and data to be read next is designated and new reading is executed. In addition, an interrupt is generated at regular intervals using a timer, and the CPU 101 confirms the reading status of the DMAC 102, and if reading is completed, designates data to be read next and executes a new reading. May be. In addition, the reading status of the DMAC 102 may be continuously confirmed using a slave core.

  The compressed page 416 is decompressed according to the compressed page size 414 and the compressed page address 415. Since the compressed page address 415 indicates an area other than the work area, the undecompressed compressed data is not overwritten.

  The parallel reading at the time of kernel initialization by the DMAC 102 is continuously performed until the uncompressed data address 402, the compressed data 403, and the uncompressed data 407 are completely read or the preparation for restoring the memory in the kernel management area is completed. Parallel decompression by the slave core is also continued until decompression of the compressed data 404 is completed or preparation for restoring the memory in the kernel management area is completed.

  FIG. 7 is a flowchart showing details of the system recovery process. In step S707, the CPU 101 stops the process scheduler, and in step S708, the CPU 101 stops each device and restricts interrupts. In step S709, the CPU 101 switches the virtual memory from the kernel PGD to the hibernation PGD. In step S710, the CPU 101 switches the stack. In step S711, the CPU 101 stops parallel reading by the DMAC 102. In step S712, the CPU 101 and the DMAC 102 restore the memory. I do.

  In step S709, the CPU 101 switches the page conversion table. In the x86 environment, the switching is completed by rewriting the value of the CPU register CR3 from the address of the kernel PGD to the address of the hibernation PGD. There are two reasons for this process. The first point is that the kernel PGD is a mapping that reflects memory limitations and is insufficient for accessing the decompression destination. Since the hibernation PGD is a mapping before the memory limit, it is possible to access all the expansion destinations by switching to this page conversion table. The second point is that the kernel PGD is rewritten during the memory restoration process. As described above, the hibernation PGD is secured in the hibernation processing area, so that it is not rewritten during the memory restoration process.

  FIG. 8 is a diagram showing an example of a virtual memory at the time of hibernation activation when the present embodiment is applied to an x86 environment. Reference numeral 800 denotes a CPU register CR3, reference numeral 801 denotes a kernel PGD, and reference numeral 804 denotes a hibernation PGD. Reference numeral 802 denotes memory management-limited mapping information of the kernel management area, reference numeral 805 denotes kernel management area mapping information that is not memory-limited, and reference numerals 803 and 806 denote work area mapping information. The work area mapping information 803 and the work area mapping information 806 are the same. The CPU register CR3 800 before step S708 indicates the kernel PGD 801, and the CPU register CR3 800 indicates the hibernation PGD 804 by step S709.

  In step S710, the CPU 101 switches the stack usage destination. This is because the contents of the conventional stack are rewritten during the memory restoration process. In addition, since the stack at the switching destination needs to be prevented from being overwritten, the end of the work area is designated. Note that the stack is restored in S1006.

  In step S711, the CPU 101 stands by until the DMAC 102 stops. However, if the parallel reading process by the DMAC 102 has already been completed, the CPU 101 does not wait.

  In step S712, the DMAC 102 reads the hibernation image in parallel with the decompression of the compressed data. The decompression process is performed for each page by the boot core and the slave core. Parallel reads are realized by polling the boot core, not by interrupts. The boot core sequentially checks the completion of the DMAC 102 in a loop process for expanding each page, and designates a new data transfer parameter for the DMAC 102. This processing may be performed by the slave core instead of the boot core. In step S712, since kernel processing is not performed, data in both the kernel management area and the non-kernel management area can be rewritten. The above processing is repeated until both decompression of all compressed data and reading of all uncompressed data are completed.

  With the above processing, the memory is returned to the same state as that immediately after step S301 except for the hibernation processing area. After the memory is restored, the CPU register value is restored, each device information is restored, the interrupt is resumed, and the process scheduler is resumed by the processing of the CPU 101 to complete the hibernation activation. .

  As described above, in this embodiment, when the system is restarted using the hibernation image, the hibernation image is read in parallel with the kernel initialization and the compressed hibernation image is expanded in parallel with the kernel initialization. In addition, by reading uncompressed data in parallel with the decompression after the kernel initialization, the system can be restored at a higher speed than the conventional method.

  Note that the initialization data reading unit (first reading unit) 209 and the post-initialization data reading unit (second reading unit) 211 may be integrated, in which case the DMAC is configured integrally. It is preferable to do.

The present invention can also be realized by executing the following processing. That is, software (program) that realizes the functions of the above-described embodiments is supplied to a system or apparatus via a network or various storage media, and the computer (or CPU, MPU, etc.) of the system or apparatus reads the computer. This is a process of reading and executing a possible program.

Claims (14)

Volatile memory,
Compression means for compressing at least a portion of data held in the volatile memory into compressed data;
A non-volatile memory that holds uncompressed data that has not been compressed by the compression means and the compressed data as a hibernation image;
In parallel with the initialization of the kernel performed using a part of the volatile memory, the compressed data stored in the nonvolatile memory is not used for the initialization of the kernel of the volatile memory. Initialization data reading means for reading into an unused area that was unused when the hibernation image was generated in the area ;
In parallel with the initialization of the kernel, there is pre-compression data when the hibernation image is generated in an area of the volatile memory where the compressed data read into the volatile memory is not used for initialization of the kernel. Initializing data decompression means for decompressing to the area that was
An information processing apparatus comprising: an activation unit that activates the system using the data expanded by the initialization data expansion unit.   A post-initialization data decompression unit that decompresses compressed data read into the volatile memory after the kernel initialization, and the non-initialization data decompression unit held in the nonvolatile memory in parallel with the post-initialization data decompression unit And a post-initialization data reading means for reading compressed data into the volatile memory, and the start-up means uses the data expanded by the post-initialization data expansion means and the volatile memory by the post-initialization data read means. The information processing apparatus according to claim 1, wherein the system is started based on the uncompressed data read into the system.   2. The memory management unit according to claim 1, further comprising: a memory management unit that allocates a kernel management area used for initialization of the kernel and a non-kernel management area not used for initialization of the kernel to the volatile memory. Information processing device.   4. The information processing according to claim 1, wherein the activation unit performs normal activation without using the hibernation image when the hibernation image is not saved in the nonvolatile memory. 5. apparatus.   The information processing apparatus according to claim 1, further comprising a saving unit that saves the hibernation image in the nonvolatile memory.   The information processing apparatus according to claim 5, wherein the saving unit saves a hibernation image of a file type independent of a file system in the nonvolatile memory.   The said compression means compresses the data currently hold | maintained in the said volatile memory for every predetermined size, and it is judged whether it hold | maintains as compressed data according to a compression rate. The information processing apparatus according to any one of claims.   The information processing apparatus according to claim 3, wherein the memory management unit sets the size of the kernel management area to be equal to or larger than a size necessary for initialization of the kernel. The initialization data reading means reads the compressed data held in the nonvolatile memory using the DMAC into the non-kernel management area,
4. The information processing apparatus according to claim 3 , wherein when reading of all the compressed data held in the nonvolatile memory is completed, the non-compressed data is read into the non-kernel management area.   The initialization data decompression means uses a slave core that is not used in the initialization of the kernel, and decompresses the compressed data read into the volatile memory to an area outside the management of the kernel. The information processing apparatus according to any one of claims 1 to 9.   3. The initialization data decompression unit and the post-initialization data decompression unit decompress the data after decompression into the volatile memory so as not to overwrite uncompressed compressed data. Information processing device.   3. The information processing apparatus according to claim 2, wherein the post-initialization data reading means uses the DMAC to read the uncompressed data held in the nonvolatile memory into the volatile memory. An information processing apparatus activation method comprising: a volatile memory; and a non-volatile memory that holds a hibernation image including compressed data and non-compressed data.
In parallel with the initialization of the kernel to be expanded in the volatile memory, the compressed data held in the nonvolatile memory is not used when the hibernation image is generated in an area not used for initialization of the kernel. A primary expansion step of reading into a use area and expanding the read compressed data to an area where data before compression existed when the hibernation image was generated in an area not used for initialization of the kernel;
After the initialization of the kernel, secondary data that decompresses uncompressed compressed data in the primary decompression process to the volatile memory while reading uncompressed data held in the nonvolatile memory into the volatile memory. Stretching process;
An activation method comprising an activation step of activating a system using data expanded in the primary expansion step and the secondary expansion step. A computer comprising: a volatile memory; and a nonvolatile memory that holds a hibernation image including compressed data and non-compressed data.
In parallel with the initialization of the kernel to be expanded in the volatile memory, the compressed data held in the nonvolatile memory is not used when the hibernation image is generated in an area not used for initialization of the kernel. A primary expansion step of reading into a use area and expanding the read compressed data to an area where data before compression existed when the hibernation image was generated in an area not used for initialization of the kernel;
After the initialization of the kernel, secondary data that decompresses uncompressed compressed data in the primary decompression process to the volatile memory while reading uncompressed data held in the nonvolatile memory into the volatile memory. Stretching process;
A program for executing a startup process for starting a system using the data expanded in the primary expansion process and the secondary expansion process.

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