JP6033493B1 - Copper-based alloy sputtering target - Google Patents
Copper-based alloy sputtering target Download PDFInfo
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- JP6033493B1 JP6033493B1 JP2016507945A JP2016507945A JP6033493B1 JP 6033493 B1 JP6033493 B1 JP 6033493B1 JP 2016507945 A JP2016507945 A JP 2016507945A JP 2016507945 A JP2016507945 A JP 2016507945A JP 6033493 B1 JP6033493 B1 JP 6033493B1
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- 239000010949 copper Substances 0.000 title claims abstract description 89
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 79
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 79
- 238000005477 sputtering target Methods 0.000 title claims abstract description 46
- 229910045601 alloy Inorganic materials 0.000 title claims abstract description 32
- 239000000956 alloy Substances 0.000 title claims abstract description 32
- 239000011241 protective layer Substances 0.000 claims abstract description 59
- 238000000137 annealing Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 23
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 21
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 19
- 239000011521 glass Substances 0.000 claims abstract description 16
- 239000012535 impurity Substances 0.000 claims abstract description 13
- 239000000470 constituent Substances 0.000 claims description 2
- 230000001681 protective effect Effects 0.000 claims description 2
- 229910052718 tin Inorganic materials 0.000 description 13
- 230000000052 comparative effect Effects 0.000 description 12
- 239000010410 layer Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 9
- 230000003647 oxidation Effects 0.000 description 9
- 238000007254 oxidation reaction Methods 0.000 description 9
- 229910000881 Cu alloy Inorganic materials 0.000 description 8
- 238000000034 method Methods 0.000 description 8
- 238000004544 sputter deposition Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- 238000011156 evaluation Methods 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
- 239000011572 manganese Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000010273 cold forging Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- 238000005242 forging Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000005098 hot rolling Methods 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000000870 ultraviolet spectroscopy Methods 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
- C23C14/3414—Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C9/00—Alloys based on copper
- C22C9/01—Alloys based on copper with aluminium as the next major constituent
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C9/00—Alloys based on copper
- C22C9/02—Alloys based on copper with tin as the next major constituent
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/18—Metallic material, boron or silicon on other inorganic substrates
- C23C14/185—Metallic material, boron or silicon on other inorganic substrates by cathodic sputtering
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
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Abstract
本発明の銅基合金スパッタリングターゲットは、スズを４質量％以上１６質量％以下、及びアルミニウムを４質量％以上１１質量％以下含み、残部が銅及び不可避不純物を含む。本発明のターゲットは、該ターゲットを使用してガラス基板上に直接形成された保護層のアニール前の室温（２５℃）における体積抵抗率をＲ１とし、前記保護層を大気雰囲気下において３５０℃で３０分間にわたりアニールした後の体積抵抗率をＲ2としたとき、Ｒ１＞Ｒ２となることが好適である。The copper-based alloy sputtering target of the present invention contains 4% by mass to 16% by mass of tin, 4% by mass to 11% by mass of aluminum, and the balance contains copper and inevitable impurities. In the target of the present invention, the volume resistivity at room temperature (25 ° C.) before annealing of the protective layer directly formed on the glass substrate using the target is R1, and the protective layer is at 350 ° C. in an air atmosphere. When the volume resistivity after annealing for 30 minutes is R2, it is preferable that R1> R2.
Description
本発明は、銅基合金スパッタリングターゲットに関する。 The present invention relates to a copper-based alloy sputtering target.
液晶ディスプレイやプラズマディスプレイ等のフラットパネルディスプレイは、多数の薄膜トランジスタ（ＴＦＴ）を有するものであり、その配線にはアルミニウムが用いられている場合が多い。近年ではフラットパネルディスプレイが大型化や高精細化しており、このことに起因して信号の高速化の要求が高まっている。その要求に対応すべく、ＴＦＴの配線の一層の低抵抗化が必要となる。 Flat panel displays such as liquid crystal displays and plasma displays have many thin film transistors (TFTs), and aluminum is often used for the wiring. In recent years, flat panel displays have been increased in size and definition, and as a result, there has been an increasing demand for signal speedup. In order to meet this requirement, it is necessary to further reduce the resistance of the TFT wiring.
配線の低抵抗化の観点から、配線材料としてアルミニウムよりも抵抗の低い金属である銅が用いられつつある。銅自体はアルミニウムよりも抵抗は低いものの、高温の大気や酸素を含む雰囲気に曝されると酸化されやすく、そのことに起因して高抵抗化してしまうという欠点がある。 From the viewpoint of reducing the resistance of wiring, copper, which is a metal having a resistance lower than that of aluminum, is being used as a wiring material. Although copper itself has a lower resistance than aluminum, it has a drawback that it is easily oxidized when exposed to high-temperature air or an atmosphere containing oxygen, resulting in high resistance.
銅配線の酸化を防止する観点から、銅配線の表面に保護層を設ける方法が提案されている。例えば特許文献１には、Ｃｒ、Ｔｉ、Ｖ、Ａｌ、Ｔａ、Ｃｏ、Ｚｒ、Ｎｂ、Ｍｏを含み、残部が銅と不可避的不純物であるＣｕ合金スパッタリングターゲットを用いて保護層を形成することが記載されている。特許文献２には、Ｎｉを含み、更にＡｌ及び／又はＴｉを含み、残部がＣｕからなるＣｕ合金を用いてＣｕ配線保護層を形成することが記載されている。特許文献３には、Ｎｉ及びＭｇを含み、残部がＣｕからなるＣｕ合金を用いてＣｕ配線保護層を形成することが記載されている。 From the viewpoint of preventing the copper wiring from being oxidized, a method of providing a protective layer on the surface of the copper wiring has been proposed. For example, Patent Document 1 discloses that a protective layer is formed using a Cu alloy sputtering target containing Cr, Ti, V, Al, Ta, Co, Zr, Nb, and Mo, the balance being copper and inevitable impurities. Have been described. Patent Document 2 describes forming a Cu wiring protective layer using a Cu alloy containing Ni, further containing Al and / or Ti, and the balance being Cu. Patent Document 3 describes that a Cu wiring protective layer is formed using a Cu alloy containing Ni and Mg, with the balance being Cu.
特許文献４には、Ｚｎ、Ｎｉ及びＭｎを含み、残部がＣｕと不可避不純物とからなるスパッタリングターゲットを用いてＣｕ配線の保護層を形成することが記載されている。特許文献５には、Ａｌ、Ｆｅ、Ｎｉ及びＭｎを含み、残部がＣｕと不可避不純物とからなるスパッタリングターゲットを用いてＣｕ配線の保護層を形成することが記載されている。 Patent Document 4 describes that a protective layer for Cu wiring is formed using a sputtering target containing Zn, Ni, and Mn, with the balance being Cu and inevitable impurities. Patent Document 5 describes that a protective layer for Cu wiring is formed using a sputtering target containing Al, Fe, Ni, and Mn, with the balance being Cu and inevitable impurities.
一方で、Ｍｏ基合金を用いて保護層を形成する方法も提案されている。例えば特許文献６には、Ｍｏ、Ｎｉ及びＷを含み、残部が不可避的不純物からなる保護層が、３５０℃大気中でも耐酸化性を有することが記載されている。 On the other hand, a method of forming a protective layer using a Mo-based alloy has also been proposed. For example, Patent Document 6 describes that a protective layer containing Mo, Ni, and W, the balance being made of inevitable impurities, has oxidation resistance even in the air at 350 ° C.
前述した特許文献１ないし５に記載の材料を用いれば、ある程度の温度範囲までであれば、銅配線が酸化されることを防止できる。しかし、フラットパネルディスプレイ等の製造プロセスの温度は今後一層高くなることが予想され、そのような高温領域、例えば２５０℃を超える高温領域では、前述した各特許文献に記載の材料を用いても、銅配線の酸化を防止することは困難である。一方、Ｍｏ基合金を保護層に用いると、該保護層をＣｕ配線と一括でエッチングする際に、一般に両者のエッチング速度の差が大きいため、テーパー部に段差が生じるなど、所望のパターン形状が得られない場合がある。このため、保護層としては、Ｃｕ配線とのエッチング速度の差が少ない材料を用いることが望ましい。 If the materials described in Patent Documents 1 to 5 described above are used, the copper wiring can be prevented from being oxidized within a certain temperature range. However, the temperature of manufacturing processes such as flat panel displays is expected to become higher in the future, and in such a high temperature region, for example, a high temperature region exceeding 250 ° C., even if the materials described in the above-mentioned patent documents are used, It is difficult to prevent the copper wiring from being oxidized. On the other hand, when a Mo-based alloy is used for the protective layer, when the protective layer is etched together with the Cu wiring, since the difference between the two etching rates is generally large, a desired pattern shape such as a step in the tapered portion is produced. It may not be obtained. For this reason, it is desirable to use a material having a small etching rate difference with the Cu wiring as the protective layer.
したがって、本発明の課題は銅配線の酸化の防止にあり、更に詳しくは、高温領域においても銅配線の酸化を効果的に防止し得る銅配線保護層形成用の銅基合金スパッタリングターゲットを提供することにある。 Accordingly, an object of the present invention is to prevent copper wiring from being oxidized, and more specifically, to provide a copper-based alloy sputtering target for forming a copper wiring protective layer that can effectively prevent oxidation of copper wiring even in a high temperature region. There is.
本発明は、スズを５質量％以上１６質量％以下、及びアルミニウムを４質量％以上１１質量％以下含み、残部が銅及び不可避不純物を含む、銅配線保護層形成用の銅基合金スパッタリングターゲットを提供することで、前記課題を解決したものである。
また本発明は、スズを４質量％以上１６質量％以下、及びアルミニウムを５質量％以上１１質量％以下含み、残部が銅及び不可避不純物を含む、銅配線保護層形成用の銅基合金スパッタリングターゲットを提供することで、前記課題を解決したものである。
The present invention provides a copper-based alloy sputtering target for forming a copper wiring protective layer containing 5 mass% to 16 mass% of tin, 4 mass% to 11 mass% of aluminum, and the balance containing copper and inevitable impurities. By providing, the above-mentioned problems are solved.
In addition, the present invention provides a copper-based alloy sputtering target for forming a copper wiring protective layer, containing 4 mass% to 16 mass% of tin, 5 mass% to 11 mass% of aluminum, and the balance containing copper and inevitable impurities. By providing the above, the above-mentioned problems are solved.
以下本発明を、その好ましい実施形態に基づき説明する。本発明のスパッタリングターゲットは銅基合金からなる。本発明のスパッタリングターゲットは、銅配線の上に保護層を形成するために使用されるものである。本発明において銅配線とは、銅又は銅合金からなる電気回路の配線のことであり、一般には各種の薄膜形成方法によって形成された薄膜層から構成されている。銅配線を構成する銅合金としては、合金成分としてマンガン、マグネシウム、ビスマス、インジウム等から選択される１種又は２種以上の元素を含む銅基合金が挙げられる。これらの合金成分は、銅合金中に０．０１原子％以上２０原子％以下の割合で含有させることができる。銅配線が銅合金からなる場合、該銅合金は、後述する保護層を構成する合金とは異種のものが用いられる。 Hereinafter, the present invention will be described based on preferred embodiments thereof. The sputtering target of the present invention is made of a copper-based alloy. The sputtering target of the present invention is used for forming a protective layer on a copper wiring. In the present invention, the copper wiring is a wiring of an electric circuit made of copper or a copper alloy, and is generally composed of a thin film layer formed by various thin film forming methods. Examples of the copper alloy constituting the copper wiring include a copper-based alloy containing one or more elements selected from manganese, magnesium, bismuth, indium and the like as an alloy component. These alloy components can be contained in the copper alloy at a ratio of 0.01 atomic% to 20 atomic%. When the copper wiring is made of a copper alloy, the copper alloy is different from an alloy constituting a protective layer described later.
本発明のスパッタリングターゲットは、スズを４質量％以上１６質量％以下、及びアルミニウムを４質量％以上１１質量％以下含み、残部が銅及び不可避不純物を含むものである。本発明のスパッタリングターゲットは、銅及び不可避不純物を除けば、構成元素としてスズ及びアルミニウムのみを含むものであることが好ましい。しかし、本発明の有利な効果を損なわない範囲において、他元素が少量含まれていることは許容される。 The sputtering target of the present invention contains 4% by mass to 16% by mass of tin, 4% by mass to 11% by mass of aluminum, and the balance contains copper and inevitable impurities. The sputtering target of the present invention preferably contains only tin and aluminum as constituent elements, except for copper and inevitable impurities. However, a small amount of other elements is allowed as long as the advantageous effects of the present invention are not impaired.
本発明のスパッタリングターゲットにスズ及びアルミニウムを組み合わせて含有させることで、該スパッタリングターゲットを用いて形成された保護層による銅配線の酸化が効果的に防止されることが、本発明者の検討の結果判明した。詳細には、スパッタリングターゲットに含まれるスズの割合を４質量％以上に設定し、かつアルミニウムの割合を４質量％以上に設定することで、保護層に起因する銅配線の耐酸化性を充分に高めることが可能となる。また、スパッタリングターゲットに含まれるスズの割合を１６質量％以下に設定し、かつアルミニウムの割合を１１質量％以下に設定することで、保護層と銅配線とを一括で同時にエッチングする際に、両者のエッチング速度差が小さくなり、所望の配線パターンをエッチングによって容易に形成することができる。 As a result of the study by the present inventors, it is possible to effectively prevent oxidation of the copper wiring by the protective layer formed using the sputtering target by containing the sputtering target of the present invention in combination with tin and aluminum. found. Specifically, by setting the ratio of tin contained in the sputtering target to 4% by mass or more and setting the ratio of aluminum to 4% by mass or more, the oxidation resistance of the copper wiring caused by the protective layer is sufficient. It becomes possible to raise. In addition, when the ratio of tin contained in the sputtering target is set to 16% by mass or less and the ratio of aluminum is set to 11% by mass or less, both the protective layer and the copper wiring are simultaneously etched simultaneously. The difference in etching rate is reduced, and a desired wiring pattern can be easily formed by etching.
上述した本発明の効果を一層顕著なものとする観点から、スパッタリングターゲットに含まれるスズの割合は４質量％以上１０質量％以下であることが好ましく、５質量％以上７質量％以下であることが更に好ましい。一方、スパッタリングターゲットに含まれるアルミニウムの割合は４質量％以上１０質量％以下であることが好ましく、５質量％以上９質量％以下であることが更に好ましい。更に、スパッタリングターゲットに含まれるスズ及びアルミニウムの合計量の割合は８質量％以上２０質量％以下であることが好ましく、１０質量％以上１６質量％以下であることが更に好ましい。 From the viewpoint of making the effects of the present invention more remarkable, the ratio of tin contained in the sputtering target is preferably 4% by mass or more and 10% by mass or less, and preferably 5% by mass or more and 7% by mass or less. Is more preferable. On the other hand, the proportion of aluminum contained in the sputtering target is preferably 4% by mass or more and 10% by mass or less, and more preferably 5% by mass or more and 9% by mass or less. Furthermore, the ratio of the total amount of tin and aluminum contained in the sputtering target is preferably 8% by mass or more and 20% by mass or less, and more preferably 10% by mass or more and 16% by mass or less.
前記と同様の観点から、銅基合金におけるスズとアルミニウムとの比率は、質量比で表して、Ｓｎ／Ａｌの値が０．４以上２．５以下であることが好ましく、０．５以上１．４以下であることが更に好ましい。 From the same viewpoint as described above, the ratio of tin and aluminum in the copper-based alloy is expressed as a mass ratio, and the value of Sn / Al is preferably 0.4 or more and 2.5 or less, and 0.5 or more and 1 More preferably, it is 4 or less.
本発明のスパッタリングターゲットは、これを用いて形成された銅配線の保護層の体積抵抗率が、該保護層のアニール温度の上昇に連れて低下するものであるという特徴を有する。このことに起因して、保護層の上にＩＴＯなどの透明導電膜を形成する場合、透明導電膜に対するコンタクト抵抗を低減できるという有利な効果が奏される。前述の特徴は、例えば本発明のスパッタリングターゲットを用いて基板上に直接保護層を形成し、該保護層のアニール前後での体積抵抗率を測定することで評価することができる。詳細には、まず本発明のスパッタリングターゲットを使用してガラス基板上に直接保護層を形成する。そして、前記保護層をアニールする前の室温（２５℃）における前記保護層の体積抵抗率Ｒ１を測定し、前記保護層を３５０℃でアニールした後の前記保護層の体積抵抗率Ｒ２を測定して比較評価する。本発明のスパッタリングターゲットは、これを用いて保護層を形成すると前記体積抵抗率Ｒ１よりも前記体積抵抗率Ｒ２が低くなる、すなわちＲ１＞Ｒ２となる特徴を有する。体積抵抗率Ｒ２は体積抵抗率Ｒ１に対して８５％以下になることが好ましく、８０％以下になることが更に好ましく、７５％以下になることが一層好ましい。保護層の体積抵抗率が、該保護層のアニール温度の上昇に連れて低下する理由は、アニールによって銅基合金中に銅とスズの金属間化合物が析出し、そのことによって純銅成分が相対的に増加するからではないかと、本発明者は考えている。なお、この体積抵抗率の低下は、アニール温度の上昇に連れて漸次連続するものであることがより好ましい。アニールは、大気雰囲気下において、目的とするアニール温度を例えば３０分間保持することで行う。アニールは、例えば室温から温度を徐々に上昇させることで行う。体積抵抗率の測定のために使用するガラス基板としては、例えばＥＡＧＬＥ ＸＧ（コーニング社／液晶ディスプレイ用ガラス、登録商標）等を用いることができる。The sputtering target of the present invention is characterized in that the volume resistivity of a protective layer of a copper wiring formed using the sputtering target decreases as the annealing temperature of the protective layer increases. For this reason, when a transparent conductive film such as ITO is formed on the protective layer, there is an advantageous effect that the contact resistance to the transparent conductive film can be reduced. The aforementioned characteristics can be evaluated by, for example, forming a protective layer directly on the substrate using the sputtering target of the present invention and measuring the volume resistivity of the protective layer before and after annealing. Specifically, first, a protective layer is directly formed on a glass substrate using the sputtering target of the present invention. Then, the volume resistivity R 1 of the protective layer at room temperature (25 ° C.) before annealing the protective layer is measured, and the volume resistivity R 2 of the protective layer after annealing the protective layer at 350 ° C. Measure and compare. The sputtering target of the present invention is characterized in that when a protective layer is formed using this, the volume resistivity R 2 is lower than the volume resistivity R 1 , that is, R 1 > R 2 . The volume resistivity R 2 is preferably 85% or less, more preferably 80% or less, and even more preferably 75% or less with respect to the volume resistivity R 1 . The reason why the volume resistivity of the protective layer decreases as the annealing temperature of the protective layer increases is that the intermetallic compound of copper and tin is precipitated in the copper base alloy by annealing, so that the pure copper component is relatively The present inventor thinks that it may be increased. It is more preferable that the decrease in volume resistivity is gradually continuous as the annealing temperature increases. Annealing is performed by holding the target annealing temperature for 30 minutes, for example, in an air atmosphere. Annealing is performed, for example, by gradually increasing the temperature from room temperature. As a glass substrate used for measuring volume resistivity, for example, EAGLE XG (Corning / glass for liquid crystal display, registered trademark) can be used.
本発明のスパッタリングターゲットは当該技術分野において公知の種々の方法で製造することができる。例えば真空中で溶融させた銅、スズ及びアルミニウムを鋳造して合金化させる。次に、得られた鋳塊を用いてスパッタリングターゲットを製造する。スパッタリングターゲットに加工する加工方法に特に制限はなく、例えば熱間鍛造でもよく、冷間鍛造でもよく、あるいは熱間圧延でもよい。また、ワイヤーカットで切り出し加工を行い、板材に形成してもよい。得られた板材を、スパッタリングの冶具であるバッキングプレートにインジウムなどのボンディング材を用いて貼り付けることで、銅基合金スパッタリングターゲットを得ることができる。なお本発明において、銅基合金スパッタリングターゲットとは、平面研削やボンディング等のスパッタリングターゲット仕上げ工程前のスパッタリングターゲット材の状態も包含する。 The sputtering target of the present invention can be produced by various methods known in the art. For example, copper, tin and aluminum melted in a vacuum are cast and alloyed. Next, a sputtering target is manufactured using the obtained ingot. There is no restriction | limiting in particular in the processing method processed into a sputtering target, For example, hot forging, cold forging, or hot rolling may be sufficient. Moreover, it cuts out by a wire cut and may form in a board | plate material. A copper base alloy sputtering target can be obtained by sticking the obtained plate material to a backing plate, which is a sputtering jig, using a bonding material such as indium. In the present invention, the copper-based alloy sputtering target includes the state of the sputtering target material before the sputtering target finishing process such as surface grinding and bonding.
次に、本発明のスパッタリングターゲットを用いて銅配線の保護層を形成する方法について説明する。まず基板上に、配線材である銅又は銅基合金を用い、各種の薄膜形成方法によって銅配線を成膜する。薄膜形成方法としては、例えばスパッタリングが挙げられるが、これに限られない。基板としては、例えばガラス基板等の非導電性材料からなる基板を用いることができる。あるいはＩＴＯなどの透明導電膜が表面に形成されたガラス基板における該透明導電膜上に配線材を形成してもよい。銅配線の厚みは、その具体的な用途に応じて任意に設定可能であり、例えば５０ｎｍ以上５００ｎｍ以下に設定することができる。基板と銅配線との密着性を高めることを目的として、両者間に密着層を形成してもよい。密着層としては、例えば基板がガラス基板である場合には、チタンからなる層を用いることができる。 Next, a method for forming a copper wiring protective layer using the sputtering target of the present invention will be described. First, copper wiring is formed on a substrate by various thin film forming methods using copper or a copper-based alloy as a wiring material. Examples of the thin film forming method include sputtering, but are not limited thereto. As the substrate, for example, a substrate made of a nonconductive material such as a glass substrate can be used. Or you may form a wiring material on this transparent conductive film in the glass substrate in which transparent conductive films, such as ITO, were formed in the surface. The thickness of the copper wiring can be arbitrarily set according to the specific application, and can be set to, for example, 50 nm or more and 500 nm or less. For the purpose of improving the adhesion between the substrate and the copper wiring, an adhesion layer may be formed between them. As the adhesion layer, for example, when the substrate is a glass substrate, a layer made of titanium can be used.
このようにして形成された銅配線の上に保護層を形成する。保護層の形成は、本発明のスパッタリングターゲットを用い、スパッタリングによって行う。形成された保護層は、スパッタリングターゲットと実質的に同組成の銅基合金からなるものである。保護層の厚みは、具体的な用途に応じて任意に設定可能であり、例えば２０ｎｍ以上６０ｎｍ以下に設定することができる。保護層の厚みを２０ｎｍ以上に設定することで、保護の対象である銅配線の酸化を効果的に防止することができる。また、保護層の厚みを６０ｎｍ以下に設定することで、保護層の生産性が損なわれないようにすることができる。 A protective layer is formed on the copper wiring thus formed. The protective layer is formed by sputtering using the sputtering target of the present invention. The formed protective layer is made of a copper-based alloy having substantially the same composition as the sputtering target. The thickness of the protective layer can be arbitrarily set according to a specific application, and can be set to, for example, 20 nm or more and 60 nm or less. By setting the thickness of the protective layer to 20 nm or more, it is possible to effectively prevent oxidation of the copper wiring to be protected. Moreover, the productivity of a protective layer can be prevented from being impaired by setting the thickness of the protective layer to 60 nm or less.
以下、実施例により本発明を更に詳細に説明する。しかしながら本発明の範囲は、かかる実施例に制限されない。特に断らない限り、「％」は「質量％」を意味する。 Hereinafter, the present invention will be described in more detail with reference to examples. However, the scope of the present invention is not limited to such examples. Unless otherwise specified, “%” means “mass%”.
まず、本発明のスパッタリングターゲットを使用して形成した保護層の、銅配線に対する耐酸化効果を調べるため、以下の評価を行った。
〔実施例１ないし９〕
銅、スズ及びアルミニウムの各インゴットを、以下の表１に示す組成を有するように精秤した。これらのインゴットをマグネシア製のるつぼに入れ、真空中で加熱して溶融させた。得られた溶湯を用いて鋳造を行い銅基合金からなる鋳塊を得た。得られた鋳塊を圧延後、加工して直径１０１．６ｍｍで、厚み５ｍｍのターゲットを得た。なお表１中、例えば「Ｃｕ−４Ｓｎ−４Ａｌ」とあるのは、銅基合金に含まれるＳｎの割合が４質量％で、Ａｌの割合が４質量％であることを意味する。First, in order to investigate the oxidation resistance effect on the copper wiring of the protective layer formed using the sputtering target of the present invention, the following evaluation was performed.
[Examples 1 to 9]
Each copper, tin and aluminum ingot was precisely weighed so as to have the composition shown in Table 1 below. These ingots were put in a magnesia crucible and heated to melt in a vacuum. Casting was performed using the obtained molten metal to obtain an ingot made of a copper-based alloy. The obtained ingot was rolled and then processed to obtain a target having a diameter of 101.6 mm and a thickness of 5 mm. In Table 1, for example, “Cu-4Sn-4Al” means that the proportion of Sn contained in the copper-based alloy is 4 mass% and the proportion of Al is 4 mass%.
ＤＣマグネトロンスパッタ装置にガラス基板を装着するとともに、チタン、銅及び、前記で得られた銅基合金の各スパッタリングターゲットを装着した。この状態下でスパッタリングを行い、前記ガラス基板上に、チタンからなる厚み１５ｎｍの密着層、厚み４００ｎｍの銅配線、及び厚み５０ｎｍの保護層をこの順で形成しガラス基板上に３層を有する配線基板とした。スパッタリングの条件は、以下のとおりとした。
・スパッタ方式 ：ＤＣマグネトロンスパッタ
・排気装置 ：ロータリーポンプ＋クライオポンプ
・到達真空度 ：２×１０−５Ｐａ以下
・Ａｒ圧力 ：０．５Ｐａ
・基板温度 ：室温
・スパッタ電力 ：２５０Ｗ （電力密度３．２Ｗ／ｃｍ2）
・使用基板 ：ＥＡＧＬＥ ＸＧ（コーニング社／液晶ディスプレイ用ガラス、登録商標
）５０ｍｍ×５０ｍｍ×０．７ｍｍｔA glass substrate was mounted on a DC magnetron sputtering apparatus, and sputtering targets of titanium, copper, and the copper-based alloy obtained above were mounted. Sputtering is performed in this state, and a 15-nm-thick adhesion layer made of titanium, a 400-nm-thick copper wiring, and a 50-nm-thick protective layer are formed in this order on the glass substrate, and the wiring has three layers on the glass substrate. A substrate was used. The sputtering conditions were as follows.
・ Sputtering method: DC magnetron sputtering / exhaust device: Rotary pump + cryopump ・ Achieving vacuum: 2 × 10 −5 Pa or less ・ Ar pressure: 0.5 Pa
-Substrate temperature: Room temperature-Sputtering power: 250 W (Power density 3.2 W / cm 2 )
-Substrate used: EAGLE XG (Corning / Glass for liquid crystal display, registered trademark) 50 mm x 50 mm x 0.7 mmt
〔比較例１ないし６〕
実施例１ないし９で用いたターゲットに代えて、以下の表１に示す組成を有する銅基合金からなるターゲットを用いた。これ以外は実施例１ないし９と同様にして保護層を形成した。[Comparative Examples 1 to 6]
Instead of the target used in Examples 1 to 9, a target made of a copper base alloy having the composition shown in Table 1 below was used. Except for this, a protective layer was formed in the same manner as in Examples 1 to 9.
〔比較例７〕
本比較例は、実施例１ないし９において保護層を形成しなかった例である。したがって、本比較例では、銅配線が露出した状態になっている。[Comparative Example 7]
This comparative example is an example in which no protective layer was formed in Examples 1 to 9. Therefore, in this comparative example, the copper wiring is exposed.
〔評価１〕
実施例及び比較例で得られた前記の３層を有する配線基板について、アニール温度と体積抵抗率との関係、及びアニール温度と表面反射率との関係を調べた。具体的には、大気雰囲気下において、前記配線基板を加熱して温度を上昇させ、３５０℃で３０分間にわたりその温度を保持して、その温度での前記配線基板の表面側からの体積抵抗率及び表面反射率を測定した。そして、２５℃（すなわちアニール前）における体積抵抗率及び表面反射率を基準として、当該温度での体積抵抗率及び表面反射率の割合（％）を算出した（アニール後の値／アニール前の値×１００）。アニール温度が３５０℃のときの結果を以下の表１に示す。[Evaluation 1]
Regarding the wiring board having the three layers obtained in the examples and comparative examples, the relationship between the annealing temperature and the volume resistivity and the relationship between the annealing temperature and the surface reflectance were examined. Specifically, in the air atmosphere, the wiring substrate is heated to increase the temperature, and the temperature is maintained at 350 ° C. for 30 minutes, and the volume resistivity from the surface side of the wiring substrate at that temperature is maintained. And the surface reflectance was measured. Then, based on the volume resistivity and surface reflectance at 25 ° C. (ie before annealing), the volume resistivity and surface reflectance ratio (%) at the temperature was calculated (value after annealing / value before annealing). × 100). The results when the annealing temperature is 350 ° C. are shown in Table 1 below.
体積抵抗率は、低抵抗率計（ロレスタ−ＨＰ／（株）三菱化学アナリテック製）と四探針プローブを用い、このプローブを前記配線基板最表面の保護膜層に押し当てることにより測定した。また、表面反射率は、紫外可視分光光度計を用い、波長５５０ｎｍにおける値を測定した。 The volume resistivity was measured by pressing a low resistivity meter (Loresta-HP / Mitsubishi Chemical Analytech Co., Ltd.) and a four-probe probe against the protective film layer on the outermost surface of the wiring board. . Moreover, the surface reflectance measured the value in wavelength 550nm using the ultraviolet visible spectrophotometer.
表１に示す結果から明らかなとおり、実施例で得られた配線基板においては、３５０℃という高温でアニールを行った場合であっても、低抵抗である銅配線部分を含む３層全体の体積抵抗率の上昇及び表面反射率の減少が小さく、最表層の保護層の形成に起因する耐酸化効果が高いことが判る。これに対して、各比較例の配線基板においては、３５０℃という高温でアニールを行うと、体積抵抗率の上昇及び表面反射率の減少が著しくなり、銅配線が酸化されていることが判る。 As is apparent from the results shown in Table 1, in the wiring board obtained in the example, the volume of the entire three layers including the copper wiring portion having low resistance is obtained even when annealing is performed at a high temperature of 350 ° C. It can be seen that the increase in resistivity and the decrease in surface reflectance are small, and the oxidation resistance effect due to the formation of the outermost protective layer is high. On the other hand, in the wiring substrate of each comparative example, when annealing is performed at a high temperature of 350 ° C., the volume resistivity increases and the surface reflectance decreases remarkably, and it can be seen that the copper wiring is oxidized.
次に、保護層のアニール温度上昇に伴う体積抵抗率の変化を調べるため、以下の評価を行った。
〔実施例１０ないし１８〕
実施例１ないし９の組成を有するターゲットを使用して、ガラス基板上に直接保護層を形成した。スパッタ条件は実施例１ないし９と同様にし、保護層の厚みは４００ｎｍとした。ガラス基板はＥＡＧＬＥ ＸＧ（コーニング社／液晶ディスプレイ用ガラス、登録商標）を使用した。Next, the following evaluation was performed in order to examine the change in volume resistivity accompanying the increase in the annealing temperature of the protective layer.
[Examples 10 to 18]
Using the target having the composition of Examples 1 to 9, a protective layer was formed directly on the glass substrate. The sputtering conditions were the same as in Examples 1 to 9, and the thickness of the protective layer was 400 nm. As the glass substrate, EAGLE XG (Corning / glass for liquid crystal display, registered trademark) was used.
〔比較例８ないし１３〕
実施例１０ないし１８で用いたターゲットに代えて、比較例１ないし６の組成を有するターゲットを用いた。これ以外は実施例１０ないし１８と同様にしてガラス基板上に直接保護層を形成した。[Comparative Examples 8 to 13]
Instead of the targets used in Examples 10 to 18, the targets having the compositions of Comparative Examples 1 to 6 were used. Except for this, a protective layer was formed directly on the glass substrate in the same manner as in Examples 10 to 18.
〔評価２〕
実施例及び比較例で得られた保護層付き基板について、アニール温度と体積抵抗率との関係を、上述の評価１と同様の手順で調べた。アニール温度が３５０℃のときの結果を以下の表２に示す。[Evaluation 2]
With respect to the substrates with protective layers obtained in the examples and comparative examples, the relationship between the annealing temperature and the volume resistivity was examined in the same procedure as in the evaluation 1 described above. The results when the annealing temperature is 350 ° C. are shown in Table 2 below.
表２に示す結果から明らかなとおり、実施例１０ないし１８で得られた保護層付き基板においては、アニール前に比べて、アニール温度が３５０℃のときに、体積抵抗率が低下していることが判る。これに対して、比較例１１ないし１３の保護層付き基板においては、アニール前に比べて、アニール温度が３５０℃のときでも体積抵抗率に大きな変化は観察されない。また、比較例８ないし１０の保護層付き基板においては、アニール温度が３５０℃のときに、若干体積抵抗率の低下が見られる。しかし、比較例１ないし３の結果から判るように銅配線への耐酸化効果は十分には得られない。 As is clear from the results shown in Table 2, in the substrates with protective layers obtained in Examples 10 to 18, the volume resistivity is lower when the annealing temperature is 350 ° C. than before annealing. I understand. On the other hand, in the substrates with protective layers of Comparative Examples 11 to 13, a large change in volume resistivity is not observed even when the annealing temperature is 350 ° C., compared to before annealing. Further, in the substrates with protective layers of Comparative Examples 8 to 10, when the annealing temperature is 350 ° C., the volume resistivity is slightly decreased. However, as can be seen from the results of Comparative Examples 1 to 3, the oxidation resistance effect on the copper wiring cannot be sufficiently obtained.
本発明によれば、高温領域においても銅配線の酸化を効果的に防止し得る銅基合金スパッタリングターゲットが提供される。 ADVANTAGE OF THE INVENTION According to this invention, the copper base alloy sputtering target which can prevent the oxidation of a copper wiring effectively also in a high temperature area | region is provided.
Claims (8)
A copper wiring protective film containing 4% by mass to 16% by mass of tin, 4% by mass to 11% by mass of aluminum, and the balance containing copper and inevitable impurities.
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| JP2015031022 | 2015-02-19 | ||
| PCT/JP2015/075916 WO2016132578A1 (en) | 2015-02-19 | 2015-09-11 | Copper-based alloy sputtering target |
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| WO2003064722A1 (en) * | 2002-01-30 | 2003-08-07 | Nikko Materials Company, Limited | Copper alloy sputtering target and method for manufacturing the target |
| US20050285273A1 (en) * | 2002-11-21 | 2005-12-29 | Nikko Materials Co., Ltd. | Copper alloy sputtering target and semiconductor element wiring |
| JP2011035347A (en) * | 2009-08-06 | 2011-02-17 | Fujitsu Semiconductor Ltd | Method of manufacturing semiconductor device |
| JP2014156621A (en) * | 2013-02-14 | 2014-08-28 | Mitsubishi Materials Corp | Sputtering target for forming protective film, and laminate wiring film |
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| WO2003064722A1 (en) * | 2002-01-30 | 2003-08-07 | Nikko Materials Company, Limited | Copper alloy sputtering target and method for manufacturing the target |
| US20050285273A1 (en) * | 2002-11-21 | 2005-12-29 | Nikko Materials Co., Ltd. | Copper alloy sputtering target and semiconductor element wiring |
| JP2011035347A (en) * | 2009-08-06 | 2011-02-17 | Fujitsu Semiconductor Ltd | Method of manufacturing semiconductor device |
| JP2014156621A (en) * | 2013-02-14 | 2014-08-28 | Mitsubishi Materials Corp | Sputtering target for forming protective film, and laminate wiring film |
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