JP6008362B2 - データ処理システムのシステムメモリへのデータの書き込み - Google Patents

データ処理システムのシステムメモリへのデータの書き込み Download PDF

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Publication number
JP6008362B2
JP6008362B2 JP2012131985A JP2012131985A JP6008362B2 JP 6008362 B2 JP6008362 B2 JP 6008362B2 JP 2012131985 A JP2012131985 A JP 2012131985A JP 2012131985 A JP2012131985 A JP 2012131985A JP 6008362 B2 JP6008362 B2 JP 6008362B2
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cache
cache line
dirty
system memory
tracking
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JP2012131985A
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Japanese (ja)
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JP2013004091A5 (cg-RX-API-DMAC7.html
JP2013004091A (ja
Inventor
シー．グレイソン ブライアン
シー．グレイソン ブライアン
ティ．チャンウォチャイ ウィチャヤ
ティ．チャンウォチャイ ウィチャヤ
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NXP USA Inc
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NXP USA Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2012131985A 2011-06-10 2012-06-11 データ処理システムのシステムメモリへのデータの書き込み Expired - Fee Related JP6008362B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/157,549 2011-06-10
US13/157,549 US8543766B2 (en) 2011-06-10 2011-06-10 Writing data to system memory in a data processing system in which cache line states are tracked

Publications (3)

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JP2013004091A JP2013004091A (ja) 2013-01-07
JP2013004091A5 JP2013004091A5 (cg-RX-API-DMAC7.html) 2015-07-30
JP6008362B2 true JP6008362B2 (ja) 2016-10-19

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JP2012131985A Expired - Fee Related JP6008362B2 (ja) 2011-06-10 2012-06-11 データ処理システムのシステムメモリへのデータの書き込み

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US (1) US8543766B2 (cg-RX-API-DMAC7.html)
JP (1) JP6008362B2 (cg-RX-API-DMAC7.html)
CN (1) CN102841856B (cg-RX-API-DMAC7.html)

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JP2013065150A (ja) * 2011-09-16 2013-04-11 Toshiba Corp キャッシュメモリ装置、プロセッサ、および情報処理装置
US8839025B2 (en) * 2011-09-30 2014-09-16 Oracle International Corporation Systems and methods for retiring and unretiring cache lines
US20130205089A1 (en) * 2012-02-08 2013-08-08 Mediatek Singapore Pte. Ltd. Cache Device and Methods Thereof
US8990507B2 (en) * 2012-06-13 2015-03-24 International Business Machines Corporation Storing data in a system memory for a subsequent cache flush
US9146846B2 (en) * 2012-09-14 2015-09-29 Advanced Micro Devices, Inc. Programmable physical address mapping for memory
CN105190566A (zh) * 2013-03-28 2015-12-23 惠普发展公司，有限责任合伙企业 调节存储器激活率
CN105229742A (zh) 2013-04-30 2016-01-06 惠普发展公司，有限责任合伙企业 存储器访问速率
US9552301B2 (en) * 2013-07-15 2017-01-24 Advanced Micro Devices, Inc. Method and apparatus related to cache memory
WO2015065449A1 (en) * 2013-10-31 2015-05-07 Hewlett-Packard Development Company, L.P. Cache controller for non-volatile memory
US9767041B2 (en) * 2015-05-26 2017-09-19 Intel Corporation Managing sectored cache
WO2017074416A1 (en) 2015-10-30 2017-05-04 Hewlett Packard Enterprise Development Lp Managing cache operations using epochs
KR102778454B1 (ko) * 2016-03-24 2025-03-11 삼성전자주식회사 메모리 제어 방법 및 장치
USRE50518E1 (en) * 2016-03-24 2025-08-05 Samsung Electronics Co., Ltd. Method and device for controlling memory
US10482033B2 (en) * 2016-03-24 2019-11-19 Samsung Electronics Co., Ltd Method and device for controlling memory
US9923562B1 (en) 2016-06-16 2018-03-20 Western Digital Technologies, Inc. Data storage device state detection on power loss
US11561906B2 (en) * 2017-12-12 2023-01-24 Advanced Micro Devices, Inc. Rinsing cache lines from a common memory page to memory
US10713165B2 (en) * 2018-02-12 2020-07-14 Wisconsin Alumni Research Foundation Adaptive computer cache architecture
US11074188B2 (en) * 2019-02-18 2021-07-27 Intel Corporation Method and apparatus to efficiently track locations of dirty cache lines in a cache in a two-level main memory
CN114616552B (zh) * 2019-11-29 2025-08-22 华为技术有限公司 缓存存储器和分配写操作的方法
US12380033B2 (en) * 2022-01-21 2025-08-05 Centaur Technology, Inc. Refreshing cache regions using a memory controller and multiple tables

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JPH0520195A (ja) * 1991-07-16 1993-01-29 Matsushita Electric Ind Co Ltd キヤツシユメモリ制御装置
US5542066A (en) * 1993-12-23 1996-07-30 International Business Machines Corporation Destaging modified data blocks from cache memory
JPH08115169A (ja) * 1994-10-14 1996-05-07 Hitachi Ltd ディスク制御装置
US5860105A (en) * 1995-11-13 1999-01-12 National Semiconductor Corporation NDIRTY cache line lookahead
US5895488A (en) * 1997-02-24 1999-04-20 Eccs, Inc. Cache flushing methods and apparatus
US6327643B1 (en) * 1998-09-30 2001-12-04 International Business Machines Corp. System and method for cache line replacement
JP2000187616A (ja) * 1998-12-22 2000-07-04 Nec Corp キャッシュラインをクリーンな状態に保つメモリシステム
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US6546462B1 (en) * 1999-12-30 2003-04-08 Intel Corporation CLFLUSH micro-architectural implementation method and system
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US8180968B2 (en) * 2007-03-28 2012-05-15 Oracle America, Inc. Reduction of cache flush time using a dirty line limiter
US8001331B2 (en) * 2008-04-17 2011-08-16 Arm Limited Efficiency of cache memory operations
US8244984B1 (en) * 2008-12-08 2012-08-14 Nvidia Corporation System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy
US8060700B1 (en) * 2008-12-08 2011-11-15 Nvidia Corporation System, method and frame buffer logic for evicting dirty data from a cache using counters and data types

Also Published As

Publication number Publication date
US20120317367A1 (en) 2012-12-13
CN102841856A (zh) 2012-12-26
JP2013004091A (ja) 2013-01-07
CN102841856B (zh) 2017-05-03
US8543766B2 (en) 2013-09-24

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