JP5978259B2 - 順次読み出し最適化可変サイズフラッシュトランスレーションレイヤ - Google Patents

順次読み出し最適化可変サイズフラッシュトランスレーションレイヤ Download PDF

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JP5978259B2
JP5978259B2 JP2014150593A JP2014150593A JP5978259B2 JP 5978259 B2 JP5978259 B2 JP 5978259B2 JP 2014150593 A JP2014150593 A JP 2014150593A JP 2014150593 A JP2014150593 A JP 2014150593A JP 5978259 B2 JP5978259 B2 JP 5978259B2
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JP2014150593A
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JP2015036981A (ja
JP2015036981A5 (enExample
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アール・コーエン
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LSI Corp
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LSI Logic Corp
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40Specific encoding of data in memory or cache
    • G06F2212/401Compressed data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/06Address interface arrangements, e.g. address buffers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
JP2014150593A 2013-08-16 2014-07-24 順次読み出し最適化可変サイズフラッシュトランスレーションレイヤ Expired - Fee Related JP5978259B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201361866672P 2013-08-16 2013-08-16
US61/866,672 2013-08-16

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JP2015036981A JP2015036981A (ja) 2015-02-23
JP2015036981A5 JP2015036981A5 (enExample) 2015-04-02
JP5978259B2 true JP5978259B2 (ja) 2016-08-24

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JP2014150593A Expired - Fee Related JP5978259B2 (ja) 2013-08-16 2014-07-24 順次読み出し最適化可変サイズフラッシュトランスレーションレイヤ

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JP (1) JP5978259B2 (enExample)
GB (1) GB2519629A (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9927998B2 (en) * 2014-02-05 2018-03-27 Tidal Systems, Inc. Flash memory compression
JP6443572B1 (ja) * 2018-02-02 2018-12-26 富士通株式会社 ストレージ制御装置、ストレージ制御方法及びストレージ制御プログラム
JP6443571B1 (ja) * 2018-02-02 2018-12-26 富士通株式会社 ストレージ制御装置、ストレージ制御方法及びストレージ制御プログラム
BR112021024426A2 (pt) 2019-07-02 2022-01-18 Microsoft Technology Licensing Llc Compressão de memória com base em hardware
WO2022213736A1 (zh) * 2021-04-08 2022-10-13 华为技术有限公司 一种将数据写入固态硬盘的方法
KR102812181B1 (ko) * 2021-12-30 2025-05-26 중앙대학교 산학협력단 메모리 시스템, 메모리 시스템의 입출력 관리 방법 및 이를 수행하기 위한 컴퓨팅 장치

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6374341B1 (en) * 1998-09-02 2002-04-16 Ati International Srl Apparatus and a method for variable size pages using fixed size translation lookaside buffer entries
US7644251B2 (en) * 2005-12-19 2010-01-05 Sigmatel, Inc. Non-volatile solid-state memory controller
EP1939751A1 (en) * 2006-12-22 2008-07-02 Telefonaktiebolaget LM Ericsson (publ) Storing compressed data
US9105305B2 (en) * 2010-12-01 2015-08-11 Seagate Technology Llc Dynamic higher-level redundancy mode management with independent silicon elements
JP2014507717A (ja) * 2011-01-18 2014-03-27 エルエスアイ コーポレーション より高いレベルの冗長な情報の計算
KR101289931B1 (ko) * 2011-09-23 2013-07-25 한양대학교 산학협력단 다양한 블록 크기를 지원하는 주소 사상을 사용하여 플래시 메모리 내에 데이터를 저장하는 방법 및 장치
US8843711B1 (en) * 2011-12-28 2014-09-23 Netapp, Inc. Partial write without read-modify

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GB2519629A (en) 2015-04-29
JP2015036981A (ja) 2015-02-23
GB201414545D0 (en) 2014-10-01

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