GB2519629A - Variable-size flash translation layer - Google Patents

Variable-size flash translation layer Download PDF

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Publication number
GB2519629A
GB2519629A GB1414545.2A GB201414545A GB2519629A GB 2519629 A GB2519629 A GB 2519629A GB 201414545 A GB201414545 A GB 201414545A GB 2519629 A GB2519629 A GB 2519629A
Authority
GB
United Kingdom
Prior art keywords
read
data
page
compressed data
units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB1414545.2A
Other languages
English (en)
Other versions
GB201414545D0 (en
Inventor
Earl T Cohen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/055,336 external-priority patent/US9495288B2/en
Application filed by LSI Corp filed Critical LSI Corp
Publication of GB201414545D0 publication Critical patent/GB201414545D0/en
Publication of GB2519629A publication Critical patent/GB2519629A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/401—Compressed data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/06—Address interface arrangements, e.g. address buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
GB1414545.2A 2013-08-16 2014-08-15 Variable-size flash translation layer Withdrawn GB2519629A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201361866672P 2013-08-16 2013-08-16
US14/055,336 US9495288B2 (en) 2013-01-22 2013-10-16 Variable-size flash translation layer

Publications (2)

Publication Number Publication Date
GB201414545D0 GB201414545D0 (en) 2014-10-01
GB2519629A true GB2519629A (en) 2015-04-29

Family

ID=51662509

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1414545.2A Withdrawn GB2519629A (en) 2013-08-16 2014-08-15 Variable-size flash translation layer

Country Status (2)

Country Link
JP (1) JP5978259B2 (enExample)
GB (1) GB2519629A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9927998B2 (en) 2014-02-05 2018-03-27 Tidal Systems, Inc. Flash memory compression
EP4307129A4 (en) * 2021-04-08 2024-07-31 Huawei Technologies Co., Ltd. METHOD FOR WRITING DATA INTO A SEMICONDUCTOR HARD DISK
US12498857B2 (en) 2021-04-08 2025-12-16 Huawei Technologies Co., Ltd. Method for writing data to solid-state drive

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6443572B1 (ja) * 2018-02-02 2018-12-26 富士通株式会社 ストレージ制御装置、ストレージ制御方法及びストレージ制御プログラム
JP6443571B1 (ja) * 2018-02-02 2018-12-26 富士通株式会社 ストレージ制御装置、ストレージ制御方法及びストレージ制御プログラム
BR112021024426A2 (pt) 2019-07-02 2022-01-18 Microsoft Technology Licensing Llc Compressão de memória com base em hardware
KR102812181B1 (ko) * 2021-12-30 2025-05-26 중앙대학교 산학협력단 메모리 시스템, 메모리 시스템의 입출력 관리 방법 및 이를 수행하기 위한 컴퓨팅 장치

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6374341B1 (en) * 1998-09-02 2002-04-16 Ati International Srl Apparatus and a method for variable size pages using fixed size translation lookaside buffer entries
US20070143569A1 (en) * 2005-12-19 2007-06-21 Sigmatel, Inc. Non-volatile solid-state memory controller
US20100017578A1 (en) * 2006-12-22 2010-01-21 Maansson Staffan Storing Compressed Data
US20140223089A1 (en) * 2011-09-23 2014-08-07 Industry-University Cooperation Foundation Hanyang University Method and device for storing data in a flash memory using address mapping for supporting various block sizes
US8843711B1 (en) * 2011-12-28 2014-09-23 Netapp, Inc. Partial write without read-modify

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9105305B2 (en) * 2010-12-01 2015-08-11 Seagate Technology Llc Dynamic higher-level redundancy mode management with independent silicon elements
JP2014507717A (ja) * 2011-01-18 2014-03-27 エルエスアイ コーポレーション より高いレベルの冗長な情報の計算

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6374341B1 (en) * 1998-09-02 2002-04-16 Ati International Srl Apparatus and a method for variable size pages using fixed size translation lookaside buffer entries
US20070143569A1 (en) * 2005-12-19 2007-06-21 Sigmatel, Inc. Non-volatile solid-state memory controller
US20100017578A1 (en) * 2006-12-22 2010-01-21 Maansson Staffan Storing Compressed Data
US20140223089A1 (en) * 2011-09-23 2014-08-07 Industry-University Cooperation Foundation Hanyang University Method and device for storing data in a flash memory using address mapping for supporting various block sizes
US8843711B1 (en) * 2011-12-28 2014-09-23 Netapp, Inc. Partial write without read-modify

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9927998B2 (en) 2014-02-05 2018-03-27 Tidal Systems, Inc. Flash memory compression
EP4307129A4 (en) * 2021-04-08 2024-07-31 Huawei Technologies Co., Ltd. METHOD FOR WRITING DATA INTO A SEMICONDUCTOR HARD DISK
US12498857B2 (en) 2021-04-08 2025-12-16 Huawei Technologies Co., Ltd. Method for writing data to solid-state drive

Also Published As

Publication number Publication date
JP2015036981A (ja) 2015-02-23
GB201414545D0 (en) 2014-10-01
JP5978259B2 (ja) 2016-08-24

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)