JP5923947B2 - Motor control device, control method and program - Google Patents

Description

  The present invention relates to a motor control device, a control method, and a program, and more particularly, to a motor control device, a control method, and a program for controlling a motor using vector control.

  By using vector control for driving the motor, it is possible to improve the torque characteristics of the motor rotating at a low speed, and to realize a drive system with excellent responsiveness. Conventionally, vector control has been often used for industrial machine tools. However, as the price of microcomputers has been reduced and the processing capacity has been improved, it has also been applied to inexpensive electric machines.

  A motor to be subjected to vector control is generally a rotating field synchronous motor having a permanent magnet as a rotor. In this type of motor, when magnetic saturation occurs, the inductance decreases and an overcurrent may flow through the motor. Various techniques for limiting the current flowing through the motor have been proposed (see, for example, Patent Documents 1 to 4).

Japanese Patent No. 3751591 Japanese Patent Laid-Open No. 08-080097 Japanese Patent No. 3757196 JP 2008-181378 A

  By using the techniques disclosed in Patent Documents 1 to 4, the current flowing to the motor can be limited, and the occurrence of overcurrent due to magnetic saturation can be suppressed. However, the above technique has a disadvantage that stable control cannot be performed when the output of the motor fluctuates.

  The present invention has been made under the above circumstances, and an object thereof is to stably control a motor while avoiding magnetic saturation.

In order to achieve the above object, a motor control device according to a first aspect of the present invention includes:
Setting means for setting the current setting values of the reluctant current and the magnet current based on the torque command to the synchronous motor;
Measuring means for measuring the current flowing through the synchronous motor;
Current value calculating means for calculating values of the reluctant current and the magnet current from the current measured by the measuring means;
Subtracting means for calculating a difference between the current set value set by the setting means and the measured value measured by the measuring means;
Conversion means for calculating a voltage setting value of the reluctant voltage and the magnet voltage by converting a result obtained by proportionally integrating the difference; and
Voltage value calculating means for calculating a value of a voltage applied to a stator winding of the synchronous motor based on the voltage setting values of the reluctant voltage and the magnet voltage;
The voltage setting value of the Rirakutanto voltage calculated by the pre-Symbol conversion means, and the voltage set value of one of the voltage setting value of the magnet voltage, the voltage when the synchronous motor magnetic saturation occurs Limiting means for limiting an increase in the other voltage setting value when a threshold value smaller than a setting value is exceeded;
Is provided.

The control method according to the second aspect of the present invention is:
A step of setting current setting values of the reluctant current and the magnet current based on a torque command to the synchronous motor;
Measuring the current flowing through the synchronous motor;
Calculating the value of the reluctant current and the magnet current from the measured current of the synchronous motor;
Calculating a difference between a current setting value of the reluctant current and a magnet current and a value of a current flowing through the measured synchronous motor;
Calculating a voltage setting value of the reluctant voltage and the magnet voltage by converting a result obtained by proportionally integrating the difference; and
Calculating a value of a voltage to be applied to a stator winding of the synchronous motor based on the voltage setting value of the reluctant voltage and the magnet voltage;
The voltage setting value of one of the calculated voltage setting value of the reluctant voltage and the voltage setting value of the magnet voltage is a threshold value smaller than the voltage setting value when magnetic saturation of the synchronous motor occurs. Limiting the increase in the other voltage set value when exceeded,
including.

The program according to the third aspect of the present invention is:
On the computer,
Based on the torque command to the synchronous motor, a procedure for setting the current setting values of the reluctant current and the magnet current;
A procedure for calculating values of the reluctant current and magnet current from the current of the synchronous motor;
A procedure for calculating a difference between a current setting value of the reluctant current and the magnet current and a value of a current flowing through the synchronous motor;
A procedure for calculating a voltage setting value of the reluctant voltage and the magnet voltage by converting a result obtained by proportionally integrating the difference, and
A procedure for calculating a voltage value to be applied to a stator winding of the synchronous motor based on the voltage setting values of the reluctant voltage and the magnet voltage;
The voltage setting value of one of the calculated voltage setting value of the reluctant voltage and the voltage setting value of the magnet voltage is a threshold value smaller than the voltage setting value when magnetic saturation of the synchronous motor occurs. A procedure for limiting the increase of the other voltage set value when exceeded,
Is executed.

  According to the present invention, when the voltage setting value of one of the reluctant voltage of the synchronous motor and the voltage setting value of the magnet voltage exceeds the threshold value, the increase of the reluctant voltage or the magnet voltage is limited. Thereby, magnetic saturation of the synchronous motor is avoided, and the synchronous motor can be stably controlled.

It is a block diagram of a motor system. It is a figure which shows the relationship between an index | exponent and angular velocity. It is a figure which shows the relationship between an index | exponent and d-axis current. It is a block diagram of a PI converter. It is a figure which shows the relationship between the gain of a P gain circuit, and d-axis current. It is a block diagram of an I gain circuit. It is a block diagram of a restriction part. It is a figure which shows the relationship between d-axis voltage and q-axis voltage. It is a figure which shows the relationship between d-axis voltage and q-axis voltage. FIG. 6 is a block diagram of a saturation limiter control unit. It is a block diagram of the motor system which concerns on a modification. It is a block diagram of a processing apparatus.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a motor system 100 according to the present embodiment. The motor system 100 is a system that drives the motor 90 based on an instruction from the control device 200. The motor system 100 includes a motor 90 and a drive unit 10 that drives the motor 90.

  The motor 90 is a rotating field type SPM (Surface Permanent Magnet) motor having permanent magnets arranged so that N poles and S poles appear alternately along the outer periphery of a cylindrical rotor. The electrical angle of the motor 90 is detected by an electrical angle detection unit 91 attached to the motor 90.

  The electrical angle detection unit 91 includes a sensor such as a resolver, and is a unit for detecting a continuous electrical angle. The electrical angle detection unit 91 can detect the electrical angle θr of the rotor with a resolution of usually 12 bits.

  The drive unit 10 includes a torque / current conversion unit 11, a subtraction circuit 12, a PI conversion unit 13, a limiting unit 14, an addition circuit 15, a two-phase / three-phase conversion unit 16, a modulation circuit 17, a PWM output unit 18, and a drive unit 19. , An angular velocity calculation unit 20, a delay compensation calculation unit 21, a three-phase / two-phase conversion unit 22, and a non-interference control unit 23.

  The torque / current conversion unit 11 uses a reluctant current (d) required to drive the motor 90 with the output torque Tr from the output torque Tr instructed by the control device 200 and the angular velocity ω calculated by the angular velocity calculation unit 20. (Axial current) Id and magnet current (q-axis current) Iq are calculated. Then, the signal id 1 corresponding to the value of the d-axis current Id and the signal iq corresponding to the value of the q-axis current Iq are output to the subtraction circuit 12.

  Specifically, first, the torque / current converter 11 calculates the index idref. As shown in FIG. 2, when the value of the angular velocity ω of the motor 90 output from the angular velocity calculation unit 20 is equal to or larger than ω1, the value of the index idref decreases in proportion to the increase of ω. When the value of the angular velocity ω is equal to or greater than ω2 (> ω1), −idmax is obtained.

  Note that idmax is set to a value within a range where demagnetization of the permanent magnet of the motor 90 does not occur. Specifically, idmax is set based on the following equation. Here, β is arctan (Id / Iq), and deg is a delay compensation electrical angle described later. θlimit is a limit advance angle. kθ is usually a coefficient having a value of 1.

idmax = iq * tan [(θlimit−deg) / kθ]
θlimit ≧ kθ * β + deg

In the index idref, a limiter is set so that the sum of the d-axis current and the q-axis current does not exceed the upper limit value. In the present embodiment, from the viewpoint of preferentially limiting the d-axis current Id, as shown in FIG. 3, the upper limit value of the index idref is limited to √ (imax ² −iq ² ). Note that imax is an upper limit value of the current of the motor 90, for example.

Therefore, for example, when 0 ≧ idref ≧ −√ (imax ² −iqt ² ) is satisfied, a signal id having a value equivalent to the exponent idref is output. Further, when −√ (imax ² −iq ² ) ≧ idref is satisfied, a signal id having a value −√ (imax ² −iq ² ) is output.

  The subtraction circuit 12 subtracts the value of the signal idr from the three-phase / two-phase conversion unit 22 from the value of the signal id from the torque / current conversion unit 11. Then, a signal Δid corresponding to the value of the deviation ΔId between the signal id and the signal idr is output. The subtraction circuit 12 subtracts the value of the signal iqr from the three-phase / two-phase conversion unit 22 from the value of the signal iq from the torque / current conversion unit 11. Then, the signal Δiq corresponding to the value of the deviation ΔIq between the signal iq and the signal iqr is output.

  The PI conversion unit 13 proportionally integrates the signal Δid and performs current / voltage conversion on the integration result to output a signal vd1 indicating the target increase amount of the d-axis voltage Vd. Further, the signal Δiq is proportionally integrated, and the integration result is subjected to current / voltage conversion to output a signal vq1 indicating the target increase amount of the q-axis voltage Vq. FIG. 4 is a block diagram of the PI conversion unit 13. As shown in FIG. 4, the PI conversion unit 13 includes proportional integration circuits 13a and 13b and a current-voltage conversion unit 13c.

  The proportional integration circuit 13a is a circuit that proportionally integrates the signal Δid. The proportional integration circuit 13 a includes a P gain circuit 31, an integration dead band circuit 32, and an I gain circuit 33.

  The P gain circuit 31 multiplies the signal Δid by P gain. As shown in FIG. 5, the P gain is maintained at P2 when the absolute value of the signal Δid is equal to or less than Δi1, and the absolute value of the signal Δid is large when the absolute value of the signal Δid is between Δi1 and Δi2. It grows as you become. When the absolute value of the signal Δid is equal to or greater than Δi2, it is maintained at P1.

  Therefore, when the absolute value of the signal Δid is equal to or less than Δi1, the signal PΔid obtained by multiplying the signal Δid by P2 is output from the P gain circuit 31. Further, when the absolute value of the signal Δid is equal to or greater than Δi2, a signal PΔid obtained by multiplying the signal Δid by P1 is output from the P gain circuit 31. When the absolute value of the signal Δid is between Δi1 and Δi2, the signal PΔid obtained by multiplying the gain proportional to the absolute value of the signal Δid is output from the P gain circuit 31.

  The integral dead zone circuit 32 corrects the value of Δid to zero when the value of the signal Δid is in a predetermined range including zero.

  The I gain circuit 33 multiplies the signal Δid output from the integration dead band circuit 32 by the I gain. FIG. 6 is a block diagram of the I gain circuit 33. As shown in FIG. 6, the I gain circuit 33 includes a selection circuit 141, a K gain circuit 142, an accumulation circuit 143, an In gain circuit 144, and a limiter circuit 145.

  The selection circuit 141 is normally in the state shown in FIG. 6, and operates when the polarity of the output from the P gain circuit 31 and the polarity of the output from the accumulation circuit 143 are different. Therefore, when the polarity of the output of the P gain circuit 31 is equal to the polarity of the output of the accumulation circuit 143, the signal Δid is input to the accumulation circuit 143 without passing through the K gain circuit 142. . On the other hand, when the polarity of the output from the P gain circuit 31 is different from the polarity of the output from the accumulation circuit 143, the signal Δid is input to the K gain circuit 142. When the signal Δid is input to the K gain circuit 142, a signal obtained by multiplying the signal Δid by the gain K is output to the accumulation circuit 143.

  The accumulation circuit 143 integrates the signal Δid input directly from the selection circuit 141 or the signal Δid input via the K gain circuit 142. Then, a signal corresponding to the component result is output.

  The In gain circuit 144 multiplies the signal output from the accumulation circuit 143 by the gain In and outputs the result.

  When the value of the output signal output from the In gain circuit 144 is equal to or greater than a predetermined threshold, the limiter circuit 145 outputs the output signal from the In gain circuit 144 as a signal having a value equivalent to the threshold. A signal output from the limiter circuit 145 is output as a signal IΔid.

  The signal PΔid output from the P gain circuit 31 and the signal IΔid output from the I gain circuit 33 are added by the adder 34 and output to the current-voltage converter 13c.

  The proportional integration circuit 13b is a circuit that proportionally integrates the signal Δiq. The proportional integration circuit 13b includes a P gain circuit 31, an integral dead zone circuit 32, and an I gain circuit 33, as with the above-described proportional integration circuit 13a. Then, the signal PΔiq output from the P gain circuit 31 and the signal IΔiq output from the I gain circuit 33 are added and output to the current-voltage converter 13c.

  The current-voltage conversion unit 13c converts the output from the proportional integration circuit 13a and the proportional integration circuit 13b, thereby converting the signal vd1 corresponding to the target increase amount of the d-axis voltage Vd and the q-axis voltage Vq and the q-axis voltage Vq. A signal vq1 corresponding to the target increase amount is generated and output.

  Returning to FIG. 1, the limiting unit 14 limits the increase in the signals vd <b> 1 and vq <b> 1 output from the PI conversion unit 13. FIG. 7 is a block diagram of the limiting unit 14. As shown in FIG. 7, the limiting unit 14 includes a vd limit value storage unit 41, a vq limit value storage unit 51, comparison units 42 and 52, a vd limiter control unit 43, a vq limiter control unit 53, a flag setting unit 60, And a saturation limiter control unit 55.

  The comparison unit 42 compares the absolute value | vd1 | of the signal vd1 with a previously stored threshold value kvd1. Then, a signal svd that becomes high level when the value of the absolute value | vd1 | is larger than the threshold value kvd1 and becomes low level at other times is output.

  The comparison unit 52 compares the absolute value | vq1 | of the signal vq1 with a threshold value kvq1 stored in advance. Then, a signal svq that is high when the absolute value | vq1 | is greater than the threshold value kvq1 and is low otherwise is output.

  The vd limit value storage unit 41 stores the value of the signal vd1 output from the PI conversion unit 13 in time series when the signal svq output from the comparison unit 52 is at a low level. Thereby, the value of the signal vd1 when the target increase amount of the q-axis voltage Vq is equal to or less than a predetermined value is sequentially stored.

The vq limit value storage unit 51 stores the value of the signal vq1 output from the PI conversion unit 13 in time series when the signal svd output from the comparison unit 42 is at a low level. This
The value of the signal vq1 when the target increase amount of the d-axis voltage Vd is equal to or less than a predetermined value is sequentially stored.

  The logic circuit 44 is a circuit that outputs a signal s1 that goes high when any of the inputs goes high. The logic circuit 44 receives the signal svd from the comparison unit 42 and the signal svq from the comparison unit 52. The signal s1 output from the logic circuit 44 becomes a high level when either the signal svd or the signal svq becomes a high level. For this reason, the signal s1 output from the logic circuit 44 is generated when the target increase amount of the d-axis voltage Vd exceeds a predetermined value, or when the target increase amount of the q-axis voltage becomes a predetermined value or more. Become high level.

  The logic circuit 54 is a circuit that outputs a signal s2 that becomes a high level when all inputs become a low level. The logic circuit 54 outputs a signal s2 that is at a high level when both the signal svd from the comparison unit 42 and the signal svq from the comparison unit 52 are at a low level. Therefore, the signal s2 output from the logic circuit 54 is high when the increase amount of the d-axis voltage Vd is less than a predetermined value and the increase amount of the q-axis voltage Vq is less than a predetermined value. Become.

  The flag setting unit 60 sets a flag when the signal s1 output from the logic circuit 44 is at a high level. Further, the flag is reset when the signal s2 output from the logic circuit 54 is at a high level. That is, the flag setting unit 60 sets a flag when the increase amount of the d-axis voltage or the increase amount of the q-axis voltage is equal to or greater than a predetermined value, and both the increase amount of the d-axis voltage and the increase amount of the q-axis voltage are set. When is less than a predetermined value, the flag is reset. The flag setting unit 60 sets the signals sd and sq output to the vd limiter control unit 43 and the vq limiter control unit 53 to a high level when the flag is set.

  The vd limiter control unit 43 limits and outputs the value of the signal vd1 when the signal sd output from the flag setting unit 60 is at a high level. Hereinafter, the operation of the vd limiter control unit 43 will be described.

  FIG. 8 is a diagram illustrating the relationship between the signal vd1 and the signal vq1. As shown in FIG. 8, when the value of the signal vq1 is not less than a2 and not more than a1, the vd limiter control unit 43 controls the value of the signal vd1 so that the value of the signal vd1 is proportional to the value of the signal vq1. . As a result, the value of the signal vd1 also increases in proportion to the increase in the value of the signal vq1. The value of the signal vd1 also decreases in proportion to the decrease in the value of the signal vq1.

  On the other hand, when the value of the signal vq1 exceeds a1, the vd limiter control unit 43 controls the value of the signal vd1 so that the value of the signal vd1 becomes b1 regardless of the value of the signal vq1. As a result, the value of the signal vd1 is kept constant at b1 regardless of the value of the signal vq1. Further, when the value of the signal vq1 is lower than a2, the value of the signal vd1 is controlled so that the value of the signal vd1 becomes b2 regardless of the magnitude of the value of the signal vq1. As a result, the value of the signal vd1 is kept constant at b2 regardless of the value of the signal vq1.

  The magnitudes of a1, a2, b1, and b2 described above are set to such a degree that magnetic saturation does not occur in the motor 90. Here, the value of a1 is set to a value equivalent to the maximum value of the signal vd1 stored in the vd limit value storage unit 41. The value of a2 is set to a value equivalent to the minimum value of the signal vd1 stored in the vd limit value storage unit 41. The values of b1 and b2 are set to the value of the signal vq1 when the value of the signal vd1 becomes a1 and a2. For this reason, when the values of the signals vd1 and vq1 increase, the value of the signal vd1 is limited, and magnetic saturation of the motor 90 is avoided.

  The vq limiter control unit 53 limits and outputs the value of the signal vq1 when the signal sq output from the flag setting unit 60 is at a high level. Hereinafter, the operation of the vq limiter control unit 53 will be described.

  FIG. 9 is a diagram illustrating a relationship between the signal vq1 and the signal vd1. As shown in FIG. 9, when the value of the signal vd1 is not less than c2 and not more than c1, the vq limiter control unit 53 controls the value of the signal vq1 so that the value of the signal vq1 is proportional to the value of the signal vd1. . As a result, the value of the signal vq1 increases in proportion to the increase in the value of the signal vd1. Then, the value of the signal vq1 also decreases in proportion to the decrease in the value of the signal vd1.

  On the other hand, when the value of the signal vd1 exceeds c1, the vq limiter control unit 53 controls the value of the signal vq1 so that the value of the signal vq1 becomes d1 regardless of the value of the signal vd1. As a result, the value of the signal vq1 is kept constant at d1 regardless of the value of the signal vd1. Further, when the value of the signal vd1 is lower than c2, the value of the signal vq1 is controlled so that the value of the signal vq1 becomes d2 regardless of the magnitude of the value of the signal vd1. As a result, the value of the signal vq1 is kept constant at d2 regardless of the value of the signal vd1.

  The magnitudes of c1, c2, d1, and d2 described above are set to such a magnitude that magnetic saturation does not occur in the motor 90. Here, the value of c1 is set to a value equivalent to the maximum value of the signal vq1 stored in the vq limit value storage unit 51. Further, the value of c2 is set to a value equivalent to the minimum value of the signal vq1 stored in the vq limit value storage unit 51. The values of d1 and d2 are set to the value of the signal vd1 when the value of the signal vq1 becomes c1 and c2. For this reason, when the values of the signals vd1 and vq1 increase, the value of the signal vq1 is limited, and magnetic saturation of the motor 90 is avoided.

  The saturation limiter control unit 55 is a circuit for giving a temporal hysteresis to the signal vd1. FIG. 10 is a block diagram of the saturation limiter control unit 55. As illustrated in FIG. 10, the saturation limiter control unit 55 includes comparison units 61 and 63, a low-pass filter 62, a logic circuit 64, a slew rate limiting unit 65, a switch 66, and a calculation unit 67.

  The comparing unit 61 compares the absolute value | ω | of the angular velocity ω calculated by the angular velocity calculating unit 20 with a threshold kω stored in advance. Then, when the absolute value | ω | is larger than the threshold value kω, a signal that becomes a high level is output.

  On the other hand, the comparison unit 63 compares the absolute value | vq1 | of the signal vq that has passed through the low-pass filter 62 with kvq2. Then, when the absolute value | vq1 | is larger than the threshold value kvq2, a signal that becomes a high level is output.

  The logic circuit 64 outputs a signal that becomes high level when both signals output from the comparison units 61 and 63 become high level.

  The switch 66 is a switch for selecting whether the input signal vd1 is output via the slew rate limiting unit 65 or directly without passing through the slew rate limiting unit 65.

  As shown in FIG. 10, the switch 66 is normally in a state in which the input signal vd <b> 1 is output from the saturation limiter control unit 55 without passing through the slew rate limiting unit 65. When the signal output from the logic circuit 64 becomes high level, the input signal vd1 is output via the slew rate limiting unit 65.

  As a result, the signal vd1 input to the saturation limiter control unit 55 has an absolute value | ω | of the angular velocity ω exceeding the threshold value kω, and an absolute value | vq1 | of the signal vq1 indicating the magnet voltage exceeds the threshold value kvq2. Then, it is output from the saturation limiter control unit 55 via the slew rate limiting unit 65.

  The slew rate limiting unit 65 includes a current value vd1 (t) of the signal vd1, a value vd1 (t−1) + α obtained by adding α to the value vd1 (t−1) of the signal vd1 before a predetermined time, and a predetermined time before. The three values vd1 (t−1) −α obtained by subtracting α from the value vd1 (t−1) of the signal vd1 are compared. Then, the median value of the three values is calculated. Here, α is the change amount diq (t) / dt of the value iq (t) of the signal iq calculated by the calculation unit 67. Then, a signal vd1 having a value equivalent to the calculated median value is output.

  When the slew rate limiting unit 65 performs the above-described operation, the absolute value | ω | of the angular velocity ω exceeds the threshold value kω, and the absolute value | vq1 | of the signal vq1 indicating the magnet voltage exceeds the threshold value kvq2, the signal vd1 The amount of increase is limited to a range of ± α.

  Note that the calculation executed by the slew rate limiting unit 65 is MED (vd1 (t) when the function MED (x, y, z) that outputs the median value among the three values (x, y, z) is used. −1) + α, vd1 (t), vd1 (t−1) −α).

  Returning to FIG. 1, the adding circuit 15 adds the value of the signal vd <b> 1 from the limiting unit 14 and the value of the signal vd <b> 2 from the non-interference control unit 23. Then, a signal vd3 as an addition result is output. Further, the value of the signal vq1 from the limiting unit 15 and the value of the signal vq2 from the non-interference control unit 23 are added. Then, a signal vq3 as an addition result is output.

  The two-phase / three-phase converter 16 performs an operation represented by the following equation (1) indicating reverse park conversion on the d-axis voltage Vd3 and the q-axis voltage Vq3 indicated by the signals vd3 and vq3 from the adder circuit 15. , Voltages vα and vβ are calculated. The electrical angle θr detected by the electrical angle detection unit 91 is used as the value of θ.

Next, the two-phase / three-phase conversion unit 16 calculates the three-phase voltages Vu, Vv, and Vw by performing an operation represented by the following equation (2) indicating the inverse Clark conversion.

  When calculating the three-phase voltages Vu, Vv, Vw, the two-phase / three-phase converter 16 outputs signals vu1, vv1, vw1 corresponding to the values of the three-phase voltages Vu, Vv, Vw, respectively.

  The modulation circuit 17 performs envelope center shift modulation on the signals vu1, vv1, and vw1 from the two-phase / three-phase converter 16. Specifically, the modulation circuit 17 compares the values of the signals vu1, vv1, and vw1 with each other. Then, an intermediate value among the values of the signals vu1, vv1, and vw1 is specified by excluding the maximum value and the minimum value. Then, the half value of the intermediate value is set as a correction value. For example, if the relationship of vu> vv> vw is established, vv is an intermediate value, and the correction value sh is vv / 2.

  After calculating the correction value, the modulation circuit 17 corrects the values of the signals vu1, vv1, and vw1 by subtracting the correction value sh from the values of the signals vu1, vv1, and vw1. For example, when the values of the signals vu1, vv1, and vw1 are vu, vv, and vw, respectively, the value of the signal vu1 is corrected to vu−sh. Further, the value of the signal vv1 is corrected to vv-sh. Then, the value of the signal vw1 is corrected to vw−sh.

  The PWM output unit 18 outputs PWM drive signals pwmu, pwmv, and pwmw for driving the switching elements constituting the drive unit based on the signals vu1, vv1, and vw1 corrected by the modulation circuit 17.

  The drive unit 19 includes six switching elements that are bridge-connected. The drive unit 19 drives the switching element according to the PWM drive signals pwmu, pwmv, and pwmw, and applies three-phase voltages Vu2, Vv2, and Vw2 to the motor 90. As a result, the motor 90 rotates at a speed corresponding to the cycle of the applied voltages Vu2, Vv2, and Vw2.

  The drive unit 19 measures excitation currents Iu, Iv, and Iw that flow through the three windings of the motor 90 when three-phase voltages Vu2, Vv2, and Vw2 are applied to the motor 90. Then, signals iu, iv and iw corresponding to the values of the excitation currents Iu, Iv and Iw are output. The excitation currents Iu, Iv, and Iw can be measured using, for example, a CT (Current Transformer). Further, since the vector sum of the excitation currents Iu, Iv, and Iw is zero, any two of the excitation currents Iu, Iv, and Iw may be measured.

  The angular velocity calculation unit 20 calculates the angular velocity ω of the rotor from the change in the electrical angle θr. The angular velocity calculation unit 20 outputs information indicating the calculated angular velocity ω.

  The delay compensation calculation unit 21 is provided to compensate for the rotation delay of the motor 90 and improve the response of the motor 90. In general, the causes of the delay in the rotation of the motor include the time required for the calculation processing of the software, the time required for measuring the excitation currents Iu, Iv, and Iw of the current of each phase of the motor 90, the delay in the response of the motor 90, and the like. is there.

  Originally, it is ideal to separate these factors and obtain the respective compensation amounts, but in this case, the amount of calculation increases and the processing burden increases. The delay compensation calculation unit 21 calculates the sum of the dead time and the delay time due to the first-order delay system as the delay time. Next, the delay angle d is calculated from the delay time and the angular velocity ω of the motor 90. The delay compensation calculation unit 21 corrects the electrical angle θr by adding the delay angle d to the electrical angle θr detected by the electrical angle detection unit 91. Then, information indicating the corrected electrical angle θr is output.

  The three-phase / two-phase converter 22 performs an operation represented by the following equation (3) indicating Clark conversion and Park conversion on the angular phase excitation currents Iu, Iv, Iw of the motor 90 to obtain the d-axis current Idr Q-axis current Iqr is calculated. When the three-phase / two-phase conversion unit 22 calculates the d-axis current Idr and the q-axis current Iqr, the three-phase / two-phase conversion unit 22 outputs signals idr and iqr corresponding to the values of the d-axis current Idr and the q-axis current Iqr, respectively.

  The non-interference control unit 23 calculates the correction values Vd2 and Vq2 by performing the calculation represented by the following expression (4) for the angular velocity ω, the d-axis current Idr and the q-axis current Iqr indicated by the signals idr and iqr. After calculating the correction values Vd2 and Vq2, the non-interference control unit 23 outputs signals vd2 and vq2 corresponding to the correction values Vd2 and Vq2, respectively. Note that Ra is a resistance value of the winding of the angular phase constituting the motor 90. Ld is the d-axis reactance, and Lq is the q-axis reactance.

  In the drive unit 10 configured as described above, for example, when information indicating the output torque Tr is output from the control device 200 such as an ECU mounted on the vehicle, the torque / current conversion unit 11 responds to the output torque Tr. A signal id indicating the d-axis current Id and a signal iq indicating the q-axis current Iq are generated.

  Next, a signal Δid indicating a difference between a signal idr indicating the current d-axis current and a signal id indicating the target d-axis current is generated. This signal Δid indicates the target increase amount of the d-axis current. Then, a signal Δiq indicating a difference between the signal iqr indicating the current q-axis current and the signal iq indicating the target q-axis current is generated. This signal Δiq indicates the target increase amount of the q-axis current.

  Next, the signal Δid is converted by the PI converter 13 into a signal vd1 indicating the target increase amount of the reluctant voltage (d-axis voltage). Then, the signal Δiq is converted into a signal vq1 indicating a target increase amount of the magnet voltage (q-axis voltage).

  In this embodiment, as can be seen with reference to FIG. 6, the I gain circuit 33 includes a selection circuit 141 that operates when the output polarity of the P gain circuit 31 and the output polarity of the accumulation circuit 143 are different. I have. Thereby, when the polarity of the increase amount of the d-axis current is different from the polarity of the increase amount of the q-axis current, the gain of the I gain circuit 33 is multiplied by K by the K gain circuit 142. For this reason, by setting the gain of the K gain circuit 142 appropriately, the output of the motor 90 is not delayed by the remaining integration amount.

  Further, as shown in FIG. 5, the characteristic of the P gain circuit 31 of the PI conversion unit 13 according to the present embodiment is such that the absolute value of the signal Δid increases when the absolute value of the signal Δid is between Δi1 and Δi2. Grows according to. For this reason, the output of the motor 90 does not change sharply.

  As shown in FIG. 1, the signal vd <b> 1 and the signal vd <b> 2 output from the PI conversion unit 13 are input to the limiting unit 14. In the present embodiment, as described above, when the target increase amount of the d-axis voltage Vd or the q-axis voltage Vq exceeds a predetermined value by the limiting unit 14, the vd limiter control unit 43 or the vq limiter control unit 53 , The increase of the signal vd1 and the signal vd2 is limited. Thereby, the increase amount of the reluctant voltage and the increase amount of the magnet voltage indicated by the signal vd1 and the signal vd2 are limited, and the output of the motor 90 does not change sharply.

  The limiting unit 14 includes a saturation limiter control unit 55. As described above, the saturation limiter control unit 55 passes the signal vd1 when the absolute value | ω | exceeds the threshold value kω and the absolute value | vq1 | of the signal vq1 indicating the magnet voltage exceeds the threshold value kvq2. Input to the rate limiting unit 65. Thereby, the value of the signal vd1 is limited to a range of ± α, and as a result, the target increase amount of the reluctant voltage corresponding to the signal vd1 converges within a predetermined range. For this reason, the output of the motor 90 does not change sharply.

  As described above, in the present embodiment, when information indicating the output torque Tr is output from the control device 200, the output of the motor 90 does not change sharply. Therefore, the motor 90 can be stably controlled.

  As mentioned above, although embodiment of this invention was described, this invention is not limited by the said embodiment. For example, in the present embodiment, the case where the motor system 100 is configured by hardware has been described. However, the present invention is not limited thereto, and the motor system 100 may be configured to include a normal computer system.

  FIG. 11 is a block diagram of a motor system 100A having a drive unit 10 realized by a computer system. As shown in FIG. 11, the motor system 100A according to the present embodiment includes a torque / current conversion unit 11, a subtraction circuit 12, a PI conversion unit 13, a limiting unit 14, an addition circuit 15, and a second circuit according to the first embodiment. Processing device for executing functions of phase / three-phase conversion unit 16, modulation circuit 17, PWM output unit 18, angular velocity calculation unit 20, delay compensation calculation unit 21, three-phase / two-phase conversion unit 22, and non-interference control unit 23 30.

  FIG. 12 is a block diagram of the processing device 30. The processing device 30 is a personal computer or a microcomputer. The processing device 30 includes a CPU (Central Processing Unit) 30a, a main storage unit 30b, an auxiliary storage unit 30c, a display unit 30d, an input unit 30e, an interface unit 30f, and a system bus 30g that interconnects the above units. ing.

  CPU30a performs the process equivalent to the process which each part which comprises the drive unit 10 which concerns on 1st Embodiment according to the program memorize | stored in the auxiliary storage part 30c.

  The main storage unit 30b includes a RAM (Random Access Memory) and the like, and is used as a work area for the CPU 30a.

  The auxiliary storage unit 30c includes a nonvolatile memory such as a ROM (Read Only Memory), a magnetic disk, and a semiconductor memory. The auxiliary storage unit 30c stores programs executed by the CPU 30a, various parameters, and the like. Further, information including the processing result by the CPU 30a is sequentially stored.

  The display unit 30d has an LCD (Liquid Crystal Display) and displays a processing result of the CPU 30a.

  The input unit 30e has an interface including a touch panel and operation switches. The operator's instruction is input via the input unit 30e and notified to the CPU 30a via the system bus 30g.

  The interface unit 30 f includes a communication interface with the control device 200, the drive unit 19, and the electrical angle detection unit 19. The control device 200, the drive unit 19, and the electrical angle detection unit 91 are connected to the system bus 30g via the interface unit 30f.

  The processing device 30 configured as described above performs processing equivalent to that of the torque / current conversion unit 11, the PI conversion unit 13, the limiting unit 14, and the like according to the above embodiment.

  The program stored in the auxiliary storage unit 30c can be read by a computer such as a flexible disk, a CD-ROM (Compact Disk Read-Only Memory), a DVD (Digital Versatile Disk), or an MO (Magneto-Optical disk). An apparatus that executes the above-described processing may be configured by storing and distributing the program in a recording medium and installing the program in a computer.

  Further, the program may be executed entirely or partially on the server device, and the above-described processing may be executed while transmitting / receiving information regarding the processing via the communication network.

  Various embodiments and modifications can be made to the present invention without departing from the broad spirit and scope of the present invention. Further, the above-described embodiment is for explaining the present invention, and does not limit the scope of the present invention.

  The motor control device, control method, and program of the present invention are suitable for motor control.

DESCRIPTION OF SYMBOLS 10 Drive unit 11 Torque / current conversion part 12 Subtraction circuit 13 PI conversion part 13a Proportional integration circuit 13b Proportional integration circuit 13c Current voltage conversion part 14 Limiting part 15 Addition circuit 16 Two-phase / three-phase conversion part 17 Modulation circuit 18 PWM output part DESCRIPTION OF SYMBOLS 19 Drive part 20 Angular velocity calculating part 21 Delay compensation calculating part 22 Three-phase / two-phase conversion part 23 Non-interference control part 30 Processing apparatus 30a CPU
30b Main storage unit 30c Auxiliary storage unit 30d Display unit 30e Input unit 30f Interface unit 30g System bus 31 P gain circuit 32 Integral dead zone circuit 33 I gain circuit 34 Adder 41 vd limit value storage unit 42, 52 Comparison unit 43 vd limiter control Unit 44, 54 logic circuit 51 vq limit value storage unit 53 vq limiter control unit 55 saturation limiter control unit 60 flag setting unit 61, 63 comparison unit 62 low-pass filter 64 logic circuit 65 slew rate limiting unit 66 switch 67 arithmetic unit 90 motor 91 Electrical Angle Detection Unit 100, 100A Motor System 141 Selection Circuit 142 K Gain Circuit 143 Accumulation Circuit 144 In Gain Circuit 145 Limiter Circuit 200 Controller

Claims (9)

Setting means for setting the current setting values of the reluctant current and the magnet current based on the torque command to the synchronous motor;
Measuring means for measuring the current flowing through the synchronous motor;
Current value calculating means for calculating values of the reluctant current and the magnet current from the current measured by the measuring means;
Subtracting means for calculating a difference between the current set value set by the setting means and the measured value measured by the measuring means;
Conversion means for calculating a voltage setting value of the reluctant voltage and the magnet voltage by converting a result obtained by proportionally integrating the difference; and
Voltage value calculating means for calculating a value of a voltage applied to a stator winding of the synchronous motor based on the voltage setting values of the reluctant voltage and the magnet voltage;
The voltage setting value of the Rirakutanto voltage calculated by the pre-Symbol conversion means, and the voltage set value of one of the voltage setting value of the magnet voltage, the voltage when the synchronous motor magnetic saturation occurs Limiting means for limiting an increase in the other voltage setting value when a threshold value smaller than a setting value is exceeded;
A motor control device comprising: Wherein the voltage setting value of Li La Kutanto voltage, and comprising a storage unit for sequentially storing the voltage setting value of the magnet voltage,
The motor control device according to claim 1, wherein the limiting unit sets the other voltage setting value equal to the voltage setting value stored before the one voltage setting value exceeds a threshold value. And the converting means, when said difference polarity of the difference between the magnet current Rirakutanto current are different, the motor control device according to claim 1 or 2 calculates the voltage set value of the Rirakutanto voltage based on the gain. The motor control device according to claim 3 , wherein the conversion unit changes the gain according to a magnitude of the difference between the reluctant current and the difference between the magnet currents. When the voltage setting value of one of the voltage setting value of the reluctant voltage calculated by the converting means and the voltage setting value of the magnet voltage exceeds a threshold value, the limiting means The motor control device according to any one of claims 1 to 4 , wherein the voltage setting value is a value based on the voltage setting value a predetermined time before the reluctant voltage . The value, together based on the voltage set value of the Rirakutanto voltage at a predetermined time before, the motor control device according to claim 5 based on the value of the magnet current. A step of setting current setting values of the reluctant current and the magnet current based on a torque command to the synchronous motor;
Measuring the current flowing through the synchronous motor;
Calculating the value of the reluctant current and the magnet current from the measured current of the synchronous motor;
Calculating a difference between a current setting value of the reluctant current and a magnet current and a value of a current flowing through the measured synchronous motor;
Calculating a voltage setting value of the reluctant voltage and the magnet voltage by converting a result obtained by proportionally integrating the difference; and
Calculating a value of a voltage to be applied to a stator winding of the synchronous motor based on the voltage setting value of the reluctant voltage and the magnet voltage;
The voltage setting value of one of the calculated voltage setting value of the reluctant voltage and the voltage setting value of the magnet voltage is a threshold value smaller than the voltage setting value when magnetic saturation of the synchronous motor occurs. Limiting the increase in the other voltage set value when exceeded,
Control method.   Storing the voltage setting value of the reluctant voltage and the voltage setting value of the magnet voltage in sequence.
  8. In the step of limiting an increase in the other voltage setting value, the other voltage setting value is set equal to the voltage setting value stored before one of the voltage setting values exceeds a threshold value. The control method described in 1. On the computer,
Based on the torque command to the synchronous motor, a procedure for setting the current setting values of the reluctant current and the magnet current;
A procedure for calculating values of the reluctant current and magnet current from the current of the synchronous motor;
A procedure for calculating a difference between a current setting value of the reluctant current and the magnet current and a value of a current flowing through the synchronous motor;
A procedure for calculating a voltage setting value of the reluctant voltage and the magnet voltage by converting a result obtained by proportionally integrating the difference, and
A procedure for calculating a voltage value to be applied to a stator winding of the synchronous motor based on the voltage setting values of the reluctant voltage and the magnet voltage;
The voltage setting value of one of the calculated voltage setting value of the reluctant voltage and the voltage setting value of the magnet voltage is a threshold value smaller than the voltage setting value when magnetic saturation of the synchronous motor occurs. A procedure for limiting the increase of the other voltage set value when exceeded,
A program for running

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