JP5919958B2 - Circuit device and electronic device - Google Patents

Description

  The present invention relates to a circuit device, an electronic device, and the like.

  In recent years, for example, contactless power transmission (contactless power transmission) that enables power transmission even when there is no contact of a metal part using electromagnetic induction or the like has been in the spotlight. As an application example of this contactless power transmission, a non-contact IC card or the like that can receive power and transmit / receive information by simply holding it over a terminal device has been proposed. According to this non-contact IC card, it is possible to realize a card having functions such as electronic money, a public transportation prepaid card, and an ID card for entrance / exit management.

  On the other hand, an EPD (Electrophoretic Display) which is an electrophoretic display is known as a display device suitable for electronic paper or the like. This EPD has an advantage that power consumption can be reduced because display information can be held in a non-powered state. As a conventional technology of a portable information display device using such an EPD, there is a technology disclosed in Patent Document 1, for example.

  Such a display unit such as an EPD requires a high voltage for driving, and therefore requires a booster circuit for generating a boosted power supply voltage. The booster circuit generates a high boosted power supply voltage, and thus requires a large amount of power to start. For example, in a charge pump type booster circuit, since it is necessary to store charges in a charge pump capacitor during the startup period, power is consumed during startup for the storage of the charges.

  As an electronic device such as an IC card that receives power from a power transmission device by contactless power transmission, an electronic device equipped with a battery (primary / secondary battery) for a system device such as a microcomputer, and the like Battery-less electronic devices that are not equipped with a battery can be considered.

  And in an electronic device such as an IC card equipped with a battery, there is no need to consider the storage of electric power. When a display unit such as an EPD is mounted, the electric power necessary for starting up the booster circuit or the like is as follows. It doesn't matter.

  On the other hand, as battery-less electronic devices, one that does not have a power storage function and one that has a power storage function are considered.

  Then, in a battery-less electronic device having a power storage function, when a display unit such as an EPD is mounted, when the power supply destination device such as the above-described booster circuit is activated in a state where the power is not sufficiently stored. There is a risk of system down due to power consumption due to the boosting operation of the boosting circuit. In addition, when the power storage capacity of the electronic device is low, it takes time to start up the booster circuit and the like, which causes a problem of wasteful power consumption.

  In order to solve such a situation, a method of starting a power supply destination device such as a booster circuit after the electric power is sufficiently stored can be considered. However, if it takes time until the booster circuit or the like is activated, there is a risk of adversely affecting other processing of the electronic device such as data communication processing and display rewriting processing.

JP 2008-17592 A

  According to some aspects of the present invention, it is possible to provide a circuit device, an electronic device, and the like that can suppress the occurrence of problems caused by the activation of a power supply destination device in an electronic device using contactless power transmission.

  One embodiment of the present invention is configured to receive electric power from a power receiving unit that receives electric power from a power transmission device by non-contact power transmission, performs control to accumulate electric charge in a charge accumulating unit, and charge accumulated in the electric charge accumulating unit A power management unit that supplies power based on the power supply destination device, and a control unit that performs control processing of the power management unit, wherein the charge storage unit includes the first charge storage unit and the first charge storage unit. A second charge storage unit having a charge storage capacity smaller than that of the first charge storage unit, wherein the power management unit receives power from the power receiving unit and charges the first charge storage unit with charge. A first accumulation control unit that performs control for accumulating the charge, a second accumulation control unit that performs control for accumulating charges in the second charge accumulation unit upon receiving power from the power reception unit, The charge accumulated in the first charge accumulation unit and the second charge accumulation unit And a power supply unit that supplies power to the power supply destination device, and the power supply unit is based on the accumulated charge of the second charge accumulation unit during the startup period of the power supply destination device. Power is supplied to the power supply destination device, and the control unit causes the first charge control unit to accumulate charges in the first charge accumulation unit during the activation period of the power supply destination device. The present invention relates to a circuit device that performs control to limit or stop.

  In one embodiment of the present invention, the first accumulation control unit accumulates charges based on the power from the power receiving unit in the first charge accumulation unit, and the second accumulation control unit charges based on the power from the power receiving unit. Is stored in the second charge storage section. Then, power is supplied to the power supply destination device based on the charges stored in the first and second charge storage units. In one embodiment of the present invention, power based on the accumulated charge of the second charge accumulation unit having a small accumulation capacity is supplied to the power supply destination device during the start-up period of the power supply destination device. Then, during the start-up period of the power supply destination device, charge accumulation in the first charge accumulation unit having a large accumulation capacity is limited or stopped. Therefore, it is possible to effectively suppress a situation in which a malfunction such as a system failure occurs due to power consumption during the startup period of the power supply destination device.

  In one embodiment of the present invention, the power supply unit supplies power to the power supply destination device at least based on the accumulated charge of the first charge accumulation unit in a period after power reception by the power reception unit. You may supply.

  According to this configuration, the power supply destination device can be operated by supplying the power supply destination device with power based on at least the charge accumulated in the first charge storage portion even during the period after the end of power reception by the power reception unit. It becomes possible.

  In one embodiment of the present invention, the control unit releases the restriction or stop of charge accumulation in the first charge accumulation unit when the control unit determines that the activation period of the power supply destination device has expired. May be performed.

  In this way, after the start-up period of the power supply destination device ends, charge accumulation in the first charge accumulation unit is resumed so that necessary charge can be accumulated in the first charge accumulation unit. Become.

  In the aspect of the invention, the second charge accumulation unit may be a system activation charge accumulation unit having a charge accumulation capacity smaller than that of the first charge accumulation unit.

  In this way, the system can be started by supplying power based on the accumulated charge of the second charge accumulation unit for system activation at an early stage.

  In one aspect of the present invention, the power supply destination device is a booster circuit that generates a boosted power supply voltage by a boosting operation, the startup period is a boosting operation startup period of the booster circuit, and the control unit includes: In the step-up operation start-up period of the step-up circuit, control may be performed to limit or stop charge accumulation in the first charge accumulation unit by the first accumulation control unit.

  In this way, it is possible to effectively suppress the occurrence of problems such as system down due to power consumption during the startup period of the boosting operation of the booster circuit.

  In one aspect of the present invention, the power supply unit is a system device that is a power supply destination device that supplies power based on the accumulated charge of the second charge accumulation unit when the system is started after power reception by the power reception unit. The system device is activated after a power supply voltage exceeds an operation lower limit voltage, and instructs to activate the boosting operation of the booster circuit, and the control unit is instructed from the system device. In the start-up period of the boosting operation of the booster circuit started by the control, control for limiting or stopping the charge accumulation in the first charge accumulation unit by the first accumulation control unit may be performed.

  In this way, it is possible to start up the system device with the power supply based on the storage power supply of the second charge storage unit having a small storage capacity, and to start up the boosting operation of the booster circuit according to the start-up instruction from this system device. . In the startup period of the boosting operation of the booster circuit started up in this way, the electric power consumption in the startup period of the booster circuit is a factor by limiting or stopping the charge storage in the first charge storage unit. It is possible to effectively suppress the occurrence of problems such as system down.

  In one aspect of the present invention, the system device instructs activation of the boosting operation of the booster circuit during a period of data communication with the power transmission device via the power receiving unit, and the control unit In the period of the data communication with the apparatus, control may be performed to limit or stop the charge accumulation in the first charge accumulation unit by the first accumulation control unit.

  In this way, it is possible to effectively suppress a situation where power is insufficient and communication failure or the like occurs in data communication due to power consumption due to charge accumulation in the first charge accumulation unit.

  In one aspect of the present invention, when the length of the activation period of the power supply destination device is TAC and the length of the charge accumulation period for the first charge accumulation unit is TC1, TAC <TC1 There may be.

  If such a relationship of TAC <TC1 is established, even if charge accumulation is limited or stopped in the activation period of the power supply destination device, charges can be accumulated in the first charge accumulation unit in a period other than the activation period. Therefore, a charge accumulation period can be secured.

  In the aspect of the invention, the first accumulation control unit includes a current control unit that controls a charging current to the charge accumulation unit based on control of the control unit, and the control unit includes the first accumulation control unit. The control is performed on the current control unit so that the charging current decreases as the charging voltage of one charge storage unit increases, and the first charge storage unit is controlled during the start-up period of the power supply destination device. Control for limiting or stopping the charging current may be performed on the current control unit.

  In this way, in a system that receives power by contactless power transmission, if there is a characteristic that the voltage increases if the current to be extracted is reduced, the characteristics of the charging voltage and the charging current can be matched to this characteristic. It becomes possible, and efficient charging can be realized.

  In the aspect of the invention, the power supply unit is provided between the first storage node and the connection node of the first charge storage unit, and travels from the first storage node to the connection node. A first diode whose direction is a forward direction and a direction from the second storage node to the connection node provided between the second storage node and the connection node of the second charge storage unit; The power supply unit may supply power to the power supply destination device based on the voltage of the connection node.

  In this way, the power supply voltage based on the accumulated charges of the first and second charge accumulation units can be supplied to the power supply destination device by effectively utilizing the rectification function of the first and second diodes. become. In addition, if the first and second diodes are used in this way, a control signal for switching operation can be made unnecessary, so even if it is difficult to generate such a control signal before starting the system, It becomes possible to respond.

  In one aspect of the present invention, the system device that is the power supply destination device performs display control processing of an electrophoretic display unit that displays an image, and the first accumulation control unit includes at least the electrophoretic display unit. You may perform control which accumulate | stores the electric charge required for one display rewriting in the said 1st electric charge storage part.

  Thus, if the amount of charge stored in the first charge storage unit is limited to the charge required for at least one display rewrite of the electrophoretic display unit, the storage capacity of the first charge storage unit is reduced. You don't have to make it big. As a result, charge accumulation in the first charge accumulation unit can be completed in a short time, and it is possible to cope with a case where a short power reception period is required.

  In the aspect of the invention, the contactless power transmission may be based on electromagnetic induction.

  Another aspect of the invention relates to an electronic apparatus including any one of the circuit devices described above and the power supply destination device.

  In another aspect of the present invention, the power supply destination device includes a system device that performs display control processing of an electrophoretic display unit that displays an image, and the system device receives the power reception in a display rewriting period after power reception. The electrophoretic display unit performs display rewriting processing based on display data received by the data communication with the power transmission device. May be.

  In this way, for example, even when the display rewriting process of the electrophoretic display unit takes a long time, the power based on the charge accumulated in the first charge accumulation unit is supplied to the system device, and the charge electrophoretic display unit The display rewriting process can be completed.

2 is a basic configuration example of a circuit device of the present embodiment and an electronic apparatus including the circuit device. Application example to a non-contact IC card which is one of electronic devices. FIG. 3A is an explanatory diagram of the method of the comparative example, and FIG. 3B is an explanatory diagram of the method of the present embodiment. 4A and 4B are diagrams for explaining the operation of the circuit device of this embodiment. FIG. 5A and FIG. 5B are operation explanatory diagrams of the circuit device of this embodiment. The operation | movement flowchart explaining the method of this embodiment. 7A and 7B are explanatory diagrams of data communication between the power transmission device and the electronic device and problems thereof. The operation | movement flowchart explaining the method of this embodiment. 2 is a configuration example of a booster circuit. 2 shows a second configuration example of a circuit device according to the present embodiment. FIGS. 11A and 11B are explanatory diagrams of problems relating to charging of a charge storage unit in an electronic device using electromagnetic induction. FIG. 12A and FIG. 12B are explanatory diagrams of the charging method of this embodiment. A detailed circuit configuration example of a power management unit or the like. FIG. 14A and FIG. 14B are detailed operation explanatory views of the circuit device of this embodiment. The detailed structural example of a current control part. A configuration example of a system device. 17A to 17C are explanatory diagrams of an electrophoretic display unit.

  Hereinafter, preferred embodiments of the present invention will be described in detail. The present embodiment described below does not unduly limit the contents of the present invention described in the claims, and all the configurations described in the present embodiment are indispensable as means for solving the present invention. Not necessarily.

1. 1. Basic Configuration of Circuit Device and Electronic Device FIG. 1 shows a basic configuration example of a circuit device of the present embodiment and an electronic device including the circuit device. The circuit device 90 according to this embodiment includes a power management unit 20 and a control unit 70. The electronic apparatus according to the present embodiment includes a circuit device 90 and a power supply destination device such as a system device 100 (processing device). In addition, the electronic device includes a power receiving unit 10 and a display unit 150 (electrophoretic display unit, etc.) that receive power by contactless power transmission (electromagnetic induction in a narrow sense; hereinafter, contactless power transmission is referred to as electromagnetic induction). be able to. Furthermore, the electronic device can include a secondary coil L2 (a power receiving coil, a secondary inductor), a capacitor CB, a capacitor C (a charge storage unit in a broad sense), and the like. The secondary coil L2 and the capacitor CB constitute a power receiving side resonance circuit.

  Note that the configurations of the circuit device and the electronic apparatus according to the present embodiment are not limited to the configurations shown in FIG. 1, and various modifications such as omitting some of the components or adding other components are possible. It is. For example, the system device 100 or the power receiving unit 10 may be a component of the circuit device 90. Further, as an electronic device to which the present embodiment is applied, various devices such as an IC card, an electronic shelf label, and an IC tag can be assumed.

  The power receiving unit 10 receives power transmitted from the power transmission device 200 (terminal device, charger, counterpart device) by electromagnetic induction (contactless power transmission). For example, power is received by non-contact power transmission (non-contact power transmission) that enables power transmission even without a metal part contact. Specifically, a primary coil L1 (power transmission coil, primary inductor) provided on the power transmission side and a secondary coil L2 provided on the power reception side are electromagnetically coupled to form a power transmission transformer. Thus, non-contact power transmission (contactless power transmission) is realized. The power receiving unit 10 converts the AC induced voltage of the secondary coil L2 into a DC voltage. This conversion can be realized by a rectifier circuit included in the power receiving unit 10 or the like.

  As the primary coil L1 and the secondary coil L2, for example, a planar coil can be adopted, but this embodiment is not limited to this, and the primary coil L1 and the secondary coil L2 are electromagnetically coupled to generate power. As long as it can transmit, the shape, structure, etc. are not limited.

  The power receiving unit 10 includes a communication unit 16 and a host I / F (interface) 18. The communication unit 16 performs communication processing (RF processing) with the power transmission device 200 that is the counterpart device. Specifically, information is transmitted to and received from the power transmission device 200 by amplitude modulation processing (ASK modulation) using the coils L1 and L2. Alternatively, information may be transmitted / received by frequency modulation processing, load modulation processing, or the like. Data communication is realized using the primary coil L1 and the secondary coil L2 for electromagnetic induction. However, it is possible to implement a modification that is realized by providing another coil for communication.

  The host I / F 18 performs host interface processing with the system device 100 serving as a host. This host interface processing is realized by a data line, a clock line, a control line, and the like.

  The circuit device 90 performs control processing for charge accumulation in the capacitors C1 and C2, which are charge accumulation units. The circuit device 90 can be realized by, for example, an ASIC.

  The system device 100 is a device that executes processing as a system of an electronic device, and can be realized by, for example, a processing device (processor) such as a microcomputer. The system device 100 includes a host I / F 110, a processing unit 120, and a booster circuit 170.

  The booster circuit 170 is a circuit that generates power by a boost operation. The booster circuit 170 boosts the voltage by, for example, a charge pump method to generate a boosted power supply voltage. The display unit 150 performs a display operation based on the boosted power supply voltage from the booster circuit 170. Specifically, the boosted power supply voltage generated by the booster circuit 170 is supplied to the driver circuit of the display unit 150. The driver circuit drives data lines (source lines) and scanning lines (gate lines) of the display panel based on the boosted power supply voltage. In FIG. 1, the system device 100 includes the booster circuit 170. However, the present embodiment is not limited to this, and the booster circuit 170 may be a circuit provided outside the system device 100. .

  The display unit 150 is for displaying various images. The processing unit 120 (processor) performs display control processing for the display unit 150. As the display unit 150, for example, an electrophoretic display unit (hereinafter, appropriately referred to as EPD) can be employed, and the processing unit 120 performs display control processing of the EPD. The processing unit 120 performs various control processes necessary for system operation.

  Examples of display information on the display unit 150 include information on received data by communication, sensor detection information (information such as pressure, temperature, humidity, etc.), unique information / personal information in a memory built in the IC card, and the like.

  FIG. 2 shows an application example when the electronic device is an IC card 190. The IC card 190 is provided with a display unit 150 realized by EPD or the like so that various types of information can be displayed. The IC card 190 includes the power receiving unit 10, the circuit device 90 (IC), capacitors C1, C2, and the like mounted therein.

  When the user holds the IC card 190 over the terminal device 202 (power transmission device), the IC card 190 operates by receiving power from the terminal device 202 by electromagnetic induction and performs data communication with the terminal device 202. Then, images such as numbers and characters corresponding to the communication result are displayed on the display unit 150. Taking electronic money or a prepaid card as an example, the amount used, balance, etc. are displayed on the display unit 150. Various types of information are also displayed on the display unit 210 of the terminal device 202.

  Next, details of the circuit device 90 will be described. The circuit device 90 includes a power management unit 20 and a control unit 70.

  The power management unit 20 performs various management processes (control processes) for power supply. For example, electric power is received from the power receiving unit 10 that receives electric power from the power transmission device 200 by electromagnetic induction, and charges are accumulated in the capacitors C1 and C2 (first and second charge accumulating units in a broad sense; the same applies hereinafter). Control. Then, the power management unit 20 supplies power based on the charges accumulated in the capacitors C1 and C2 to power supply destination devices such as the system device 100 and the booster circuit 170.

  The control unit 70 performs various controls of the circuit device 90 of the present embodiment and performs communication control processing. For example, the control unit 70 operates with electric power received by the power receiving unit 10 by electromagnetic induction, and performs various control processes. Specifically, the control unit 70 performs control processing of the charge management unit 20. The control unit 70 can be realized by a digital circuit such as a gate array circuit.

  The power management unit 20 includes a first accumulation control unit 30, a second accumulation unit 40, and a power supply unit 50.

  The first accumulation control unit 30 (first accumulation operation unit) receives electric power from the power receiving unit 10 that receives electric power by electromagnetic induction, and supplies the capacitor C1 (first charge accumulation unit in a broad sense). Control (operation) for accumulating electric charge is performed. The second accumulation control unit 40 (second accumulation operation unit) receives electric power from the power reception unit 10 and accumulates charges in the capacitor C2 (second charge accumulation unit in a broad sense) (operation) )I do.

  Specifically, the first accumulation control unit 30 is provided between the power input node NI from the power receiving unit 10 and the first accumulation node NA1. Then, the current and voltage for charging the main capacitor C1 for power storage are controlled to control charging to the capacitor C1.

  For example, it is assumed that the system device 100 performs display control processing of an electrophoretic display unit (EPD) that displays an image. In this case, the first accumulation control unit 30 performs control to accumulate charges necessary for display rewriting for at least one time in the electrophoretic display unit (nonvolatile display element) in the capacitor C1. By doing so, it is possible to rewrite the display unit of the system device 100 at least once after receiving power by electromagnetic dielectric. Thus, for example, when applied to a prepaid card or an IC card of electronic money, it is possible to display the usage amount, balance, etc. on the display unit of the IC card after the IC card is held over the terminal device.

  Here, the charge necessary for at least one display rewrite is, for example, a charge necessary for rewriting image data for one screen when performing display rewrite of an image for one screen after receiving power. Alternatively, when display rewriting of a part of one screen image is performed after power reception, the charge is necessary for rewriting part of the image data. The amount of these charges can be known in advance by design or actual measurement. Therefore, for example, the first accumulation control unit 30 may perform control for accumulating the charge corresponding to the worst case data in the design value or actual measurement value of the charge amount in the capacitor C1.

  On the other hand, the second accumulation control unit 40 is provided between the power input node NI from the power receiving unit 10 and the second accumulation node NA2. Then, the charging control to the capacitor C2 is performed by controlling the current and voltage for charging the starting sub capacitor C2.

  The power supply unit 50 supplies power from electromagnetic induction power to power supply destination devices such as the system device 100, the booster circuit 170, and the control unit 70. For example, the power supply unit 50 supplies power to the power supply destination devices such as the system device 100, the booster circuit 170, and the control unit 70 based on the charges stored in the capacitors C1 and C2 (first and second charge storage units). Supply power. Specifically, the power supply voltage based on the voltages of the storage nodes NA1 and NA2 is output to the output node NQ of the power supply to the system device 100 or the like.

  In this case, the power supply unit 50 supplies the system device 100 (boost circuit 170) after the power supply voltage obtained by the charge stored in the capacitor C2 (second charge storage unit) exceeds the operation lower limit voltage of the system device 100. It is desirable to supply power. Here, the operation lower limit voltage is a voltage for which the system device 100 is guaranteed to operate normally. For example, when the system device 100 is a microcomputer (a microcomputer with a built-in display controller), the operation lower limit voltage is defined by the specifications of the microcomputer. For example, when a power supply voltage lower than the operation lower limit voltage is supplied to the system device 100, there is a possibility that a malfunction such as a through current flows in a transistor constituting the system device 100 may occur. In this respect, such a problem can be prevented by preventing the power supply unit 50 from supplying power to the system device 100 until the operating lower limit voltage is exceeded.

  In this embodiment, the capacitor C2 (second charge storage unit) includes a system startup charge storage unit having a charge storage capacity (capacitance) smaller than that of the storage capacitor C1 (first charge storage unit). It has become. As an example, the capacity of the capacitor C1 for storing electricity is several tens of μF to several hundreds of μF (for example, about 100 μF), and the capacity of the starting capacitor C2 is 1 μF or less (for example, about 0.1 μF). A capacitor such as a supercapacitor can be used as the capacitor C1 or the like serving as the power storage element. Accordingly, since the power storage element can be configured to be thin, it can be easily built in an IC card or the like.

  One end of the capacitor C1 is connected to the storage node NA1, which is an output node of the first storage control unit 30, and the other end is connected to, for example, a GND node. One end of the capacitor C2 is connected to the storage node NA2 that is an output node of the second storage control unit 40, and the other end is connected to, for example, a GND node. Note that one end of a capacitor CC for stabilizing the potential is connected to the power input node NI.

  The power supply unit 50 supplies power based on the accumulated charge of the capacitor C2 (second charge accumulation unit) to the system device 100 and the like (power supply destination device) when the system is started after the power reception unit 10 starts receiving power. Supply. That is, at the time of system startup, power based on the stored charge of the small-capacitance capacitor C2 for system startup (power supply voltage based on the voltage of the node NA2) is supplied to the system device 100 and the like.

  On the other hand, the power supply unit 50 supplies power based on the accumulated charge of the capacitor C1 (first charge accumulation unit) to the system device 100 and the like in a period after the end of power reception by the power reception unit 10. That is, in a period after the end of power reception when the system is activated and the capacitor is sufficiently charged, a power supply (power supply voltage based on the voltage of the node NA1) based on the accumulated charge of the large-capacity capacitor C1 for power storage is supplied to the system device. Supply to 100 mag.

  Note that the power supplied to the system device 100 or the like in the period after the end of power reception is desirably a power based on the accumulated charges of both the capacitors C1 and C2. Further, it is sufficient that the power source based on the accumulated charge of the capacitor C2 is supplied to the system device 100 at the time of system start-up (first half of the power receiving period) during the power receiving period. For example, in the second half of the power receiving period, the accumulated charge of the capacitor C1 A power source based on the above may be supplied to the system device 100 or the like.

  In the circuit device according to the present embodiment having the above-described configuration, the power supply voltage is quickly supplied to the system device 100 and the like because the small-capacitance capacitor C2 for activation is charged in a short time after the power reception unit 10 starts receiving power. It becomes possible to start up the system. After that, the capacitor C1 for storing electricity having a capacity larger than that of the capacitor C2 is charged. Even after the power reception period, the system device 100 and the like are supplied with power based on the charge charged in the capacitor C1 and operate. It becomes possible to make it.

  For example, when the circuit device according to the present embodiment is applied to a non-contact IC card, it is necessary to communicate with the terminal device in a short time to store electricity. However, the stored capacitor has a large capacity, and the rising of the charging voltage is slow, and there is a problem that communication cannot be started without releasing the reset of the system (system device).

  In this respect, in this embodiment, as shown in FIG. 1, in addition to the large-capacity capacitor C1 for power storage, a small-capacitance capacitor C2 for activation is provided. As a result, immediately after the start of power reception, the system device 100 can be operated with the charging voltage of the capacitor C2 to perform communication or the like. Accordingly, the system can be started up without depending on the capacity of the capacitor C1 for power storage, and the power storage and communication time can be shortened by starting up the communication system at an early stage.

  For example, an EPD that is a non-volatile display element is a suitable display device as the display unit 150 of the IC card 190 because display information can be held in a non-powered state.

  However, EPD has a problem that it takes a long time (for example, 1 second) to rewrite display information as compared with a liquid crystal display device. Therefore, as shown in FIG. 2, it is difficult to receive power and rewrite the display of the EPD by touch & go operation of holding the IC card 190 over the terminal device 202. .

  For example, in the method of the comparative example of FIG. 3A, the length T1 of the power reception period TR due to electromagnetic induction is lengthened, and data from the terminal device 202 (reader / writer) in the first half of the power reception period TR as shown by A1. Receive. Then, as shown at A2, the display rewriting of the EPD is performed in the operation period of the system device 100 in the latter half of the power reception period TR. In this case, the length T2 of the operation period of the system device 100 is shorter than the length T1 of the power reception period TR.

  However, in the method of the comparative example in FIG. 3A, the length T1 of the power reception period TR becomes long, so that it is impossible to realize a touch and go operation (for example, an operation having a length of about 0.1 second). End up.

  Therefore, in the present embodiment, as shown in FIG. 3B, the length T1 of the power reception period TR is shortened. Then, data reception from the terminal device 202 is performed during the power reception period TR as indicated by A3, and EPD display rewriting is performed during the subsequent operation period of the system device 100 as indicated by A4. In this case, when the length of the power reception period TR is T1 and the length of the operation period of the system device 100 is T2, the relationship of T2> T1 is established.

  Thus, by shortening the length T1 of the power reception period TR, the IC card 190 can operate while receiving power by a touch & go operation. Further, since the length T2 of the operation period of the system device 100 is long, the display information can be rewritten even when EPD is used as the display unit 150. That is, the EPD requires a long time (1 second) to rewrite the display information as compared with the liquid crystal display device, but the period T2 is a data reception period and a time required for at least one EPD display rewriting. .

  In this case, if the length T1 of the power reception period TR is short, there is a possibility that sufficient electric charge necessary for EPD display rewriting cannot be accumulated.

  Therefore, in FIG. 1, a large-capacity capacitor is provided as the capacitor C1 for power storage. For example, by using a capacitor such as a supercapacitor as the capacitor C1, it is possible to accumulate sufficient electric charge necessary for display rewriting of the EPD.

  On the other hand, when the capacitor C1 for power storage has a large capacity as described above, there is a problem that the power supply voltage supplied to the system device 100 does not rise easily and the system cannot be started at an early stage.

Therefore, in the present embodiment, a startup capacitor C2 is provided separately from the storage capacitor C1. That is, in the comparative example of FIG. 3A, power storage and system startup are performed using only the power storage capacitor. On the other hand, in the present embodiment, in order to shorten the storage time, a storage capacitor C1 having a larger capacity than that of the comparative example is used, and a startup capacitor C2 is further provided in order to speed up the startup.
4A, the capacitors C1 and C2 are charged via the first and second accumulation control units 30 and 40 based on the output voltage from the power receiving unit 10. Is done. Then, as shown at B3 in FIG. 4A, when the system is started after power reception by the power receiving unit 10, power based on the accumulated charge of the startup capacitor C2 is supplied to the system device 100 and the like. That is, since the capacitance of the start-up capacitor C2 is small, the voltage of the charge storage node NA2 of C2 rises quickly, and this voltage is supplied to the system device 100 or the like as a power supply voltage as indicated by B3.

  On the other hand, as shown in FIG. 4B, in the period after the end of power reception by the power reception unit 10, power based on the accumulated charge of the capacitor C1 for power storage is supplied to the system device 100 and the like. That is, since the capacitor C1 for power storage is large, the rise of the voltage at the charge storage node NA1 of C1 is slow. However, when time elapses after the start of power reception, this voltage exceeds the operating lower limit voltage of the system device 100, and can be supplied to the system device 100 as a power supply voltage as indicated by B4.

  By doing so, it is possible to operate the system device 100 and the like by turning on the system power at an early stage as indicated by A5 in FIG. As a result, the data reception process shown in A3 can be completed at an early stage, and a short power reception period for realizing a touch-and-go operation can be dealt with.

2. Limiting or Stopping Charge Storage in the Startup Period Now, the booster circuit 170 of FIG. 1 generates a boosted power supply voltage by boosting the power supply voltage supplied from the power management unit 20 and supplies it to the display unit 150. . In this case, the booster circuit 170 generates a boosted power supply voltage by, for example, a charge pump method as will be described later. For this reason, during the startup period of the booster circuit 170, it is necessary to charge the capacitor for the charge pump from the initial state, and much power is consumed during the startup period of the booster operation of the booster circuit 170.

  On the other hand, in the electronic device of FIG. 1, charges are stored in the capacitors C1 and C2, and the electronic device operates by a power source based on the stored charges. Therefore, if a large amount of power is consumed during the startup period of the booster circuit 170 as described above in a state where the capacitors C1 and C2 are not sufficiently charged by the charge accumulation, the power consumption in the boost operation is caused. There is a risk of system down. Further, when the storage capacity of the circuit device 90 that stores the capacitors C1 and C2 is low, it takes time to start up the booster circuit 190, causing problems such as wasteful power consumption.

  In this case, a method of starting up the booster circuit 170 after the power is sufficiently stored in the capacitors C1 and C2 is also conceivable. However, according to this method, it is necessary to wait for the booster circuit 170 to start up until the capacitors C1 and C2 are sufficiently charged with electric power. If the activation of the booster circuit 170 is delayed, other processes of the electronic device such as the data communication process and the display rewriting process may be adversely affected.

  In order to solve such a problem, the present embodiment employs a method of limiting or stopping charge accumulation in the capacitor C1 during the startup period of the power supply destination device such as the booster circuit 170.

  Specifically, as shown in FIG. 1 described above, the power management unit 20 receives power from the power receiving unit 10 and performs control to store charges in the capacitor C1 (first charge storage unit). 1 accumulation control unit 30, a second accumulation control unit 40 that performs control for accumulating charges in the capacitor C 2 (second charge accumulation unit), and a power source based on the charges accumulated in the capacitors C 1 and C 2. A power supply unit 50 that supplies power to the system device 100 that is a supply destination device, the booster circuit 170, and the like is included.

  Then, the power supply unit 50 supplies power based on the accumulated charge of the capacitor C2 to the power supply destination device during the startup period of the power supply destination device.

  For example, FIG. 5A and FIG. 5B are examples in which the power supply destination device is a booster circuit 170 that generates a boosted power supply voltage by a boosting operation. This is the operation start-up period. In this case, as shown in FIG. 5A, during the start-up period of the booster circuit 170 which is a power supply destination device, the power supply based on the accumulated charge of the capacitor C2 is supplied as shown in B12 and B13. To be supplied. As a result, the boosting operation of the boosting circuit 170 is started, and the boosting operation by a charge pump method or the like is performed. Specifically, the booster circuit 170 outputs a charge pump clock signal, starts charging the charge pump capacitor, and starts a boost operation by the charge pump method.

  Then, the control unit 70 performs control to limit or stop the charge accumulation in the capacitor C1 (first charge accumulation unit) by the first accumulation control unit 30 during the activation period of the power supply destination device.

  Specifically, as indicated by B11 in FIG. 5A, during the startup period of the boosting operation of the booster circuit 170 that is the power supply destination device, the charge accumulation in the capacitor C1 by the first accumulation controller 30 is not performed. Limited or stopped. As a result, most (or all) of the power from the power receiving unit 10 is supplied to the booster circuit 170 from the second accumulation control unit 40 via the capacitor C2 and the power supply unit 50 through the paths B12 and B13. Become so. Therefore, the booster circuit 170 can start the boosting operation with sufficient power.

  In this case, the charge accumulation is limited or stopped by the control unit 70 outputting a control signal to the first accumulation control unit 30 and controlling the charging current to the capacitor C1 based on the control signal. Can be realized. For example, the limitation of charge accumulation can be realized by reducing the charging current. For example, in the start-up period of the booster circuit 170, the charging current is reduced compared to a period other than the start-up period. The charge accumulation can be stopped by setting the charging current to zero.

  Then, when it is determined that the activation period of the power supply destination device has ended, the control unit 70 performs control to cancel the restriction or stop of charge accumulation in the capacitor C1 (first charge accumulation unit). For example, when the charging current to the capacitor C1 is limited and reduced, this is restored. When charging is stopped by setting the charging current to the capacitor C1 to zero, the supply of the charging current is resumed.

  Specifically, as indicated by B21 in FIG. 5B, when it is determined that the start-up period of the boosting operation of the booster circuit 170 has ended, control for releasing or stopping the charge accumulation is performed. For example, when the charge pump capacitor is charged from the initial state and a stable boosted power supply voltage can be generated by the charge pump operation, it is determined that the startup period of the boost operation has ended. Then, the restriction or stop of charge accumulation in the capacitor C1 is released. In this case, the length of the activation period may be determined in advance in circuit design or the like, or whether the activation period has ended may be determined based on the detection signal of the detection circuit.

  In this way, after the start-up period ends and the power consumption in the booster circuit 170 decreases, the charge accumulation in the capacitor C1 is resumed as shown in B21, and the charge necessary for display rewriting is transferred to the capacitor. Can be accumulated. In this case, as indicated by B22 and B23, the power supply destination devices such as the system device 100 and the booster circuit 170 operate by being supplied with power based on the charge stored in the capacitor C2.

  Then, the power supply management unit 20 supplies power based on at least the accumulated charge of the capacitor C1 (C2) to the power supply destination device in a period after power reception by the power reception unit 10 is completed. Specifically, the power is supplied to the system device 100, the display unit 150, and the booster circuit 170 that are power supply destination devices. In this way, after the power reception period ends, power is supplied to the system device 100, the display unit 150, and the booster circuit 170 using the accumulated charge of the capacitor C1, and the booster circuit 170 generates the boosted power supply voltage. Thus, display rewriting processing of the display unit 150 (EPD) can be realized.

  As shown in B2 and B3 of FIG. 4A, the power supply unit 50 is a power source based on the accumulated charge of the capacitor C2 (second charge accumulation unit) when the system is started after the power reception unit 10 starts receiving power. Are supplied to the system device 100 which is the power supply destination device.

  Then, the system device 100 is activated after the power supply voltage obtained by the accumulated charge of the capacitor C2 exceeds the operation lower limit voltage, and instructs activation of the boosting operation of the booster circuit 170. Then, in the startup period of the boosting operation of the booster circuit 170 started by the instruction from the system device 100, the control unit 70 applies the capacitor C1 to the capacitor C1 by the first accumulation control unit 30 as indicated by B11 in FIG. Control is performed to limit or stop charge accumulation.

  In this way, the system device 100 is activated and operated with the power supply based on the stored charge of the activation capacitor C2, and the boost operation of the booster circuit 170 is activated according to the activation instruction of the activated system device 100. become. In the startup period of the booster circuit 170, charge accumulation in the capacitor C1 is limited or stopped, so that it is possible to effectively suppress a system down due to power consumption in the booster circuit 170. .

  Note that when TAC is the length of the activation period of the power supply destination device such as the booster circuit 170 and TC1 is the length of the charge accumulation period for the capacitor C1 (first charge accumulation unit), TAC <TC1 A relationship is established. That is, the charge accumulation period is sufficiently longer than the activation period of the power supply destination device.

  FIG. 6 is an operation flowchart for explaining the method of the present embodiment. First, when the power transmission device 200 starts power transmission (S61), the power receiving unit 10 receives power (S71), and the received power is supplied to the circuit device 90. Then, the circuit device 90 determines whether or not the power supply voltage obtained by the accumulated charge of the capacitor C2 or the like exceeds the operation lower limit voltage of the system device 100 (S81), and if it exceeds the operation lower limit voltage, the capacitor C2 A power source based on the accumulated charge is supplied to the system device 100. As a result, the system device 100 is activated and various processes are started (S91). The determination as to whether or not the power supply voltage exceeds the operation lower limit voltage can be realized by a voltage detection circuit (not shown) provided in the circuit device 90. This voltage detection circuit can be constituted by a comparator or the like that compares the voltage of the power supply voltage output node with the lower limit operation voltage.

  Then, when the activated system device 100 instructs activation of the boosting operation of the booster circuit 170 (S92), the boosting operation of the booster circuit 170 is activated (S101). Further, the circuit device 90 limits or stops the charge accumulation in the capacitor C1 (S83). Specifically, the first accumulation control unit 30 of the circuit device 90 performs control to reduce or stop the charging current to the capacitor C1.

  When it is determined that the startup period of the boosting operation of the booster circuit 170 has ended (S102), the system device 100 issues an instruction to cancel the restriction or stop of charge accumulation (S93). As a result, the circuit device 90 releases the restriction or stop of the charge accumulation in the capacitor C1 (S84), and resumes the power storage in the capacitor C1 (S85). That is, if the charging current has been reduced or stopped in S83, the charging current is restored and the supply of the charging current for accumulating the charge necessary for display rewriting is resumed.

  As described above, according to the present embodiment, charge accumulation in the capacitor C1 is limited or stopped during the start-up period of the power supply destination device such as the booster circuit 170 (S83). Therefore, when the power supply destination device consumes a large amount of power during the startup period, it is possible to effectively suppress a situation in which a malfunction such as a system down occurs due to the power consumption.

  That is, the power received by the power receiving unit 10 from the power transmission device 200 by electromagnetic induction is limited. Therefore, if much of the power from the power receiving unit 10 is consumed by the activation of the power supply destination device such as the booster circuit 170, the power supply voltage based on the received power is reduced, causing problems such as system down. There is a risk.

  In this regard, according to the present embodiment, power storage in the capacitor C1 is limited or stopped during the start-up period in which more power may be consumed by the power supply destination device. Accordingly, since the power consumed by the capacitor C1 can be reduced or zero, most of the received power of the power receiving unit 10 can be allocated to the power required for the activation operation of the power supply destination device. Therefore, even when a large amount of power is required for the startup operation of the power supply destination device, it is possible to effectively suppress a situation in which a malfunction such as a system down occurs due to the power consumption of the startup operation. In addition, by supplying a large amount of power to the power supply destination device, the start-up operation of the power supply destination device becomes faster, and a reduction in the start-up period can be expected.

  In addition, according to the present embodiment, in addition to the capacitor C1 for power storage, a small-capacitance capacitor C2 for activation is provided, and the first and second storage control units 30 are based on the power received by the power receiving unit 10. , 40 causes charge accumulation to the capacitors C1, C2. Therefore, even if the charge accumulation in the capacitor C1 is limited or stopped during the start-up period of the power supply destination device, the power supply destination device can operate by being supplied with power based on the accumulated charge in the capacitor C2. Therefore, the power supply destination device can operate with the power supply by the charge stored in the capacitor C2 and can execute the starting operation.

  In this case, since the capacitor C2 is a small-capacitance capacitor for activation, it is possible to accumulate charges early, and the power supply voltage rises early and the system device 100 and the booster circuit 170 can be activated. It becomes possible. Therefore, it is possible to effectively suppress a situation in which other processing of the electronic device such as data communication processing and display rewriting processing is adversely affected by delaying activation of the system device 100 and the booster circuit 170.

  Further, according to the present embodiment, after the start-up period of the power supply destination device ends, the restriction or stop of charge accumulation is released. Therefore, the charge accumulation of the capacitor C1 by the first accumulation control unit 30 is resumed, and the display rewrite processing of the display unit 150 is appropriately realized by the power stored in the large-capacity capacitor C1, for example, in the period after the end of power reception become able to.

  Note that the start-up period for which charge accumulation is restricted or stopped is not limited to the start-up period of the boosting operation of the booster circuit 170. For example, when the system device 100 realized by a microcomputer or the like consumes a large amount of power and may cause a problem such as a system down, the system device 100 that is a power supply destination device is activated during the startup period. The charge accumulation in the capacitor C1 may be limited or stopped. By doing so, the power received by the power receiving unit 10 is suppressed from being consumed by the power stored in the capacitor C1, and the system device 100 is started early after power reception is started. Therefore, it is possible to effectively suppress a situation in which the activation of the system device 100 is delayed and other processes such as data communication processes are adversely affected.

3. Limiting or Stopping Charge Accumulation in Data Communication Period Now, the method for limiting or stopping charge accumulation in the capacitor C1 during the startup period of the power supply destination device has been described. In this case, the charge accumulation of the capacitor C1 is limited or stopped during the data communication period with the power transmission apparatus 200, and as a result, the charge accumulation in the capacitor C1 is limited or stopped during the startup period of the power supply destination device. You may make it do.

  First, details of data communication will be described. FIG. 7A is an explanatory diagram of data communication (RF communication) using the coils L1 and L2 between the power transmission device 200 and the electronic device (power receiving unit). In FIG. 7A, this data communication (RF communication) is realized by amplitude modulation processing. Specifically, it is realized by ASK modulation (Amplitude Shift Keying) processing. In ASK modulation, the amplitude of a carrier wave is changed corresponding to an input code (“0”, “1”). Specifically, in FIG. 7A, the ASK 10% method is adopted so that power is not interrupted by modulation. As the command data or response data encoding method, for example, the Manchester method can be adopted. In addition, as the proximity wireless communication system of the present embodiment, the Type A system, Type B system, etc. of the ISO / IEC 1443 standard can be assumed.

  When data communication as shown in FIG. 7A is performed with the power transmission apparatus 200, for example, when the first charge storage unit 30 in FIG. 1 stores power in the capacitor C1, this power storage is performed. As a result, the power received from the power transmission device 200 is consumed. As a result, as shown in FIG. 7B, the amplitude of the coil end voltage signals (L1, L2) becomes small, which may cause a communication failure in the data communication of FIG. 7A. That is, when the amplitude of the coil end voltage signal becomes small due to the power storage in the capacitor C1 as shown in FIG. 7B, the power transmission device 200 performs amplitude modulation as shown in FIG. 7A and transmits data. However, the power receiving unit 10 cannot detect the data, and a data reception error occurs. The same applies to transmission data from the power receiving unit 10 to the power transmission device 200.

  Therefore, in order to solve this, a method of limiting or stopping charge accumulation in the capacitor C1 during the data communication period is employed. In this case, in this embodiment, the booster circuit 170 is also activated during this data communication period. Specifically, the system device 100 instructs activation of the boosting operation of the booster circuit 170 during the data communication period with the power transmission apparatus 200. In this data communication period, charge accumulation in the capacitor C1 by the first accumulation control unit 30 is limited or stopped.

  As a result, charge accumulation in the capacitor C1 is limited or stopped even during the startup period of the booster circuit 170. Therefore, it is possible to suppress a situation where a communication failure occurs due to power consumption due to power storage in the capacitor C1, and a situation where a large amount of power is consumed during the startup period of the booster circuit 170 and a problem such as a system down occurs. It will be possible to achieve both.

  FIG. 8 is an operation flowchart for explaining the method of this embodiment in this case. First, when the power transmission device 200 starts power transmission (S161), the power receiving unit 10 receives power (S171), and the circuit device 90 supplies power to the system device 100 based on the received power (S181). As a result, the system device 100 is activated (S191).

  Next, based on the electric power received from the power receiving unit 10, the circuit device 90 starts a power storage operation for accumulating charges in the capacitor (S182).

  On the other hand, the system device 100 activated by the power supply from the circuit device 90 starts data communication with the power transmission device 200 via the power receiving unit 10 (S192). Then, the circuit device 90 limits or stops the charge accumulation in the capacitor C1 (S183). Further, the system device 100 issues a boost operation start instruction to the booster circuit 170 (S193), thereby starting the boost operation of the booster circuit 170 (S201). That is, the booster circuit 170 outputs a boosting clock signal and starts charging and discharging the charge pump capacitor. Then, the system device 100 executes data communication with the power transmission device 200 (S194). This data communication includes data communication (S194, S172) between the host I / F 110 of the system device 100 of FIG. 1 and the host I / F 18 of the power receiving unit 10, and the power receiving unit 10 described with reference to FIG. This is realized by RF communication (S172, S162) with the power transmission device 200. RF communication is wireless communication by electromagnetic induction. Through this data communication, display data for displaying an image on the display unit 150 is communicated.

  When the startup period of the boosting operation ends (S202) and the data communication ends (S195), the system device 100 issues a charge accumulation restriction or stop cancellation instruction (S196). As a result, the circuit device 90 releases the restriction or stop of the charge accumulation in the capacitor C1 (S184), and resumes the power storage in the capacitor C1 (S185).

  Then, when the power storage ends, the circuit device 90 notifies the system device 100 of the end of power storage (S186). Then, the system device 100 performs a storage end notification process (S197). Specifically, the power transmission device 200 is notified of the end of power storage through host communication between the system device 100 and the power reception unit 10 or RF communication between the power reception unit 10 and the power transmission device 200 ( S173, S163). At this time, for example, the system device 100 notifies the power transmission apparatus 200 not only of the end of power storage but also the end of data communication. Then, the power transmission device 200 stops power transmission by electromagnetic induction when power storage and data communication are properly terminated in this way (S164).

  On the other hand, the circuit device 90 supplies power to the system device 100 using the accumulated power of the capacitor C1 (C2) after the storage is completed (S187). That is, a power supply based on the accumulated charge is supplied to the system device 100. Thereby, even after power transmission stop of the power transmission apparatus 200 (S164), the system device 100 can be operated by the power source based on the accumulated charge of the capacitor C1 (C2). Then, the system device 100 operates based on the power supply by the accumulated charge and executes the display rewriting process of the display unit 150 (S198).

  If it does as mentioned above, the electric power which the power receiving part 10 received by the electrical storage to a capacitor will be consumed, and the situation where a communication failure generate | occur | produces in data communication can be prevented effectively. That is, in FIG. 7B, since the power is continuously stored even during the data communication period, the amplitude of the coil end voltage signal is reduced due to the power consumption by the power storage. ) Will cause a communication failure.

  In this regard, according to the method of the present embodiment, as shown in S183 of FIG. 8, power storage in the capacitor C1 is limited or stopped during the data communication period. Accordingly, since the amplitude of the coil end voltage signal is maintained even during the data communication period, communication failure is prevented, and data communication by RF communication as shown in FIG. 7A can be properly executed. Therefore, for example, when applied to an IC card, it is effective to prevent the display unit 150 from displaying an image or displaying an incorrect image due to a display data communication failure. Can be suppressed.

  Further, in FIG. 8, the limitation or stoppage of the storage during the data communication period is effectively used so that the storage of the capacitor C1 is limited or stopped even during the startup period of the booster circuit 170. Specifically, the system device 100 instructs activation of the boosting operation of the booster circuit 170 during the data communication period with the power transmission apparatus 200 (S193). And the control part 70 of the circuit apparatus 90 performs control which restrict | limits or stops the electrical storage to the capacitor C1 in a data communication period with the power transmission apparatus 200. FIG. In this way, the startup period of the booster circuit 170 is included in the data communication period. Therefore, by limiting or stopping power storage in the data communication period, power storage in the capacitor C1 is limited or stopped even in the startup period of the booster circuit 170. Therefore, it is possible to effectively suppress both the occurrence of a data communication communication failure caused by the storage of electricity in the capacitor C1 and the occurrence of a malfunction such as a system down due to power consumption during the startup period of the booster circuit 170 by a simple process. It becomes possible to do.

  In the present embodiment, when the length of the activation period of the power supply destination device such as the booster circuit 170 is TAC and the length of the charge accumulation period for the capacitor C1 (first charge accumulation unit) is TC1, As shown in FIG. 8, the relationship of TAC <TC1 is established. Here, the length TAC of the activation period corresponds to the length of the period from the start of activation of the power supply destination device as in S201 to the completion of activation as in S202. The length TC1 of the charge accumulation period corresponds to the length of the period from the start of power storage as shown in S182 to the end of power storage as shown in S186. The period of TC1 includes a period in which the power storage is limited or stopped.

  Thus, the length TAC of the activation period (data communication period) is sufficiently shorter than the length TC1 of the charge accumulation period. Therefore, as in the method of the present embodiment, even if the power storage in the capacitor C1 is limited or stopped during the start-up period (during the data communication period), a sufficient charge storage period can be secured, and the power storage based on the stored charge. It is possible to sufficiently perform display rewriting on the display unit 150 after completion.

  FIG. 9 shows a configuration example of the booster circuit 170. Note that the booster circuit 170 is not limited to the configuration of FIG. 9, and various modifications such as omitting some of the components or adding other components are possible. Further, as the booster circuit 170, a booster circuit of a system other than the charge pump system can be used.

  9 includes a regulator 172, a doubler 174, a booster 176, and a regulator 178. The regulator 172 regulates (steps down) the power supply voltage VDD supplied from the power supply unit 50 of the circuit device 90, and outputs the regulated voltage VE1.

  The doubler 174 receives the regulated voltage VE1 from the regulator 172, performs a charge pump operation of double boosting using the charge pump capacitor CD, and outputs the boosted voltage VE2.

The booster 176 receives the boosted voltage VE2 from the doubler 174, performs a 6-fold boost charge pump operation using the charge pump capacitors CB1 and CB2, and outputs the boosted voltage VE5. In addition,
Regulator 178 regulates (steps down) boosted voltage VE5 from booster 176, and outputs boosted power supply voltage VEPD. The boosted power supply voltage VEPD is a display power supply voltage and is supplied to the display unit 150. A driver circuit of the display unit 150 to be described later uses this boosted power supply voltage VEPD to generate drive voltages for data lines and scanning lines of the display panel. CE1 to CE5 are capacitors for stabilizing the potential of the voltages VE1 to VE5.

  In the boosting circuit 170 of FIG. 9, a large amount of power is consumed to charge the charge pump capacitors CD, CB1, and CB2 and the potential stabilization capacitors CE1 to CE5 to a stable voltage during the startup period.

  This point. According to the present embodiment, in such a startup period of the booster circuit 170, the power storage in the capacitor C1 is limited or stopped as indicated by B11 in FIG. Accordingly, the booster circuit 170 operates by being supplied with power through the paths B12 and B13 in FIG. 5A, and can start the boost operation. In this case, the storage of the capacitor C1 is limited or stopped, so that most of the received power from the power receiving unit 10 is supplied through the paths B12 and B13 in FIG. Therefore, the booster circuit 170 can charge the capacitors CD, CB1, and CB2 with a high power storage capacity to start the boosting operation, so that the startup period can be completed in a short time.

4). Current Control FIG. 10 shows a second configuration example of the circuit device of this embodiment. Note that portions similar to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the second configuration example of FIG. 10, the power management unit 20 includes a current control unit 32. Specifically, the first accumulation control unit 30 of the power management unit 20 includes a current control unit 32. The current control unit 32 controls the charging current to the capacitor C <b> 1 based on the control of the control unit 70. For example, the current control unit 32 receives electric power from the power receiving unit 10 that receives electric power by electromagnetic induction, and controls the charging current to flow through the capacitor C1. In other words, the capacitor C1 is charged by performing a control to flow a charging current having a variable current value to the capacitor C1.

  The control unit 70 controls the current control unit 32 to control the charging current. For example, the control unit 70 controls the magnitude (current value) of the charging current by outputting a control signal for the charging current to the current control unit 32. For example, the control unit 70 measures the charging voltage of the charge storage node NA1, and sets the signal level of each bit of the n-bit control signal based on the measurement result, whereby the magnitude of the charging current that the current control unit 32 flows is set. To control.

  Then, the control unit 70 controls the current control unit 32 to reduce the charging current as the charging voltage of the capacitor C1 (charge storage unit) increases. For example, the control unit 70 controls the current control unit 32 so that the capacitor C1 is charged with a charging current having a large first current value at the start of charging. Then, when the charging voltage exceeds the first voltage value, the current control unit 32 is controlled so as to charge the capacitor C1 with a charging current having a second current value smaller than the first current value. Further, when the charging voltage exceeds a second voltage value larger than the first voltage value, the capacitor C1 is charged with a charging current having a third current value smaller than the second current value. The current controller 32 is controlled. In this way, the control unit 70 performs control to reduce the charging current stepwise, for example, as the charging voltage of the capacitor C1 (the voltage at the node NA1) increases.

  In this case, the control unit 70 limits or stops the charging current to the capacitor C1 (charge storage unit) during the start-up period of the power supply destination device such as the booster circuit 170 and the data communication period with the power transmission device 200. The current control unit 32 is controlled. Thereby, the control which restrict | limits or stops an electrical storage demonstrated by S83 of FIG. 6 and S183 of FIG. 8 is realizable. That is, in the first configuration example, the function of the current control unit 32 that controls the charging current is effectively used to realize the control for limiting or stopping the power storage.

  In addition, the control part 70 measures the voltage information which specifies the charging voltage of the capacitor C1, and controls charging current based on the measured voltage information.

  For example, as illustrated in FIG. 10, the control unit 70 includes an A / D conversion unit 72, a timer 74, and an arithmetic processing unit 76. The A / D conversion unit 72 (voltage information acquisition unit) measures (acquires) voltage information of the charging voltage by A / D converting the charging voltage of the capacitor C1. The arithmetic processing unit 76 performs arithmetic processing for determining the value of the charging current based on the measured voltage information and the time information set by the timer 74, and outputs a charging current control signal to the current control unit 32. .

  More specifically, the control unit 70 (arithmetic processing unit 76) obtains the accumulated charge amount of the capacitor C1 (charge accumulation unit) based on the measured voltage information. Then, the target charge amount is obtained based on the obtained accumulated charge amount and the total charge amount necessary for operating the power supply destination device (system device 100 or the like). Then, control is performed so that a charging current flows through the capacitor C1 until the accumulated charge amount of the capacitor C1 reaches at least the target charge amount.

  Next, the charging method according to the second configuration example of FIG. 10 will be described in detail. FIG. 11A is a diagram illustrating the relationship between voltage and current in contactless power transmission. In FIG. 11A, VI is an output voltage of the power receiving unit 10, and II is an output current. This voltage VI is a voltage (DC voltage) obtained by rectifying the coil end voltage of the secondary coil L2 by, for example, a rectifier circuit included in the power receiving unit 10.

  As shown in FIG. 11A, in a system that receives power by electromagnetic induction, a high voltage VI can be secured if the current II is small. However, when the large current II is extracted, the voltage VI decreases. is there.

  On the other hand, an operating lower limit voltage is defined for the system device 100 which is one of the power supply destination devices. For this reason, when the power based on the electric charge accumulated in the capacitor (C1) is supplied to the system device 100, it is necessary that the supplied power supply voltage does not fall below the operation lower limit voltage.

  Therefore, in the present embodiment, when the system device 100 or the like is operated with a power source based on the accumulated charge of the capacitor after the power receiving unit 10 has finished receiving power, an amount of charge such that the charging voltage of the capacitor does not fall below the operating lower limit voltage, A method of charging the capacitor is adopted.

  However, when such a method is employed, it has been found that if the capacity of the power storage capacitor is large, a situation where wasteful power storage is performed occurs.

  For example, in FIG. 11B, when the capacitance of the capacitor is large, the charge amount QA1 is necessary to ensure the charging voltage of the operation lower limit voltage. If the charge amount QA2 necessary for the operation of the power supply destination device after receiving power is stored in the capacitor, the charging voltage of the capacitor can be secured to the operation lower limit voltage or more during the operation period of the power supply destination device. As a result, the power supply destination device can be safely operated based on the accumulated charge of the capacitor during the operation period after the end of power reception.

  In FIG. 11B, when the capacitance of the capacitor is small, the charge amount QB1 is necessary to secure the charge voltage of the operation lower limit voltage. If the amount of charge QB2 necessary for the operation of the power supply destination device after receiving power is stored in the capacitor, the power supply destination device is safely operated based on the accumulated charge in the capacitor during the operation period after the end of power reception. It becomes possible.

  Here, as shown in FIG. 11 (B), the relationship of QA1> QB1 holds for the amount of charge for securing the operation lower limit voltage. Regarding the amount of charge necessary for the operation after receiving power, the relationship of QA2 = QB2 is established. The charge amounts QA1 and QB1 necessary for securing the operation lower limit voltage become surplus power that is not used during operation. Therefore, if this charge amount is large, the stored power is wasted. Therefore, in order to reduce such waste and increase the efficiency of power storage, it is desirable that the capacity of the capacitor be as small as possible.

  On the other hand, as is clear from FIG. 11B, when the capacitance of the capacitor is reduced, it is necessary to increase the charging voltage in order to store the charge amount QB2 necessary for the operation after power reception. That is, in order to reduce wasteful stored power and increase the efficiency of power storage, it is desirable to reduce the capacity of the capacitor and increase the charging voltage.

  However, in the system that receives power by electromagnetic induction, the relationship of FIG. 11A is established between the voltage VI and the current II. Therefore, when the capacitance of the capacitor is reduced, the charging voltage of the capacitor cannot be increased, and there is a problem that it is difficult to store the charge amount QB2 necessary for the operation after receiving power in the capacitor.

  In order to solve such a problem, the second configuration example of FIG. 10 employs a charging method in which the charging current is reduced as the charging voltage of the capacitor increases, as shown in FIG. .

  In this way, as shown in FIG. 12B, the voltage-current characteristic (VI-II characteristic) on the power receiving unit side (coil side) and the charging voltage-charge current characteristic (VCH-ICH characteristic) on the capacitor side. Can be matched. Therefore, as shown in FIG. 11B, the capacity of the capacitor can be reduced, so that both the efficiency of power storage and the securing of the operation lower limit voltage can be achieved. Further, by reducing the capacitance of the capacitor, it is possible to reduce the mounting space of the capacitor of the IC card 190, and it is possible to contribute to the downsizing of the device.

  Next, a more detailed configuration example of the circuit device according to the present embodiment will be described with reference to FIG. In FIG. 13, the first accumulation control unit 30 in FIG. 10 is realized by the current control unit 32, and the second accumulation control unit 40 is realized by the activation regulator 42.

  The current control unit 32 receives the voltage VIN from the rectifier circuit 12 constituting the power receiving unit 10, and outputs a charging current to the storage node NA1 via the backflow prevention diode DI3.

  The startup regulator 42 receives the voltage VIN from the rectifier circuit 12, and outputs the voltage VA2 after voltage adjustment to the storage node NA2. For example, the constant voltage VA2 is output by voltage adjustment. Specifically, for example, a voltage of about 15 V at the maximum is stepped down to a constant voltage VA2 of, for example, about 4.0 V by the regulator 42, and charge is stored in the starting capacitor C2.

  In FIG. 13, the power supply unit 50 includes first and second diodes DI1 and DI2. Here, DI1 is a diode provided between the storage node NA1 and the connection node NC of the current control unit 32 and having a forward direction from the storage node NA1 to the connection node NC. DI2 is a diode provided between the storage node NA2 of the activation regulator 42 (second charge storage unit 40) and the connection node NC and having a forward direction from the storage node NA2 to the connection node NC. It is. The power supply unit 50 supplies power to the system device 100 based on the voltage of the connection node NC.

  By configuring the power supply unit 50 with such diodes DI1 and DI2, it is possible to prevent backflow of current from the connection node NC to the storage nodes NA1 and NA2, and to supply the voltages VA1 and VA2 of the storage nodes NA1 and NA2 to the power supply. The voltage VC can be output to the connection node NC.

  FIG. 14A is a voltage waveform diagram for explaining the operation of the circuit device of FIG.

  When power reception is started and the voltage VIN from the power reception unit 10 is supplied, the capacity VA2 of the starting capacitor C2 is small, so that the voltage VA2 of the storage node NA2 of the capacitor C2 rises early as indicated by D1. When the threshold voltage VTH corresponding to the operation lower limit voltage of the system device 100 is exceeded as indicated by D2, the voltage corresponding to the voltage VA2 is supplied to the system device 100 as the power supply voltage VC. Specifically, a voltage dropped from VA2 by the amount corresponding to the forward voltage of diode DI1 is supplied as VC.

  On the other hand, since the capacity of the storage capacitor C1 is large, the voltage VA1 of the storage node NA1 of the capacitor C1 gradually rises as indicated by D3. When the voltage VA1 rises, a voltage corresponding to the voltage VA1 is supplied to the system device 100 as the power supply voltage VC. Specifically, a voltage dropped from VA1 by the amount corresponding to the forward voltage of diode DI1 is supplied as VC.

  When the power reception period ends after the start of power reception, the charges of the capacitors C1 and C2 are discharged, so that the power supply voltage VC gradually decreases as indicated by D4. In this case, in this embodiment, since the capacity of the capacitor C1 is sufficiently large, it is possible to secure a display rewriting period of a long time (for example, 1 second).

  FIG. 14B is a diagram showing the relationship between the accumulated current and the discharge current. For example, during the power reception period, charges are accumulated in the capacitor as indicated by E1. Further, as indicated by E2, electric charge is discharged from the capacitor for system startup or the like. In the display rewriting period, the charge is discharged from the capacitor as indicated by E3, and the EPD display rewriting process by the system device 100 is performed based on the discharged charge.

  FIG. 15 shows a detailed configuration example of the current control unit 32. The current control unit 32 includes operational amplifiers OP1 and OP2, transistors TB1 to TB5, resistors RB1 to RB7, and RCH.

  The transistors TB1, TB2, and TB3 are on / off controlled by a control signal ICT from the control unit 70. One end of each of the resistors RB1, RB2, and RB3 is connected to each of the transistors TB1, TB2, and TB3. The other ends of the resistors RB1, RB2, and RB3 are commonly connected to the node NB1.

  The reference voltage VR is input to the inverting input terminal of the operational amplifier OP1, and the node NB1 is connected to the non-inverting input terminal. The output of the operational amplifier OP1 is connected to the gate of a transistor TB4 provided between the nodes NB2 and NB1. As a result, the operational amplifier OP1 operates so that the voltage VB1 of the node NB1 is set to the reference voltage VR. Then, when the node NB1 is set to a constant voltage VR (for example, 1.25 V), which is a constant voltage, the transistors TB1, TB2, and TB3 are controlled to be turned on / off by the control of the control unit 70. The current IB flowing through RB4 and RB5 can be variably controlled.

  In FIG. 15, the non-inverting input terminal of the operational amplifier OP2 is connected to the node NB2, and the inverting input terminal is set to the node NB3. The output of the operational amplifier OP2 is connected to the gate of the transistor TB5 provided between the nodes NI and NB4. As a result, the operational amplifier OP2 operates so that the voltage VB2 of the node NB2 and the voltage VB3 of the node NB3 are equal. That is, the operational amplifier OP2 operates so that VB2 = VB3.

  RB6 and RB7 are dummy resistors, and no current flows from the nodes NB5 to NB3. For this reason, the voltages at both ends of the resistors RB6 and RB7 are equal, and VB5 = VB3 = VB2.

  If the resistance values of the resistors RB4 and RB5 are expressed by the same symbols RB4 and RB5, VB4 = VB2 + IB × (RB4 + RB5).

  Therefore, a voltage difference of VB4−VB5 = VB2 + IB × (RB4 + RB5) −VB5 = VB2 + IB × (RB4 + RB5) −VB2 = IB × (RB4 + RB5) is applied to both ends of the resistor RCH. Therefore, the current ICH flowing through the resistor RCH is ICH = IB × {(RB4 + RB5) / RCH}, and this current ICH flows as a charging current to the capacitor C1 to perform a charging operation.

  As described above, the current IB is variably controlled by the control signal ICT (ICT1 to ICT3) from the control unit 70. Therefore, the charging current ICH = IB × {(RB4 + RB5) / RCH} is also variably controlled by the control signal ICT.

  For example, in FIG. 15, resistors RB1, RB2, and RB3 have different resistance values such as 5KΩ, 10KΩ, and 20KΩ, respectively. For example, assume that the control unit 70 outputs a control signal ICT that turns off the transistors TB1 and TB3 and turns on the transistor TB2. Then, since the voltage of the node NB1 becomes VB1 = VR = 1.25V, IB = 125 μA. When RCH = RB4 + RB5, a charging current of ICH = 125 μA flows to the capacitor C.

  As described above, according to the current control unit 32 having the configuration shown in FIG. 15, the charging current ICH can be variably controlled by controlling on / off of the transistors TB <b> 1 to TB <b> 3 by the control signal ICT from the control unit 70. . As a result, the charging method of the present embodiment as described with reference to FIGS. 12A and 12B can be realized. According to the configuration of FIG. 15, the voltage difference between both ends of the resistor RCH can be set to a small voltage difference, so that the charging current ICH can be variably controlled with a small voltage drop, and the charging efficiency can be improved.

  In the present embodiment, the limitation or stop of the storage of the capacitor shown in S83 in FIG. 6 and S183 in FIG. 8 can also be realized by the on / off control of the transistors TB1 to TB3 in FIG. For example, when stopping the storage, all the transistors TB1 to TB3 may be turned off by the control signal ICT from the control unit 70. Further, in order to limit storage, for example, the transistors TB1 and TB2 connected to the low resistance resistors RB1 and RB2 are turned off, and the transistor TB3 connected to the high resistance resistor RB3 is turned on. Such control may be performed.

  As described above, according to the current control unit 32 having the configuration shown in FIG. 15, the transistors TB1 to TB3 used for controlling the charging current are effectively used to store the capacitors stored in S83 in FIG. 6 and S183 in FIG. There is an advantage that restriction or stopping can also be realized.

5. System Device FIG. 16 shows a detailed configuration example of the system device 100. The system device 100 includes a host I / F 110, a processing unit 120, a register unit 130, a waveform information memory 140, an image memory 142, and a work memory 144.

  The host I / F 110 is an interface for transmitting / receiving information to / from a counterpart device (power transmission device, terminal device, charger) serving as a host. The host I / F 110 is connected to the host I / F 18 on the power receiving unit 10 side via the control unit 70. As a result, transmission / reception of information to / from the power transmission device 200 (partner device) becomes possible.

  The processing unit 120 performs display control processing of the display unit 150 and various control processes of the system. The processing unit 120 can be realized by a processor, a gate array circuit, or the like, for example.

  The display unit 150 whose display is controlled by the processing unit 120 includes a display panel 152 (electro-optical panel) and a driver circuit 154 that is a circuit for driving the display panel 152. The driver circuit 154 drives data lines (segment electrodes) and scanning lines (common electrodes) of the display panel 152. The display panel 152 is realized by a display element such as an electrophoretic element.

  The register unit 130 includes various registers such as a control register and a status register. The waveform information memory 140 stores waveform information and instruction code information for driving the EPD. The waveform information memory 140 can be realized by, for example, a nonvolatile memory (for example, a flash memory) that can rewrite / erase data. The image memory 142 (VRAM) stores, for example, image data for one screen displayed on the display panel 152. The work memory 144 is a memory serving as a work area for the processing unit 120 and the like. The image memory 142 and the work memory 144 can be realized by a RAM such as an SRAM.

  FIG. 17A illustrates a configuration example of the display panel 152. The display panel 152 includes an element substrate 300, a counter substrate 310, and an electrophoretic layer 320 provided between the element substrate 300 and the counter substrate 310. The electrophoretic layer 320 (electrophoretic sheet) includes a large number of microcapsules 322 having an electrophoretic substance. The microcapsule 322, for example, disperses positively charged black positively charged particles (electrophoretic substance) and negatively charged white negatively charged particles (electrophoretic substance) in a dispersion liquid. It is realized by enclosing in a simple capsule.

  The element substrate 300 is formed of glass or transparent resin. The element substrate 300 includes a plurality of data lines (segment electrodes), a plurality of scanning lines (common electrodes), and a plurality of pixel electrodes in which each pixel electrode is provided at the intersection of each data line and each scanning line. Is done. In addition, a plurality of switch elements are provided in which each switch element formed by a TFT (Thin Film Transistor) or the like is connected to each pixel electrode. A data driver for driving the data lines and a scanning driver for driving the scanning lines are also provided.

  A common electrode (transparent electrode) is formed on the counter substrate 310, and a common voltage VCOM (counter voltage) is supplied to the common electrode. Note that the electrophoretic sheet may be formed by forming a common electrode with a transparent conductive material on the transparent resin layer, and applying an adhesive or the like on the transparent resin layer to adhere the electrophoretic layer.

  In the display panel 152 in FIG. 17A, when an electric field is applied between the pixel electrode and the common electrode, positively charged particles (black) and negatively charged particles (white) sealed in the microcapsule 322 are Electrostatic force acts in the direction according to the positive and negative charge. For example, positively charged particles (black) move to the common electrode side on the pixel electrode having a higher potential than the common electrode, so that the pixel is displayed in black.

  Next, the waveform information stored in the waveform information memory 140 of FIG. 16 will be described. Here, waveform information of an EPD (electrophoretic display unit) will be described as an example.

  For example, in a liquid crystal display device, as indicated by F1 in FIG. 17B, when changing the gray level of a pixel from the first gray level to the second gray level, data on the data line (source line) is displayed. The voltage also changes in one frame period from the data voltage VG1 corresponding to the first gradation to the data voltage VG2 corresponding to the second gradation.

  On the other hand, in EPD, when the gray level of a pixel is changed from the first gray level to the second gray level, as shown by F2 in FIG. Change over time. For example, when changing from the first gradation close to white to the second gradation close to black, the display of white and black is repeated over a plurality of frames to change the gradation of the pixel to the final second level. Change the key. For example, in the waveform of FIG. 17C, the data voltage changes over a plurality of frames such that the data voltage is set to VA in the first three frames and is set to -VA in the next three frames. Note that the waveform has a different shape depending on the combination of the pixel gradation in the current display state and the pixel gradation in the next display state.

  The waveform information memory 140 stores waveform information as indicated by F2 in FIG. The processing unit 120 determines the driving voltage of the EPD in each frame based on the image data (gradation data of each pixel) stored in the image memory 142 and the waveform information stored in the waveform information memory 140. Then, EPD display control processing is performed.

  As is clear from comparison of F1 in FIG. 17B and F2 in FIG. 17C, EPD requires a longer time to rewrite display information than a liquid crystal display device or the like.

  In this regard, in the present embodiment, as described above, the large-capacity capacitor C1 for power storage is provided, and charges necessary for display rewriting for at least one EPD are stored in the capacitor C1 during the power reception period TR.

  Further, by providing a small-capacitance capacitor C2 for startup, the system power is turned on early. As a result, the processing unit 120 receives data such as display information from the counterpart device (power transmission device, terminal device) that is the host via the host I / F 110.

  Then, the processing unit 120 performs an EPD display rewriting process in the display rewriting period TC after power reception. That is, based on the display information received through the host I / F 110 and written in the image memory 142 and the waveform information stored in the waveform information memory 140, the waveform as shown by F2 in FIG. EPD display rewrite processing is performed on the form.

  Thus, even with an EPD having a long display rewriting period, display information can be rewritten based on the charge received in the short power receiving period TR. Therefore, for example, an EPD display unit 150 that can hold display information in a non-powered state can be incorporated into a non-contact IC card that requires a touch & go operation. The card can be realized.

  Although the present embodiment has been described in detail as described above, it will be easily understood by those skilled in the art that many modifications can be made without departing from the novel matters and effects of the present invention. Accordingly, all such modifications are intended to be included in the scope of the present invention. For example, in the specification or drawings, at least once, terms (capacitors for storage, start-up, etc.) described together with different terms (first charge storage unit, second charge storage unit, non-contact power transmission, etc.) having a broader meaning or the same meaning Capacitor, electromagnetic induction, etc.) may be replaced by the different terms anywhere in the specification or drawings. In the present embodiment, electromagnetic induction has been described as an example. However, the present invention is not limited to this, and other contactless power transmission methods are also applicable. All combinations of the present embodiment and the modified examples are also included in the scope of the present invention. Further, the configuration / operation of the circuit device and the electronic device, the charge accumulation limiting / stopping method, the charge accumulation method, the power supply method, the communication processing method, and the like are not limited to those described in this embodiment, and various modifications are possible. Implementation is possible.

L1 primary coil, L2 secondary coil, CB, CC capacitor,
C1 storage capacitor, C2 start-up capacitor,
DI1, DI2, DI3 first, second and third diodes,
10 power receiving unit, 12 rectifier circuit, 16 communication unit, 18 host I / F,
20 power management unit, 30 first accumulation control unit, 32 current control unit,
40 second storage control unit, 42 regulator for startup, 50 power supply unit,
70 control unit, 72 A / D conversion unit, 74 timer,
76 arithmetic processing units, 90 circuit devices,
100 system device, 110 host I / F, 120 processing unit,
130 register section, 140 waveform information memory, 142 image memory,
144 Work memory, 150 display unit, 152 display panel,
154 Driver circuit, 190 IC card,
200 power transmission device, 202 terminal device, 210 display unit, 300 element substrate,
310 counter substrate, 320 electrophoretic layer, 322 microcapsule

Claims (14)

Receives power from the power receiving unit that receives power from the power transmission device by contactless power transmission, performs control to store the charge in the charge storage unit, and supplies power based on the charge stored in the charge storage unit. A power management unit for supplying to the destination device;
A control unit that performs control processing of the power management unit;
Including
The charge storage unit
A first charge storage unit;
A second charge storage unit having a charge storage capacity smaller than that of the first charge storage unit,
The power management unit
A first accumulation control unit that receives electric power from the power receiving unit and performs control for accumulating charges in the first charge accumulation unit;
A second accumulation control unit that receives electric power from the power receiving unit and performs control for accumulating charges in the second charge accumulation unit;
A power supply unit that supplies power to the power supply destination device based on the charges accumulated in the first charge accumulation unit and the second charge accumulation unit;
The power supply unit
In the start-up period of the power supply destination device from the initial state until the stable operation of the power supply destination device, supply the power based on the accumulated charge of the second charge accumulation unit to the power supply destination device,
The controller is
A circuit device that performs control to limit or stop charge accumulation in the first charge accumulation unit by the first accumulation control unit during the activation period of the power supply destination device. In claim 1,
The power supply unit
In the period after the end of power reception by the power reception unit, a circuit device supplies power based on at least the charge accumulated in the first charge accumulation unit to the power supply destination device. In claim 1 or 2,
The controller is
A circuit device that performs control to release restriction or stop of charge accumulation in the first charge accumulation unit when it is determined that the activation period of the power supply destination device has expired. In any one of Claims 1 thru | or 3,
The second charge accumulation portion, the circuit and wherein the storage capacity of charge than the first charge accumulation portion go low. In any one of Claims 1 thru | or 4,
The power supply destination device is a booster circuit that generates a boosted power supply voltage by a boosting operation,
The start-up period is a boost operation start-up period until the booster circuit can generate a stable boosted power supply voltage from an initial state ,
The controller is
A circuit device characterized by performing control to limit or stop charge accumulation in the first charge accumulation unit by the first accumulation control unit during the boost operation start-up period of the booster circuit. In claim 5,
The power supply unit
At the time of system startup after the start of power reception by the power receiving unit, supply power based on the accumulated charge of the second charge accumulation unit to the system device that is the power supply destination device,
The system device is activated after a power supply voltage exceeds an operation lower limit voltage, and instructs activation of the boosting operation of the booster circuit,
The controller is
Performing control to limit or stop charge accumulation in the first charge accumulation unit by the first accumulation control unit during the activation period of the boosting operation of the boosting circuit activated by an instruction from the system device. A circuit device characterized by the above. In claim 6,
The system device is:
Instructing activation of the boosting operation of the booster circuit during a period of data communication with the power transmission device via the power receiving unit,
The controller is
A circuit device that performs control to limit or stop charge accumulation in the first charge accumulation unit by the first accumulation control unit during a period of the data communication with the power transmission device. In any one of Claims 1 thru | or 7,
TAC <TC1 where TAC is the length of the activation period of the power supply destination device and TC1 is the length of the charge accumulation period for the first charge accumulation unit. . In any one of Claims 1 thru | or 8.
The first accumulation control unit
Based on the control of the control unit, including a current control unit that controls a charging current to the charge storage unit,
The controller is
While performing control for the current control unit to reduce the charging current as the charging voltage of the first charge storage unit increases,
The circuit device according to claim 1, wherein during the start-up period of the power supply destination device, the current control unit is controlled to limit or stop the charging current to the first charge storage unit. In any one of Claims 1 thru | or 9,
The power supply unit
A first diode provided between a first storage node and a connection node of the first charge storage unit, the forward direction being a direction from the first storage node to the connection node;
A second diode provided between the second storage node and the connection node of the second charge storage unit and having a forward direction from the second storage node to the connection node. ,
The power supply unit
A circuit device that supplies power to the power supply destination device based on a voltage of the connection node. In any one of claims 1 to 10,
The system device that is the power supply destination device performs display control processing of an electrophoretic display unit that displays an image,
The first accumulation control unit
A circuit device characterized by performing control for accumulating charges necessary for display rewriting at least once in the electrophoretic display section in the first charge accumulating section. In any one of claims 1 to 11,
The circuit device according to claim 1, wherein the contactless power transmission is based on electromagnetic induction. A circuit device according to any one of claims 1 to 12,
The power supply destination device;
An electronic device comprising: A circuit device according to claim 7;
Anda system device that performs display control processing of the electrophoretic display unit for displaying an image,
The system device is:
In the display rewriting period after receiving power, the power receiving unit operates by a power source based on the charge accumulated in the charge accumulating unit, and based on the display data received by the data communication with the power transmitting device, An electronic apparatus that performs display rewriting processing of an electrophoretic display portion.

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