JP5896298B2 - Rotating electric machine for vehicles - Google Patents

Description

  The present invention relates to a vehicular rotating electrical machine mounted on a passenger car, a truck, or the like.

  Conventionally, in a switching unit that performs synchronous rectification using a MOS transistor, when an overheat state is detected, a switching element that constitutes one of the upper arm and the lower arm is turned on, and a switching element that constitutes the other is turned off. A vehicular rotating electrical machine that suppresses power generation is known (for example, see Patent Document 1). As a result, the phase voltage of the armature winding is fixed to the positive electrode side or the negative electrode side, so that the number of rotations cannot be detected by the power generation control device, the supply of excitation current by the power generation control device is stopped or reduced, and the switching element Overheat protection can be reliably implemented.

JP 2012-90454 A

  By the way, in the vehicular rotating electrical machine disclosed in Patent Document 1, the phase voltage of the armature winding is fixed to the positive electrode side or the negative electrode side by turning on the switching elements that constitute the lower arm or the upper arm as described above. ing. However, if the switching element that constitutes the upper arm or the lower arm corresponding to the phase winding of the armature winding to which the power generation control device is connected fails, the phase voltage is positive even if the switching element is turned on. It cannot be sufficiently fixed to the side or the negative electrode side. In such a case, since the power generation control device cannot detect an abnormality based on the phase voltage and does not suppress power generation, there is a problem that the protection when the abnormality occurs becomes insufficient.

  In addition, in the vehicular rotating electrical machine disclosed in Patent Document 1, the power generation control device, which is unable to detect the rotational speed, determines that the rotation of the rotating electrical machine for the vehicle has stopped when the vehicle travels. An alarm will be issued. In other words, even if a temporary abnormal state occurs and the abnormal state can be resolved and returned to the normal state by suppressing power generation, an alarm is issued, and the vehicle driver is excessively worried. There was a problem that there is a risk of giving.

  The present invention was created in view of these points, and its purpose is to provide sufficient protection of the switching element when an abnormality occurs and to prevent an excessive alarm operation when an abnormal state occurs. An object of the present invention is to provide a rotating electrical machine for a vehicle that can be used.

In order to solve the above-described problem, a rotating electrical machine for a vehicle according to the present invention includes a field winding, a stator, a power generation control device, and a plurality of rectifier modules. The field winding magnetizes the field pole of the rotor. The stator has an armature winding as a multiphase winding that generates an AC voltage by a rotating magnetic field generated by a field pole. The power generation control device controls the generated voltage by adjusting the excitation current supplied to the field winding, and stops or reduces the supply of the excitation current when the first specific signal is input to the phase voltage detection terminal. . The plurality of rectifier modules are provided corresponding to the plurality of output terminals of the armature winding, and are connected to each other via signal lines that transmit and receive signals. Each rectifier module has an upper arm and a lower arm connected to the output terminal and configured by a switching element, and controls a switching unit that rectifies the induced voltage of the armature winding, and controls on / off of the switching element. A switching control unit, an abnormality detection unit that detects an abnormality of the switching element, an abnormal signal transmission unit that transmits an abnormal signal toward another rectifier module when an abnormality is detected by the abnormality detection unit, and another rectifier module When an abnormality is detected by the abnormality signal receiving unit that receives the abnormality signal transmitted from the abnormality detecting unit, or when the abnormality signal transmitted from another rectifier module is received by the abnormality signal receiving unit, the first And an exciting current suppression signal transmission unit for transmitting the specific signal. At least one of the plurality of rectifier modules is connected to the power generation control device. The power generation control device does not output an abnormal alarm signal to the outside when the first specific signal is input to the phase voltage detection terminal, the abnormality is not detected by the abnormality detection unit, and is not normally rectified Therefore, when a second specific signal different from the first specific signal is input to the phase voltage detection terminal, an abnormal alarm signal is output to the outside.

  Even if an abnormality occurs in which the switching element that constitutes the upper arm or the lower arm fails in any rectifier module, this fact is notified to the other rectifier module and the excitation current is supplied to the power generation control device. Can be instructed to stop or reduce power generation, and power generation can be suppressed. As a result, it is possible to prevent the switching element from generating heat and expanding damage and to sufficiently protect the switching element. Moreover, since it is possible to suppress power generation without outputting an abnormal alarm signal to the outside in the power generation control device, it is possible to prevent an excessive alarm operation when an abnormal state occurs.

It is a figure which shows the structure of the generator for vehicles of one Embodiment. It is a figure which shows the detailed structure of a power generation control apparatus. It is a figure which shows the structure of a rectifier module. It is a figure which shows the detailed structure of a control circuit. It is a figure which shows the specific example of the voltage comparison by an upper MOS _VDS detection part. It is a figure which shows the specific example of the voltage comparison by a lower MOS _VDS detection part. It is a figure which shows the specific example of the temperature detection result by an upper MOS temperature detection part and a lower MOS temperature detection part. High-side MOS transistor is a diagram showing changes of the phase voltage V _P in the case of short circuit. The high side of the MOS transistor is a diagram showing a state of change of the phase voltage V _P in the case of rare short. Low-side MOS transistor is a diagram showing changes of the phase voltage V _P in the case of short circuit. Low-side MOS transistor is a diagram showing changes of the phase voltage V _P in the case of short circuit. It is a figure which shows the detailed structure of a control part. It is an operation | movement timing diagram of the synchronous rectification control (synchronous control) performed by a control part. It is a figure which shows a structure required in order to perform synchronous control start determination. It is a figure which shows the phase voltage in the normal time when the load dump does not generate | occur | produce. It is a figure which shows the phase voltage at the time of the load dump protection operation | movement after load dump generate | occur | produces. It is a figure which shows the voltage waveform after amplifying the drain-source voltage of the MOS transistor of the low side at the time of load dump protection operation. It is a figure which shows the operation timing of synchronous control start determination. It is a figure which shows the specific example of a phase voltage waveform when the off timing set by the lower MOS off timing calculating part is overdue. It is a figure which shows the relationship between an output voltage fluctuation | variation, an upper arm ON period, and a lower arm ON period. It is a figure which shows a structure required in order to perform synchronous control stop determination. It is a figure which shows the operation | movement timing when abnormality generate | occur | produces in the high side MOS transistor. It is a figure which shows the operation timing when abnormality occurs in the MOS transistor on the low side. It is a figure which shows the modification of a rectifier module.

  Hereinafter, a vehicular generator according to an embodiment to which a vehicular rotating electrical machine of the present invention is applied will be described with reference to the drawings. As shown in FIG. 1, the vehicle generator 1 according to an embodiment includes two stator windings (armature windings) 2 and 3, a field winding 4, two rectifier module groups 5 and 6, and power generation. A control device 7 is included.

  One stator winding 2 is a multiphase winding (for example, a three-phase winding composed of an X-phase winding, a Y-phase winding, and a Z-phase winding), and is wound around a stator core (not shown). It is disguised. Similarly, the other stator winding 3 is a multi-phase winding (for example, a three-phase winding composed of a U-phase winding, a V-phase winding, and a W-phase winding). The stator winding 2 is wound at a position shifted by 30 degrees in terms of electrical angle. In the present embodiment, a stator is constituted by these two stator windings 2 and 3 and the stator core.

  The field winding 4 is wound around a field pole (not shown) disposed opposite to the inner peripheral side of the stator core to constitute a rotor. The field pole is magnetized by passing an exciting current. The stator windings 2 and 3 generate an alternating voltage by a rotating magnetic field generated when the field pole is magnetized.

  One rectifier module group 5 is connected to one stator winding 2 to form a three-phase full-wave rectifier circuit (bridge circuit) as a whole, and the alternating current induced in the stator winding 2 is converted into direct current. Convert to current. The rectifier module group 5 includes rectifier modules 5X, 5Y, and 5Z corresponding to the number of phases of the stator winding 2 (three in the case of a three-phase winding). The rectifier module 5 </ b> X is connected to the X-phase winding included in the stator winding 2. The rectifier module 5 </ b> Y is connected to a Y-phase winding included in the stator winding 2. The rectifier module 5Z is connected to the Z-phase winding included in the stator winding 2.

  The other rectifier module group 6 is connected to one stator winding 3 to form a three-phase full-wave rectifier circuit (bridge circuit) as a whole, and the alternating current induced in the stator winding 3 is converted into direct current. Convert to current. The rectifier module group 6 includes a number of rectifier modules 6U, 6V, and 6W corresponding to the number of phases of the stator winding 3 (three in the case of a three-phase winding). The rectifier module 6U is connected to a U-phase winding included in the stator winding 3. The rectifier module 6V is connected to a V-phase winding included in the stator winding 3. The rectifier module 6 </ b> W is connected to the W-phase winding included in the stator winding 3.

The power generation control device 7 is an excitation control circuit that controls the excitation current flowing in the field winding 4 connected via the F terminal, and adjusts the excitation current to adjust the output voltage (power generation) of the vehicle generator 1. voltage, output voltage) V _B of the rectifier module is controlled to be a regulated voltage Vreg. For example, the power generation controller 7 stops the supply of the exciting current to the field winding 4 when the output voltage V _B is higher than the regulated voltage Vreg, it is lower than the regulated voltage Vreg output voltage V _B When the exciting current is supplied to the field winding 4 at this time, the output voltage V _B is controlled to become the adjustment voltage Vreg. Further, the power generation control device 7 detects the number of rotations of the rotor based on any phase voltage (for example, X phase) of the stator winding, and excites the field winding 4 when the rotation stop is detected. Stop or reduce the supply of current. Furthermore, the power generation control device 7 is connected to the ECU 8 (external control device) via the communication terminal L and the communication line, and performs bidirectional serial communication (for example, a LIN (Local Interconnect Network) protocol) with the ECU 8. LIN communication used) and a communication message is transmitted or received.

  As shown in FIG. 2, the power generation control device 7 includes a MOS transistor 71, a freewheeling diode 72, resistors 73 and 74, a voltage comparison circuit 75, an excitation current control circuit 76, a rotation detection circuit 77A, a first specific signal determination unit 77B, A second specific signal determination unit 77C, an alarm circuit 78, and a communication circuit 79 are provided.

  The communication circuit 79 performs serial communication with the ECU 8. Thereby, data such as the adjustment voltage Vreg sent from the ECU 8 can be received.

  The resistors 73 and 74 constitute a voltage dividing circuit, and a voltage obtained by dividing the generated voltage (output voltage) of the vehicle generator 1 is input to the voltage comparison circuit 75. The voltage comparison circuit 75 compares the generated voltage divided by the resistors 73 and 74 with the reference voltage corresponding to the adjustment voltage Vreg received by the communication circuit 79. For example, as a comparison result, when the reference voltage is higher than the generated voltage, a high level signal is output. Conversely, when the generated voltage is higher than the reference voltage, a low level signal is output. .

  The exciting current control circuit 76 controls the MOS transistor 71 on and off with a PWM signal having a driving duty determined based on the output (voltage comparison result) of the voltage comparison circuit 75. In order to suppress a rapid fluctuation in the output current, the excitation current control circuit 76 may perform gradual excitation control that gradually changes the excitation current.

Each of the rotation detection circuit 77A, the first specific signal determination unit 77B, and the second specific signal determination unit 77C has a P terminal (phase voltage detection terminal) and a high impedance resistor 20 (FIGS. 1 and 2). The X-phase winding of the stator winding 2 is connected, and the phase voltage V _P appearing at the end of the X-phase winding is detected.

Based on the detected phase voltage V _P , specifically, the rotation detection circuit 77A detects rotation by detecting that the magnitude relationship between the phase voltage and the reference voltage for rotation detection changes periodically. . When the rectifier module 5X and the stator winding 2 are not short-circuited or rarely short-circuited, the phase voltage V _P having a predetermined amplitude appears at the P terminal during power generation. Therefore, the rotation based on the phase voltage V _P Detection is possible.

The first specific signal determination unit 77B detects the first specific signal based on the detected phase voltage V _P. The first specific signal is a signal for instructing to stop or reduce the supply of the excitation current without outputting an abnormality alarm signal to the outside, and is output when any abnormality occurs from the rectifier module 5X or the like. In the present embodiment, as an abnormal state in which the first specific signal is output, a short circuit or a rare short circuit occurs in a switching element (not shown) included in the rectifier module 5X or the like, or these switching elements are overheated. The case where it becomes abnormal is assumed. When the first specific signal is detected, power generation suppression is performed to stop or reduce the supply of excitation current.

The second specific signal determination unit 77C detects the second specific signal based on the detected phase voltage V _P. The second specific signal is a signal for outputting an abnormality alarm signal to the outside and instructing to stop or reduce the supply of the excitation current, and is output from one of the rectifier modules 5X and the like when an abnormality occurs. In this embodiment, the abnormal state in which the second specific signal is output is assumed to be an abnormal state that is not expected to be eliminated even when power generation is suppressed. When the second specific signal is detected, power generation suppression for stopping or reducing the supply of excitation current is performed, and an instruction to output an abnormality alarm signal to the ECU 8 is sent to the communication circuit 79.

  The excitation current control circuit 76 receives the rotation detection result from the rotation detection circuit 77A, and outputs a PWM signal necessary for supplying the field winding 4 with the excitation current necessary for the power generation operation during the rotation detection. However, when rotation stop (rotation cannot be detected) is detected, a PWM signal (a PWM signal in which the duty is set to 0 or a value close to 0) necessary to stop or reduce the supply of excitation current is output.

  The excitation current control circuit 76 receives the determination result (detection result) of the first specific signal determination unit 77B, and stops or reduces the supply of the excitation current when the first specific signal is detected. The PWM signal necessary for the output is output. Similarly, the excitation current control circuit 76 receives the determination result (detection result) of the second specific signal determination unit 77C, and stops supplying the excitation current when the second specific signal is detected. A PWM signal necessary for reduction is output.

  The alarm circuit 78 performs an alarm operation when the generated voltage falls below a predetermined voltage. As this predetermined voltage, a value (for example, 10 V) higher than the lower limit value of the operating voltage at which the electric load 10 can normally operate is used. When it is detected that the generated voltage has fallen below the predetermined voltage, an instruction to output an abnormal alarm signal is sent to the ECU 8 to the communication circuit 79. As a result, when the battery voltage drops beyond the normal range, the driver can be informed of this, and can be urged to take a refuge or bring it to a repair shop.

  The vehicular generator 1 of the present embodiment has such a configuration. Next, details of the rectifier module 5X will be described. The other rectifier modules 5Y, 5Z, 6U, 6V, and 6W have the same configuration. As shown in FIG. 3, the rectifier module 5 </ b> X includes two MOS transistors 50 and 51 and a control circuit 54. Two MOS transistors 50 and 51 correspond to the switching unit.

  The MOS transistor 50 has a source connected to the X-phase winding of the stator winding 2 and a drain connected to the electrical load 10 and the positive terminal of the battery 9 via the charging line 12. It is a switching element. The MOS transistor 51 is a switching element on the lower arm (low side) whose drain is connected to the X-phase winding and whose source is connected to the negative terminal (earth) of the battery 9. A series circuit composed of these two MOS transistors 50 and 51 is disposed between the positive terminal and the negative terminal of the battery 9, and a connection point between these two MOS transistors 50 and 51 is connected via a P terminal (phase voltage detection terminal). An X-phase winding is connected.

  A diode is connected in parallel between the source and drain of each of the MOS transistors 50 and 51. This diode is realized by a parasitic diode (body diode) of the MOS transistors 50 and 51, but a diode as another component may be further connected in parallel. Note that at least one of the upper arm and the lower arm may be configured using a switching element other than a MOS transistor.

As shown in FIG. 4, the control circuit 54 includes a control unit 100, a power supply 190, an output voltage detection unit 110, an upper MOS V _DS detection unit 120, a lower MOS V _DS detection unit 130, an upper MOS short detection unit 140, and a lower MOS. Short detection unit 141, lower MOS V _DS amplification unit 142, energization direction determination unit 144, upper MOS temperature detection unit 150, lower MOS temperature detection unit 151, signal transmission / reception unit 160, excitation current suppression signal transmission unit 170, drivers 192 and 194 It has.

  The power supply 190 supplies an operating voltage to each element included in the control circuit 54 at a timing when the phase voltage is applied to the P terminal, and stops supplying the operating voltage when the application of the phase voltage is completed. The power supply 190 is started and stopped in response to an instruction from the control unit 100.

  The driver 192 has an output terminal (G1) connected to the gate of the high-side MOS transistor 50, and generates a drive signal for turning on and off the MOS transistor 50. Similarly, the driver 194 has an output terminal (G2) connected to the gate of the low-side MOS transistor 51, and generates a drive signal for turning the MOS transistor 51 on and off.

  The output voltage detection unit 110 includes, for example, a differential amplifier and an analog-digital converter that converts the output into digital data. The output voltage detection unit 110 includes an output terminal (B terminal) of the vehicle generator 1 (or the rectifier module 5X). Outputs data corresponding to the voltage. The analog-digital converter may be provided on the control unit 100 side.

Upper MOS V _DS detector 120 is connected to the B terminal and the P terminal, to detect the drain-source voltage V _DS of the MOS transistor 50 of the high-side, predetermined the detected drain-source voltage V _DS Compared with the threshold value, a signal corresponding to the magnitude is output. In FIG. 5, the horizontal axis indicates the drain-source voltage V _DS with reference to the drain side output voltage V _B. The vertical axis indicates the voltage level of the signal output from the upper MOS V _DS detector 120. As shown in FIG. 5, when the phase voltage V _P becomes higher and becomes higher than the output voltage V _B by 0.3 V or more, V _DS becomes 0.3 V or higher, so that the output signal of the upper MOS V _DS detection unit 120 is low. It changes from level (0V) to high level (5V). Thereafter, when the phase voltage V _P becomes 1.0 V or more lower than the output voltage V _B , V _DS becomes −1.0 V or less, so that the output signal of the upper MOS V _DS detection unit 120 changes from the high level to the low level. .

A value V10 (FIG. 11) that is 0.3V higher than the output voltage V _B described above corresponds to the first threshold value. This first threshold value is for reliably detecting the start point of the diode energization period, and is based on a value obtained by adding the drain-source voltage V _DS of the MOS transistor 50 at the ON time to the output voltage V _B. The output voltage V _B is set to a value lower than the value obtained by adding the forward voltage VF of the diode connected in parallel with the MOS transistor 50 to the output voltage V _B. Further, a value V20 (FIG. 11) that is 1.0V lower than the output voltage V _B described above corresponds to the second threshold value. The second threshold value is used to reliably detect the end point of the diode energization period, and is set to a value lower than the output voltage V _B. The period from when the phase voltage V _P reaches the first threshold value until it reaches the second threshold value is defined as the “on period” of the upper arm. The ON period is different from the “diode energization period” in which the diode is actually energized when the MOS transistor 50 is in the OFF state. It is done based on the period.

The lower MOS V _DS detector 130 is connected to the P terminal and the ground terminal (E terminal), detects the drain-source voltage V _DS of the low-side MOS transistor 51, and detects the detected drain-source voltage V. _DS is compared with a predetermined threshold value and a signal corresponding to the magnitude is output. In FIG. 6, the horizontal axis represents the drain-source voltage V _{DS based} on the ground terminal voltage V _GND that is the battery negative terminal voltage on the drain side. The vertical axis indicates the voltage level of the signal output from the lower MOS V _DS detection unit 130. As shown in FIG. 6, the phase voltage V _P when the lower than 0.3V than the ground voltage V _GND becomes low V _DS is to become below -0.3 V, the output signal of the lower MOS V _DS detecting section 130 It changes from a low level (0V) to a high level (5V). Thereafter, when the phase voltage V _P becomes 1.0 V or more higher than the ground voltage V _GND , V _DS becomes 1.0 V or more, so that the output signal of the lower MOS V _DS detection unit 130 changes from high level to low level.

0.3V than the ground voltage V _GND described above low V11 (FIG. 11) corresponds to the first threshold. This first threshold value is for reliably detecting the start point of the diode energization period, and is based on a value obtained by subtracting the drain-source voltage V _DS of the MOS transistor 51 at the on time from the ground voltage V _GND. Is set to a value higher than the value obtained by subtracting the forward voltage VF of the diode connected in parallel with the MOS transistor 51 from the ground voltage V _GND . Further, a value V21 (FIG. 11) that is 1.0V higher than the output voltage V _GND described above corresponds to the second threshold value. The second threshold value is for reliably detecting the end point of the diode energization period, and is set to a value higher than the ground voltage _VGND . The period from when the phase voltage V _P reaches the first threshold value until it reaches the second threshold value is defined as the “on period” of the lower arm. Note that this on period is different from the “diode energization period” in which the diode is actually energized when the MOS transistor 51 is in the off state. It is done based on the period.

The lower MOS V _DS amplifying unit 142 amplifies the drain-source voltage V _DS of the MOS transistor 51 when turned on, for example, by 5 times (−0.5 V to +0.5 V) (FIG. 13C). The energization direction determination unit 144 compares, for example, the threshold voltage set to +0.35 V with the drain-source voltage V _DS after amplification, and the threshold voltage is higher (range W ) Outputs a high level signal, and outputs a low level signal at other times.

  The upper MOS temperature detection unit 150 detects the temperature of the MOS transistor 50 based on the forward voltage of a temperature-sensitive diode disposed adjacent to the MOS transistor 50, and is a high level signal when the temperature is high and a low level signal when the temperature is low. Is output. Similarly, the lower MOS temperature detector 151 detects the temperature of the MOS transistor 51 based on the forward voltage of a temperature-sensitive diode disposed adjacent to the MOS transistor 51, and is high when the temperature is high and low when the temperature is low. A level signal is output. These upper MOS temperature detection unit 150 and lower MOS temperature detection unit 151 may be included in the control unit 100. In FIG. 7, the horizontal axis indicates the temperature (° C.). The vertical axis indicates the voltage level of signals output from the upper MOS temperature detection unit 150 and the lower MOS temperature detection unit 151. As shown in FIG. 7, when the temperature rises to 200 ° C. or higher, the output signals of the upper MOS temperature detection unit 150 and the lower MOS temperature detection unit 151 change from the low level (0 V) to the high level (5 V). Change. Thereafter, when the temperature decreases and becomes lower than 170 ° C., the output signals of the upper MOS temperature detecting unit 150 and the lower MOS temperature detecting unit 151 change from the high level to the low level.

  The upper MOS short detector 140 detects a short circuit between the drain and the source of the high-side MOS transistor 50 or a rare short circuit. This short circuit includes not only the case where the MOS transistor 50 itself fails, but also the case where the driver 192 that drives the MOS transistor 50 fails and the MOS transistor 50 is always turned on.

When no failure occurs in the MOS transistor 50 or the driver 192, the phase voltage V _P periodically changes between the output voltage V _B and the ground voltage V _GND . On the other hand, when the drain and source of the MOS transistor 50 are short-circuited, the phase voltage V _P is fixed at a value close to the output voltage V _B as shown in FIG. 8A. When the drain and source of the MOS transistor 50 are short-circuited, the phase voltage V _P is not fixed at a value close to the output voltage V _B as shown in FIG. The value in the vicinity is maintained while varying accordingly. The upper MOS short detection unit 140 detects that a short-circuit between the drain and source of the MOS transistor 50 or a rare short has occurred when the state of V _P > V _B / 2 continues for a predetermined time, and outputs To high level. On the contrary, when no short-circuit between the drain and source of the MOS transistor 50 or a rare short has occurred, the upper MOS short detection unit 140 sets the output to a low level.

  The lower MOS short detection unit 141 detects a short between the drain and the source of the low-side MOS transistor 51 or a rare short. This short circuit includes not only the case where the MOS transistor 51 itself fails, but also the case where the driver 194 that drives the MOS transistor 51 fails and the MOS transistor 51 is always turned on.

When no failure occurs in the MOS transistor 51 or the driver 194, the phase voltage V _P periodically changes between the output voltage V _B and the ground voltage V _GND . On the other hand, when the drain and source of the MOS transistor 51 are short-circuited, the phase voltage V _P is fixed at a value close to the ground voltage V _GND as shown in FIG. 9A. When the drain and source of the MOS transistor 51 are short-circuited, the phase voltage V _P is not fixed at a value close to the ground voltage V _GND as shown in FIG. 9B. The value in the vicinity is maintained while varying accordingly. The lower MOS short-circuit detecting unit 141 detects that a short circuit between the drain and the source of the MOS transistor 51 or a rare short has occurred when the state of V _P <V _B / 2 continues for a predetermined time, and outputs Is set to the high level. On the other hand, when no short circuit between the drain and source of the MOS transistor 51 or a rare short circuit has occurred, the lower MOS short detection unit 141 sets the output to a low level.

  The signal transmitter / receiver 160 transmits and receives various signals between the rectifier module 5X and the other five rectifier modules 5Y, 5Z, 6U, 6V, and 6Z. For this purpose, the signal transmitting / receiving unit 160 includes a normal signal receiving unit 161, an abnormal signal receiving unit 162, a normal signal transmitting unit 163, and an abnormal signal transmitting unit 164. The six signal transmission / reception units 160 provided in each of the six rectifier modules 5X and the like are connected to each other via a C terminal (communication terminal) and a signal line, and from this rectifier module to another Signals are sent to the five rectifier modules.

  The normal signal transmission unit 163 outputs a normal signal when a normal rectification operation is performed in the rectifier module 5X. Whether or not the normal rectifying operation is being performed is performed by the normal operation determining unit 131 (FIG. 10). The normal signal receiving unit 161 receives a normal signal transmitted from another rectifier module 5Y or the like.

  The abnormality signal transmission unit 164 outputs an abnormality signal when an abnormality is detected in the rectifier module 5X. Whether or not there is an abnormality is determined based on the outputs of the upper MOS short detection unit 140, the lower MOS short detection unit 141, the upper MOS temperature detection unit 150, and the lower MOS temperature detection unit 151 (see FIG. 10). ). The determination by the abnormality determination unit 123 as to whether or not there is an abnormality may be performed on the condition that the normal signal receiving unit 161 receives a normal signal from another rectifier module 5Y or the like. Only the voltage comparison by the upper MOS short detection unit 140 and the lower MOS short detection unit 141 may cause a problem that the state when the short circuit and the generated power are small cannot be reliably distinguished. By confirming that the rectifier module 5X of itself is short-circuited, it is possible to reliably determine that the rectifier module 5X is in an abnormal state due to a short circuit. The abnormal signal receiving unit 162 receives an abnormal signal transmitted from another rectifier module 5Y or the like.

  In the present embodiment, an abnormality signal that can identify whether the abnormality occurs in the MOS transistor 50 or the MOS transistor 51 is used. For example, these abnormal signals and normal signals can be distinguished from each other by changing the high-level and low-level duties of a signal in a predetermined communication cycle.

  The excitation current suppression signal transmission unit 170 transmits the abnormality from the other rectifier module 5Y or the like when the abnormality determination unit 123 determines that an abnormal state has occurred in the rectifier module 5X, or by the abnormality signal reception unit 162. When the received abnormal signal is received, a first specific signal for instructing power generation suppression is output from the RP terminal.

  In the present embodiment, as shown in FIGS. 1 and 2, only the RP terminal of one rectifier module 5 </ b> X among the six rectifier modules 5 </ b> X is connected to the power generation control device 7. Therefore, when the abnormality determining unit 123 determines that an abnormal state has occurred in the rectifier module 5X, the first specific signal is immediately sent to the power generation control device 7 from the excitation current suppression signal transmitting unit 170 provided in the rectifier module 5X. Sent to. Further, when the abnormality determination unit 123 determines that an abnormal state has occurred in the other rectifier module 5Y or the like, the abnormal signal transmitted from the abnormal signal transmission unit 164 of the other rectifier module 5Y or the like is transmitted to the rectifier module 5X. Received by the abnormal signal receiving unit 162. Thereafter, the first specific signal is transmitted from the exciting current suppression signal transmitter 170 provided in the rectifier module 5 </ b> X toward the power generation control device 7.

  The control unit 100 determines the timing to start and end the synchronous rectification operation, sets the on / off timing of the MOS transistors 50 and 51 for performing the synchronous rectification, and the driver 192 corresponding to the setting of the on / off timing. 194 driving, load dump protection operation transition and overheat protection operation transition timing and protection operation implementation, whether or not normal rectification operation is being performed, whether or not an abnormal condition has occurred, etc. Do.

As shown in FIG. 10, the control unit 100 includes a rotation speed calculation unit 101, a synchronization control start determination unit 102, an upper MOS on timing determination unit 103, a lower MOS on timing determination unit 104, a target electrical angle setting unit 105, and an upper MOS. T _FB time calculation unit 106, upper MOS off timing calculation unit 107, lower MOS · T _FB time calculation unit 108, lower MOS off timing calculation unit 109, load dump determination unit 111, power supply start / stop determination unit 112, off timing An abnormality determination unit 121, a synchronous control stop determination unit 122, an abnormality determination unit 123, and a normal operation determination unit 131 are provided. Each of these components is realized by, for example, a predetermined operation program stored in a memory or the like being executed by the CPU, but each component may be realized by using hardware. Specific operation contents of each component will be described later.

  The control unit 100 described above corresponds to the switching control unit, and the upper MOS short detection unit 140, the lower MOS short detection unit 141, the upper MOS temperature detection unit 150, the lower MOS temperature detection unit 151, and the abnormality determination unit 123 correspond to the abnormality detection unit, respectively. To do.

  The rectifier module 5X and the like of this embodiment have such a configuration, and the operation will be described next.

(1) Power supply start / stop determination The power supply start / stop determination unit 112 is connected to the P terminal, and the phase voltage (peak voltage) of the X phase of the stator winding 2 to which the rectifier module 5X is connected is a predetermined value. When it is detected that the voltage exceeds (for example, 5V), the power supply 190 is instructed to start. In addition, the power supply start / stop determination unit 112 continues the state in which the phase voltage has become equal to or lower than a predetermined value (5 V) for a predetermined time (for example, 1 second), and receives a normal signal from another rectifier module 5Y or the like. When not, the power supply 190 is instructed to stop. In this way, the rectifier module 5X and the like are operated only during normal operation (power generation) of the vehicle generator 1, and only the minimum necessary circuit is operated when it is stopped without generating power. The current can be reduced and the battery can be prevented from running out.

(2) Synchronous control operation In FIG. 11, the “upper arm on-period” indicates the output signal of the upper MOS V _DS detector 120, and the “upper MOS on-period” indicates the on / off timing of the high-side MOS transistor 50. The “lower arm on period” indicates the output signal of the lower MOS V _DS detector 130, and the “lower MOS on period” indicates the on / off timing of the low-side MOS transistor 51, respectively. T _FB1 , T _FB2 , target electrical angle, and ΔT will be described later.

The upper MOS on-timing determination unit 103 monitors the output signal (upper arm ON period) of the upper MOS V _DS detection unit 120, and the rise of the output signal from the low level to the high level is detected on the high side MOS. This is determined as the ON timing of the transistor 50, and an instruction is sent to the driver 192. The driver 192 turns on the MOS transistor 50 in response to this instruction.

  The upper MOS off timing calculation unit 107 determines that the predetermined time has elapsed after the MOS transistor 50 is turned on as the off timing of the MOS transistor 50, and sends an instruction to the driver 192. The driver 192 turns off the MOS transistor 50 in response to this instruction.

The predetermined time for determining the OFF timing is earlier than the end point of the upper arm ON period (the time point when the output signal of the upper MOS _VDS detection unit 120 falls from the high level to the low level) by “target electrical angle”. As described above, the variable setting is made each time.

  This target electrical angle is set so that the OFF timing of the MOS transistor 50 is not delayed from the end of the energization period in this diode rectification when considering the case where the MOS transistor 50 is always turned off and rectified through a diode. And is set by the target electrical angle setting unit 105. The target electrical angle setting unit 105 sets the target electrical angle based on the rotation speed calculated by the rotation speed calculation unit 101. The target electrical angle may be constant regardless of the rotational speed, but more desirably, the target electrical angle may be set large in the low rotation region and the high rotation region, and the target electrical angle may be set small in the intermediate region. .

The rotation speed calculation unit 101 calculates the rotation speed based on the rising cycle or the falling cycle of the output signal of the lower MOS V _DS detection unit 130. By using the output signal of the lower MOS V _DS detection unit 130, stable rotation speed detection can be performed regardless of fluctuations in the output voltage V _B of the vehicular generator 1.

Similarly, the lower MOS ON timing determination unit 104 monitors the output signal (lower arm ON period) of the lower MOS V _DS detection unit 130, and the rising of the output signal from the low level to the high level is detected on the low side. Is determined as the ON timing of the MOS transistor 51, and an instruction is sent to the driver 194. The driver 194 turns on the MOS transistor 51 in response to this instruction.

  The lower MOS off timing calculation unit 109 determines that the predetermined time has elapsed after the MOS transistor 51 is turned on as the off timing of the MOS transistor 51 and sends an instruction to the driver 194. The driver 194 turns off the MOS transistor 51 in response to this instruction.

The predetermined time for determining the OFF timing is earlier than the end point of the lower arm ON period (the time point when the output signal of the lower MOS _VDS detection unit 130 falls from the high level to the low level) by “target electrical angle”. As described above, the variable setting is made each time.

  The target electrical angle is set so that the off timing of the MOS transistor 51 is not delayed from the end of the energization period in the diode rectification when considering the case where the MOS transistor 51 is always turned off and rectification is performed through the diode. And is set by the target electrical angle setting unit 105.

  Actually, the end time of the upper arm on period and the lower arm on period is not known at the time when the MOS transistors 50 and 51 are turned off. Therefore, the upper MOS off timing calculation unit 107 and the lower MOS off timing calculation are performed. The unit 109 raises the setting accuracy of the off timing of the MOS transistor 50 and the MOS transistor 51 by feeding back the information before the half cycle.

For example, the off timing of the high-side MOS transistor 50 is set as follows. The lower MOS · T _FB time calculation unit 108 calculates a time (electrical angle) T _FB2 (FIG. 11) from turning off the low-side MOS transistor 51 half a cycle before the end of the lower arm ON period. The upper MOS off timing calculation unit 107 obtains ΔT obtained by subtracting the target electrical angle from _TFB2 . If the rotation or the like is stable, T _FB2 and the target electrical angle should be equal and ΔT = 0, but (1) rotational fluctuation accompanying acceleration / deceleration of the vehicle, (2) pulsation of engine rotation, ( 3) Variation in electrical load, (4) Variation in operation clock cycle when realizing the control unit 100 by executing a predetermined program, and (5) Instructing the drivers 192 and 194 to turn off the MOS transistors 50 and 51 In many cases, ΔT does not become zero with a delay in turn-off until the actual turn-off.

  Therefore, the upper MOS off timing calculation unit 107 sets the upper MOS on period by correcting the lower MOS on period used by the lower MOS off timing calculation unit 109 half a cycle before based on ΔT. The off timing is determined. Specifically, when the correction coefficient is α, the upper MOS on period is set by the following equation.

(Upper MOS on period) = (Lower MOS on period before half cycle) + ΔT × α
Similarly, the off timing of the low-side MOS transistor 51 is set as follows. The upper MOS · T _FB time calculation unit 106 calculates the time (electrical angle) T _FB1 (FIG. 11) from turning off the high-side MOS transistor 51 half a cycle ago to the end of the upper arm ON period. Then, the lower MOS off timing calculation unit 109 obtains ΔT obtained by subtracting the target electrical angle from _TFB1 . The lower MOS off timing calculation unit 109 sets the lower MOS on period by correcting the upper MOS on period used by the upper MOS off timing calculation unit 107 half a cycle before based on ΔT, and the off timing of the MOS transistor 51 Is determined. Specifically, when the correction coefficient is α, the lower MOS on period is set by the following equation.

(Lower MOS on period) = (Upper MOS on period before half cycle) + ΔT × α
In this way, the high-side MOS transistor 50 and the low-side MOS transistor 51 are alternately turned on in the same cycle as when diode rectification is performed, and a low-loss synchronous rectification operation using the MOS transistors 50 and 51 is performed. Done.

(3) Determination of start of synchronous control Next, the operation of determining whether or not to shift to the above-described synchronous control will be described. Immediately after the rectifier module 5X or the like is activated, or after a certain abnormality occurs and the synchronous control is temporarily stopped, the process shifts to the synchronous control when a predetermined synchronous control start condition is satisfied. The synchronization control start determination unit 102 determines whether or not the synchronization control start condition is satisfied. If it is determined that the condition is satisfied, a notification to that effect is sent to the upper MOS on timing determination unit 103 and the lower MOS on timing determination unit 104. It is done. Thereafter, the above-described synchronization control is performed, and the MOS transistors 50 and 51 are alternately turned on.

The following (A) to (F) are used as the synchronous control start conditions.
(A) The upper arm on period and the lower arm on period (FIG. 11) occur 32 times in succession. Note that 32 times is a value corresponding to two mechanical angles, assuming an 8-pole rotor. This value may be changed to a value other than 16 corresponding to one rotation, a value corresponding to three or more rotations, or a value corresponding to an integral multiple of one mechanical angle rotation.
(B) The output voltage V _B is included in a range that is higher than the normal range of 7V and lower than 18V. Although the lower limit value of the normal range is 7V and the upper limit value is 18V assuming a 12V system, the lower limit value and the upper limit value may be changed as appropriate. Further, in a vehicle system such as a 24V system, it is necessary to change the lower limit value and the upper limit value according to the generated voltage.
(C) An abnormality occurrence (overheated state, short circuit, rare short circuit) is not determined for the MOS transistors 50 and 51.
(D) The load dump protection operation is not in progress.
(E) The fluctuation of the output voltage V _B is smaller than 0.5 V / 200 μsec. It should be noted that the degree to which this variation is allowed when synchronous control is started varies depending on the elements and programs used, so the allowable value of this variation should be changed as appropriate according to the elements used. Also good.
(F) Both T _FB1 and T _FB2 are longer than 15 μs. It should be noted that the extent to which these periods fall below what is considered abnormal depends on the cause of the abnormality, etc., so this allowable value (15 μs) may be changed as appropriate according to the cause of the abnormality. Good. Also, T _FB1 and T _FB2 have been described as being calculated during the synchronous control operation by the upper MOS · T _FB time calculation unit 106 and the lower MOS · T _FB time calculation unit 108, but before the start of the synchronous control, These calculations are also performed and are used to determine the start of synchronous control.

In FIG. 12, when the output voltage V _B exceeds 20V, the load dump determination unit 111 detects a load dump in which the output terminal and the battery terminal of the vehicle generator 1 are disconnected and a surge voltage is generated, and the driver 192 , 194 is sent to turn off the high-side MOS transistor 50 and start a load dump protection operation to turn on the low-side MOS transistor 51. Further, the load dump determination unit 111 ends the load dump protection operation when the output voltage V _B once higher than 20V decreases and becomes lower than 17V. The load dump determination unit 111 outputs a signal that is at a high level during the load dump protection operation and at a low level at other times to the synchronization control start determination unit 102.

  In order to avoid the occurrence of a new surge voltage due to the ON / OFF of the MOS transistors 50 and 51 at the start or end of the load dump protection operation, the load dump protection determination unit 111 includes a lower arm on-period shown in FIG. During this period, the load dump protection operation is started or ended.

At the normal time when the synchronous control is performed, as shown in FIG. 13A, the phase voltage V _P is between the lower limit value near the output voltage V _B (the positive terminal voltage of the battery 9) and the upper limit value near the ground terminal voltage V _GND. It changes periodically. On the other hand, when a load dump occurs, the high-side MOS transistor 50 is turned off and the low-side MOS transistor 51 is turned on, and this state is maintained. Therefore, as shown in FIG. 13B, the phase voltage V _P periodically changes around the ground terminal voltage V _GND in the range of the drain-source voltage V _DS when the MOS transistor 51 is on. In the example shown in FIG. 13B, the drain-source voltage V _DS when the MOS transistor 51 is on is shown as 0.1 V, for example. However, the drain-source voltage V _DS differs depending on the specifications of the MOS transistor 51 used, the gate voltage, and the like.

The lower MOS V _DS amplifier 142 shown in FIG. 4 amplifies the drain-source voltage V _DS of the MOS transistor 51 when turned on, for example, by a factor of 5 (−0.5 V to +0.5 V) (FIG. 13C). . The energization direction determination unit 144 compares, for example, the threshold voltage set to +0.35 V with the drain-source voltage V _DS after amplification, and the threshold voltage is higher (range W ) Outputs a high level signal, and outputs a low level signal at other times.

  In FIG. 13C, the range indicated by W substantially corresponds to the timing when the low-side MOS transistor 51 is turned on during normal operation. In this embodiment, the range of W is set as a timing for starting or ending the load dump protection operation. That is, if included in the range of W, when the low-side MOS transistor 51 is turned on to start the load dump protection operation, the same direction as the forward direction of the diode connected in parallel to the MOS transistor 51 Since current flows through the MOS transistor 51, generation of surge voltage can be suppressed. In addition, if included in the range of W, before turning off the low-side MOS transistor 51 in order to end the load dump protection operation, the direction of the current flowing through the MOS transistor 51 and after turning off the MOS transistor 51 are turned off. Since the direction of the current flowing through the diode connected in parallel to the MOS transistor 51 is the same, the generation of a surge voltage can be suppressed.

Note that the threshold voltage described above may have hysteresis characteristics. For example, the threshold voltage when the drain-source voltage V _DS is lower is +0.35 V, and the threshold voltage after the drain-source voltage V _DS is higher is +0.3 V. There are cases. Thereby, when the drain-source voltage V _DS is changed in the vicinity of the threshold voltage, it is possible to prevent the level of the output signal of the energization direction determination unit 144 from being frequently switched.

The V _B range determination unit 113 determines whether or not the output voltage V _B detected by the output voltage detection unit 110 is included in the range of 7 to 18 V. If included, the low level is included. If not (higher than 7V or higher than 18V), a high level signal is output. The V _B fluctuation determination unit 114 determines whether or not the fluctuation of the output voltage V _B detected by the output voltage detection unit 110 is smaller than 0.5 V / 200 μsec. Outputs a high level signal. The T _FB time determination unit 115 determines whether T _FB1 detected by the upper MOS · T _FB time calculation unit 106 and T _FB2 detected by the lower MOS · T _FB time calculation unit 108 are longer than 15 μs. A low level signal is output if it is long, and a high level signal is output in the following cases.

  The abnormality determination unit 123 determines whether the MOS transistors 50 and 51 are abnormal based on the outputs of the upper MOS short detection unit 140, the lower MOS short detection unit 141, the upper MOS temperature detection unit 150, and the lower MOS temperature detection unit 151. judge. If any of the outputs of the upper MOS short detection unit 140, the lower MOS short detection unit 141, the upper MOS temperature detection unit 150, and the lower MOS temperature detection unit 151 is at a high level, some abnormality (overheating state, short circuit or rare short circuit) ) Has occurred, and the abnormality determination unit 123 outputs a high-level signal.

In FIG. 12, the V _B range determination unit 113, the V _B fluctuation determination unit 114, and the T _FB time determination unit 115 are provided outside the synchronization control start determination unit 102, but are included in the synchronization control start determination unit 102. It may be. In the above-described example, it is assumed that synchronous control is started when all the conditions (A) to (F) are satisfied, but at least one of (B) to (F) and (A) are combined. Thus, the synchronous control start condition may be used.

In FIG. 14, “count value” is a count value synchronized with the rising (start timing) of each of the upper arm on period and the lower arm on period, and “T _FB time flag” is an output of the T _FB time determination unit 115. "Voltage range flag" indicates the output of the V _B range determination unit 113, "LD flag" indicates the output of the load dump determination unit 111, "Abnormality determination flag" indicates the output of the abnormality determination unit 123, and "Voltage variation flag""Indicates the output of the V _B fluctuation determination unit 114, respectively.

  The synchronization control start determination unit 102 performs a count operation synchronized with the rising of each of the upper arm on period and the lower arm on period, and starts the synchronization control when the count value of the count operation reaches “32”. A signal (low level indicates start of synchronous control and high level indicates stop of synchronous control) is input to the upper MOS on timing determination unit 103 and the lower MOS on timing determination unit 104. When the upper MOS on timing determination unit 103 and the lower MOS on timing determination unit 104 receive a signal indicating the start of synchronous control, the synchronous control for alternately turning on the MOS transistors 50 and 51 is started.

By the way, the synchronization control start determination unit 102 determines that the rising interval between the upper arm on period and the lower arm on period is one cycle or less in electrical angle, a T _FB time determination unit 115, a V _B range determination unit 113, load dump determination unit 111, the abnormality determination unit 123, V _B varies the output of the determination unit 114 (T _FB time flag, voltage range flag, LD flag, the abnormality determination flag, voltage fluctuation flag) that are all at the low level, the The count operation described above is continued under the condition. On the contrary, the synchronization control start determination unit 102 determines that the rising interval between the upper arm on period and the lower arm on period exceeds one cycle in terms of electrical angle or the _TFB time determination unit until the count value reaches 32. 115, when the output of any one of the V _B range determination unit 113, the load dump determination unit 111, the abnormality determination unit 123, and the V _B fluctuation determination unit 114 becomes high level, the count value is reset to 0, and the count The count operation is resumed after the condition for continuation of operation is satisfied.

(4) Determination of stop of synchronous control Next, an operation of determining whether to stop synchronous control during the above-described synchronous control will be described. The synchronization control stop determination unit 122 determines whether or not a predetermined synchronization control stop condition is satisfied during the synchronization control. When it is determined that the condition is satisfied, a notification to that effect is sent to the synchronization control start determination unit 102 and the upper MOS on timing. The data is sent to the determination unit 103, the lower MOS on timing determination unit 104, the upper MOS off timing calculation unit 107, and the lower MOS off timing calculation unit 109. Thereafter, the synchronization control is stopped until the synchronization control start determination unit 102 starts the synchronization control.

The following (a) to (e) are used as the synchronous control stop condition.
(A) From the off timing of the MOS transistor 51 set by the lower MOS off timing calculation unit 109, the phase voltage V _P is increased, and the first used for determining the on timing of the MOS transistor 50 next. The time until the threshold value is reached is shorter than the predetermined time.

  This predetermined time is the time from when the lower timing is instructed by the lower MOS off timing calculation unit 109 to when the MOS transistor 51 is actually turned off by the driver 194, specifically, the MOS transistor 51 is turned off by the driver 194. It is set according to the driving capability of the MOS transistor 51 at that time. The off-timing abnormality determination unit 121 outputs a signal that is at a high level when this condition is satisfied (when it is shorter than a predetermined time) and at a low level otherwise.

As shown in FIG. 15, when the timing for turning off the MOS transistor 51 becomes later than the end timing of the lower arm on period, the current flowing through the MOS transistor 51 at that time is cut off, so that the surge voltage is reduced. Occur. In FIG. 15, the surge voltage is indicated by S. This surge voltage is generated immediately after the MOS transistor 51 is turned off. If the time required from when the lower MOS off-timing calculation unit 109 is actually instructed to turn off the MOS transistor 51 to t0 (FIG. 15) is to detect the occurrence of a surge voltage due to the off-timing delay. In addition, the predetermined time described above is set longer by β than the time t0 after the lower MOS off timing calculation unit 109 instructs the off timing. This β is a value including a surge voltage generated after the elapse of time t0, and the phase voltage V _P is increased when the synchronization control is normally performed (when no off-timing abnormality occurs). Therefore, it is necessary to be shorter than the time until the first threshold value is reached.
(B) From the off timing of the MOS transistor 50 set by the upper MOS off timing computing unit 107, the second voltage used to determine the on timing of the MOS transistor 51 after the phase voltage V _P has decreased. The time until the threshold value is reached is shorter than the predetermined time.

  This predetermined time is the time from when the upper MOS off timing computing unit 107 instructs the off timing until the MOS transistor 50 is actually turned off by the driver 192. Specifically, the driver 192 turns off the MOS transistor 50. It is set according to the driving capability of the MOS transistor 50 at that time. The off-timing abnormality determination unit 121 outputs a signal that is at a high level when this condition is satisfied (when it is shorter than a predetermined time) and at a low level otherwise.

The predetermined times indicated by (a) and (b) described above may be the same value, but different values may be used. In addition, these predetermined times are mainly set according to the driving capabilities of the drivers 192 and 194, and therefore it is desirable to use a constant value regardless of the rotational speed.
(C) The fluctuation of the output voltage V _B became larger than 0.5 V / 200 μsec.

  Note that the degree to which this fluctuation is allowed when synchronization control is continued varies depending on the elements and programs used, so the allowable value used for determining whether to stop synchronization depends on the elements used, etc. You may make it change suitably.

For example, when the output current suddenly decreases from 150 A to 15 A, the output voltage V _B increases as shown in FIG. As the output voltage rises, the upper arm ON period changes from the value T10 when there is no output fluctuation to T11 and T12 (<T10). The same applies to the lower arm on period. Thus, when the upper arm on period or the lower arm on period itself is shortened, the off timing of the MOS transistors 50 and 51 is set to the upper arm on period or the lower arm even if the off timing is set in the same procedure as before. Since the situation occurs later than the arm-on period, the above-described tolerance is used to avoid this. In the synchronous control start determination, the same allowable value is used for the same purpose, but different values may be used for the synchronous control start determination and the synchronous control stop determination.
(D) Shifted to load dump protection operation.
(E) An abnormality (overheating state, short circuit or rare short circuit) of the MOS transistors 50 and 51 has occurred.

The configuration shown in FIG. 17 is obtained by extracting the configuration necessary for the synchronous control stop determination from the configuration shown in FIG. As for the V _B variation determination unit 114, V _B change determination unit 114 of the synchronization control start determination shown in FIG. 12 is also used as such in the synchronization control stop determination.

As shown in FIG. 17, the synchronization control stop determination unit 122, the off timing error determination unit 121, V _B variation determining section 114, load dump judgment unit 111, the output of the abnormality determination portion 123 is input.

The off-timing abnormality determination unit 121 outputs a high level signal when the above-described synchronous control stop condition (a) or (b) is satisfied. Further, from the V _B fluctuation determining unit 114, the fluctuation of the output voltage V _B detected by the output voltage detecting unit 110 is larger than 0.5 V / 200 μsec, and satisfies the above-described synchronous control stop condition (c). Sometimes a high level signal is output. Further, the load dump determination unit 111 outputs a high level signal when the load dump operation is being performed and the synchronous control stop condition (d) described above is satisfied. Further, the abnormality determination unit 123 sets the abnormality determination flag when the above-described synchronous control stop condition (e) is satisfied, specifically, when an overheating state occurs, or a short circuit or a short circuit occurs. A high level signal is output.

Synchronization control stop determination unit 122, the off timing error determination unit 121, V _B variation determining section 114, load dump determination unit 111, which include those in a high level in the output signal of the abnormality determination section 123 If it is determined that the synchronous control stop condition is satisfied, an instruction to stop the synchronous control is issued, the synchronous control start determining unit 102, the upper MOS on timing determining unit 103, the lower MOS on timing determining unit 104, The result is sent to the MOS off timing calculation unit 107 and the lower MOS off timing calculation unit 109.

(5) Operation at the time of occurrence of abnormality Next, a protection operation when an overheating state, a short circuit, or a rare short circuit occurs will be described. When a short circuit or a rare short circuit occurs in the high-side MOS transistor 50, an excessive current flows through the MOS transistor 50, so that it is considered that the overheating state is reached at the same time. Therefore, in this embodiment, the short protection or rare short of the high-side MOS transistor 50 and the overheat abnormality are both abnormalities of the MOS transistor 50, and the same protection operation is performed.

Actually, even if a rare short-circuit occurs in the MOS transistor 50, depending on the extent, the state of V _P > V _B / 2 between the phase voltage V _P and the output voltage V _B does not continue for a predetermined time. There is also a case where an overheat state is detected although it is not detected as a rare short. Further, there may be a case where the MOS transistor 50 is not short-circuited or rarely short-circuited, but only the overheated state is detected due to the high ambient temperature. Further, there may be a case where the short circuit of the MOS transistor 50 is detected but the overheat state is not detected. However, these various cases are the same in that power generation suppression is necessary, and the content of protection is the same in this embodiment.

Hereinafter, an operation in the case where an abnormality has occurred in the high-side MOS transistor 50 will be described. In FIG. 18, “communication line (C)” indicates a signal transmitted and received between the rectifier modules via the communication line connected to the C terminal. “P terminal” indicates the phase voltage V _P appearing at the P terminal of the rectifier module 5X or the like. The phase voltage V _P is actually a sine wave waveform, but is shown as a rectangular wave for simplicity. “RP terminal” indicates a signal output from the RP terminal of the rectifier module 5X or the like. “HiMOS abnormality detection” indicates a detection result of an abnormal state of the MOS transistor 50 on the high side. “LoMOS abnormality detection” indicates the detection result of the abnormal state of the MOS transistor 51 on the low side. These detection results indicate a state where the low level is normal and a state where the high level is abnormal. In addition, the detection of these abnormal states is performed in a state where the abnormality determination unit 123 can identify which of the high-side MOS transistor 50 and the low-side MOS transistor 51 is abnormal. The “HiMOS gate signal” indicates a signal input from the driver 192 to the gate of the MOS transistor 50 in accordance with an instruction from the abnormality determination unit 123. The MOS transistor 50 is turned on when the level is high. The “LoMOS gate signal” indicates a signal input from the driver 194 to the gate of the MOS transistor 51 in accordance with an instruction from the abnormality determination unit 123. The MOS transistor 51 is turned on when the level is high. The “state” indicates any state of a synchronous rectification operation, a diode rectification (Di rectification) operation, and a protection control (power generation suppression) operation. The “abnormal rectifier module” indicates a rectifier module including the MOS transistor 50 in which an abnormality has occurred. “Normal rectifier module” indicates a normal rectifier module that has received a notification of occurrence of abnormality from another rectifier module including the MOS transistor 50 in which abnormality has occurred via the C terminal.

When a short circuit occurs in the MOS transistor 50 (the same phenomenon appears in a rare short circuit or an overheated state), in the rectifier module including the MOS transistor 50, the phase voltage V _P which is the voltage at the P terminal is V _B / When the state higher than 2 continues for a predetermined time, the abnormality determination unit 123 detects an abnormality of the high-side MOS transistor 50. For this reason, the exciting current suppression signal transmission unit 170 that has received the notification of the occurrence of abnormality from the abnormality determination unit 123 outputs a first specific signal for instructing power generation suppression from the RP terminal. Since the power generation control device 7 is not always connected to the RP terminal, the first specific signal output from the RP terminal is not always transmitted to the power generation control device 7 immediately.

  The abnormality determination unit 123 sends an instruction to the driver 192 to turn on the high-side MOS transistor 50 and sends an instruction to the driver 194 to turn off the low-side MOS transistor 51.

By the way, as shown in FIG. 2, the RP terminal is connected to a phase winding such as the stator winding 2 via a high impedance resistor 20, and a phase voltage V _P is applied via this resistor 20. . The excitation current suppression signal transmission unit 170 sets the output terminal to a high impedance state when the first specific signal and the second specific signal are not output, and generates power during normal power generation other than when an abnormality occurs. In the control device 7, the phase voltage V _P is detected via the P terminal. For example, if the peak voltage is 7 V or more and the frequency is 80 Hz or more, the phase voltage V _P includes the first and second specific signals so that at least one of these voltages and frequencies is out of these ranges. The peak voltage or frequency is set.

  In the example shown in FIG. 18, a signal having a peak voltage of 5 V, a frequency of 1 kHz, and a duty of 50% is used as the first specific signal. As the second specific signal, for example, a signal having a peak voltage of 1 V or less and a frequency of 80 Hz or more, a signal having a peak voltage of 7 V or more and a frequency of less than 80 Hz, or a signal having a voltage of 1 V or less and a fixed signal may be used. it can. As a specific example of outputting the second specific signal from the excitation current suppression signal transmission unit 170, the normal operation determination unit 131 performs a normal rectifying operation in a state where the abnormality determination is not performed by the abnormality determination unit 123. A case where it is determined that it has not been performed is considered. For example, this is the case when the belt that drives the vehicle generator 1 is cut. Such abnormality determination may be performed by the abnormality determination unit 123, or may be performed by an abnormality determination unit (not shown) other than the abnormality determination unit 123.

  When the abnormal state of the high-side MOS transistor 50 is determined in one rectifier module in this way, the abnormal signal transmission unit 164 sends another five signals indicating that via the C terminal and the signal line. To the rectifier module. In the example shown in FIG. 18, a signal having a communication cycle of 8.2 ms is used. The abnormal signal transmission unit 164 that transmits a signal indicating an abnormal state (abnormal signal) to the other rectifier module maintains the two communication cycles at a high level, thereby transmitting an abnormal signal to the other rectifier module. Communicate sending. In addition, the abnormal signal transmission unit 164 transmits an abnormal signal including whether an abnormality has occurred in the upper or lower arm (high side / low side) of the MOS transistor in the next two cycles. For example, by setting the low-level duty to less than 50%, an abnormal signal indicating that an abnormality has occurred in the high-side MOS transistor 50 is transmitted. The transmission of the same abnormal signal is continued for a predetermined time (for example, 8 seconds) thereafter. During the 8 seconds, the abnormal signal receiving unit 162 of the other rectifier module receives an abnormal signal indicating that the MOS transistor 50 is abnormal. In response to the reception of the abnormality signal, the abnormality determination unit 123 sends an instruction to the driver 192 to turn on the high-side MOS transistor 50 and sends an instruction to the driver 194 to turn off the low-side MOS transistor 51. . Further, the excitation current suppression signal transmission unit 170 that has received the notification of the occurrence of abnormality from the abnormality determination unit 123 outputs a first specific signal for instructing power generation suppression from the RP terminal. In this way, the first specific signal is output from the excitation current suppression signal transmission unit 170 included in all the rectifier modules, and the first specific signal determination unit 77B in the power generation control device 7 receives this via the P terminal. The first specific signal can be received, and power generation suppression without alarm operation is performed.

  In addition, after transmission of the abnormal signal for 8 seconds, the abnormal signal transmission unit 164 that is the transmission source of the abnormal signal transmits an abnormal cancellation signal that instructs the cancellation of the abnormal state notified by the abnormal signal. In the example illustrated in FIG. 18, the abnormality signal transmission unit 164 transmits an abnormality release signal to other rectifier modules by maintaining two communication periods at a low level. When this abnormality release signal is received, the operation of outputting the first specific signal from the excitation current suppression signal transmission unit 170 in all the rectifier modules 5X and the like is released, but an abnormality of the MOS transistor 50 has actually occurred. In this case, the operation after the abnormality detection is repeated, and the power generation suppression operation is also repeated.

As shown in FIG. 19, this is basically the same when an abnormality occurs in the MOS transistor 51 on the low side. When a short circuit occurs in the MOS transistor 51 (assuming that the same phenomenon appears in a rare short circuit or an overheating state), in the rectifier module including the MOS transistor 51, the phase voltage V _P that is the voltage at the P terminal is V _B / When the state lower than 2 continues for a predetermined time, the abnormality determination unit 123 detects the abnormality of the low-side MOS transistor 51. For this reason, the exciting current suppression signal transmission unit 170 that has received the notification of the occurrence of abnormality from the abnormality determination unit 123 outputs a first specific signal for instructing power generation suppression from the RP terminal. Since the power generation control device 7 is not always connected to the RP terminal, the first specific signal output from the RP terminal is not always transmitted to the power generation control device 7 immediately.

  The abnormality determination unit 123 sends an instruction to the driver 192 to turn off the high-side MOS transistor 50 and sends an instruction to the driver 194 to turn on the low-side MOS transistor 51.

  When the abnormal state of the low-side MOS transistor 51 is determined in one rectifier module in this way, the abnormal signal transmission unit 164 sends a signal indicating that to the other 5 through the C terminal and the signal line. To the rectifier modules. In the example shown in FIG. 19, the abnormal signal transmission unit 164 that transmits a signal indicating an abnormal state (abnormal signal) to another rectifier module maintains the two communication cycles at a high level, Tells the rectifier module that it will send an abnormal signal. In addition, the abnormal signal transmission unit 164 transmits an abnormal signal including whether an abnormality has occurred in the upper or lower arm (high side / low side) of the MOS transistor in the next two cycles. For example, an abnormal signal indicating that an abnormality has occurred in the low-side MOS transistor 51 is transmitted by setting the high-level duty to less than 50%. The transmission of the same abnormal signal is continued for a predetermined time (for example, 8 seconds) thereafter. During the 8 seconds, the abnormal signal receiving unit 162 of the other rectifier module receives an abnormal signal indicating that the MOS transistor 51 is abnormal. In response to the reception of the abnormality signal, the abnormality determination unit 123 sends an instruction to the driver 192 to turn off the high-side MOS transistor 50, and sends an instruction to the driver 194 to turn on the low-side MOS transistor 51. . Further, the excitation current suppression signal transmission unit 170 that has received the notification of the occurrence of abnormality from the abnormality determination unit 123 outputs a first specific signal for instructing power generation suppression from the RP terminal. In this way, the first specific signal is output from the excitation current suppression signal transmission unit 170 included in all the rectifier modules, and the first specific signal determination unit 77B in the power generation control device 7 receives this via the P terminal. The first specific signal can be received, and power generation suppression without alarm operation is performed.

  In addition, after transmission of the abnormal signal for 8 seconds, the abnormal signal transmission unit 164 that is the transmission source of the abnormal signal transmits an abnormal cancellation signal that instructs the cancellation of the abnormal state notified by the abnormal signal. In the example illustrated in FIG. 19, the abnormal signal transmission unit 164 transmits an abnormality cancellation signal to other rectifier modules by maintaining two communication cycles at a low level. When this abnormality canceling signal is received, the operation of outputting the first specific signal from the exciting current suppression signal transmitting unit 170 in all the rectifier modules 5X and the like is cancelled, but an abnormality of the MOS transistor 51 has actually occurred. In this case, the operation after the abnormality detection is repeated, and the power generation suppression operation is also repeated.

  As described above, in the vehicular generator 1 according to the present embodiment, an abnormality occurs in which one of the rectifier modules fails in a MOS transistor that is a switching element constituting the upper arm (high side) or the lower arm (low side). Even in such a case, it is possible to notify other rectifier modules to that effect and instruct the power generation control device 7 to stop or reduce the supply of the excitation current, thereby suppressing power generation. As a result, the MOS transistor can be prevented from being damaged and the MOS transistor can be sufficiently protected. Moreover, since it is possible to suppress power generation without outputting an abnormal alarm signal to the outside (ECU 8) in the power generation control device 7, it is possible to prevent an excessive alarm operation when an abnormal state occurs.

  Further, the power generation control device 7 outputs an abnormal alarm signal to the outside when a second specific signal different from the first specific signal instructing power generation suppression without an alarm operation is input to the P terminal. I have to. Thereby, it becomes possible to switch the presence or absence of the alarm operation | movement with respect to the exterior by changing the specific signal input into P terminal of the electric power generation control apparatus 7. FIG.

  In addition, the upper MOS short detection unit 140 and the lower MOS short detection unit 141 are used to detect a short circuit or a rare short circuit of the MOS transistors 50 and 51, and the current flowing through the MOS transistors 50 and 51 in which the short circuit or the rare short circuit has occurred is detected. Thus, the MOS transistors 50 and 51 can be reliably prevented from being damaged by energization.

The upper MOS short detection unit 140 compares the phase voltage V _P with the output voltage V _B , and when the phase voltage V _P is higher than ½ of the output voltage V _{B for} a predetermined time. A short circuit of the MOS transistor 50 is detected. The lower MOS short detection unit 141 compares the phase voltage V _P with the output voltage V _B , and when the phase voltage V _P is lower than ½ of the output voltage V _{B for} a predetermined time. A short circuit of the MOS transistor 51 is detected. In this way, it is possible to determine whether or not the MOS transistors 50 and 51 are short-circuited with a simple configuration in which the phase voltage V _P and the output voltage V _B are compared. Further, it is possible to reliably detect which of the MOS transistors 50 and 51 is short-circuited based on the voltage comparison result.

  The overheat state of the MOS transistors 50 and 51 is detected using the upper MOS temperature detection unit 150 and the lower MOS temperature detection unit 151, and the MOS transistor is associated with the occurrence of a rare short circuit (or irrespective of the rare short circuit). The current flowing through the MOS transistors 50 and 51 can be reduced when the temperatures 50 and 51 are likely to exceed the heat-resistant temperature, and the failure of the MOS transistors 50 and 51 and its control circuit 54 can be prevented. .

  In particular, the temperature of the MOS transistors 50 and 51 can be detected quickly by detecting the temperature using the temperature-sensitive diodes corresponding to the MOS transistors 50 and 51, respectively. The current can be reduced and the temperature rise of the MOS transistors 50 and 51 can be suppressed.

  The abnormal signal transmission unit 164 transmits an abnormal release signal instructing cancellation of the abnormal state after a predetermined time has elapsed after transmitting the abnormal signal, and the excitation current suppression signal transmission unit 170 receives the abnormal cancellation signal. When receiving at the unit 162, the transmission of the first specific signal is once canceled. As a result, even if an abnormality is detected by mistake or the protection operation is entered due to a malfunction due to noise, it is possible to return to the normal operation from the erroneous protection operation.

  In addition, this invention is not limited to the said embodiment, A various deformation | transformation implementation is possible within the range of the summary of this invention. For example, in the above-described embodiment, the resistor 20 is connected to the rectifier module 5X in FIG. 1, but may be connected to another rectifier module 5Y or the like. In addition to the case where the resistor 20 is built in a terminal block (not shown) that serves as a wiring and attachment of six or a part of the rectifier module 5X, the resistor 20 is built in the rectifier module 5X. (FIG. 20). In the embodiment described above, both the P terminal and the RP terminal of the rectifier module 5X are connected to the power generation control device 7. However, these P terminal and RP terminal may be provided in separate rectifier modules.

  In the above-described embodiment, the two stator windings 2 and 3 and the two rectifier module groups 5 and 6 are provided. However, the vehicle includes one stator winding 2 and one rectifier module group 5. The present invention can also be applied to power generators.

  Further, in the above-described embodiment, the case where the rectifying operation (power generation operation) is performed using each rectifier module 5X or the like has been described. However, it is applied from the battery 9 by changing the on / off timing of the MOS transistors 50 and 51. The present invention can be applied to a vehicular rotating electrical machine that converts a direct current to be converted into an alternating current and supplies it to the stator windings 2 and 3 to perform an electric operation.

  In the above-described embodiment, each of the two rectifier module groups 5 and 6 includes three rectifier modules. However, the number of rectifier modules may be other than three.

  As described above, according to the present invention, even when an abnormality occurs in which the switching element constituting the upper arm or the lower arm fails in any rectifier module, the fact is notified to the other rectifier modules. Thus, it is possible to instruct the power generation control device to stop or reduce the supply of the excitation current, thereby suppressing power generation.

2, 3 Stator winding 4 Field winding 7 Power generation control device 50, 51 MOS transistor 161 Normal signal reception unit 162 Abnormal signal reception unit 163 Normal signal transmission unit 164 Abnormal signal transmission unit 170 Excitation current suppression signal transmission unit

Claims (9)

A field winding (4) for magnetizing the rotor field poles;
A stator having an armature winding (2, 3) as a multiphase winding that generates an alternating voltage by a rotating magnetic field generated by the field pole;
A power generation control device that controls the generated voltage by adjusting the excitation current supplied to the field winding, and stops or reduces the supply of the excitation current when the first specific signal is input to the phase voltage detection terminal ( 7) and
A plurality of rectifier modules provided corresponding to a plurality of output terminals of the armature winding and connected to each other via signal lines for transmitting and receiving signals, each rectifier module being connected to the output terminal A switching unit that has an upper arm and a lower arm that are connected and configured by switching elements (50, 51) and rectifies the induced voltage of the armature winding, and switching control that controls on / off of the switching element Unit (100), an abnormality detection unit (140, 141, 150, 151, 123) for detecting an abnormality of the switching element, and an abnormality toward another rectifier module when an abnormality is detected by the abnormality detection unit An abnormal signal transmitter (164) for transmitting a signal and an abnormal signal for receiving the abnormal signal transmitted from another rectifier module When the abnormality is detected by the communication unit (162) and the abnormality detection unit, or when the abnormality signal transmitted from another rectifier module is received by the abnormality signal reception unit, the first specific signal is An excitation current suppression signal transmission unit (170) for transmission, and at least one rectifier module connected to the power generation control device;
The power generation control device does not output an abnormal alarm signal to the outside when the first specific signal is input to the phase voltage detection terminal,
A second specific signal different from the first specific signal is input to the phase voltage detection terminal because it is determined that the abnormality is not detected by the abnormality detection unit and is not normally rectified . A rotating electric machine for a vehicle, which sometimes outputs the abnormality alarm signal to the outside. In claim 1,
The vehicular rotating electrical machine according to claim 1, wherein the abnormality detection unit includes a short detection unit (140, 141) that detects a short circuit or a short circuit of the switching element. In claim 2,
The short detection unit compares the phase voltage of the armature winding with the output voltage of the rectifier module, and when the phase voltage is higher than ½ of the output voltage for a predetermined time. A short circuit of the switching element of the upper arm is detected, and a short circuit of the switching element of the lower arm is detected when a state where the phase voltage is lower than ½ of the output voltage continues for a predetermined time. Rotating electric machine for vehicles. In claim 3,
The rectifier module is
A normal operation determination unit (131) for determining normal rectification;
A normal signal transmitting unit (163) for transmitting a normal signal to another rectifier module when it is determined that the normal operation is normally rectified by the normal operation determining unit;
A normal signal receiver (161) that receives the normal signal transmitted from another rectifier module,
The rotating electrical machine for a vehicle according to claim 1, wherein the short detection unit detects a short circuit of the switching element when receiving the normal signal transmitted from another rectifier module by the normal signal receiving unit. In claim 4,
When the rectifier module detects that the phase voltage of the armature winding exceeds a predetermined value, the rectifier module activates a power supply (190) for supplying an operating voltage in the rectifier module, and A power start / stop determination unit (112) that stops the power supply when the phase voltage is lower than a predetermined value for a predetermined time and the normal signal is not received by the normal signal receiving unit; A rotating electrical machine for a vehicle, comprising: In any one of Claims 1-5,
The vehicular rotating electrical machine according to claim 1, wherein the abnormality detection unit includes a temperature detection unit (150, 151) that detects an overheat state of the switching element. In claim 6,
The rotating electrical machine for a vehicle according to claim 1, wherein the temperature detection unit detects the temperature of the switching element using a temperature-sensitive diode corresponding to each of the switching elements of the upper arm and the lower arm. In any one of Claims 1-7,
The abnormal signal transmission unit transmits an abnormal release signal instructing cancellation of an abnormal state after a predetermined time has elapsed,
The rotating electrical machine for a vehicle according to claim 1, wherein the excitation current suppression signal transmission unit once cancels transmission of the first specific signal when the abnormality cancellation signal is received by the abnormality signal reception unit. In any one of Claims 1-8,
The vehicular rotating electrical machine is characterized in that the power generation control device performs an alarm operation to the outside when the power generation voltage falls below a predetermined voltage.

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