JP5891493B2 - Display panel, driving method thereof, display device, and electronic apparatus - Google Patents

Description

This technique, for example, relates to light-emitting elements such as organic EL (Electro Luminescence) element in the display panel with each pixel. The present technology also relates to a display device and an electronic device that include the display panel.

  In recent years, in the field of display devices that perform image display, display devices that use current-driven light-emitting elements, such as organic EL elements, whose light emission luminance changes according to the value of a flowing current have been developed as light-emitting elements for pixels. Is being promoted. Unlike a liquid crystal element or the like, the organic EL element is a self-luminous element. Therefore, a display device (organic EL display device) using an organic EL element does not require a light source (backlight), so that it can be made thinner and brighter than a liquid crystal display device that requires a light source. .

  By the way, in general, the current-voltage (IV) characteristics of the organic EL element deteriorate (deteriorate with time) as time elapses. In a pixel circuit that current-drives an organic EL element, when the IV characteristic of the organic EL element changes with time, the voltage division ratio between the organic EL element and the drive transistor connected in series to the organic EL element changes. The gate-source voltage of the transistor also changes. As a result, since the current value flowing through the drive transistor changes, the current value flowing through the organic EL element also changes, and the light emission luminance also changes according to the current value.

  Further, the threshold voltage (Vth) and mobility (μ) of the driving transistor may change with time, and Vth and μ may vary from pixel circuit to pixel circuit due to variations in the manufacturing process. When the Vth and μ of the driving transistor are different for each pixel circuit, the current value flowing through the driving transistor varies for each pixel circuit. Therefore, even if the same voltage is applied to the gate of the driving transistor, the light emission luminance of the organic EL element can be increased. Variation and uniformity of the screen are lost.

  Therefore, even if the IV characteristic of the organic EL element changes with time or the Vth and μ of the driving transistor change with time, the light emission luminance of the organic EL element is kept constant without being affected by them. In order to achieve this, a display device has been developed that incorporates a compensation function for variations in IV characteristics of organic EL elements and a correction function for variations in Vth and μ of drive transistors (see, for example, Patent Document 1).

JP 2008-083272 A

  Incidentally, for example, in the conventional driving method as shown in FIG. 9, Vth correction for bringing the gate-source voltage of the driving transistor close to the threshold voltage of the driving transistor and a signal voltage corresponding to the video signal at the gate of the driving transistor. Signal writing to be performed is performed every 1H period. Therefore, in this driving method, it is difficult to shorten the 1H period and shorten the scanning period per 1F (that is, to drive at a high speed). Therefore, for example, as shown in FIG. 10, after Vth correction is performed for two lines in a common 1H period, signal writing is performed for each line in the next 1H period. This driving method is suitable for high-speed driving because Vth correction is bundled. However, the waiting period Δt from the end of Vth correction to the start of signal writing varies from line to line. For this reason, even when a signal voltage of the same gradation is applied to the gates of the driving transistors of the respective lines, there is a problem in that the light emission luminance varies from line to line, resulting in luminance unevenness.

This technology has been made in view of the above problems, its object is a display panel capable of reducing the occurrence of luminance unevenness caused by a bundle of Vth correction in multiple lines, such a display panel A display device and an electronic device including the above are provided.

  The display panel of the present technology includes a plurality of pixels including a plurality of sub-pixels having different emission colors, a plurality of first wirings used for selecting each pixel, and a plurality of pixels used for supplying drive current to each pixel. Second wiring. A plurality of first wirings are assigned k per unit when k (k ≧ 2) pixel rows are taken as one unit, and each first wiring has the same emission color within one unit. Connected to multiple subpixels. On the other hand, a plurality of second wirings are assigned to each unit, and each second wiring is connected to all subpixels in one unit.

  The display device of the present technology includes a display panel and a drive circuit that drives the display panel. The display panel provided in this display device has the same components as the above display panel.

  An electronic apparatus of the present technology includes the display device described above.

The display panel driving method according to the reference example is a driving method when all the subpixels in one unit are divided into groups for each connected first wiring in the display panel. In this driving method, Vth correction for bringing the gate-source voltage of the driving transistor closer to the threshold voltage of the driving transistor is performed on all groups in one unit at the same time, and then writing of the signal voltage is performed for one unit. Steps for each group in each group are included.

  In the display panel, the display device, the electronic device, and the driving method of the first display panel according to the present technology, each first wiring used for selecting each pixel is connected to a plurality of sub-pixels having the same emission color within one unit. Has been. Furthermore, each second wiring used for supplying drive current to each pixel is connected to all subpixels in one unit. Thereby, for example, after performing Vth correction for all groups in one unit at the same time, signal voltage can be written for all groups in one unit for each group. As a result, in each subpixel of the same color, the period (so-called waiting time) from the end of Vth correction to the start of μ correction matches, so the waiting time in the subpixel of the same color matches for each line.

The display panel driving method according to the reference example is as follows. In the following display panel, a plurality of pixel rows are set as one unit, and all subpixels in one unit are grouped into a plurality of subpixels using the emission color as a classification criterion. This is a driving method when divided.

  Here, the display panel to which this driving method is applied includes a plurality of pixels including a plurality of sub-pixels having different emission colors. In this display panel, each subpixel includes a light emitting element, a driving transistor connected in series to the light emitting element, and a writing transistor for writing a signal voltage corresponding to a video signal to the gate of the driving transistor. In this display method, Vth correction for bringing the gate-source voltage of the drive transistor closer to the threshold voltage of the drive transistor is performed simultaneously for all the groups in one unit in the display panel having such a configuration. After that, the step of writing the signal voltage for every group in one unit is included.

  In the second display panel driving method of the present technology, Vth correction is performed on all groups in one unit at the same time, and then signal voltage writing is performed on all groups in one unit. For each group. As a result, in each subpixel of the same color, the period (so-called waiting time) from the end of Vth correction to the start of μ correction matches, so the waiting time in the subpixel of the same color matches for each line.

Display panel of the present technique, according to the display device and electronic equipment, because the latency in the same color sub-pixels have to match for each line, the occurrence of luminance unevenness caused by a bundle of Vth correction in a plurality of lines Can be reduced.

1 is a schematic configuration diagram of a display device according to an embodiment of the present technology. It is a figure showing an example of the circuit structure of the pixel of FIG. It is a figure showing an example of the layout of each pixel of FIG. It is a figure showing the other example of the layout of each pixel of FIG. FIG. 5 is a diagram illustrating an example of a voltage of the DTL in FIGS. 3 and 4. It is a wave form diagram for demonstrating an example of operation | movement of the display apparatus of FIG. FIG. 6 is a waveform diagram for explaining an example of scanning of Vth correction and signal writing / μ correction in the display device of FIG. 1. It is a figure showing an example of the wiring connection in the display panel which concerns on a comparative example. It is a wave form diagram for demonstrating an example of operation | movement of a display apparatus provided with the display panel of FIG. It is a wave form diagram for demonstrating the other example of operation | movement of a display apparatus provided with the display panel of FIG. It is a figure showing the modification of the display panel of FIG. It is a figure showing the other modification of the display panel of FIG. It is a perspective view showing the external appearance of the application example 1 of the light-emitting device of the said embodiment. (A) is a perspective view showing the external appearance seen from the front side of the application example 2, (B) is a perspective view showing the external appearance seen from the back side. 12 is a perspective view illustrating an appearance of application example 3. FIG. 14 is a perspective view illustrating an appearance of application example 4. FIG. (A) is a front view of the application example 5 in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) is a left side view, and (E) is a right side view, (F) is a top view and (G) is a bottom view.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the invention will be described in detail with reference to the drawings. The description will be given in the following order.

1. Embodiment (display device)
2. Modified example (display device)
3. Application example (electronic equipment)

<1. Embodiment>
[Constitution]
FIG. 1 illustrates a schematic configuration of a display device 1 according to an embodiment of the present technology. The display device 1 includes a display panel 10 and a drive circuit 20 that drives the display panel 10 based on a video signal 20A and a synchronization signal 20B input from the outside. The drive circuit 20 includes, for example, a timing generation circuit 21, a video signal processing circuit 22, a signal line drive circuit 23, a scanning line drive circuit 24, and a power supply line drive circuit 25.

(Display panel 10)
The display panel 10 has a plurality of pixels 11 two-dimensionally arranged over the entire display area 10 </ b> A of the display panel 10. The display panel 10 displays an image based on the video signal 20 </ b> A input from the outside when each pixel 11 is driven in an active matrix by the drive circuit 20.

  FIG. 2 illustrates an example of a circuit configuration of the pixel 11. Each pixel 11 includes, for example, a pixel circuit 12 and an organic EL element 13. The organic EL element 13 has, for example, a configuration in which an anode electrode, an organic layer, and a cathode electrode are sequentially stacked. For example, the pixel circuit 12 includes a drive transistor Tr1, a write transistor Tr2, and a storage capacitor Cs, and has a circuit configuration of 2Tr1C. The write transistor Tr2 controls application of a signal voltage corresponding to the video signal to the gate of the drive transistor Tr1. Specifically, the write transistor Tr2 samples a voltage of a signal line DTL described later and writes it to the gate of the drive transistor Tr1. The drive transistor Tr1 drives the organic EL element 13 and is connected to the organic EL element 13 in series. The drive transistor Tr1 controls the current flowing through the organic EL element 13 in accordance with the magnitude of the voltage written by the write transistor Tr2. The holding capacitor Cs holds a predetermined voltage between the gate and source of the driving transistor Tr1. Note that the pixel circuit 12 may have a circuit configuration different from the above-described 2Tr1C circuit configuration.

  The drive transistor Tr1 and the write transistor Tr2 are formed of, for example, an n-channel MOS thin film transistor (TFT (Thin Film Transistor)). Note that the type of TFT is not particularly limited, and may be, for example, an inverted staggered structure (so-called bottom gate type) or a staggered structure (top gate type). Further, the drive transistor Tr1 and the write transistor Tr2 may be formed of p-channel MOS type TFTs.

  The display panel 10 includes a plurality of scanning lines WSL (first wiring) extending in the row direction, a plurality of signal lines DTL (third wiring) extending in the column direction, and a plurality of power supplies extending in the row direction. And a line DSL (second wiring). The scanning line WSL is used for selecting each pixel 11. The signal line DTL is used for supplying a signal voltage corresponding to the video signal to each pixel 11. The power supply line DSL is used for supplying drive current to each pixel 11. Pixels 11 are provided in the vicinity of intersections between the signal lines DTL and the scanning lines WSL. Each signal line DTL is connected to an output terminal (not shown) of a signal line drive circuit 23 described later and the source or drain of the write transistor Tr2. Each scanning line WSL is connected to an output terminal (not shown) of a scanning line driving circuit 24 described later and a gate of the writing transistor Tr2. Each power supply line DSL is connected to an output terminal (not shown) of a power supply that outputs a fixed voltage and the source or drain of the drive transistor Tr1.

  The gate of the writing transistor Tr2 is connected to the scanning line WSL. The source or drain of the write transistor Tr2 is connected to the signal line DTL, and the terminal not connected to the signal line DTL among the source and drain of the write transistor Tr2 is connected to the gate of the drive transistor Tr1. The source or drain of the drive transistor Tr1 is connected to the power supply line DSL, and the terminal not connected to the power supply line DSL among the source and drain of the drive transistor Tr1 is connected to the anode of the organic EL element 13. One end of the storage capacitor Cs is connected to the gate of the drive transistor Tr1, and the other end of the storage capacitor Cs is connected to the source of the drive transistor Tr1 (terminal on the organic EL element 13 side in FIG. 2). That is, the storage capacitor Cs is inserted between the gate and source of the drive transistor Tr1. The organic EL element 13 has an element capacitance Coled.

  The display panel 10 further includes a ground line GND connected to the cathode of the organic EL element 13 as shown in FIG. The ground line GND is electrically connected to an external circuit (not shown) having a ground potential. The ground line GND is, for example, a sheet-like electrode formed over the entire display area 10A. The ground line GND may be a strip-like electrode formed in a strip shape corresponding to a pixel row or a pixel column. The display panel 10 further includes, for example, a frame region that does not display an image at the periphery of the display region 10A. The frame region is covered with, for example, a light shielding member.

  3 and 4 show an example of the layout of each pixel 11. FIG. 3 shows an example of the layout of each pixel 11 in the n-th row (1 ≦ n <N, N is the total number of pixel rows (even number)) and the (n + 1) th pixel row. It shows an example of the layout of each pixel 11 in the n + 2 and n + 3 pixel rows. The layout of each pixel 11 is common to the nth and n + 1th pixel rows and the n + 2th and n + 3th pixel rows. In the following description, the description of the layout of each pixel 11 in the n + 2 and n + 3 pixel rows is omitted for the purpose of avoiding repeated description.

  Each pixel 11 corresponds to a minimum unit point constituting a screen on the display panel 10. The display panel 10 is a color display panel, and the pixel 11 corresponds to a sub-pixel that emits light of a single color such as red, green, or blue. In the present embodiment, the display pixel 14 is constituted by three pixels 11 having different emission colors. That is, the number of types of emission colors is three. The three pixels 11 included in the display pixel 14 include a pixel 11R that emits red light, a pixel 11G that emits green light, and a pixel 11B that emits blue light. Each display pixel 14 has a so-called stripe arrangement. That is, the plurality of pixels 11 are periodically arranged in the row direction in the order of the pixels 11R, 11G, and 11B, and are arranged in the column direction for each same emission color.

  The plurality of scanning lines WSL are assigned k units per unit when k (k ≧ 2) pixel rows are taken as one unit. The number of pixel rows included in one unit is 2 or more and less than or equal to the number of types of emission colors. Specifically, two scanning lines WSL are assigned to each unit when two pixel rows are taken as one unit. Therefore, the number of pixel rows included in one unit is two, and the number of scanning lines WSL included in one unit is two. The total number of scanning lines WSL is equal to the total number of pixel rows and is N. Note that n in FIG. 3 is a positive integer of 1 or more and N / 2 or less, and WSL (n) in FIG. 3 means the nth scanning line WSL. Each scanning line WSL is connected to a plurality of pixels 11 of the same emission color within one unit. Specifically, in the two scanning lines WSL (n) and WSL (n + 1) included in one unit, the scanning line WSL (n) is connected to the plurality of pixels 11R and the plurality of pixels 11B included in one unit. The scanning line WSL (n + 1) is connected to a plurality of pixels 11G included in one unit. Each scanning line WSL is connected to all the pixels 11 having the same emission color in one unit. Specifically, in the two scanning lines WSL (n) and WSL (n + 1) included in one unit, the scanning line WSL (n) is connected to all the pixels 11R and all the pixels 11B in one unit. The scanning line WSL (n + 1) is connected to all the pixels 11G in one unit.

  A plurality of power supply lines DSL are assigned to each unit. Therefore, the number of power supply lines DSL included in one unit is one. The total number of power supply lines DSL corresponds to half of the total number of pixel rows, and is J (= N / 2). Note that j in FIG. 3 is a positive integer of 1 or more and N / 2 or less, and DSL (j) in FIG. 3 means the j-th power supply line DSL. Each power supply line DSL is connected to all the pixels 11 in one unit. Specifically, one power supply line DSL included in one unit is connected to all the pixels 11 (11R, 11G, 11B) included in one unit.

  A plurality of signal lines DTL are assigned for each display pixel 14 in each pixel row. Of the two signal lines DTL assigned to each display pixel 14 in each pixel row, one signal line DTL is connected to the two types of light emitting color pixels 11 that do not share the scanning line WSL, and the other The signal line DTL is connected to the pixels 11 of the remaining types of emission colors. Specifically, first, among the plurality of display pixels 14 included in the nth and n + 1th pixel rows, two display pixels 14 adjacent to each other in the column direction (that is, the rows are different from each other in one unit). Attention is paid to two display pixels 14) adjacent to each other. Two signal lines DTL (m) and DTL (m + 2) are assigned to the display pixel 14 included in the nth pixel row of the two display pixels 14. Note that the number of signal lines DTL is equal to the number of pixels 11 included in one pixel row, and is M (M is a multiple of 4). In FIG. 3, m is a positive integer greater than or equal to 1 and less than or equal to M−4. Therefore, DTL (m) in FIG. 3 means the mth signal line DTL.

  In the above two signal lines DTL (m) and DTL (m + 2), one signal line DTL (m + 2) is connected to the pixels 11G and 11B of two kinds of emission colors that do not share the scanning line WSL. On the other hand, the other signal line DTL (m) is connected to the remaining types of pixels 11R of the emission color. Further, two signal lines DTL (m + 1) and DTL (m + 3) are assigned to the display pixels 14 included in the pixel row of the (n + 1) th row among the two display pixels 14. In the two signal lines DTL (m + 1) and DTL (m + 3), one signal line DTL (m + 1) is connected to pixels 11R and 11G of two kinds of emission colors that do not share the scanning line WSL. The other signal line DTL (m + 3) is connected to the remaining types of pixels 11B of the emission color.

  That is, in two display pixels 14 that are different from each other in one unit and are adjacent to each other, two signal lines DTL (m) and DTL (m + 2) in even-numbered columns are provided for one display pixel 14. Two signal lines DTL (m + 1) and DTL (m + 3) in the odd-numbered columns are assigned to the other display pixel 14. Further, in two display pixels 14 that are different from each other in one unit and that are adjacent to each other, combinations of the emission colors of the two types of emission pixels 11 that share the scanning line WSL are different from each other. This minimizes the total number of signal lines DTL.

(Drive circuit 20)
Next, the drive circuit 20 will be described. As described above, the drive circuit 20 includes, for example, the timing generation circuit 21, the video signal processing circuit 22, the signal line drive circuit 23, the scanning line drive circuit 24, and the power supply line drive circuit 25. The timing generation circuit 21 controls each circuit in the drive circuit 20 to operate in conjunction with each other. The timing generation circuit 21 outputs a control signal 21A to each circuit described above, for example, in response to (in synchronization with) the synchronization signal 20B input from the outside.

  For example, the video signal processing circuit 22 performs predetermined correction on a digital video signal 20A input from the outside, and outputs the video signal 22A obtained thereby to the signal line drive circuit 23. Examples of the predetermined correction include gamma correction and overdrive correction.

  For example, the signal line drive circuit 23 applies an analog signal voltage corresponding to the video signal 22A input from the video signal processing circuit 22 to each signal line DTL in response to (in synchronization with) the input of the control signal 21A. To do. The signal line drive circuit 23 can output, for example, two types of voltages (Vofs, Vsig). Specifically, the signal line driving circuit 23 supplies two types of voltages (Vofs, Vsig) to the pixel 11 selected by the scanning line driving circuit 24 via the signal line DTL.

  FIG. 5 shows four signal lines DTL (DTL (m), DTL (m + 1), DTL (m + 2), DTL (m + 3)) connected to two display pixels 14 adjacent to each other in the column direction in one unit. On the other hand, an example of voltages V (n), V (n + 1), V (n + 2), and V (n + 3) sequentially applied in accordance with the scanning of the scanning line WSL is shown. For example, as illustrated in FIG. 5, among the plurality of pixels 11 selected simultaneously by the scanning line driving circuit 24, the even-numbered signal line DTL 23 corresponds to the plurality of pixels 11 belonging to the n pixel row. The voltage Vsig (Vsig (n, m), Vsig (n, m + 2)) corresponding to the n pixel row is supplied via (m), DTL (m + 2), and the signal line driving circuit. Reference numeral 23 denotes a scanning line driving circuit 24. Among the plurality of pixels 11 selected at the same time, the plurality of pixels 11 belonging to the n + 1 pixel row correspond to the n + 1 pixel row via the odd-numbered signal lines DTL (m + 1) and DTL (m + 3). The voltage Vsig (Vsig (n + 1, m + 1), Vsig (n + 1, m + 3)) is supplied, that is, the signal line driving circuit 23 is configured to supply the signal line DTL when the scanning line WSL (n) is selected. When applying the voltage V (n) to (DTL (m) to DTL (m + 3)), the voltage Vsig corresponding to the n pixel rows for the even-numbered signal lines DTL (m) and DTL (m + 2). Is simultaneously output to the odd-numbered signal lines DTL (m + 1), DTL (m + 3), and the voltage Vsig corresponding to the n + 1 pixel row is output.

  When the signal line drive circuit 23 applies the voltage V (n + 1) to the signal line DTL (DTL (m) to DTL (m + 3)) when the scanning line WSL (n + 1) is selected, The voltage Vsig (Vsig (n + 1, m), Vsig (n + 1, m + 2)) corresponding to the n + 1 pixel row is output to the signal lines DTL (m) and DTL (m + 2), and at the same time, the odd-numbered signal line DTL (m + 1) is output. ) And DTL (m + 3), the voltages Vsig (Vsig (n, m + 1), Vsig (n, m + 3)) corresponding to the n pixel rows are output. The signal line driving circuit 23 applies voltages to the n + 2 pixel row and the n + 3 pixel row in the same manner as the n pixel row and the n + 1 pixel row.

  Here, Vsig is a voltage value corresponding to the video signal 20A. Vofs is a constant voltage unrelated to the video signal 20A. The minimum voltage of Vsig is a voltage value lower than Vofs, and the maximum voltage of Vsig is a voltage value higher than Vofs.

  For example, the scanning line driving circuit 24 sequentially selects a plurality of scanning lines WSL for each predetermined unit in response to (in synchronization with) the input of the control signal 21A. For example, the scanning line driving circuit 24 can output two types of voltages (Von, Voff). Specifically, the scanning line driving circuit 24 supplies two types of voltages (Von, Voff) to the pixel 11 to be driven via the scanning line WSL, and performs on / off control of the writing transistor Tr2. ing.

  Here, Von has a value equal to or higher than the ON voltage of the write transistor Tr2. Von is the peak value of the write pulse output from the scanning line drive circuit 24 in the “second half of the Vth correction preparation period”, “Vth correction period”, “signal writing / μ correction period”, which will be described later. . Voff is a value lower than the ON voltage of the write transistor Tr2 and a value lower than Von. Voff is the peak value of the write pulse output from the scanning line driving circuit 24 during the “first half of the Vth correction preparation period” described later, the “light emission period”, and the like.

  For example, the power supply line drive circuit 25 sequentially selects a plurality of power supply lines DSL for each predetermined unit in response to (in synchronization with) the input of the control signal 21A. The power line drive circuit 25 can output, for example, two types of voltages (Vcc, Vss). Specifically, the power supply line drive circuit 25 supplies two types of one unit including the pixels 11 selected by the scanning line drive circuit 24 (that is, all the pixels 11 included in one unit) via the power supply line DSL. Voltage (Vcc, Vss) is supplied. Here, Vss is a voltage value lower than a voltage (Vel + Vcath) obtained by adding the threshold voltage Vel of the organic EL element 13 and the cathode voltage Vcath of the organic EL element 13. Vcc is a voltage value equal to or higher than the voltage (Vel + Vcath).

[Operation]
Next, the operation (operation from quenching to light emission) of the display device 1 of the present embodiment will be described. In the present embodiment, even if the IV characteristic of the organic EL element 13 changes with time or the threshold voltage or mobility of the driving transistor Tr1 changes with time, the organic EL element is not affected by the change. In order to keep the light emission luminance of 13 constant, a compensation operation for variation of the IV characteristic of the organic EL element 13 and a correction operation for variation of the threshold voltage and mobility of the drive transistor Tr1 are incorporated.

  FIG. 6 shows an example of various waveforms in the display device 1. FIG. 6 shows a state in which a binary voltage change occurs every moment in the scanning line WSL, the power supply line DSL, and the signal line DTL. Further, FIG. 6 shows a state in which the gate voltage Vg and the source voltage Vs of the drive transistor Tr1 change from moment to moment according to the voltage change of the scanning line WSL, the power supply line DSL, and the signal line DTL. .

(Vth correction preparation period)
First, the drive circuit 20 prepares for Vth correction to bring the gate-source voltage Vgs of the drive transistor Tr1 close to the threshold voltage of the drive transistor Tr1. Specifically, when the voltage of the scanning line WSL is Voff, the voltage of the signal line DTL is Vofs, and the voltage of the power supply line DSL is Vcc (that is, the organic EL element 13 emits light). The power line drive circuit 25 lowers the voltage of the power line DSL from Vcc to Vss in response to the control signal 21A (T1). Then, the source voltage Vs decreases to Vss, and the organic EL element 13 is quenched. At this time, the gate voltage Vg also decreases due to coupling via the storage capacitor Cs.

  Next, while the voltage of the power supply line DSL is Vss and the voltage of the signal line DTL is Vofs, the scanning line driving circuit 24 changes the voltage of the scanning line WSL to Voff according to the control signal 21A. To Von (T2). Then, the gate voltage Vg decreases to Vofs. At this time, the potential difference Vgs between the gate voltage Vg and the source voltage Vs may be smaller than, equal to, or larger than the threshold voltage of the driving transistor Tr2.

(Vth correction period)
Next, the drive circuit 20 corrects Vth. Specifically, while the voltage of the signal line DTL is Vofs and the voltage of the scanning line WSL is Von, the power supply line driving circuit 25 sets the power supply line DSL according to the control signal 21A. The voltage is raised from Vss to Vcc (T3). Then, a current Ids flows between the drain and source of the drive transistor Tr1, and the source voltage Vs increases. At this time, when the source voltage Vs is lower than Vofs−Vth (when the Vth correction is not yet completed), until the drive transistor Tr1 is cut off (until the potential difference Vgs becomes Vth), A current Ids flows between the drain and the source. As a result, the gate voltage Vg becomes Vofs, the source voltage Vs rises, and as a result, the storage capacitor Cs is charged to Vth, and the potential difference Vgs becomes Vth.

  Thereafter, the signal line driving circuit 23 changes the voltage of the scanning line WSL from Von to Voff in accordance with the control signal 21A before the voltage of the signal line DTL is switched from Vofs to Vsig in accordance with the control signal 21A. (T4). Then, since the gate of the drive transistor Tr1 is in a floating state, the potential difference Vgs can be maintained as Vth regardless of the magnitude of the voltage of the signal line DTL. As described above, by setting the potential difference Vgs to Vth, even when the threshold voltage Vth of the drive transistor Tr1 varies for each pixel circuit 12, it is possible to eliminate the variation in the light emission luminance of the organic EL element 13. it can.

(Vth correction suspension period)
Thereafter, during the suspension period of Vth correction, the signal line drive circuit 23 switches the voltage of the signal line DTL from Vofs to Vsig.

(Signal writing / μ correction period)
After the Vth correction pause period ends (that is, after the Vth correction is completed), the drive circuit 20 performs writing of the signal voltage corresponding to the video signal 20A and μ correction. Specifically, while the voltage of the signal line DTL is Vsig and the voltage of the power supply line DSL is Vcc, the scanning line driving circuit 24 determines the voltage of the scanning line WSL according to the control signal 21A. Is raised from Voff to Von (T5), and the gate of the drive transistor Tr1 is connected to the signal line DTL. Then, the gate voltage Vg of the drive transistor Tr1 becomes the voltage Vsig of the signal line DTL. At this time, the anode voltage of the organic EL element 13 is still lower than the threshold voltage Vel of the organic EL element 13 at this stage, and the organic EL element 13 is cut off. Therefore, the current Ids flows to the element capacitance Coled of the organic EL element 13 and the element capacitance Coled is charged. Therefore, the source voltage Vs increases by ΔVs, and the potential difference Vgs eventually becomes Vsig + Vth−ΔVs. In this way, μ correction is performed simultaneously with writing. Here, since ΔVs increases as the mobility μ of the drive transistor Tr1 increases, the variation in mobility μ for each pixel 11 can be eliminated by reducing the potential difference Vgs by ΔV before light emission.

(Light emission)
Finally, the scanning line driving circuit 24 lowers the voltage of the scanning line WSL from Von to Voff according to the control signal 21A (T6). Then, the gate of the drive transistor Tr1 becomes floating, the current Ids flows between the drain and source of the drive transistor Tr1, and the source voltage Vs rises. As a result, a voltage equal to or higher than the threshold voltage Vel is applied to the organic EL element 13, and the organic EL element 13 emits light with a desired luminance.

  Next, an example of scanning of Vth correction and signal writing / μ correction in the display device 1 of the present embodiment will be described with reference to FIGS. 5 and 7. FIG. 7 shows an example of scanning of Vth correction and signal writing / μ correction in a certain four consecutive pixel rows (n pixel row, n + 1 pixel row, n + 2 pixel row, n + 3 pixel row).

  In the following description, it is assumed that all the pixels 11 in one unit are divided into groups for each connected scanning line WSL. In the present embodiment, all the pixels 11R and all the pixels 11B in one unit form one group, and all the pixels 11G in one unit form one group. Therefore, in the following, all the pixels 11R and all the pixels 11B in the unit to which the scanning lines WSL (n) and WSL (n + 1) are connected are in the first group, and all the pixels 11G in the unit are connected. Is in the second group. Further, all the pixels 11R and all the pixels 11B in the unit to which the scanning lines WSL (n + 2) and WSL (n + 3) are connected are in the third group, and all the pixels 11G in the unit are the fourth. Suppose you are a group.

  The drive circuit 20 performs Vth correction on all the groups (first and second groups) in one unit at the same time, and then writes the signal voltage (and μ correction) in all the units in the unit. For each group (first and second groups). Thereafter, the drive circuit 20 performs Vth correction on all the groups (third and fourth groups) in the next unit at the same time, and then writes the signal voltage (and μ correction) to the unit. It carries out in order for every group with respect to all the groups (3rd and 4th group). At this time, the drive circuit 20 performs Vth correction for one unit within one horizontal period (1H), and then writes signal voltage (and μ correction) within the next one horizontal period (1H). I do. That is, the drive circuit 20 performs Vth correction and signal voltage writing (and μ correction) for one unit using two horizontal periods (2H) continuously.

  Further, when the signal writing is performed for each group, the driving circuit 20 simultaneously performs the signal writing for all the pixels 11 included in the group. Specifically, when the scanning line WSL (n) is selected, the drive circuit 20 outputs the voltage V (n) described above to each signal line DTL. That is, when the scanning line WSL (n) is selected, the driving circuit 20 performs Vsig (Vsig (n, Ns)) of the n-th pixel row with respect to the even-numbered signal line DTL (DTL (m), DTL (m + 2)). m), Vsig (n, m + 2)) and simultaneously output voltages Vsig (Vsig (n + 1, m + 1), Vsig () corresponding to n + 1 pixel rows with respect to odd-numbered signal lines DTL (m + 1), DTL (m + 3). n + 1, m + 3)) is output. Further, when the scanning line WSL (n + 1) is selected, the driving circuit 20 has the Vsig (Vsig (n + 1, +1,)) of the (n + 1) th pixel row with respect to the even-numbered signal line DTL (DTL (m), DTL (m + 2)). m), Vsig (n + 1, m + 2)) and simultaneously output voltages Vsig (Vsig (n, m + 1), Vsig () corresponding to n pixel rows with respect to odd-numbered signal lines DTL (m + 1), DTL (m + 3). n, m + 3)) is output.

  As a result, in each pixel 11R of the same color, the period from the end of Vth correction to the start of μ correction (so-called waiting time Δt1) matches, so the waiting time Δt1 in the plurality of pixels 11R is equal to the pixel row. Match every. In the present embodiment, the waiting time Δt2 of each pixel 11B is equal to the waiting time Δt1 of each pixel 11R. Therefore, the waiting time Δt2 also matches in each pixel 11B of the same color, so the waiting times Δt2 in the plurality of pixels 11B match for each pixel row. Furthermore, since the waiting time Δt3 is the same for each pixel 11G of the same color, the waiting time Δt3 for the plurality of pixels 11G is the same for each pixel row. Note that the waiting times Δt1 and Δt2 of the pixels 11R and 11B and the waiting time Δt3 of the pixel 11G are different from each other, but this only affects the color reproducibility slightly and does not affect the color unevenness.

[effect]
Next, the effect in the display apparatus 1 of this Embodiment is demonstrated.

  FIG. 8 shows an example of a pixel arrangement generally used conventionally. Conventionally, the pixels 11R, 11G, and 11B included in the display pixel 14 are connected to a common scanning line WSL (n) and a power supply line DSL (n). In the case of such a pixel arrangement, for example, as shown in FIG. 9, when Vth correction and signal writing are performed every 1H period, the 1H period is shortened and the scanning period per 1F is shortened. It was difficult to achieve high speed driving. Therefore, for example, as shown in FIG. 10, after Vth correction is performed for two lines in a common 1H period, signal writing is performed for each line in the next 1H period. This driving method is suitable for high-speed driving because Vth correction is bundled. However, the waiting period Δt from the end of Vth correction to the start of signal writing varies from line to line. For this reason, even when a signal voltage of the same gradation is applied to the gates of the driving transistors of the respective lines, there is a problem in that the light emission luminance varies from line to line, resulting in luminance unevenness.

  On the other hand, in the present embodiment, each scanning line WSL used for selecting each pixel 11 is connected to a plurality of pixels 11 having the same emission color within one unit. Further, each power supply line DSL used for supplying drive current to each pixel 11 is connected to all the pixels 11 in one unit. Thus, as described above, Vth correction is performed on all groups in one unit at the same time, and then signal voltage writing is performed on all groups in one unit for each group. Can do. As a result, in each pixel 11 of the same color, the waiting time from the end of Vth correction to the start of μ correction matches, so the waiting time in the pixel 11 of the same color matches for each line. Therefore, it is possible to reduce the occurrence of luminance unevenness due to the bundled Vth correction.

<2. Modification>
Below, the various modifications of the display apparatus 1 of the said embodiment are demonstrated. In the following description, the same reference numerals are given to components common to the display device 1 of the above embodiment. Furthermore, description of components common to the display device 1 of the above embodiment is omitted as appropriate.

[Modification 1]
In the above embodiment, the layout of each pixel may be, for example, as shown in FIG. In FIG. 11, each scanning line WSL (WSL (n) to WSL (n + 3)) has the same number of branches (that is, two branches) as the number of pixel rows included in one unit. . In each scanning line WSL (WSL (n) to WSL (n + 3)), the branches are connected to each other in the display panel 10. The connection point C1 between the branches may be in the display area 10A, or may be in the periphery (frame area) of the display area 10A. Further, when viewed from the normal direction of the display panel 10, each scanning line WSL intersects with another scanning line WSL in the same unit. Further, in FIG. 11, each power supply line DSL (DSL (j), DSL (j + 1)) also has the same number of branches (that is, two branches) as the number of pixel rows included in one unit. Have. In each power supply line DSL (DSL (j), DSL (j + 1)), the branches are connected to each other within the display panel 10. The connecting point C2 between the branches may be in the display area 10A, or may be in the periphery (frame area) of the display area 10A. In this way, by providing branches to each scanning line WSL and each power supply line DSL, the interval between each scanning line WSL and the interval between each power supply line DSL can be increased. As a result, the wiring layout becomes easy.

[Modification 2]
In the above embodiment, the display pixel 14 is configured by the three types of pixels 11R, 11G, and 11B having different emission colors. However, the display pixel 14 may be configured by four or more types of pixels 11 having different emission colors. . For example, as shown in FIG. 12, the display pixel 14 may be configured by four types of pixels 11R, 11G, 11B, and 11W having different emission colors. At this time, the number of types of emission colors is four. Here, the pixel 11W is a pixel that emits white light, and has the same configuration as the other pixels 11R, 11G, and 11B. In this modification, a pixel 11Y that emits yellow light may be provided instead of the pixel 11W. Each display pixel 14 has a so-called tiled arrangement. That is, the four types of pixels 11R, 11G, 11B, and 11W are arranged in a grid pattern in the display pixel 14.

  In this modification, one pixel row is considered based on the display pixel 14. A plurality of scanning lines WSL are assigned to each unit when two pixel rows are taken as one unit. Therefore, the number of scanning lines WSL included in one unit is two. The total number of scanning lines WSL is equal to the total number of pixel rows and is N. Each scanning line WSL is connected to a plurality of pixels 11 of the same emission color within one unit. Specifically, in the two scanning lines WSL (n) and WSL (n + 1) included in one unit, the scanning line WSL (n) is connected to the two types of light emitting color pixels 11R and 11G included in one unit. The scanning lines WSL (n + 1) are connected to two types of light emitting color pixels 11B and 11W included in one unit. Each scanning line WSL is connected to all the pixels 11 having the same emission color in one unit. Specifically, in the two scanning lines WSL (n) and WSL (n + 1) included in one unit, the scanning line WSL (n) is connected to all the pixels 11R and all the pixels 11G in one unit. The scanning line WSL (n + 1) is connected to all the pixels 11B and all the pixels 11W in one unit.

  A plurality of power supply lines DSL are assigned to each unit. Therefore, the number of power supply lines DSL included in one unit is one. The total number of power supply lines DSL corresponds to half of the total number of pixel rows, and is J (= N / 2). Each power supply line DSL is connected to all the pixels 11 in one unit. Specifically, one power supply line DSL included in one unit is connected to all the pixels 11 (11R, 11G, 11B, 11W) included in one unit.

  A plurality of signal lines DTL are assigned for each display pixel 14 in each pixel row. Of the two signal lines DTL assigned to each display pixel 14 in each pixel row, one signal line DTL is connected to the two types of light emitting color pixels 11 that do not share the scanning line WSL, and the other The signal line DTL is also connected to the pixels 11 of two kinds of emission colors that do not share the scanning line WSL. Specifically, first, among the plurality of display pixels 14 included in the nth and n + 1th pixel rows, two display pixels 14 adjacent to each other in the column direction (that is, the rows are different from each other in one unit). Attention is paid to two display pixels 14) adjacent to each other. Two signal lines DTL (m) and DTL (m + 2) are assigned to the display pixel 14 included in the nth pixel row of the two display pixels 14. Note that the number of signal lines DTL is equal to the number of pixels 11 included in one pixel row, and is M (M is a multiple of 4).

  Among the two signal lines DTL (m) and DTL (m + 2), one signal line DTL (m) is connected to the two types of light emitting color pixels 11R and 11G that do not share the scanning line WSL. The other signal line DTL (m + 2) is connected to the pixels 11B and 11W of two kinds of emission colors that do not share the scanning line WSL. Further, two signal lines DTL (m + 1) and DTL (m + 3) are assigned to the display pixels 14 included in the pixel row of the (n + 1) th row among the two display pixels 14. In the two signal lines DTL (m + 1) and DTL (m + 3), one signal line DTL (m + 1) is connected to pixels 11R and 11G of two kinds of emission colors that do not share the scanning line WSL. The other signal line DTL (m + 3) is connected to the pixels 11B and 11W of two kinds of emission colors that do not share the scanning line WSL.

  That is, in two display pixels 14 that are different from each other in one unit and are adjacent to each other, two signal lines DTL (m) and DTL (m + 2) in even-numbered columns are provided for one display pixel 14. Two signal lines DTL (m + 1) and DTL (m + 3) in the odd-numbered columns are assigned to the other display pixel 14. Further, in two display pixels 14 having different rows in one unit and adjacent to each other, the combinations of the emission colors of the two types of emission pixels 11 sharing the scanning line WSL are equal to each other. This minimizes the total number of signal lines DTL.

  By the way, in this modification, the drive circuit 20 performs the drive similar to the said embodiment. As a result, in each pixel 11 of the same color, the waiting time from the end of Vth correction to the start of μ correction matches, so the waiting time in the plurality of pixels 11 of the same color matches for each pixel row.

  Next, effects of the display device 1 according to this modification will be described. In this modification, each scanning line WSL used for selecting each pixel 11 is connected to a plurality of pixels 11 of the same emission color in one unit, as in the above embodiment. Further, each power supply line DSL used for supplying drive current to each pixel 11 is connected to all the pixels 11 in one unit. As a result, after Vth correction is performed on all groups in one unit at the same time, signal voltage can be written on all groups in one unit for each group. As a result, in each pixel 11 of the same color, the waiting time from the end of Vth correction to the start of μ correction matches, so the waiting time in the pixel 11 of the same color matches for each line. Therefore, it is possible to reduce the occurrence of luminance unevenness due to the bundled Vth correction.

<3. Application example>
Hereinafter, application examples of the display device 1 described in the above embodiment will be described. The display device 1 according to the above embodiment is a television device, a digital camera, a notebook personal computer, a mobile terminal device such as a mobile phone, or a video camera, such as an externally input video signal or an internally generated video signal. The present invention can be applied to display devices for electronic devices in various fields that display images or videos.

(Application example 1)
FIG. 13 illustrates an appearance of a television device to which the display device 1 of the above embodiment is applied. The television apparatus has, for example, a video display screen unit 300 including a front panel 310 and a filter glass 320, and the video display screen unit 300 is configured by the display device 1 according to the above embodiment. .

(Application example 2)
FIG. 14 shows the appearance of a digital camera to which the display device 1 of the above embodiment is applied. The digital camera includes, for example, a flash light emitting unit 410, a display unit 420, a menu switch 430, and a shutter button 440. The display unit 420 is configured by the display device 1 according to the above embodiment. Yes.

(Application example 3)
FIG. 15 shows the appearance of a notebook personal computer to which the display device 1 of the above embodiment is applied. The notebook personal computer has, for example, a main body 510, a keyboard 520 for inputting characters and the like, and a display unit 530 for displaying an image. The display unit 530 is a display device according to the above embodiment. 1.

(Application example 4)
FIG. 16 shows the appearance of a video camera to which the display device 1 of the above embodiment is applied. This video camera has, for example, a main body 610, a subject photographing lens 620 provided on the front side surface of the main body 610, a start / stop switch 630 at the time of photographing, and a display 640. Reference numeral 640 denotes the display device 1 according to the above embodiment.

(Application example 5)
FIG. 17 shows the appearance of a mobile phone to which the display device 1 of the above embodiment is applied. For example, the mobile phone is obtained by connecting an upper housing 710 and a lower housing 720 with a connecting portion (hinge portion) 730, and includes a display 740, a sub-display 750, a picture light 760, and a camera 770. Yes. The display 740 or the sub-display 750 is configured by the display device 1 according to the above embodiment.

  While the present technology has been described with the embodiment and application examples, the present technology is not limited to the above-described embodiment and the like, and various modifications are possible.

  For example, in the above embodiment and the like, the configuration of the pixel circuit 12 for active matrix driving is not limited to that described in each of the above embodiments, and a capacitor and a transistor may be added as necessary. In that case, necessary drive circuits may be added in addition to the signal line drive circuit 23, the scanning line drive circuit 24, the power supply line drive circuit 25, and the like described above in accordance with the change of the pixel circuit 12.

For example, this technique can take the following composition.
(1)
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings that are assigned to each unit and are used to supply drive current to each pixel;
Each first wiring is connected to a plurality of sub-pixels of the same emission color within one unit,
Each second wiring is connected to all sub-pixels in one unit display panel.
(2)
The number of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors,
Each 1st wiring is connected to all the sub pixels of the same luminescent color within 1 unit. The display panel as described in (1).
(3)
The number of pixel rows included in one unit is 2,
The number of luminescent color types is 3,
The display panel according to (2), wherein one of the two first wirings included in one unit is connected to two types of light emitting sub-pixels in one unit.
(4)
The display panel includes a plurality of third wirings assigned to each pixel in each pixel row and used to supply each pixel with a signal voltage corresponding to the video signal.
One of the two third wirings assigned to each pixel in each pixel row is connected to two types of light emission color sub-pixels that do not share the first wiring. Display panel as described.
(5)
The number of pixel rows included in one unit is 2,
The number of luminescent color types is 4,
The display panel according to (2), wherein one of the two first wirings included in one unit is connected to two types of light emitting sub-pixels in one unit.
(6)
The display panel includes a plurality of third wirings assigned to each pixel and used for supplying a signal voltage corresponding to a video signal to each pixel.
The display panel according to (5), wherein one of the two third wirings assigned to each pixel is connected to two types of light emission color sub-pixels in which the first wiring is not shared. .
(7)
Each first wiring has the same number of branches as the number of pixel rows included in one unit,
In each first wiring, the branches are connected to each other in the display panel. (1) The display panel according to any one of (6).
(8)
The display according to any one of (1) to (7), wherein each first wiring intersects with another first wiring in the same unit when viewed from the normal direction of the display panel. panel.
(9)
Each subpixel includes a light emitting element, a driving circuit that drives the light emitting element, and a writing circuit that writes a signal voltage corresponding to a video signal to the driving circuit,
The drive circuit includes a drive transistor connected in series to the light emitting element, and a storage capacitor that holds a gate-source voltage of the drive transistor,
The write circuit includes a write transistor connected to a gate of the drive transistor;
Each first wiring is connected to the gate of the write transistor,
Each of the second wirings is connected to the source or drain of the driving transistor. (1) The display panel according to any one of (7).
(10)
A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one assigned to each unit and used to supply drive current to each pixel;
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each second wiring is connected to all the subpixels in one unit and the drive circuit.
(11)
Each subpixel includes a light emitting element, a driving transistor connected in series to the light emitting element, and a writing transistor that writes a signal voltage corresponding to a video signal to the gate of the driving transistor;
Each first wiring is connected to the gate of the write transistor,
The display device according to (10), wherein each second wiring is connected to a source or a drain of the driving transistor.
(12)
If all the subpixels in one unit are grouped for each connected first wiring,
The drive circuit performs Vth correction for bringing the gate-source voltage of the drive transistor close to the threshold voltage of the drive transistor at the same time for all groups in one unit, and then writes the signal voltage. The display device according to (11), wherein the display is performed for each group for all groups in one unit.
(13)
A display device,
The display device
A display panel;
A drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one assigned to each unit and used to supply drive current to each pixel;
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each second wiring is an electronic device connected to all the subpixels in one unit and the driving circuit.
(14)
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings that are assigned to each unit and are used to supply drive current to each pixel;
Each first wiring is connected to a plurality of sub-pixels of the same emission color within one unit,
Each second wiring is connected to all subpixels in one unit,
Each subpixel includes a light emitting element, a driving transistor connected in series to the light emitting element, and a writing transistor that writes a signal voltage corresponding to a video signal to the gate of the driving transistor,
Each first wiring is connected to the gate of the write transistor,
In the display panel in which each second wiring is connected to the source or drain of the driving transistor,
If all the subpixels in one unit are grouped for each connected first wiring,
After performing Vth correction for bringing the gate-source voltage of the driving transistor close to the threshold voltage of the driving transistor for all the groups in one unit at the same time, the signal voltage is written in one unit. A display panel driving method including a step for every group for every group.
(15)
A plurality of pixels including a plurality of sub-pixels having different emission colors,
Each subpixel includes a light emitting element, a driving transistor connected in series to the light emitting element, and a writing transistor that writes a signal voltage corresponding to a video signal to the gate of the driving transistor.
Assuming that a plurality of pixel rows are one unit and all the sub-pixels in one unit are grouped into a plurality of sub-pixels using the emission color as a classification criterion,
After performing Vth correction for bringing the gate-source voltage of the driving transistor close to the threshold voltage of the driving transistor for all the groups in one unit at the same time, the signal voltage is written in one unit. A display panel driving method including a step for every group for every group.

  DESCRIPTION OF SYMBOLS 1 ... Display apparatus, 10 ... Display panel, 10A ... Display area | region, 11 ... Pixel, 12 ... Pixel circuit, 13 ... Organic EL element, 14 ... Display pixel, 20 ... Drive circuit, 20A ... Video signal, 20B ... Synchronization signal, DESCRIPTION OF SYMBOLS 21 ... Timing generation circuit, 21A ... Control signal, 22 ... Video signal processing circuit, 22A ... Video signal, 23 ... Signal line drive circuit, 24 ... Scan line drive circuit, 25 ... Power supply line drive circuit, 300 ... Video display screen part , 310 ... Front panel, 320 ... Filter glass, 410 ... Light emitting part, 420, 530, 640 ... Display part, 430 ... Menu switch, 440 ... Shutter button, 510 ... Main body, 520 ... Keyboard, 610 ... Main body part, 620 ... Lens, 630 ... start / stop switch, 710 ... upper housing, 720 ... lower housing, 730 ... connecting portion, 740 ... display 750 ... Sub-display, 760 ... Picture light, 770 ... Camera, C1, C2 ... Connection point, Cs ... Retention capacitor, DTL ... Signal line, DSL ... Power line, GND ... Ground line, Ids ... Current, Tr1 ... Drive transistor, Tr2: write transistor, Vcc, Vofs, Von, Vsig, Vss ... voltage, Vg ... gate voltage, Vgs ... gate-source voltage, Voled ... voltage of organic EL element, Vs ... source voltage, Vth ... threshold voltage, WSL ... scanning line, Δt, Δt1, Δt2, Δt3 ... waiting time.

Claims (15)

A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings that are assigned to each unit and are used to supply drive current to each pixel;
Each first wiring is connected to a plurality of sub-pixels of the same emission color within one unit,
Each second wiring is connected to all subpixels in one unit ,
The number k of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors.
Each first wiring is connected to all subpixels of the same emission color within one unit.
The number k of pixel rows included in one unit is 2,
The number of luminescent color types is 3,
One of the two first wirings included in one unit is a display panel connected to two types of light emitting sub-pixels in one unit . The display panel includes a plurality of third wirings assigned to each pixel in each pixel row and used to supply each pixel with a signal voltage corresponding to the video signal.
One of the wiring, the display panel according to claim 1, wherein the first wiring is connected to the two kinds of emission colors of the sub-pixels that are not shared among the third wirings two assigned to each pixel . A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
With
Each first wiring is connected to a plurality of sub-pixels of the same emission color within one unit,
Each second wiring is connected to all subpixels in one unit,
The number k of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors.
In each first wiring, the number k of pixel rows included in one unit connected to all subpixels of the same emission color in one unit is 2,
The number of luminescent color types is 4,
One of the two first wirings included in one unit is connected to two types of light emission sub-pixels in one unit.
Display panel . The display panel includes a plurality of third wirings assigned to each pixel and used for supplying a signal voltage corresponding to a video signal to each pixel.
One wire of the third wiring two assigned to each pixel in each pixel row, to claim 3, wherein the first wiring is connected to the two kinds of emission colors of the sub-pixels that are not shared Display panel as described. A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
With
Each first wiring is connected to a plurality of sub-pixels of the same emission color within one unit,
Each second wiring is connected to all subpixels in one unit,
Each first wiring has the same number of branches as the number k of pixel rows included in one unit,
In each first wiring, each branch is connected to each other in the display panel.
Display panel . A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
With
Each first wiring is connected to a plurality of sub-pixels of the same emission color within one unit,
Each second wiring is connected to all subpixels in one unit,
When viewed from the normal direction of the display panel, each first wiring intersects with the other first wiring in the same unit.
Display panel . Each subpixel includes a light emitting element, a driving circuit that drives the light emitting element, and a writing circuit that writes a signal voltage corresponding to a video signal to the driving circuit,
The drive circuit includes a drive transistor connected in series to the light emitting element, and a storage capacitor that holds a gate-source voltage of the drive transistor,
The write circuit includes a write transistor connected to a gate of the drive transistor;
Each first wiring is connected to the gate of the write transistor,
The display panel according to claim 1, wherein each second wiring is connected to a source or a drain of the driving transistor. A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one assigned to each unit and used to supply drive current to each pixel;
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each second wiring is connected to all the subpixels in one unit and the driving circuit ,
The number k of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors.
Each first wiring is connected to all subpixels of the same emission color within one unit.
The number k of pixel rows included in one unit is 2,
The number of luminescent color types is 3,
A display device in which one of the two first wirings included in one unit is connected to sub-pixels of two types of light emission colors in one unit . A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one assigned to each unit and used to supply drive current to each pixel;
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each second wiring is connected to all the subpixels in one unit and the driving circuit ,
The number k of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors.
Each first wiring is connected to all subpixels of the same emission color within one unit.
The number k of pixel rows included in one unit is 2,
The number of luminescent color types is 4,
One of the two first wirings included in one unit is connected to two types of light emission sub-pixels in one unit.
Display device . A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
Have
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each second wiring is connected to all the subpixels in one unit and the driving circuit,
Each first wiring has the same number of branches as the number k of pixel rows included in one unit,
In each first wiring, each branch is connected to each other in the display panel.
Display device . A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
Have
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each second wiring is connected to all the subpixels in one unit and the driving circuit,
When viewed from the normal direction of the display panel, each first wiring intersects with the other first wiring in the same unit.
Display device . A display device,
The display device
A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one assigned to each unit and used to supply drive current to each pixel;
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
The number k of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors.
Each first wiring is connected to all subpixels of the same emission color within one unit ,
The number k of pixel rows included in one unit is 2,
The number of luminescent color types is 3,
One of the two first wirings included in one unit is connected to two types of light emission sub-pixels in one unit.
Electronic equipment . A display device,
The display device
A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
Have
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
The number k of pixel rows included in one unit is not less than 2 and not more than the number of types of emission colors.
Each first wiring is connected to all subpixels of the same emission color within one unit,
The number k of pixel rows included in one unit is 2,
The number of luminescent color types is 4,
One of the two first wirings included in one unit is connected to two types of light emission sub-pixels in one unit.
Electronic equipment . A display device,
The display device
A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
Have
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
Each first wiring has the same number of branches as the number k of pixel rows included in one unit,
In each first wiring, each branch is connected to each other in the display panel.
Electronics. A display device,
The display device
A display panel and a drive circuit for driving the display panel;
The display panel is
A plurality of pixels including a plurality of sub-pixels having different emission colors;
When k (k ≧ 2) pixel rows are defined as one unit, a plurality of first wirings assigned k per unit and used for selecting each pixel;
A plurality of second wirings, one for each unit, and used for supplying drive current to each pixel;
Have
Each first wiring is connected to a plurality of subpixels of the same emission color in one unit and the drive circuit,
When viewed from the normal direction of the display panel, each first wiring intersects with the other first wiring in the same unit.
Electronic equipment .

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