JP5877018B2 - Audio signal processing circuit, audio system using the same, and electronic equipment - Google Patents

Description

  The present invention relates to a signal processing circuit that performs signal processing on an audio signal.

  In an in-vehicle audio system, a home audio system, a TV conference system, an audio system such as a hands-free phone or a television, and an electronic device having an audio playback function, a mixing process for mixing a plurality of audio signals is performed. For example, in an in-vehicle audio system, a main audio signal from a CD player, a silicon audio player, or a radio is reproduced from a speaker. When the car navigation system generates a sub audio signal for voice guidance, the sub audio signal is mixed with the main audio signal and output from the speaker.

JP 2002-169567 A

As a result of studies on such an audio system, the present inventor has recognized the following problems.
In audio systems, sub-audio signals do not always occur and there is a silence condition. If the mixing function is activated even when the sub audio signal is silent, the noise mixed in the sub audio signal is amplified by the mixer, or the sound quality output from the speakers and headphones deteriorates due to the noise generated by the mixer itself. There is a problem.

  The present invention has been made in view of such problems, and an exemplary object of an aspect thereof is to improve sound quality reproduced from an audio system or an electronic device.

  One embodiment of the present invention relates to an audio signal processing circuit. The audio signal processing circuit includes a main input terminal to which a main audio signal is input, a mix input terminal to which a sub audio signal to be mixed with the main audio signal is input, an adder for adding the main audio signal and the sub audio signal, A selector that receives the output signal of the adder and the main audio signal and selects and outputs one; an output terminal for outputting the signal selected by the selector; and a level of the sub audio signal as a predetermined threshold value. By comparing, it is determined whether or not a sub audio signal is input, the selector selects the output signal of the adder in the sub audio signal input state, and the selector selects the main audio signal in the non-input state of the sub audio signal. And a control unit, integrated on a single semiconductor substrate. That.

According to this aspect, the audio signal processing circuit autonomously determines whether or not a sub audio signal is input without receiving external control, and when the sub audio signal is not input, the selector selects the main audio signal. By making the selection, the mixing function can be stopped. Since the main audio signal output when the mixing function is stopped does not pass through the adder, the influence of noise is reduced and the sound quality can be improved.
Note that “integrated integration” includes the case where all the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated, and is used for adjusting circuit constants. Part of the resistors, capacitors, and the like may be provided outside the semiconductor substrate.

The audio signal processing circuit according to an aspect may further include a first amplifier that is provided before the adder and amplifies the main audio signal with a variable gain. The control unit may reduce the gain of the first amplifier to a predetermined level in the input state of the sub audio signal.
According to this aspect, it is possible to autonomously change the level of the main audio signal in the mixing state and the non-mixing state without receiving external control.

  The control unit generates an upper comparator that generates a first comparison signal that is at a predetermined level when the sub audio signal is higher than the upper threshold, and a second that is at the predetermined level when the sub audio signal is lower than the lower threshold. The lower comparator that generates the comparison signal, the logic gate that generates the detection signal corresponding to the logical sum of the first comparison signal and the second comparison signal, and the detection signal continuously differ from the predetermined level for a predetermined determination period. A determination unit that determines that the sub audio signal is not input when the level is maintained.

  The control unit may include a counter that is reset each time the detection signal reaches a predetermined level and that performs a counting operation while the detection signal takes a level different from the predetermined level. The determination unit may determine that the sub audio signal is in an input state when the count value of the counter reaches a predetermined value.

  Another embodiment of the present invention relates to an audio system or an electronic device. The audio system or electronic device includes a first sound source that generates a main audio signal, a second sound source that generates a sub audio signal, a main audio signal, an audio signal processing circuit that receives the sub audio signal, and an audio signal processing circuit. And an electroacoustic transducer driven by an audio signal output from the computer.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  The signal amplification circuit according to the present invention can improve sound quality.

It is a block diagram which shows the structure of the signal processing circuit which concerns on embodiment. It is a wave form diagram which shows the input determination of the sub audio signal by a control part. It is a wave form diagram which shows operation | movement of the signal processing circuit of FIG.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

  In this specification, “the state in which the member A and the member B are connected” means that the member A and the member B are physically directly connected, or the member A and the member B are electrically connected to each other. It includes a case where the connection state is not indirectly affected, or the connection and the connection are indirectly made through other members that do not impair the functions and effects achieved by the connection. Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as their electric It includes cases where the connection is indirectly made through other members that do not substantially affect the general connection state, or that do not impair the functions and effects achieved by their combination.

  FIG. 1 is a block diagram showing a configuration of a signal processing circuit 100 according to the embodiment. The signal processing circuit 100 adjusts and amplifies the volume of the audio signal, performs band correction, and outputs the resultant signal to an electroacoustic transducer (hereinafter referred to as a speaker SP) including a subsequent speaker and headphones. The signal processing circuit 100 constitutes the audio system 2 together with the first sound source 4a, the second sound source 4b, the amplifier 6, and the speaker SP.

  The audio system 2 is an in-vehicle audio system, for example. The first sound source 4a is an in-vehicle CD player, an in-vehicle DVD player, a mobile phone or a mobile audio player, and generates the main audio signal S1. In the present embodiment, the audio signal is assumed to be monaural for the purpose of easy understanding and simplification of description, but in reality it may be a stereo audio signal. It will be understood by those skilled in the art that in the case of stereo, the same configuration as that of FIG. 1 is provided for each of the L channel and the R channel.

  The second sound source 4b is a car navigation system or the like, and generates a sub audio signal S2. For example, the sub audio signal S2 is a signal for voice guidance.

  The signal processing circuit 100 receives the main audio signal S1 at the main input terminal P1 and the sub audio signal S2 at the mix input terminal P2. The signal processing circuit 100 performs predetermined signal processing on each of the main audio signal S1 and the sub audio signal S2, mixes them, and outputs them from the output terminal P3. The signal processing circuit 100 is a functional IC (Integrated Circuit) integrated on a single semiconductor substrate, and is also called ASP (Audio Signal Processor, Audio Sound Processor, Analog Sound Processor).

  The amplifier 6 amplifies the audio signal S4 output from the signal processing circuit 100 and drives the speaker SP. The amplifier 6 may be configured as a part of the signal processing circuit 100.

  The signal processing circuit 100 includes an adder 10, a selector 20, a control unit 30, a first amplifier 40, and a second amplifier 42.

  The first amplifier 40 is a variable gain amplifier, and amplifies the main audio signal S1 input to the main input terminal P1 with a set gain g1. In this specification, “amplification” is a concept including not only the case where the gain is greater than 1, but also the case where the gain is 1, and further includes an attenuation smaller than 1. The second amplifier 42 is also a variable gain amplifier, and amplifies the sub audio signal S2 input to the mix input terminal P2 with the set gain g2. The mixing ratio between the main audio signal S1 and the sub audio signal S2 is determined according to the gain g1 and the gain g2.

  The adder 10 adds the main audio signal S1 'amplified by the first amplifier 40 and the sub audio signal S2' amplified by the second amplifier 42. The adder 10 is composed of an analog adder including resistors R1 to R4 and an operational amplifier 12. The configuration of the adder 10 is not particularly limited, and other types of adders may be used.

  The mixed audio signal S3 output from the adder 10 is a signal obtained by mixing the main audio signal S1 'and the sub audio signal S2'. The selector 20 receives the output signal S3 of the adder 10 and the main audio signal S1 ', selects one of them, and outputs it. The audio signal S4 selected by the selector 20 is output from the output terminal P3. The signal processing circuit 100 may include filters and other circuits on the paths of the audio signals S1, S2, S1 ', S2', S3, and S4, but is omitted in FIG.

  When the level of the sub audio signal S2 is greater than a predetermined threshold, that is, when the sub audio signal S2 has a significant level, the control unit 30 outputs the output signal S3 of the adder 10 to the selector 20. Let them choose. On the contrary, when the level of the sub audio signal S2 is smaller than the predetermined threshold value, that is, when the sub audio signal S2 has a non-significant level, in other words, in the silent state, the main audio signal S1 ′ is input to the selector 20. Let them choose.

  The control unit 30 includes an analog unit 30a and a digital unit 30b. The analog unit 30a includes variable voltage sources 32U and 32L, an upper comparator CP1, a lower comparator CP2, and a logic gate OR1.

The variable voltage sources 32U and 32L generate the upper threshold voltage V _{TH_U} and the lower threshold voltage V _{TH_L} , respectively. The upper comparator CP1 compares the voltage level V _S2 of the sub audio signal S2 with the upper threshold voltage V _{TH_U,} and _becomes a predetermined level (high level in this embodiment) when V _S2 > V _{TH_U} . One comparison signal SD_U is generated.
The lower comparator CP2 compares the voltage level of the sub audio signal S2 with the lower threshold voltage V _{TH_L} and generates a second comparison signal SD_L that becomes a predetermined level (high level) when V _S2 <V _{TH_L.} . The logic gate OR1 receives the first comparison signal SD_H and the second comparison signal SD_L, and generates a detection signal SD_OR corresponding to the logical sum of them. The detection signal SD_OR is a predetermined level (high in this embodiment) when at least one of the first comparison signal SD_H and the second comparison signal SD_L is at a high level, that is, when V _S2 > V _{TH_U} or V _S2 <V _{TH_L.} Level).

The digital unit 30 b includes a flip-flop 34, a counter 36, a determination unit 38, and a threshold register 39. The latch (flip-flop) 34 is provided to synchronize the detection signal SD_OR with a clock signal inside the digital unit 30b.
The determination unit 38 determines that the sub audio signal S2 is in a non-input state (silent state) when the detection signal SD_OR continuously maintains a level different from a predetermined level (high level) for a predetermined determination period, that is, a low level. To do. In other cases, it is determined that a significant sub audio signal S2 is input.

  The counter 36 is reset every time the detection signal SD_OR reaches a predetermined level (high level), and performs a counting operation while the detection signal SD_OR takes a level (low level) different from the predetermined level (high level). When the detection signal SD_OR remains at the low level, the counter 36 is not reset and the count value changes. When the count value of the counter 36 reaches a predetermined value, the determination unit 38 determines that the sub audio signal S2 is not input. The predetermined value is determined according to the determination period τ, and the counter 36 functions as a timer.

  The determination unit 38 generates a control signal S5 indicating whether or not the sub audio signal S2 is silent. For example, the control signal S5 is negated in the non-input state (silence state) of the sub audio signal S2, and is asserted in the input state of the sub audio signal S2. Hereinafter, it is assumed that assertion is at a high level and negation is at a low level. When the control signal S5 is negated (low level), the selector 20 selects the main audio signal S1 ′ from the first amplifier 40, and when asserted (high level), the mixed audio signal S3 from the adder 10 is selected. Select.

  Note that noise is generated when the switching operation by the selector 20 is steep. Therefore, it is desirable for the selector 20 to use a switch with a soft switching function that can seamlessly and gently switch between two inputs. As such a switch (selector), for example, a circuit described in JP 2007-325057 A can be used. The configuration of the selector 20 is not particularly limited, and other circuits may be used. The transition time of the input switching of the selector 20 is configured to be switched by a set value of a register (not shown). The user of the signal processing circuit 100, that is, the designer of the audio system 2 rewrites the setting value of the register so that the transition time between the main audio signal S 1 ′ and the mixed audio signal S 3 is optimal for the use of the audio system 2. Can be set to any value.

  Further, according to the detection result of the sub audio signal S2 in the determination unit 38, the control unit 30 generates a control signal S6 that indicates the gain g1 of the first amplifier 40. Specifically, the control unit 30 sets the gain g1 of the first amplifier 40 when the level of the sub audio signal S2 is larger than a predetermined threshold, that is, when the sub audio signal S2 having a significant level is input. Reduce to a predetermined level. As a result, the mixing ratio changes, and even when the main audio signal S1 is being reproduced, the sub audio signal S2 is relatively emphasized, and the user of the audio system 2 can easily hear the sub audio signal S2.

  The control unit 30 may set the gain g2 of the second amplifier 42 to zero and shut down the adder 10 in the non-input state of the sub audio signal S2. Thereby, the noise derived from the sub audio signal S2 or the adder 10 can be cut off at a position closer to the noise source than the selector 20, and the main audio signal S1 ′ and the audio signal are propagated through a path where the noise is not intended. It can prevent mixing in S4.

The threshold value register 39 stores set values of threshold voltages V _{TH_U} and V _{TH_L} to be generated by the variable voltage sources 32U and 32L. The threshold voltages V _{TH_U} and V _{TH_L} of the variable voltage sources 32U and 32L can be changed by the user rewriting the value of the threshold register 39.

  The above is the configuration of the signal processing circuit 100. Next, the operation will be described. FIG. 2 is a waveform diagram showing input determination of the sub audio signal S2 by the control unit 30. As shown in FIG. The vertical and horizontal axes of the waveform diagrams and time charts in this specification are enlarged or reduced as appropriate for easy understanding, and each waveform shown is also simplified for easy understanding. Yes.

Prior to time t0, the sub audio signal S2 having a significant level is input. The voltage level V _S2 of the sub audio signal S2 swings around a certain reference level V _REF . The upper threshold voltage V _{TH_U} is set higher than the reference level V _REF by a voltage width ΔV, and the lower threshold voltage V _{TH_L} is set lower than the reference level V _REF by a voltage width ΔV. As described above, the voltage width ΔV can be changed according to the set value of the threshold value register 39. If the voltage width ΔV is reduced, the detection sensitivity of the sub audio signal S2 is increased, but an error due to noise or the like occurs. If the probability of detection is increased and ΔV is increased, the detection sensitivity of the sub audio signal S2 decreases, but the influence of noise can be reduced. The user can select the optimum voltage width ΔV for the system in which the signal processing circuit 100 is used.

  Before the time t0, during the period in which the sub audio signal S2 is input, the detection signal SD_OR is frequently at the high level, and the low level time of the detection signal SD_OR is short, and thus does not exceed the determination period τ. Therefore, it is determined that the sub audio signal S2 is input, and the control signal S5 is asserted (high level).

  When the input of the sub audio signal S2 is lost at time t0, the detection signal SD_OR transitions to the low level, and then maintains the low level. When the determination period τ is reached at time t1, the control signal S5 is negated. In this way, the control unit 30 detects the non-input state of the sub audio signal S2.

  When the sub audio signal S2 is input while the control signal S5 is negated, the detection signal SD_OR is asserted. When the detection signal SD_OR is asserted, the determination unit 38 immediately asserts the control signal S5 without waiting for the determination period τ. In this way, the control unit 30 detects the input state of the sub audio signal S2. By not waiting for the determination period, the head portion of the sub audio signal S2 can be output from the speaker SP.

  The above is the operation of determining whether or not the sub audio signal S2 is input by the control unit 30. Next, the overall operation of the signal processing circuit 100 will be described. FIG. 3 is a waveform diagram showing the operation of the signal processing circuit 100 of FIG. For easy understanding, the main audio signal S1 and the sub audio signal S2 are shown as sine waves having different frequencies.

  Between times t0 and t1, the sub audio signal S2 is in a non-input state, the control signal S5 is negated, and the selector 20 selects the main audio signal S1 '. Therefore, the audio signal S4 having the same waveform as the main audio signal S1 'is reproduced from the speaker SP.

  At time t1, the second sound source 4b generates the sub audio signal S2. The mixed audio signal S3 is a signal obtained by superimposing the main audio signal S1 and the main audio signal S1 '. When the control signal S5 is asserted, the gain g1 of the first amplifier 40 decreases, and the level of the main audio signal S1 'decreases. The selector 20 gradually switches the output signal S4 from the main audio signal S1 'to the mixed audio signal S3.

When the sub audio signal S2 becomes silent at time t2, the control signal S5 is negated again. Then, the gain g1 of the first amplifier 40 is returned to the original level, and the amplitude of the main audio signal S1 ′ is increased. The selector 20 switches the output signal S4 from the mixed audio signal S3 to the main audio signal S1 ′. As a result, only the main audio signal S1 is output from the speaker SP again. In FIG. 3, the soft switching operation and the determination period τ are omitted.
The above is the operation of the signal processing circuit 100.

Next, advantages of the signal processing circuit 100 will be described. The advantage of the signal processing circuit 100 becomes clear by comparison with a comparative technique.
In the comparative technique, the selector 20 is not provided, and the mixed audio signal S3 is output to the speaker SP regardless of the presence or absence of the sub audio signal S2.

  Consider a situation where noise N1 is mixed in the sub audio signal S2. As shown in FIG. 3, the noise N1 is mixed into the mix input terminal P2 even when the sub audio signal S2 is silent.

  This noise is also superimposed on the mixed audio signal S3 output from the adder 10 as it is. Therefore, noise is superimposed on the mixed audio signal S3 in a non-input state of the sub audio signal S2. Therefore, in the comparative technique, in the silent state of the sub audio signal S2, noise input to the mix input terminal P2 is reproduced from the speaker SP, and the sound quality is deteriorated.

  Even if no noise is superimposed on the sub audio signal S2, noise (not shown) generated by the adder 10 itself is mixed into the mixed audio signal S3. Therefore, in the comparison technique, the noise generated by the adder 10 in the silent state of the sub audio signal S2 is also reproduced from the speaker SP, and the sound quality is deteriorated.

  Even in the comparison technique that does not include the selector 20, the mixing function can be turned off by setting the gain g2 of the second amplifier 42 to zero. In this case, noise mixed in the mix input terminal P2 can be reduced, but the noise generated by the adder 10 is output from the speaker SP, so that the sound quality is deteriorated.

  On the other hand, according to the signal processing circuit 100 of FIG. 1, in the non-input state of the sub audio signal S2, the adder 10 is bypassed and the main audio signal S1 is output straight. Therefore, noise mixed in the mix input terminal P2 and noise generated by the adder 10 are not superimposed on the audio signal S4, and sound quality can be improved.

Furthermore, the signal processing circuit 100 has the following advantages.
Since the signal processing circuit 100 autonomously detects the sub audio signal S2 and switches the selector 20 without relying on a control signal from an external microcomputer, it is possible to prevent sound interruption. In addition, the load on an external microcomputer or the like can be reduced, and the power consumption associated with communication of control signals can be reduced. This advantage becomes clear by comparison with the following comparative technique.

  In the comparative technique, the second sound source 4b outputs a signal indicating whether or not the sub audio signal S2 is in a silent state to the microcomputer. When detecting the silent state of the sub audio signal S2, the microcomputer outputs a signal for turning off the mixing function to the signal processing circuit. In this case, since a microcomputer is interposed, a large control delay occurs, and sound interruption occurs. On the other hand, the signal processing circuit 100 of FIG. 1 can solve the problem of sound interruption. In addition, the load on the microcomputer is reduced, and the power consumption can be reduced.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are within the scope of the present invention. is there. Hereinafter, such modifications will be described.

In the embodiment, the case where the signal processing circuit 100 is used in an in-vehicle audio system has been described. However, the use of the signal processing circuit 100 is not limited thereto, and can be used in various audio systems.
The signal processing circuit 100 can also be mounted on various electronic devices having electroacoustic transducers such as speakers and headphones. For example, in a mobile phone terminal, the present invention can be applied to reproduction of music data and mixing of call voice.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are allowed without departing from the spirit of the present invention.

2 ... audio system, 4a ... first sound source, 4b ... second sound source, 6 ... amplifier, 100 ... signal processing circuit, SP ... speaker, 10 ... adder, 20 ... selector, 30 ... control unit, 30a ... analog unit, 30b: Digital section, 32: Variable voltage source, CP1: Upper comparator, CP2: Lower comparator, OR1: Logic gate, 34: Flip-flop, 36: Counter, 38: Determination section, 39: Threshold register, 40 ... 1st amplifier, 42 ... 2nd amplifier, SD_U ... 1st comparison signal, SD_L ... 2nd comparison signal, SD_OR ... detection signal, P1 ... main input terminal, P2 ... mix input terminal, P3 ... output terminal, S1 ... main audio Signal, S2 ... Sub audio signal, S3 ... Mixed audio signal, S4 ... Audio signal, S5 ... Control signal.

Claims (8)

A main input terminal to which a main audio signal is input;
A mix input terminal to which a sub audio signal to be mixed with the main audio signal is input;
An adder for adding the main audio signal and the sub audio signal;
A selector that receives the output signal of the adder and the main audio signal, and selects and outputs one;
An output terminal for outputting a signal selected by the selector;
By comparing the level of the sub audio signal with a predetermined threshold value, it is determined whether or not the sub audio signal is input, and the selector selects the output signal of the adder in the input state of the sub audio signal. A control unit that causes the selector to select the main audio signal in a non-input state of the sub audio signal;
Integrated on a single semiconductor substrate ,
An audio signal processing circuit , wherein the selector switches the output signal of the adder and the main audio signal seamlessly and gently . A first amplifier provided before the adder for amplifying the main audio signal with a variable gain;
The audio signal processing circuit according to claim 1, wherein the control unit lowers the gain of the first amplifier to a predetermined level in the input state of the sub audio signal. The controller is
An upper comparator that generates a first comparison signal that is at a predetermined level when the sub audio signal is higher than an upper threshold;
A lower comparator that generates a second comparison signal that is at a predetermined level when the sub audio signal is lower than a lower threshold;
A logic gate that generates a detection signal corresponding to a logical sum of the first comparison signal and the second comparison signal;
A determination unit that determines a non-input state of the sub audio signal when the detection signal continuously maintains a level different from the predetermined level for a predetermined determination period;
The audio signal processing circuit according to claim 1 or 2, characterized by comprising: The controller is
A counter that is reset each time the detection signal reaches the predetermined level and performs a counting operation while the detection signal takes a level different from the predetermined level;
The audio signal processing circuit according to claim 3, wherein the determination unit determines that the sub audio signal is in an input state when a count value of the counter reaches a predetermined value.   5. The audio signal processing circuit according to claim 1, further comprising a second amplifier provided in a preceding stage of the adder and amplifying the sub audio signal.   6. The audio signal processing circuit according to claim 5, wherein the control unit reduces the gain of the second amplifier to zero in a non-input state of the sub audio signal. A first sound source for generating a main audio signal;
A second sound source for generating a sub audio signal;
The audio signal processing circuit according to any one of claims 1 to 6, wherein the audio signal processing circuit receives the main audio signal and the sub audio signal.
An electroacoustic transducer driven by an audio signal output from the audio signal processing circuit;
An audio system comprising: A first sound source for generating a main audio signal;
A second sound source for generating a sub audio signal;
The audio signal processing circuit according to any one of claims 1 to 6, wherein the audio signal processing circuit receives the main audio signal and the sub audio signal.
An electroacoustic transducer driven by an audio signal output from the audio signal processing circuit;
An electronic device comprising:

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