JP5862177B2 - Nitride semiconductor device - Google Patents

Description

  The present invention relates to a nitride semiconductor device, and more particularly to a nitride semiconductor device having a current diffusion layer in a p-side nitride semiconductor layer.

  In recent years, in the field of semiconductor light emitting devices, the chip size tends to increase with the demand for high luminous flux. However, since the resistance of the p-side nitride semiconductor layer is relatively high, current does not flow to every corner of the chip, and there is a problem in electrostatic withstand voltage characteristics. It is known that the current diffusibility is improved by providing the auxiliary electrode on the upper surface side of the semiconductor layer. On the other hand, when the light is extracted from the chip to the outside, the auxiliary electrode itself absorbs light, and the chip The merit of high luminous flux due to the increase in size was impaired.

International Publication No. 2008/117788 JP 2002-208732 A JP 2008-109066 A

  Accordingly, an object of the present invention is to provide a nitride semiconductor light emitting device having improved current diffusivity in a p-side nitride semiconductor layer in order to solve the above-described problems.

The nitride semiconductor device of the present invention is
A nitride semiconductor device in which an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer are sequentially stacked on a substrate,
The p-type nitride semiconductor layer has a p-type contact layer and an AlN layer having a composition different from that of the p-type contact layer, and the p-type contact layer and the AlN layer are in contact with each other. .

  The thickness of the AlN layer is preferably 1 nm to 10 nm.

  The nitride semiconductor device of the present invention may further include a p-side cladding layer between the AlN layer and the active layer, and an undoped GaN layer between the AlN layer and the p-side cladding layer. It's okay.

  The nitride semiconductor device of the present invention may further include a p-type GaN layer between the AlN layer and the active layer, and the AlN layer and the p-type GaN layer may be in contact with each other.

  Furthermore, in the nitride semiconductor device of the present invention, the p-type GaN layer and the undoped GaN layer may be in contact with each other.

  When the p-type contact layer is in contact with an AlN layer (hereinafter also referred to as a p-side AlN layer) having a composition different from that of the p-type contact layer (that is, having a different band gap), a voltage is applied to the nitride semiconductor element. A piezoelectric field due to a difference in lattice constant is generated at the interface between the p-type contact layer and the p-side AlN layer. Thereby, carrier mobility (current diffusibility) increases at the interface. By diffusing current at the interface between the p-type contact layer and the p-side AlN layer, the relatively crystalline brittle active layer is protected and the electrostatic withstand voltage characteristics can be improved.

FIG. 1A is a schematic diagram showing a multilayer structure of a nitride semiconductor device according to the first embodiment of the present invention, where FIG. FIG. 2 is a schematic diagram of a laminated structure of a nitride semiconductor device according to the second embodiment of the present invention. FIG. 3 is a schematic diagram of a laminated structure of a nitride semiconductor device according to the third embodiment of the present invention. FIG. 4 is a graph showing the measurement result of carrier mobility at the interface between the undoped GaN layer and the AlN layer.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the embodiments described below are examples for embodying the technical idea of the present invention, and the present invention is not specified as follows. The dimensions, materials, shapes, relative arrangements, and the like of the components described in the embodiments are not intended to limit the scope of the present invention only to specific examples unless otherwise specified. Not too much. Note that the size, positional relationship, and the like of the members shown in each drawing may be exaggerated for clarity of explanation. Furthermore, each element constituting the present invention may be configured such that a plurality of elements are configured by the same member and the plurality of elements are shared by one member, and the function of the one member is shared by the plurality of members. It can also be realized.

(First embodiment)
FIG. 1 shows a schematic diagram of a stacked structure of a conventional nitride semiconductor device (FIG. 1a) and the nitride semiconductor device (FIG. 1b) of the first embodiment of the present invention. The nitride semiconductor device (FIG. 1b) according to the first embodiment of the present invention includes an n-side nitride semiconductor layer containing an n-type impurity such as Si, an active layer 3, and Mg on a substrate 1 made of sapphire. A p-side nitride semiconductor layer 4 containing a p-type impurity is stacked, and a p-side electrode including a p-side translucent electrode 5 a and a p-side pad electrode 5 b is formed on the p-side nitride semiconductor layer 4. . The n-side nitride semiconductor layer includes an n-type contact layer 2. The n-side nitride semiconductor layer may include layers other than the n-type contact layer 2. An n-side electrode 6 is formed on the surface of the n-type contact layer 2 exposed by etching away a part of the nitride semiconductor layer from the p-side nitride semiconductor layer 4. In the p-side nitride semiconductor layer 4, a p-side cladding layer 4a, a p-side AlN layer 4c, and a p-type contact layer 4b are stacked in order from the active layer side, and the p-side AlN layer 4c is a p-type contact layer 4b. And the composition is different. The p-side cladding layer 4a according to the present invention is a layer for confining electrons and supplying holes to the active layer (for example, an AlGaN layer doped with Mg), and is different from the p-side AlN layer 4c. The layer has almost no current spreading effect.

  The p-type contact layer 4b and the p-side AlN layer 4c have different compositions, and therefore have different lattice constants. Therefore, when a voltage is applied to the nitride semiconductor element, a piezoelectric field due to a lattice constant difference is generated at the interface between the p-type contact layer 4b and the p-side AlN layer 4c. This increases carrier mobility at the interface, and current is diffused laterally (ie, holes are diffused laterally) at the interface. Compared with the conventional nitride semiconductor device shown in FIG. 1a, how the current is diffused in the nitride semiconductor device of the present invention is schematically shown by arrows in FIG. 1b. Since current is diffused at the interface between the p-type contact layer 4b and the p-side AlN layer 4c, current is not concentratedly injected into a part of the p-side cladding layer 4a and the active layer 3, and relatively The crystalline brittle p-side cladding layer 4a and the active layer 3 are protected, and the electrostatic withstand voltage characteristics are improved. Furthermore, by promoting the diffusion of holes in the lateral direction at the interface between the p-type contact layer 4b and the p-side AlN layer 4c, recombination of electrons and holes in a wider area of the active layer 3, That is, light emission occurs and light extraction efficiency can be improved. Since the p-side AlN layer 4c can grow a semiconductor crystal with a stable mixed crystal ratio, the current can be diffused uniformly without partial concentration.

The thickness of the p-side AlN layer 4c is preferably 1 nm to 10 nm, more preferably 1 nm to 5 nm, and still more preferably 1 nm to 3 nm. When the thickness of the p-side AlN layer 4c is 1 nm or more, the increase in carrier mobility at the interface between the p-side AlN layer 4c and the p-type contact layer 4b is remarkable, and thus the electrostatic withstand voltage characteristic is efficiently improved. Can be made. Further, when the thickness of the p-side AlN layer 4c is 10 nm or less, the resistance of the p-side AlN layer 4c itself can be suppressed low, and the increase in the forward voltage _Vf can be reduced.

(Second Embodiment)
The semiconductor device according to the second embodiment of the present invention further includes a p-side cladding layer between the p-side AlN layer and the active layer, and an undoped GaN layer between the p-side cladding layer and the p-side AlN layer. It is what has.
The semiconductor element according to the second embodiment of the present invention has a stacked structure as shown in FIG. 2, for example. The semiconductor element according to the second embodiment of the present invention has an undoped GaN layer (hereinafter also referred to as a p-side undoped GaN layer) 4d between the p-side cladding layer 4a and the p-side AlN layer 4c. It has the same structure as the semiconductor element of the first embodiment. The p-side undoped GaN layer 4d is a layer for lowering the sheet resistance of the p-side nitride semiconductor layer 4, and the electrostatic breakdown voltage characteristics can be further improved by diffusing current in the p-side undoped GaN layer 4d. it can.

(Third embodiment)
The semiconductor element according to the third embodiment of the present invention has a p-type GaN layer between the p-side AlN layer and the active layer, and the AlN layer and the p-type GaN layer are in contact with each other. The semiconductor element according to the third embodiment of the present invention may further include a p-side undoped GaN layer, and the p-type GaN layer and the p-side undoped GaN layer may be in contact with each other.
For example, as shown in FIG. 3, the semiconductor device according to the third embodiment of the present invention includes a p-type GaN layer 4b ′ and a p-type contact between a p-type GaN layer 4b ′ and a p-type contact layer 4b ″. The semiconductor device has the same structure as that of the semiconductor device of the first embodiment except that the p-side AlN layer 4c is provided so as to be in contact with both of the layers 4b ″.
The p-type GaN layer in the present embodiment is not limited to GaN, and may be a layer made of AlGaN or InGaN, for example, and is preferably a layer made of the same composition as the p-type contact layer.
Further, a p-side undoped GaN layer (not shown) may be provided between the p-side cladding layer 4a and the p-type GaN layer 4b ′ so as to be in contact with the p-type GaN layer 4b ′. As a result, since the p-type impurity doped in the p-type GaN layer 4b ′ is diffused in a small amount in the p-side undoped GaN layer, the resistance of the p-side undoped GaN layer itself can be kept low, and the forward voltage V _f The electrostatic withstand voltage characteristic can be further improved while reducing the increase in.

  Although the first to third embodiments have been described above, the present invention is not limited to these embodiments, and other embodiments are possible.

  Hereinafter, each configuration of the light-emitting element according to an embodiment of the present invention will be described in detail. However, all the components described below are not essential, and some of them can be omitted or changed.

[substrate]
As the substrate, an insulating substrate such as spinel (MgAl ₂ O ₄ ), a semiconductor substrate such as SiC, ZnS, ZnO, GaAs, and GaN can be used in addition to the C-plane, R-plane, and A-plane of sapphire.

[N-side nitride semiconductor layer]
The configuration of the n-side nitride semiconductor layer will be described below. In the n-side nitride semiconductor layer according to this embodiment, at least a buffer layer, an n-type contact layer, an undoped semiconductor layer, and an n-type multilayer film layer are stacked in order from the substrate side.

(Buffer layer)
First, a buffer layer is formed on the substrate 1. The buffer layer is for relaxing a mismatch in lattice constant between the substrate and the nitride semiconductor and forming a highly crystalline nitride semiconductor layer thereon. The buffer layer can finally be removed or can itself be omitted. The buffer layer is preferably formed by growing AlGaN, GaN, AlN or the like at a temperature of 500 to 800 ° C. to a thickness of 10 to 50 nm.

  A second buffer layer may be further formed on the buffer layer. The second buffer layer has a smaller doping amount of n-type impurities than an n-type contact layer, which will be described later, or a nitride semiconductor not doped with n-type impurities, such as AlGaN, GaN, AlN, etc., than the first buffer layer described above. The film is grown at a high temperature, for example, 800 to 1300 ° C. to a thickness of 0.5 to 3 μm. The second buffer layer has a high crystallinity because the impurity doping amount is small (or zero). Therefore, an n-type contact layer with high crystallinity can be formed thereon.

(N-type contact layer)
An n-type contact layer is formed thereon. The composition of the n-type contact layer is not particularly limited. For example, the n-type contact layer is preferably a layer made of AlGaN or GaN having an Al ratio of 0.2 or less. With such a composition, it is easy to obtain a nitride semiconductor layer with few crystal defects. Specifically, a nitride semiconductor doped with 4.5 × 10 ¹⁸ / cm ^{3 of} an n-type impurity such as Si, for example, GaN, is grown at a temperature of 900 to 1300 ° C. to a thickness of 1 to 10 μm to obtain an n-type. A contact layer is formed.

(Undoped semiconductor layer)
An undoped semiconductor layer is formed on the n-type contact layer. Examples of the undoped semiconductor layer include a layer made of In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). Among them, the undoped semiconductor layer is preferably Al _y Ga _1-xy N or In _x Ga _1-xy N having GaN, x and / or y of 0.2 or less, and further, a layer made of GaN. It is preferable to include. With such a composition, a nitride semiconductor layer with few crystal defects can be easily obtained.
The undoped semiconductor layer may be formed as a single layer, but is preferably formed as a multilayer. When the undoped semiconductor layer is formed in multiple layers, it is not necessary that all the layers be undoped layers that do not contain n-type impurities, and at least one layer may be an undoped layer. In particular, the undoped semiconductor layer is preferably a layer in which undoped layers and doped layers having the same composition are alternately stacked. These alternating lamination layers are, for example, preferably 3 layers or more, and suitably 5 layers or less, and any of the undoped layer and the doped layer may be the lowermost layer and / or the uppermost layer. Good. Specifically, for example, a first layer having a thickness of 100 to 200 nm made of undoped GaN is grown at a temperature of 900 to 1300 ° C., and then Si is 4.5 × 10 ¹⁸ / cm ³ doped thereon. After the second layer having a thickness of 10 to 50 nm is grown and this is repeated twice, undoped GaN is further grown to a thickness of 1 to 10 nm to form an undoped semiconductor layer having a total thickness of 100 to 500 nm. Form. The threshold voltage and the forward voltage are lowered due to the presence of the undoped GaN layer which is not doped with impurities and therefore has high carrier mobility and the layer which is doped with impurities and thus has high carrier concentration. The first layer may be Si-doped GaN having a smaller Si doping amount than the second layer.

In this specification, “undoped” is a layer formed without introducing impurities during film formation, and is diffused from the upper and lower layers after film formation and / or by heat treatment or the like in the manufacturing process to mix impurities. It does not mean the layer that was made. In other words, a layer having an impurity concentration of about 1 × 10 ¹⁷ / cm ³ or less is substantially referred to as an “undoped” layer.

(N-type multilayer film layer)
An n-type multilayer film layer is formed on the undoped semiconductor layer. The n-type multilayer film layer is a nitride semiconductor composed of at least two kinds of elements having different compositions, for example, In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ a layer consisting of x + y ≦ 1). In particular, the n-type multilayer film layer is composed of Al _z Ga _1-z N (0 ≦ z <1) (first layer) and In _p Ga _1-p N (0 <p <1) (second layer). It is preferable that layers having two kinds of compositions are alternately laminated. The first layer is preferably a layer made of GaN with z = 0 because the smaller z, that is, the smaller the aluminum content, the better the crystallinity. The second layer is preferably a layer having p of 0.5 or less, and more preferably a layer having p of 0.2 or less. Among them, as the n-type multilayer film, a first layer is GaN, preferably p in the second layer is 0.2 or less of _{an In} p _{Ga 1-p} N.
Further, the film thickness of the single layer (that is, the first layer or the second layer) constituting the n-type multilayer film is not particularly limited, but it is suitable that the film thickness of at least one kind of single layer is 10 nm or less. 7 nm or less is preferable, and 5 nm or less is more preferable. Specifically, for example, a first layer having a thickness of 1 to 2 nm made of undoped GaN is grown at a temperature of 900 to 1300 ° C., and a thickness 0.5 of an undoped InGaN at a temperature of 800 to 1000 ° C. is grown thereon. After a second layer of ˜1 nm is grown and this is repeated 20 times, GaN is further grown to a thickness of 10 to 20 nm to form an n-type multilayer film layer having a total thickness of 40 to 80 nm. By reducing the film thickness of the single layer in this way, the n-type multilayer film layer has a superlattice structure and is less than the critical elastic film thickness, and the crystallinity of each single layer in the n-type multilayer film layer is improved. . Therefore, as the stacking progresses, the crystallinity can be further improved and the light output can be improved.

[Active layer]
A multiple quantum well structure or a single quantum well having, as an active layer, a nitride semiconductor comprising at least In, preferably a well layer containing In _x Ga _1-x N (0 ≦ x <1), and a barrier layer A structure can be used. The film thickness of the well layer or the barrier layer is 30 nm or less, preferably 20 nm or less. In particular, the well layer is preferably thin, and is preferably 10 nm or less, more preferably 1 to 5 nm. As a result, an active layer having excellent quantum efficiency can be obtained.
When the active layer has a multiple quantum well structure, it is possible to improve the output and lower the oscillation threshold. When the active layer 3 has a multiple quantum well structure, the first and last layers may be well layers or barrier layers as long as the well layers and the barrier layers are alternately stacked. Further, in the multiple quantum well structure, the barrier layer sandwiched between the well layers is not limited to a single layer (well layer / barrier layer / well layer), and two or more barrier layers. A plurality of barrier layers having different compositions, impurity amounts, etc. may be provided as “well layer / barrier layer (1) / barrier layer (2) /... / Well layer”.
The barrier layer used for the active layer having the quantum well structure is not particularly limited, but a nitride semiconductor having a lower In content than the well layer, a nitride semiconductor containing GaN, Al, or the like can be used. More preferably, it contains InGaN, GaN, or AlGaN. The thickness and composition of the barrier layer need not all be the same in the quantum well structure.

[P-side nitride semiconductor layer]
The configuration of the p-side nitride semiconductor layer will be described below. In the p-side nitride semiconductor layer according to the present embodiment, a p-side cladding layer, a p-side AlN layer, and a p-type contact layer are laminated at least from the active layer side.

(P-side cladding layer)
First, an Al-containing nitride semiconductor doped with 1 × 10 ²⁰ / cm ³ of a p-type impurity such as Mg at a temperature of about 900 to 1000 ° C. on the active layer, preferably Mg-doped Al _X Ga _1-X N (0 <X <1) is grown to a thickness of 10 to 50 nm to form a p-side cladding layer. The p-side cladding layer made of an Al-containing nitride semiconductor serves as a carrier confinement layer due to its band gap energy larger than that of the well layer of the active layer. Since the band gap energy increases as the Al mixed crystal ratio increases, the p-side cladding layer is preferably made of AlGaN.

(P-side AlN layer)
On the p-side cladding layer, AlN having a composition different from that of the p-type contact layer is grown to form a p-side AlN layer. The thickness of the p-side AlN layer is preferably 1 nm to 10 nm, more preferably 1 nm to 5 nm, and still more preferably 1 nm to 3 nm. The p-side AlN layer may be doped with a p-type impurity such as Mg, or may be undoped. Since the current diffusion effect is caused by the difference in lattice constant between the p-type contact layer and the p-side AlN layer, the current diffusion effect can be obtained regardless of whether or not the p-type AlN layer is doped with the p-type impurity.
Furthermore, a p-side undoped GaN layer may be grown to a thickness of 50 to 100 nm between the p-side cladding layer and the p-side AlN layer. By diffusing current in the p-side undoped GaN layer, the electrostatic withstand voltage characteristic can be further improved.

(P-type contact layer)
Examples of the p-type contact layer include a layer made of In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). A layer composed of AlGaN of 0.2 or less and InGaN having an In ratio of 0.2 or less is preferable, and a layer composed of GaN is more preferable. These compositions can provide good ohmic contact with the electrode material. Specifically, for example, a p-type contact layer is formed on a p-side AlN layer by growing GaN doped with a p-type impurity such as Mg to a thickness of 10 to 100 nm to 1 × 10 ²⁰ / cm ^3. To do.

[P-side electrode and n-side electrode]
The p-side electrode and the n-side electrode are not particularly limited, and any of those known in the art can be adopted.
For example, the p-side electrode according to the present embodiment is configured by sequentially forming a p-side translucent electrode and a p-side pad electrode on a p-type contact layer. The p-side translucent electrode is preferably formed of a material that does not absorb light emitted from the active layer in consideration of light extraction efficiency. For example, a conductive oxide (ITO, ZnO, or the like) is used. Can be mentioned. The n-side electrode is formed on the surface of the exposed upper n-type contact layer by etching away a part of the nitride semiconductor layer from the p-side nitride semiconductor layer to expose the upper n-type contact layer.

[Comparative example]
A light emitting device of a comparative example having no p-side AlN layer was manufactured by the following steps.

(First buffer layer)
At a temperature of 600 ° C., hydrogen is used as a carrier gas, ammonia is used as a source gas, TMG (trimethylgallium) and TMA (trimethylaluminum) are used to grow AlGaN on the substrate to a thickness of about 20 nm, and a first buffer layer is formed. Formed.

(Second buffer layer)
After forming the first buffer layer, only TMG was stopped and the temperature was raised to 1050 ° C. After reaching 1050 ° C., undoped GaN was grown to a thickness of about 2 μm using TMG and ammonia gas as source gases to form a second buffer layer.

(N-type contact layer)
Next, using TMG and ammonia gas as source gas and silane gas as impurity gas at a temperature of 1050 ° C., GaN doped with 4.5 × 10 ¹⁸ / cm ^{3 of} Si is grown to a thickness of about 5 μm, and n-type A contact layer was formed.

(Undoped semiconductor layer)
Next, only the silane gas is turned off, and at 1050 ° C., a first layer made of undoped GaN is grown to a thickness of about 150 nm using TMG and ammonia gas. A second layer made of GaN doped with 4.5 × 10 ¹⁸ / cm ³ was grown to a thickness of about 20 nm. This is repeated a total of two times. Finally, only the silane gas is stopped, and an undoped GaN layer is grown to a thickness of about 10 nm at the same temperature, and an undoped semiconductor layer having a total thickness of about 350 nm consisting of five layers. Formed.

(N-type multilayer film layer)
Next, at a similar temperature, a first layer made of undoped GaN is grown to about 1.5 nm, and then the temperature is set to 800 ° C., and a second layer made of undoped InGaN is used using TMG, TMI, and ammonia. Was grown about 1 nm. Then, by repeating these operations, 20 layers are alternately stacked, and finally a first nitride semiconductor layer made of GaN is grown by about 1.5 nm to have a total thickness of about 51. A 5 nm n-type multilayer film layer was formed.

(Active layer)
After growing Si-doped GaN by about 3.5 nm using TMG, ammonia gas and silane gas at a temperature of about 900-1300 ° C., only silane gas is stopped and GaN is grown by about 1.5 nm to a thickness of about 5 nm. The barrier layer was formed.
Next, a well layer made of undoped InGaN is grown to a thickness of about 3 nm using TMG, TMI and ammonia at a temperature of about 600 to 1000 ° C., and then a barrier layer made of undoped GaN using TMG and ammonia. Was grown to a thickness of about 5 nm. In addition, nine well layers and nine barrier layers are alternately stacked in the order of well + barrier + well + barrier +... + Barrier, and an active layer consisting of a multiple quantum well structure having a total thickness of about 80 nm. A layer was formed.

(P-side cladding layer)
Next, using TMG, TMA, ammonia and Cp ₂ Mg (cyclopentadienylmagnesium) at a temperature of about 900 to 1000 ° C., p-type AlGaN doped with 1 × 10 ²⁰ / cm ^{3 of} Mg is about 10 nm thick. Then, a p-side cladding layer was formed.

(P-side undoped GaN layer)
Next, undoped GaN was grown to a thickness of about 80 nm using TMG and ammonia gas at a temperature of 1050 ° C. to form a p-side undoped GaN layer.

(P-type GaN contact layer)
On the p-side undoped GaN layer, p-type GaN doped with Mg at 1 × 10 ²⁰ / cm ³ is grown to a thickness of about 50 nm using TMG, ammonia and Cp ₂ Mg at a temperature of 1050 ° C. A mold contact layer was formed.

(electrode)
Next, the wafer is taken out from the reaction container, a mask having a predetermined shape is formed on the surface of the uppermost p-type contact layer, and a depth of about 1.5 μm from the p-type contact layer side is obtained by an RIE (reactive ion etching) apparatus. Etching was then performed to expose the surface of the n-type contact layer.
Subsequently, a p-side translucent electrode made of ITO was formed on almost the entire surface of the p-type contact layer. Next, a p-side pad electrode and an n-side electrode were formed on the formed p-side translucent electrode and on the n-type contact layer exposed by etching, respectively.

  Finally, the wafer was cut into chips to obtain light emitting elements.

[Example 1]
In the light-emitting element of Example 1, a p-side AlN layer made of AlN using TMA and ammonia at a temperature of about 950 to 1350 ° C. between the p-side undoped GaN layer and the p-type contact layer has a thickness of about 1.0 nm. It was produced in the same procedure as the comparative example except that it was grown.

[Example 2]
The light emitting device of Example 2 was manufactured in the same procedure as in Example 1 except that the thickness of the p-side AlN layer was 2.0 nm.

[Example 3]
The light emitting device of Example 3 was manufactured in the same procedure as in Example 1 except that the thickness of the p-side AlN layer was set to 3.0 nm.

  Table 1 shows the structures of the comparative example and the nitride semiconductor elements of Examples 1 to 3.

(Carrier mobility test)
An AlN layer having a thickness of 0 to 10 nm was grown on an undoped GaN layer having a thickness of 3 μm, and an undoped GaN layer was further grown by 30 nm thereon, so that samples having different thicknesses of AlN layers were produced. The carrier mobility of each sample thus obtained was measured by the van der Pauw method using a Hall measuring device. The results are shown in FIG. FIG. 4 shows that the carrier mobility increases when the thickness of the AlN layer is 1 to 10 nm.

(Relationship between p-side AlN layer thickness and electrostatic withstand voltage characteristics)
Regarding Examples 1 to 3 and the comparative example, the voltage was gradually increased (step application), and the number of breakdowns when 50V, 300V and 500V voltages were applied was examined to calculate the breakdown rate. The test results are shown in Table 2. By inserting the p-side AlN layer, the fracture rate decreased. By inserting the p-side AlN layer, the current diffusivity is improved by the piezo effect (the sheet resistance is reduced), so it is considered that the electrostatic withstand voltage characteristics have been improved. When the applied voltage is 300 V and 500 V, the breakdown rates of Examples 2 and 3 in which the thickness of the p-side AlN layer is 2.0 nm and 3.0 nm are the results of the implementation in which the thickness of the p-side AlN layer is 1.0 nm. The destruction rate was lower than that of Example 1.

(Light extraction efficiency measurement)
The light output (Po) was measured for Examples 1 to 3 and Comparative Example. The results are shown in Table 3. When the thickness of the p-side AlN layer was 1.0 nm, Po was maximized, and the light extraction efficiency was the best.

(Forward voltage measurement)
For Examples 1-3 and Comparative Examples were measured forward voltage _{V f} at 20mA and 70 mA. The results are shown in Table 3. Even when the thickness of the p-side AlN layer increased to 3.0 nm, the forward voltage remained at the same level.

  The nitride semiconductor device of the present invention has excellent electrostatic withstand voltage characteristics.

1 substrate 2 n-type contact layer 3 active layer 4 p-side nitride semiconductor layer 4a p-side cladding layer 4b p-type contact layer 4c p-side AlN layer 4d p-side undoped GaN layer 4b 'lower p-type contact layer 4b "upper p-type Contact layer 5a p-side electrode layer 5b p-side pad electrode 6 n-side electrode

Claims (6)

A nitride semiconductor device in which an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer are sequentially stacked on a substrate,
The p-type nitride semiconductor layer includes a p-type contact layer and an undoped AlN layer having a thickness of 1 nm to 10 nm, which has a different composition from the p-type contact layer, and the p-type contact layer and the undoped AlN layer include A nitride semiconductor device, wherein the nitride semiconductor device is in contact with the nitride semiconductor device. The nitride semiconductor device according to claim 1, further comprising a p-side cladding layer between the undoped AlN layer and the active layer, and an undoped GaN layer between the p-side cladding layer and the undoped AlN layer. . P-type GaN layer having a nitride semiconductor device according to claim 1 or 2, and the undoped AlN layer and the p-type GaN layer is in contact between the undoped AlN layer and the active layer. A p-side cladding layer between the undoped AlN layer and the active layer; an undoped GaN layer between the p-side cladding layer and the undoped AlN layer; and the p-type GaN layer and the undoped layer. The nitride semiconductor device according to claim 3 , wherein the nitride semiconductor device is in contact with the GaN layer. The nitride semiconductor device according to claim 1, wherein the undoped AlN layer has a thickness of 1 nm to 3 nm. The nitride semiconductor device according to claim 5 , wherein the undoped AlN layer has a thickness of 2 nm.

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