JP5852937B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  Conventionally, as shown in FIG. 11, an aluminum (Al) electrode pad 101 is provided on the surface of a semiconductor substrate 100, a copper (Cu) wiring layer 102 is connected to the aluminum electrode pad 101, and the copper wiring layer 102 is further connected. There is a semiconductor device on which bump electrodes 103 are connected. In FIG. 11, reference numerals 104 and 105 denote insulating layers, and reference numeral 106 denotes a passivation film.

  Further, in such a semiconductor device, there is a semiconductor device in which a part of the surface of the aluminum electrode pad 101 is exposed as indicated by a symbol X in FIGS. 12 (A) and 12 (B). Such a semiconductor device in which the surface of the aluminum electrode pad 101 is partially exposed has two connection terminals, that is, the bump electrode 103 and the aluminum electrode pad 101, and is therefore used when, for example, COC (Chip on Chip) technology is applied. be able to. That is, the semiconductor device with the surface of the aluminum electrode pad 101 exposed uses the bump electrode 103 as a connection terminal with another semiconductor device and uses the aluminum electrode pad 101 as a connection terminal with the outside, and applies, for example, COC technology. It can be used when

JP 2011-49530 A JP-A-6-160905

By the way, a semiconductor device in which a part of the surface of the aluminum electrode pad 101 is exposed can be manufactured as follows, for example.
That is, first, an aluminum electrode pad 101 is provided, an opening is provided above the aluminum electrode pad 101 on the surface of the semiconductor substrate 100 covered with the passivation film 106, and a part of the surface of the aluminum electrode pad 101 is exposed. Thus, the first insulating layer 104 is formed [see, for example, FIG. 12A]. Next, a copper wiring layer 102 is formed on the first insulating layer 104 so that the opening is embedded and connected to the aluminum electrode pad 101 [see, for example, FIG. 12A]. Next, a second insulating layer 105 having an opening is formed above the copper wiring layer 102 so as to cover the copper wiring layer 102 [see, for example, FIG. 12A]. Then, the bump electrode 103 is formed on the copper wiring layer 102 exposed at the opening of the second insulating layer 105 [see, for example, FIG. 12A]. In this way, a semiconductor device in which a part of the surface of the aluminum electrode pad 101 is exposed can be manufactured.

In such a manufacturing method, when the second insulating layer 105 is formed, the copper wiring layer 102 is covered with a photosensitive resin, the photosensitive resin is exposed, and the exposed photosensitive resin is developed with an alkaline solution as a developer. Thus, the second insulating layer 105 having an opening is formed above the copper wiring layer 102 so as to cover the copper wiring layer 102.
In this case, as shown in FIGS. 13A and 13B, a part of the aluminum electrode pad 101 and the copper wiring layer 102 connected to the aluminum electrode pad 101 are developed during development of the photosensitive resin. The aluminum electrode pad 101 and the copper wiring layer 102, which are partially exposed and made of different metals having different ionization tendencies, are present in the alkaline solution, and a battery effect is generated. That is, for example, aluminum having a high ionization tendency dissolves in an alkaline solution and emits electrons, and the emitted electrons pass from the aluminum electrode pad 101 through the copper wiring layer 102 connected to the copper wiring layer 102. In the exposed portion, hydrogen ions and the like in the alkaline solution are combined to generate gas (bubbles) such as hydrogen gas. Then, the photosensitive resin for forming the second insulating layer 105 may be peeled off due to the generation of the gas. In this case, the reliability of the semiconductor device is reduced.

  Here, the semiconductor device including the aluminum electrode pad 101 and the copper wiring layer 102 is described as an example. However, even when these are made of other metal materials, the electrode pad and the connection to the electrode pad are connected. When the wiring layer to be formed is made of a different metal having a different ionization tendency, there is a similar problem. Here, the semiconductor device in which the surface of the electrode pad 101 is partially exposed is described as an example. However, even a semiconductor device in which the surface of the electrode pad is not exposed has the same problem. There is a case. For example, even in a semiconductor device in which the surface of the electrode pad connected to the wiring layer is not exposed, other electrode pads electrically connected to this electrode pad are exposed, and the wiring layer and Similar problems arise when the other electrode pads to be connected are made of different metals having different ionization tendencies. In short, when developing a photosensitive resin for forming an insulating layer covering the wiring layer, the wiring layer and the electrode pad electrically connected to the wiring layer are made of different metals having different ionization tendency, and a part of them is exposed. However, when it is in a state of being present in the alkaline solution, the photosensitive resin may be peeled off due to the battery effect. In this case, the reliability of the semiconductor device is reduced.

  Therefore, it is desired to prevent the photosensitive resin from being peeled off during development of the photosensitive resin for forming the insulating layer covering the wiring layer, and to improve the reliability of the semiconductor device.

  The manufacturing method of the semiconductor device includes a second metal having a different ionization tendency from the first metal so as not to be connected to the first electrode pad above the semiconductor substrate having a first electrode pad containing the first metal on the surface. A step of forming the wiring layer, covering the surface of the wiring layer with a photosensitive resin, exposing the photosensitive resin, and developing the exposed photosensitive resin with an alkaline solution, thereby partially exposing the surface of the wiring layer A step of forming an insulating layer that covers the surface of the wiring layer with a photosensitive resin, and a connection wiring that electrically connects the first electrode pad and the wiring layer so as to cover a part of the insulating layer. A process.

  The semiconductor device includes an electrode pad including a first metal provided on the surface of the semiconductor substrate and a second metal provided above the semiconductor substrate so as not to be connected to the electrode pad and having a different ionization tendency from the first metal. Cover the wiring layer and the surface of the wiring layer so that the surface of the wiring layer is partially exposed, cover the insulating layer formed of photosensitive resin, and part of the insulating layer, and electrically connect the electrode pad and the wiring layer. And connection wiring to be connected to each other.

  Therefore, according to the semiconductor device and the manufacturing method thereof, the photosensitive resin is prevented from being peeled off during development of the photosensitive resin for forming the insulating layer covering the wiring layer, and the reliability of the semiconductor device is improved. There is an advantage that it can be improved.

(A), (B) is a schematic diagram for demonstrating the image development process of the photosensitive resin for forming the insulating layer in the manufacturing method of the semiconductor device concerning this embodiment, (A) is sectional drawing. (B) is a plan view thereof. (A)-(G) are typical sectional drawings for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. (A)-(G) are typical sectional drawings for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. (A)-(D) are typical sectional drawings for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. (A), (B) is a schematic diagram which shows the structure of the semiconductor device concerning this embodiment, (A) is sectional drawing, (B) is the top view. (A) is a schematic cross-sectional view showing a configuration of a semiconductor device according to a first modification of the present embodiment, and (B) is a schematic cross-section showing a configuration of a semiconductor device according to a second modification of the present embodiment. FIG. 6C is a schematic cross-sectional view illustrating a configuration of a semiconductor device according to a third modified example of the present embodiment. (A)-(D) are typical sectional drawings which show the effective area | region of the electrode pad in the semiconductor device of this embodiment and a 1st-3rd modification, and the effective area | region of the chip | tip surface, (A) is this It is a typical sectional view showing the composition of the semiconductor device of an embodiment, (B) is the typical sectional view showing the composition of the semiconductor device of the 1st modification, and (C) is the semiconductor device of the 2nd modification. It is a typical sectional view showing composition. (D) is a typical sectional view showing composition of a semiconductor device of the 3rd modification. It is typical sectional drawing for demonstrating the subject of this invention. It is a typical sectional view showing the composition of the semiconductor device of the 4th modification of this embodiment. (A)-(H) are typical sectional drawings for demonstrating the manufacturing method of the semiconductor device of the 5th modification of this embodiment. It is typical sectional drawing which shows the structure of the conventional semiconductor device. (A), (B) is a schematic diagram which shows the structure of the conventional semiconductor device, (A) is sectional drawing, (B) is the top view. (A), (B) is a schematic diagram for demonstrating the subject of this invention, Comprising: (A) is the developing process of the photosensitive resin for forming the insulating layer in the manufacturing method of the conventional semiconductor device. It is sectional drawing shown, (B) is the top view.

Hereinafter, a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to FIGS.
In the semiconductor device and the manufacturing method thereof according to the present embodiment, as shown in FIGS. 1A and 1B, during development of the photosensitive resin 8X for forming the insulating layer 8 that covers the wiring layer 5, By preventing the wiring layer 5 made of different metals having different ionization tendency and the electrode pad (first electrode pad) 2 from being connected, the battery effect is prevented. In FIGS. 1A and 1B, reference numeral 10 denotes a developer, reference numeral 4 denotes an insulating layer, and reference numeral 3 denotes a passivation film. This prevents the photosensitive resin 8X from being peeled off during development of the photosensitive resin 8X for forming the insulating layer 8 that covers the wiring layer 5. Then, in the process after the insulating layer 8 covering the wiring layer 5 is formed, the connection wiring 12 that electrically connects the electrode pad 2 and the wiring layer 5 is formed [FIG. 3 (B) to FIG. 3 (G), FIG. 10 (A) to FIG. 10 (H)].

First, a method for manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS.
First, as shown in FIG. 2A, a passivation film 3 made of, for example, SiN is formed on the surface of the semiconductor wafer 1 having the aluminum electrode pad 2 on the surface so that the surface of the aluminum electrode pad 2 is exposed. . Note that the passivation film 3 is also referred to as a cover film.

Here, the semiconductor wafer 1 is a semiconductor substrate on which a semiconductor element [for example, an LSI (Large Scale Integrated Circuit)] is formed on a semiconductor such as silicon, and an aluminum electrode pad as a connection terminal of the semiconductor element on the surface thereof. 2 is provided. The semiconductor wafer 1 is also referred to as a semiconductor substrate.
Moreover, the aluminum electrode pad 2 should just be an electrode pad containing aluminum (1st metal), the electrode pad which consists of aluminum, the electrode pad which consists of aluminum-copper (Al-Cu), and aluminum-copper-silicon ( An electrode pad made of an aluminum alloy such as an electrode pad made of (Al—Cu—Si) is included.

Next, as shown in FIG. 2 (B), an aluminum electrode pad 2 is provided, and an opening 4A is provided above the aluminum electrode pad 2 on the surface of the semiconductor wafer 1 covered with the passivation film 3, and aluminum The first insulating layer 4 is formed so that a part 2A of the surface of the electrode pad 2 is exposed.
Here, as the photosensitive resin for forming the first insulating layer 4, for example, polyimide resin, epoxy resin, polybenzoxazole (PBO) resin, benzocyclobutene (BCB) resin, phenol-based resin, or the like is used. Can do. As the photosensitive resin, either a positive type or a negative type may be used.

Here, the surface of the semiconductor wafer 1 is covered with a photosensitive resin, the photosensitive resin is exposed, and the exposed photosensitive resin is developed with a developer (here, an alkaline solution), so that the aluminum electrode pad 2 is exposed. The first insulating layer 4 is formed so as to have an opening 4A and to expose a part 2A of the surface of the aluminum electrode pad 2.
In the present embodiment, as described above, the method for manufacturing a semiconductor device includes the steps of forming the passivation film 3 and the first insulating layer 4 on the semiconductor wafer 1, but is not limited thereto. Instead, these steps may not be included. In other words, the semiconductor wafer 1 as described above may be prepared by purchasing one having the passivation film 3 and the first insulating layer 4 formed thereon.

Next, as shown in FIGS. 2C to 2G, the aluminum electrode pad 2 is connected to the first insulating layer 4, that is, above the semiconductor wafer 1 having the aluminum electrode pad 2 on the surface. The copper wiring layer 5 is formed so as not to occur.
Here, the material of the wiring layer 5 is copper, but the material is not limited to this, and other metals such as nickel (Ni) and gold (Au) may be used. That is, the wiring layer 5 may be a wiring layer including a metal (second metal) having a different ionization tendency from the metal (first metal) included in the electrode pad 2.

Specifically, first, as shown in FIG. 2C, the seed layer 6 is formed on the entire surface. Here, the seed layer 6 made of Ti / Cu is formed on the entire surface by sequentially forming, for example, a titanium (Ti) layer 6A and a copper (Cu) layer 6B by sputtering, for example.
Next, as shown in FIG. 2D, a resist mask 7 having an opening in a region where the copper wiring layer 5 is to be formed is patterned on the seed layer 6 by using a photolithography technique for resist coating, exposure, and development. . Here, the opening of the resist mask 7 is not formed above or in the vicinity of the opening 4A of the first insulating layer 4 so that the copper wiring layer 5 is not connected to the aluminum electrode pad 2. Preferably, the opening of the resist mask 7 is not formed above or in the vicinity of the aluminum electrode pad 2.

  Next, as shown in FIG. 2 (E), using the resist mask 7, copper plating is performed on the Cu layer (Cu sputter layer) 6B exposed on the surface of the seed layer 6 by, for example, electrolytic plating, A copper wiring layer 5 is formed. Here, since the opening is formed in the resist mask 7 as described above, the copper wiring layer 5 is formed so as not to be connected to the aluminum electrode pad 2.

Then, as shown in FIG. 2F, the resist mask 7 is removed (peeled) using a resist stripping solution.
Thereafter, as shown in FIG. 2G, the seed layer 6 (here, the Ti sputter layer 6A and the Cu sputter layer 6B) which is not covered with the copper wiring layer 5 and is exposed on the surface is treated with a chemical solution (etching). Solution). Here, when an alkaline chemical solution is used to remove the seed layer 6, the battery effect is generated when the aluminum electrode pad and the copper wiring layer are connected as in the conventional structure [see FIG. 12A]. In addition, corrosion may occur in the aluminum electrode pad and the copper wiring layer. On the other hand, in this embodiment, when performing this process, since the aluminum electrode pad 2 and the copper wiring layer 5 are not connected, the battery effect does not occur, and the aluminum electrode pad 2 and the copper wiring are not generated. Layer 5 does not corrode.

In this way, the copper wiring layer 5 is formed on the first insulating layer 4 so as not to be connected to the aluminum electrode pad 2. The wiring layer 5 is also referred to as a redistribution layer (RDL).
Next, as shown in FIG. 3A, a first opening 8A and a second opening 8B are provided above the copper wiring layer 5 so as to cover the copper wiring layer 5 and the first insulating layer 4. The second insulating layer 8 is formed so as to have a third opening 8C above the opening 4A of the first insulating layer 4 and to expose a part 2A of the surface of the aluminum electrode pad 2. That is, the second insulating layer 8 that covers the surface of the copper wiring layer 5 is formed so that the surface of the copper wiring layer 5 is partially exposed. Further, the second insulating layer 8 is formed so that the surface of the aluminum electrode pad 2 is partially exposed and the upper part of the aluminum electrode pad 2 is covered.

Here, as the photosensitive resin for forming the second insulating layer 8, for example, a polyimide resin, an epoxy resin, a polybenzoxazole (PBO) resin, a benzocyclobutene (BCB) resin, a phenol resin, or the like is used. Can do. In addition, the same material as the 1st insulating layer 4 may be used for the 2nd insulating layer 8, and a different material may be used.
Specifically, first, as shown in FIG. 4A, a photosensitive resin 8X for forming the second insulating layer 8 is applied to the entire surface and covered with the photosensitive resin 8X.

  Next, as shown in FIG. 4B, a region other than the region where the first to third openings 8A to 8C are formed, that is, the region where the photosensitive resin 8X is to be left is formed by a mask 9 using a photolithography technique. The photosensitive resin 8X is exposed in a state of covering and shielding this area. Here, a case where a positive type is used as the photosensitive resin 8X has been described as an example, but a negative type may be used.

  Next, as shown in FIG. 4C, development is performed using an alkali type developer (in this case, an alkali solution) 10 as the developer. Thereby, as shown in FIG. 4 (D), the first opening 8A and the second opening 8B are provided above the copper wiring layer 5 so as to cover the copper wiring layer 5 and the first insulating layer 4, A second insulating layer 8 having a third opening 8C is formed above the opening 4A of the first insulating layer 4.

  During development of the photosensitive resin 8X for forming the second insulating layer 8, the copper wiring layer 5 is partially exposed through the first and second openings 8A and 8B of the second insulating layer 8, and the second insulating layer 8 is exposed. The aluminum electrode pad 2 is partially exposed through the third opening 8C and the like of the layer 8, and the aluminum electrode pad 2 and the copper wiring layer 5 made of different metals having different ionization tendencies exist in the alkaline solution 10. . However, as described above, the aluminum electrode pad 2 and the copper wiring layer 5 are not connected and are independent of each other, so that the battery effect does not occur, and the photosensitive resin 8X, that is, the second insulating layer. It can prevent that 8 peels.

In this way, the surface of the copper wiring layer 5 is covered with the photosensitive resin 8X, the photosensitive resin 8X is exposed, and the exposed photosensitive resin 8X is developed with the developer (here, alkaline solution) 10, A second insulating layer 8 that covers the surface of the copper wiring layer 5 is formed of a photosensitive resin 8X so that the surface of the copper wiring layer 5 is partially exposed.
Next, as shown in FIGS. 3B to 3G, the bump electrode 11 is formed on the copper wiring layer 5 exposed in the first opening 8A of the second insulating layer 8, and the second insulation is formed. The copper wiring layer 5 exposed in the second opening 8B of the layer 8 is connected to the third opening 8C of the second insulating layer 8 and the aluminum electrode pad 2 exposed in the opening 4A of the first insulating layer 4. Then, the connection wiring 12 is formed on the copper wiring layer 5 and the aluminum electrode pad 2.

Specifically, first, as shown in FIG. 3B, the seed layer 13 is formed on the entire surface. Here, the seed layer 13 made of Ti / Cu is formed on the entire surface by sequentially forming, for example, a titanium (Ti) layer 13A and a copper (Cu) layer 13B by sputtering, for example.
Next, as shown in FIG. 3C, a resist mask 14 having openings in regions where the bump electrodes 11 and the connection wirings 12 are formed on the seed layer 13 using a photolithography technique for resist coating, exposure, and development. Is patterned.

  Next, as shown in FIG. 3D, the under bump metal layer 15 and the solder bump layer 16 are formed on the seed layer 13 by using, for example, an electrolytic plating method, using the resist mask 14. Here, on the Cu layer (Cu sputter layer) 13B exposed on the surface of the seed layer 13, for example, copper plating and nickel plating are performed to form the under bump metal layer 15, and then solder plating (SnAg solder plating here) is performed. To form the solder bump layer 16. Here, as described above, the resist mask 14 has an opening not only in the region where the bump electrode 11 is formed, but also in the region where the connection wiring 12 is formed. For this reason, the under bump metal layer 15 and the solder bump layer 16 are formed in the region where the bump electrode 11 is formed, and the under bump metal layer 15 and the solder bump layer 16 are also formed in the region where the connection wiring 12 is formed. Is done.

Then, as shown in FIG. 3E, the resist mask 14 is removed (peeled) using a resist stripping solution.
After that, as shown in FIG. 3F, the seed layer 13 (here, Ti sputter layer 13A and Cu sputter layer 13B) that is not covered with the under bump metal layer 15 and the solder bump layer 16 and is exposed on the surface. ) Is removed using a chemical solution (etching solution).

  Then, as shown in FIG. 3G, reflow is performed to melt and solidify the solder bump layer (solder plating layer) 16 to form a round shape. Thereby, the bump electrode 11 is formed on the copper wiring layer 5 by the seed layer 13, the under bump metal layer 15 and the solder bump layer 16, and the aluminum electrode is formed by the seed layer 13, the under bump metal layer 15 and the solder bump layer 16. A connection wiring 12 that electrically connects the pad 2 and the copper wiring layer 5 is formed.

  Thus, the bump electrode 11 electrically connected to the copper wiring layer 5 is formed, and the aluminum electrode pad 2 and the copper wiring layer 5 are electrically connected so as to cover a part of the second insulating layer 8. The connection wiring 12 connected to is formed. That is, in this embodiment, the process of forming the bump electrode 11 and the process of forming the connection wiring 12 are the same process, and the bump electrode 11 and the connection wiring 12 are formed simultaneously.

Thereby, the semiconductor device according to the present embodiment, here, the semiconductor device in which the surface of the aluminum electrode pad 2 is partially exposed can be manufactured.
The semiconductor device manufactured in this way has the following configuration.
That is, as shown in FIGS. 5A and 5B, the semiconductor device according to this embodiment includes a semiconductor substrate 1 including semiconductor elements, an aluminum electrode pad 2, a passivation film 3, and a first insulation. The layer 4, the copper wiring layer 5, the second insulating layer 8, the bump electrode 11, and the connection wiring 12 are provided.

Here, the aluminum electrode pad 2 is provided on the surface of the semiconductor substrate 1.
The passivation film 3 is provided on the surface of the semiconductor substrate 1 so that the surface of the aluminum electrode pad 2 is exposed.
The first insulating layer 4 is made of a photosensitive resin. The first insulating layer 4 includes an aluminum electrode pad 2, and has an opening 4 A above the aluminum electrode pad 2 on the surface of the semiconductor substrate 1 covered with the passivation film 3. It is provided so that part 2A of the surface is exposed. For this reason, the surface of the aluminum electrode pad 2 is partially exposed.

Further, the copper wiring layer 5 is provided on the first insulating layer 4, that is, above the semiconductor substrate 1 having the aluminum electrode pad 2 on the surface so as not to be connected to the aluminum electrode pad 2.
Although the aluminum electrode pad 2 and the copper wiring layer 5 are used here, the present invention is not limited to this, and the electrode pad 2 may be an electrode pad containing aluminum, and the wiring layer 5 may be made of copper, nickel, Any wiring layer containing metal such as gold may be used. That is, the wiring layer 5 may be a wiring layer including a metal (second metal) having a different ionization tendency from the metal (first metal) included in the electrode pad 2.

  The second insulating layer 8 is formed of a photosensitive resin. The second insulating layer 8 has a first opening 8A and a second opening 8B above the copper wiring layer 5 so as to cover the copper wiring layer 5 and the first insulating layer 4, and the first insulating layer A third opening 8C is provided above the four openings 4A, and a portion 2A of the surface of the aluminum electrode pad 2 is provided so as to be exposed. That is, the second insulating layer 8 that covers the surface of the copper wiring layer 5 is provided so that the surface of the copper wiring layer 5 is partially exposed. The second insulating layer 8 is provided so that the surface of the aluminum electrode pad 2 is partially exposed and the upper part of the aluminum electrode pad 2 is covered.

The bump electrode 11 is provided on the copper wiring layer 5 exposed in the first opening 8A of the second insulating layer 8. That is, the bump electrode 11 is electrically connected to the copper wiring layer 5.
The connection wiring 12 is exposed to the copper wiring layer 5 exposed in the second opening 8B of the second insulating layer 8, the third opening 8C of the second insulating layer 8, and the opening 4A of the first insulating layer 4. It is provided on the copper wiring layer 5 and the aluminum electrode pad 2 so as to be connected to the aluminum electrode pad 2. That is, the connection wiring 12 covers a part of the second insulating layer 8 and is provided so as to electrically connect the aluminum electrode pad 2 and the copper wiring layer 5.

Here, the bump electrode 11 and the connection wiring 12 are formed of the same material. That is, the bump electrode 11 and the connection wiring 12 are all formed of the seed layer 13, the under bump metal layer 15, and the solder bump layer 16, and are formed of the same material [see FIG. 3G]. .
Thus, in this semiconductor device, the aluminum electrode pad 2 is provided on the surface of the semiconductor substrate 1, and the copper wiring layer 5 is not connected to the aluminum electrode pad 2, and the insulating layer 8 covers the surface of the copper wiring layer 5. The aluminum electrode pad 2 and the copper wiring layer 5 are electrically connected to each other by the connection wiring 12 provided so as to cover a part of the copper wiring layer 5, and the bump electrode 11 is provided on the copper wiring layer 5. The aluminum electrode pad 2 is partially exposed. For this reason, it has two connection terminals of the bump electrode 11 and the aluminum electrode pad 2, and can be used when, for example, COC (Chip on Chip) technology is applied. That is, the bump electrode 11 is used as a connection terminal with another semiconductor device, and the aluminum electrode pad 2 is used as a connection terminal with the outside (for example, a connection terminal for wire bonding). Can do.

  Moreover, this semiconductor device is a semiconductor chip provided with a wafer level package (WLP; Wafer Level Package). The wafer level package is also referred to as a wafer level chip size package (WL-CSP) or a chip size package (CSP). Here, a semiconductor chip having a wafer level package is formed by dicing into individual pieces after forming a wiring layer (rewiring layer) at the wafer level. The semiconductor device is not limited to a semiconductor chip having a wafer level package, and may be any device having the above-described configuration.

Therefore, according to the semiconductor device and the manufacturing method thereof according to the present embodiment, the photosensitive resin 8X is prevented from being peeled off during the development of the photosensitive resin 8X for forming the insulating layer 8 that covers the wiring layer 5. In addition, there is an advantage that the reliability of the semiconductor device can be improved.
In addition, this invention is not limited to the structure described in embodiment mentioned above, A various deformation | transformation is possible in the range which does not deviate from the meaning of this invention.

  For example, in the above-described embodiment, as an example of the semiconductor device in which the surface of the aluminum electrode pad 2 is partially exposed and the manufacturing method thereof, the opening 4A is provided above the aluminum electrode pad 2 and the surface of the aluminum electrode pad 2 The first insulating layer 4 provided so that a part 2A of the first insulating layer 4 is exposed and the copper wiring layer 5 have a first opening 8A and a second opening 8B, and the opening of the first insulating layer 4 Although the case where it has the 3rd opening part 8C above 4A and is provided with the 2nd insulating layer 8 provided so that a part 2A of the surface of aluminum electrode pad 2 may be exposed is explained as an example, It is not limited to this.

  For example, as shown in FIG. 6A, a first insulating layer 4 having an opening 4A above the aluminum electrode pad 2 so that a part 2A of the surface of the aluminum electrode pad 2 is exposed, and The second insulating layer 8 that has the first opening 8A and the second opening 8B above the copper wiring layer 5 and is not formed above the aluminum electrode pad 2 may be provided. In this case, the above-described embodiment includes the first insulating layer 4 and the second insulating layer 8 on the aluminum electrode pad 2, whereas only the first insulating layer 4 is provided on the aluminum electrode pad 2. It becomes. And the part provided on the aluminum electrode pad 2 of the 1st insulating layer 4 can be made small. Thereby, as shown by arrows A and B in FIGS. 7A and 7B, the effective area of the aluminum electrode pad 2 can be made wider than that of the above-described embodiment. This is referred to as a first modification.

  For example, as shown in FIG. 6B, a first opening is provided above the first insulating layer 4 and the copper wiring layer 5 provided so that a part 2A of the surface of the aluminum electrode pad 2 is exposed. 8A and the 2nd opening part 8B are provided, and it is good also as what is provided with the 2nd insulating layer 8 which is not formed above the aluminum electrode pad 2. FIG. In this case, only the first insulating layer 4 is provided only on the end portion of the aluminum electrode pad 2, and a part 2A of the aluminum electrode pad 2 exposed on the surface can be widened. As a result, as shown by arrows B and C in FIGS. 7B and 7C, the effective area of the aluminum electrode pad 2 can be made wider than that of the first modified example described above. This is referred to as a second modification.

  For example, as shown in FIG. 6C, one opening is provided above the first insulating layer 4 and the copper wiring layer 5 provided so that a part 2A of the surface of the aluminum electrode pad 2 is exposed. 8A, which is not formed above the aluminum electrode pad 2, but may include the second insulating layer 8 provided so that the end of the copper wiring layer 5 on the aluminum electrode pad 2 side is exposed. . In this case, only the first insulating layer 4 is provided only on the end portion of the aluminum electrode pad 2, and a part 2A of the aluminum electrode pad 2 exposed on the surface can be widened. Thereby, as shown by arrows B and D in FIGS. 7B and 7D, the effective area of the aluminum electrode pad 2 can be made wider than that of the above-described first modified example. In the above-described embodiment and the first and second modifications, the opening 8B is provided in the second insulating layer 8 in order to connect the connection wiring 12 to the copper wiring layer 5, whereas in the present modification, The end of the copper wiring layer 8 on the aluminum electrode pad 2 side is exposed without being covered with the second insulating layer 8 without providing an opening in the second insulating layer 8. Therefore, the end of the copper wiring layer 5 on the side of the aluminum electrode pad 2 can be electrically connected to the aluminum electrode pad 2 by the connection wiring 12, and the effective area of the surface (chip surface) of the semiconductor device is shown in FIG. As shown by arrows E and F in (C) and FIG. 7 (D), it can be made wider than those of the above-described embodiment and the first and second modified examples. This is referred to as a third modification.

For example, in the above-described embodiment, the semiconductor device in which the surface of the aluminum electrode pad 2 is partially exposed and the manufacturing method thereof are described as examples. However, the present invention is not limited to this, and FIG. As shown, the present invention can also be applied to a semiconductor device in which the surface of the aluminum electrode pad 2 is not exposed and a manufacturing method thereof.
For example, even if the surface of the electrode pad connected to the wiring layer is not exposed (for example, see FIG. 11), another electrode pad (second electrode pad) electrically connected to this electrode pad Is exposed, and there is a similar problem when the wiring layer and other electrode pads electrically connected thereto are made of different metals having different ionization tendencies, and the configuration is the same as in the above-described embodiment. By doing so, this problem can be solved.

  In such a case, for example, as shown in FIG. 8, the surface of the aluminum electrode pad 101 connected to the copper wiring layer 102 during development of the photosensitive resin for forming the second insulating layer 105 in a wafer state. Is covered with the first insulating layer 104 and the second insulating layer 105 and is not exposed, but the aluminum electrode pad 101 is electrically connected to another aluminum electrode pad 107 (electrode pad including the first metal). In some cases, other aluminum electrode pads 107 are exposed. For example, the other aluminum electrode pad 107 is used as a scribe monitor provided in a scribe area other than the chip area, for example.

  In this case, if the copper wiring layer 102 and the other aluminum electrode pads 107 are electrically connected during development of the photosensitive resin for forming the second insulating layer 105 covering the copper wiring layer 102, the battery effect Occurs, and the photosensitive resin, that is, the second insulating layer 105 is peeled off. That is, for example, aluminum having a high ionization tendency dissolves in an alkaline solution and emits electrons, and the emitted electrons pass through the aluminum electrode pad 101 and the copper wiring layer 102 connected to the other aluminum electrode pad 107. Through this, the exposed portion of the copper wiring layer 102 is combined with hydrogen ions or the like in the alkaline solution, and gas (bubbles) such as hydrogen gas is generated. Then, the photosensitive resin for forming the second insulating layer 105 is peeled off due to the generation of the gas. On the other hand, as in the above-described embodiment, the copper wiring layer and other aluminum electrode pads are electrically connected during development of the photosensitive resin for forming the second insulating layer covering the copper wiring layer. By preventing the copper wiring layer from being connected to the aluminum electrode pad, the battery effect can be prevented and the photosensitive resin, that is, the second insulating layer can be prevented from peeling off. can do.

  As described above, in the step of forming the second insulating layer 8 as in the above-described embodiment, the exposed photosensitive resin 8X is developed with an alkaline solution with the surface of the aluminum electrode pad 2 partially exposed. As in this modification, in the step of forming the second insulating layer 8, the exposed photosensitive film is exposed in a state where other aluminum electrode pads electrically connected to the aluminum electrode pad 2 are exposed. The present invention can also be applied when developing the functional resin 8X with an alkaline solution, and the same effect can be obtained.

  In this case, the semiconductor device after the wiring layer 5 is formed at the wafer level and diced into individual pieces does not include other aluminum electrode pads. For this reason, as shown in FIG. 9, in the semiconductor device, the surface of the aluminum electrode pad 2 is covered with the first insulating layer 4 and the second insulating layer 8 as compared with the above-described embodiment, It will not be exposed. This is referred to as a fourth modification.

  For example, in the above-described embodiment, the case where a single wiring layer is provided has been described as an example. However, the present invention can also be applied to a case where a plurality of wiring layers are provided. That is, when providing a plurality of wiring layers, the wiring layer covered with the insulating layer is made of a different metal having a different ionization tendency when developing the photosensitive resin for forming the insulating layer covering each wiring layer. By not being electrically connected to the electrode pad, the battery effect can be prevented and the photosensitive resin can be prevented from peeling off. Also in this case, a connection wiring that electrically connects the electrode pad and the wiring layer may be formed in the step after the insulating layer covering the wiring layer is formed.

Further, for example, in the above-described embodiment, the bump electrode 11 and the connection wiring 12 are formed simultaneously in the same process, and the bump electrode 11 and the connection wiring 12 are formed of the same material. It is not limited to.
For example, the bump electrode and the connection wiring may be formed in different processes, and the bump electrode and the connection wiring may be formed of different materials.

In this case, for example, in the method of manufacturing the semiconductor device according to the above-described embodiment, the step of forming the bump electrode 11 and the connection wiring 12 is a separate process of the step of forming the connection wiring 12 and the step of forming the bump electrode 11. Change it. This is referred to as a fifth modification.
That is, for example, in the method for manufacturing the semiconductor device of the above-described embodiment, after the step of forming the second insulating layer 8 [see FIG. 3A], first, the step of forming the connection wiring 12 is performed, and then The step of forming the bump electrode 11 may be performed.

Specifically, first, as in the case of the above-described embodiment, the seed layer 13 is formed on the entire surface [see FIG. 3B].
Next, as shown in FIG. 10A, a resist mask 20 having an opening in a region where the connection wiring 12 is to be formed is patterned on the seed layer 13 using a photolithography technique of resist coating, exposure, and development.

Next, as shown in FIG. 10B, using the resist mask 20, a wiring layer 21 (for example, a copper wiring layer) is formed on the seed layer 13 by, for example, electrolytic plating.
Next, as shown in FIG. 10C, the resist mask 20 is removed (peeled off) using a resist stripping solution, and then, as shown in FIG. A resist mask 22 having an opening in a region where the bump electrode 11 is formed is patterned by using a photolithography technique of exposure / development.

  Next, as shown in FIG. 10E, the under bump metal layer 15 and the bump metal layer 16 are formed on the seed layer 13 by, for example, electrolytic plating using the resist mask 22. Here, on the Cu layer (Cu sputter layer) 13B exposed on the surface of the seed layer 13, for example, copper plating and nickel plating are performed to form the under bump metal layer 15, and then solder plating (SnAg solder plating here) is performed. To form the solder bump layer 16.

  Then, after removing (stripping) the resist mask 22 using a resist stripping solution as shown in FIG. 10 (F), the wiring layer 21, the under bump metal layer 15 and the solder as shown in FIG. 10 (G). The seed layer 13 (here, the Ti sputter layer 13A and the Cu sputter layer 13B) that is not covered with the bump layer 16 and is exposed on the surface is removed using a chemical solution (etching solution). Thus, the copper layer 5 exposed in the second opening 8B of the second insulating layer 8, the third opening 8C of the second insulating layer 8, and the opening of the first insulating layer 4 are formed by the seed layer 13 and the wiring layer 21. Connection wiring 12 is formed on copper wiring layer 5 and aluminum electrode pad 2 so as to be electrically connected to aluminum electrode pad 2 exposed at portion 4A. That is, the connection wiring 12 that electrically connects the aluminum electrode pad 2 and the copper wiring layer 5 is formed so as to cover a part of the second insulating layer 8.

  Thereafter, as shown in FIG. 10H, reflow is performed to melt and solidify the solder bump layer (solder plating layer) 16 to form a round shape. Thus, the bump electrode 11 is formed on the copper wiring layer 5 exposed to the first opening 8A of the second insulating layer 8 by the seed layer 13, the under bump metal layer 15, and the solder bump layer 16. That is, the bump electrode 11 that is electrically connected to the copper wiring layer 5 is formed.

In this way, the step of forming the bump electrode 11 and the step of forming the connection wiring 12 are separate processes, and the bump electrode 11 and the connection wiring 12 can be formed separately.
Hereinafter, additional notes will be disclosed regarding the above-described embodiment and modifications.
(Appendix 1)
Forming a wiring layer including a second metal having a different ionization tendency from the first metal so as not to be connected to the first electrode pad above a semiconductor substrate having a first electrode pad including a first metal on a surface thereof; When,
The surface of the wiring layer is covered with a photosensitive resin, the photosensitive resin is exposed, and the exposed photosensitive resin is developed with an alkaline solution so that the surface of the wiring layer is partially exposed. Forming an insulating layer covering the surface of the wiring layer with the photosensitive resin;
Forming a connection wiring for electrically connecting the first electrode pad and the wiring layer so as to cover a part of the insulating layer.

(Appendix 2)
The supplementary note 1, wherein in the step of forming the insulating layer, the exposed photosensitive resin is developed with the alkaline solution in a state where a surface of the first electrode pad is partially exposed. A method for manufacturing a semiconductor device.
(Appendix 3)
The semiconductor substrate further includes a second electrode pad that is electrically connected to the first electrode pad and includes the first metal;
2. The method of manufacturing a semiconductor device according to claim 1, wherein in the step of forming the insulating layer, the exposed photosensitive resin is developed with the alkaline solution in a state where the second electrode pad is exposed. 3. Method.

(Appendix 4)
4. The method of manufacturing a semiconductor device according to any one of appendices 1 to 3, wherein in the step of forming the connection wiring, a bump electrode electrically connected to the wiring layer is formed at the same time.
(Appendix 5)
The semiconductor device according to any one of appendices 1 to 3, further comprising a step of forming a bump electrode that is electrically connected to the wiring layer, in addition to the step of forming the connection wiring. Production method.

(Appendix 6)
An electrode pad provided on the surface of the semiconductor substrate and including a first metal;
A wiring layer including a second metal provided above the semiconductor substrate so as not to be connected to the electrode pad and having a different ionization tendency from the first metal;
Covering the surface of the wiring layer so that the surface of the wiring layer is partially exposed; and an insulating layer formed of a photosensitive resin;
A semiconductor device comprising: a connection wiring which covers a part of the insulating layer and electrically connects the electrode pad and the wiring layer.

(Appendix 7)
The semiconductor device according to appendix 6, wherein a surface of the electrode pad is partially exposed.
(Appendix 8)
Bump electrodes electrically connected to the wiring layer,
The semiconductor device according to appendix 6 or 7, wherein the connection wiring is formed of the same material as that of the bump electrode.

(Appendix 9)
The semiconductor device according to appendix 6 or 7, wherein the connection wiring is made of a material different from that of the bump electrode.

1 Semiconductor wafer (semiconductor substrate)
2 Aluminum electrode pad (first electrode pad)
2A Part of exposed aluminum electrode pad surface 3 Passivation film 4 Insulating layer (first insulating layer)
4A Opening 5 Copper wiring layer (wiring layer)
6 Seed layer 6A Ti layer 6B Cu layer 7 Resist mask 8 Insulating layer (second insulating layer)
8A 1st opening 8B 2nd opening 8C 3rd opening 8X Photosensitive resin 9 Mask 10 Developer 11 Bump electrode 12 Connection wiring 13 Seed layer 13A Ti layer 13B Cu layer 14 Resist mask 15 Under bump metal layer 16 Solder bump Layer 20 Resist mask 21 Wiring layer (copper wiring layer)
22 resist mask

Claims (6)

Forming a wiring layer including a second metal having a different ionization tendency from the first metal so as not to be connected to the first electrode pad above a semiconductor substrate having a first electrode pad including a first metal on a surface thereof; When,
The surface of the wiring layer is covered with a photosensitive resin, the photosensitive resin is exposed, and the exposed photosensitive resin is developed with an alkaline solution so that the surface of the wiring layer is partially exposed. Forming an insulating layer covering the surface of the wiring layer with the photosensitive resin;
Forming a connection wiring for electrically connecting the first electrode pad and the wiring layer so as to cover a part of the insulating layer.   The said photosensitive resin is developed with the said alkaline solution in the state which forms the said insulating layer in the state in which the surface of the said 1st electrode pad was exposed partially, The said alkaline solution is characterized by the above-mentioned. Semiconductor device manufacturing method. The semiconductor substrate further includes a second electrode pad that is electrically connected to the first electrode pad and includes the first metal;
2. The method of manufacturing a semiconductor device according to claim 1, wherein in the step of forming the insulating layer, the exposed photosensitive resin is developed with the alkaline solution in a state where the second electrode pad is exposed. 3. Method.   4. The method of manufacturing a semiconductor device according to claim 1, wherein in the step of forming the connection wiring, a bump electrode that is electrically connected to the wiring layer is formed at the same time. 5. An electrode pad provided on the surface of the semiconductor substrate and including a first metal;
A wiring layer including a second metal provided above the semiconductor substrate so as not to be connected to the electrode pad and having a different ionization tendency from the first metal;
Covering the surface of the wiring layer so that the surface of the wiring layer is partially exposed; and an insulating layer formed of a photosensitive resin;
A semiconductor device comprising: a connection wiring which covers a part of the insulating layer and electrically connects the electrode pad and the wiring layer. Bump electrodes electrically connected to the wiring layer,
The semiconductor device according to claim 5, wherein the connection wiring is formed of the same material as that of the bump electrode.