JP5851617B2 - Class G amplifier circuit - Google Patents

Description

  The present invention relates to a class G amplifier circuit.

  Linear amplifiers are used to supply the necessary power to the motor and other loads to drive the load. However, linear amplifiers such as class A, class B, and class AB have a large power loss compared to the required output power. Tend to be.

  On the other hand, in Patent Document 1, in the class-G amplifier circuit, the emitter of the first NPN transistor is connected to the load via the output terminal, the collector of the first NPN transistor is connected to the emitter of the second NPN transistor, and the first A diode is connected to the terminal of the first power supply voltage, the collector of the second NPN transistor is connected to the terminal of the second power supply voltage, the base of the third PNP transistor receives the input voltage, and the emitter of the third PNP transistor is the first NPN transistor. It is described that it is connected to the base of. The emitter of the fourth PNP transistor is connected to the terminal of the second power supply voltage, the collector of the fourth PNP transistor is connected to the emitter of the second NPN transistor and the emitter of the fifth PNP transistor, and the collector of the fifth PNP transistor is connected via the fourth diode. Connected to the emitter of the third PNP transistor and connected to the third current source via the fifth diode, and the base of the fifth PNP transistor is connected to the first diode via the second diode and via the third diode. It is also described that the emitter of the sixth PNP transistor is connected to the terminal of the second power supply voltage and the collector of the sixth PNP transistor is connected to the emitter of the third PNP transistor. Accordingly, according to Patent Document 1, a voltage equal to a value obtained by subtracting the collector-emitter voltage of the fourth PNP transistor, the base-emitter voltage of the second NPN transistor, and the collector-emitter voltage of the first NPN transistor from the second power supply voltage. It is said that the voltage at the output terminal can be driven and the efficiency of the amplifier circuit is increased due to this large output voltage amplitude.

Japanese Patent Publication No. 5-80162

  Patent Document 1 also describes a configuration in which the class G amplifier circuit described in Patent Document 1 is used in a push-pull amplifier. This class G push-pull amplifier uses a class G amplifier circuit described in Patent Document 1 as a positive circuit, and a negative circuit obtained by inverting the polarity of each transistor with respect to the positive circuit. Are connected in cascade to the positive side circuit, and when positive current is output, the current is switched from two positive power supplies, and when negative current is output, the current is switched from the two negative power supplies according to the output power. It is considered a thing.

  On the other hand, in the case of an inductive load such as a galvano scanner, the current phase is delayed by nearly 90 ° with respect to the voltage phase, so that the G-class push-pull amplifier (G-class amplifier circuit described in Patent Document 1). ) Is used to drive the galvano scanner, there is a large voltage difference between the output voltage and the bus voltage at the time of both positive current output and negative current output. Therefore, a large power loss tends to occur. When the power loss is large, it is difficult to increase the speed of the galvano scanner while improving the accuracy of the galvano scanner.

  The present invention has been made in view of the above, and an object thereof is to obtain a class G amplifier circuit capable of reducing power loss.

  In order to solve the above-described problems and achieve the object, a class G amplifier circuit according to one aspect of the present invention includes three types of input nodes that receive a command voltage and the command voltage received at the input node. A switching unit that switches the bus voltage from the power supply voltage to the selected power supply voltage, an amplification unit that performs an amplification operation using the selected power supply voltage, and the generated power, An output node that outputs to a load whose phase of the flowing current is delayed with respect to the phase of the applied voltage, and the three or more types of power supply voltages are the first corresponding to the maximum amplitude of the output voltage from the output node. A power supply voltage; a second power supply voltage whose absolute value is smaller than the first power supply voltage; and a third power supply voltage whose absolute value is smaller than the second power supply voltage. The switching unit includes the output node Output from In the first period in which the current is positive, the bus voltage is sequentially switched from the positive first power supply voltage to the positive second power supply voltage and the third power supply voltage, and the output current from the output node In the second period in which is negative, the bus voltage is sequentially switched from the negative first power supply voltage to the negative second power supply voltage and the third power supply voltage.

  According to the present invention, the switching unit changes the bus voltage from the positive first power supply voltage to the positive second power supply voltage and the third power supply voltage in the first period in which the output current from the output node is positive. In the second period in which the output current from the output node is negative, the bus voltage is sequentially switched from the negative first power supply voltage to the negative second power supply voltage and the third power supply voltage. As a result, the voltage difference between the output voltage and the bus voltage can be reduced at the time of positive current output and negative current output, respectively, so that power loss can be reduced.

FIG. 1 is a diagram illustrating a configuration of a class G amplifier circuit according to the first embodiment. FIG. 2 is a diagram illustrating the operation of the class G amplifier circuit according to the first embodiment. FIG. 3 is a diagram illustrating a configuration of a class G amplifier circuit according to a modification of the first embodiment. FIG. 4 is a diagram of a configuration of the class G amplifier circuit according to the second embodiment. FIG. 5 is a diagram illustrating the operation of the class G amplifier circuit according to the second embodiment. FIG. 6 is a diagram illustrating a configuration of a class G amplifier circuit according to a modification of the second embodiment. FIG. 7 is a diagram illustrating a configuration of a class G amplifier circuit according to the third embodiment. FIG. 8 is a diagram illustrating the operation of the class G amplifier circuit according to the third embodiment. FIG. 9 is a diagram illustrating a configuration of a class G amplifier circuit according to a modification of the third embodiment. FIG. 10 is a diagram illustrating a configuration of a class G amplifier circuit according to the fourth embodiment. FIG. 11 is a diagram illustrating the operation of the class G amplifier circuit according to the fourth embodiment. FIG. 12 is a diagram illustrating a configuration of a class G amplifier circuit according to a modification of the fourth embodiment. FIG. 13 is a diagram showing a configuration of a galvano scanner to which the class B amplifier circuit according to the basic form is applied. FIG. 14 is a diagram showing a configuration of a class B amplifier circuit according to a basic form. FIG. 15 is a diagram illustrating the operation of the class B amplifier circuit according to the basic mode. FIG. 16 is a diagram illustrating a configuration of a class G amplifier circuit according to a basic mode. FIG. 17 is a diagram illustrating the operation of the class G amplifier circuit according to the basic mode. FIG. 18 is a diagram illustrating a calculation method of loss power.

  Embodiments of a class G amplifier circuit according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
Before describing the class G amplifier circuit according to the first embodiment, the class B amplifier circuit AMP10 according to the basic form and the class G amplifier circuit AMP20 according to the basic form will be described in order.

  A laser processing apparatus that performs laser processing on a workpiece controls the irradiation position of the laser beam on the workpiece by, for example, a galvano scanner 1 shown in FIG. The galvano scanner 1 includes, for example, a control device 2, a D / A converter 3, a drive amplifier 4, a galvano scanner main body 5, and an encoder signal processing circuit 6. The galvano scanner main body 5 includes a mirror 5a, a motor 5b, and an encoder 5c. The drive amplifier 4 includes an amplifier circuit AMP. The motor 5b includes a load LD.

  The control device 2 supplies command data for controlling the angle of the mirror 5a to the D / A converter 3 in accordance with the target irradiation position of the laser beam on the workpiece. The D / A converter 3 D / A converts the command data (digital signal) into a command signal (analog signal), and supplies the converted command signal to the drive amplifier 4.

  The drive amplifier 4 internally converts the command signal into a command voltage and supplies it to the amplifier circuit AMP. The amplifier circuit AMP performs an amplification operation according to the command voltage, generates electric power, and supplies it to the motor 5b. That is, the drive amplifier 4 drives the motor 5b so as to follow the command voltage by supplying power corresponding to the command voltage to the load LD of the motor 5b.

  In the motor 5b, for example, one of the rotor and the stator is formed of a coil and the other is formed of a permanent magnet, and the coil serves as an inductance load LD.

  In the galvano scanner main body 5, the motor 5b rotates the mirror 5a through the shaft in response to the supply of power to the load LD. The encoder 5 c detects the rotation angle of the motor 5 b and supplies it to the encoder signal processing unit 6. The encoder signal processing unit 6 performs A / D conversion of the rotation angle detection value (analog signal) into rotation angle data (digital signal) and supplies the rotation angle data (digital signal) to the control device 2. Thereby, the control apparatus 2 controls the angle of the mirror 5a so that it may become the target angle according to the target irradiation position of the laser beam in a workpiece.

  In the galvano scanner 1, for example, a class B amplifier circuit AMP 10 as shown in FIG. 14 is used as the amplifier circuit AMP in the drive amplifier 4 in order to supply a necessary current (electric power) to the inductance load LD of the motor 5 b. .

  The class B amplifier circuit AMP10 illustrated in FIG. 14 is a push-pull type, and includes, for example, an input node N1, a switching unit 11, an amplifier unit 12, a ground node N3, a power source 13, a power source 14, and an output node N2.

  The input node N1 is electrically connected between the supply source of the command voltage CV and the switching unit 11. The input node N1 receives the command voltage CV and supplies it to the switching unit 11.

  Switching unit 11 is arranged between input node N1 and amplifying unit 12, and depends on the current direction of output current Io, command voltage CV received at input node N1, and the potential of the connected bus. The bus voltage is switched by one type of power supply voltage (V2). That is, the switching unit 11 selects either the P line PL2 or the N line NL2 depending on the current direction of the output current Io, the base potential of each transistor following the command voltage CV, and the potential of the connected bus. Is selectively activated to switch the bus voltage between the power supply voltage (+ V2) from the power supply 13 and the power supply voltage (−V2) from the power supply 14. Specifically, the switching unit 11 includes Zener diodes ZD4 and ZD3, current sources CS1 and CS2, transistors Tr1 and Tr2, and a resistor R1.

  The Zener diode ZD4 has an anode connected to the input node N1, and a cathode connected to the current source CS1 and the base of the transistor Tr1. The Zener diode ZD3 has an anode connected to the current source CS2 and the base of the transistor Tr2, and a cathode connected to the input node N1. The transistor Tr1 is, for example, an NPN-type bipolar transistor, the base is connected between the current source CS1 and the Zener diode ZD4, the collector is connected to the power supply 13, and the emitter is connected to the resistor R1. The transistor Tr2 is, for example, a PNP-type bipolar transistor, the base is connected between the Zener diode ZD3 and the current source CS2, the collector is connected to the power supply 14, and the emitter is connected to the resistor R1.

  When the current output current Io direction is the positive output direction (the direction indicated by the solid line in FIG. 14), the switching unit 11 turns on the transistor Tr1 and operates the upper transistor Tr6 in the amplifying unit 12. Then, the switching unit 11 selects the P line PL2 as the bus line of the voltage value that exceeds the base potential of the transistor Tr1 that follows the command voltage CV to the positive side and has the closest value. That is, the switching unit 11 activates the P line PL2 to enable connection between the power supply 13 and the amplification unit 12, and switches the bus voltage to the power supply voltage (+ V2) by the power supply 13.

  Further, when the current output current Io is in the negative output direction (the direction indicated by the broken line in FIG. 14), the switching unit 11 turns on the transistor Tr2 and operates the lower transistor Tr5 in the amplification unit 12. Then, the switching unit 11 selects the N line NL2 as the bus line of the voltage value that exceeds the base potential of the transistor Tr2 that follows the command voltage CV to the negative side and has the closest value. That is, the switching unit 11 activates the N line NL2 to enable the connection between the power supply 14 and the amplification unit 12, and switches the bus voltage to the power supply voltage (−V2) by the power supply 14.

  The amplifying unit 12 is arranged between the switching unit 11 and the output node N2, performs an amplifying operation using the bus voltage (power supply voltage) switched by the switching unit 11, generates power, and generates the generated power. Supply to output node N2. Specifically, the amplification unit 12 includes transistors Tr6 and Tr5 and resistors Re1 and Re2.

  The transistor Tr6 is, for example, an NPN bipolar transistor, the base is connected between the emitter of the transistor Tr1 and the resistor R1, the collector is connected to the power supply 13, and the emitter is connected to the output node N2 via the resistor Re1. . The transistor Tr5 is, for example, a PNP-type bipolar transistor, the base is connected between the resistor R1 and the emitter of the transistor Tr2, the collector is connected to the power supply 14, and the emitter is connected to the output node N2 via the resistor Re2. .

  The amplifying unit 12 turns on the transistor Tr6 in a state where the transistor Tr1 is turned on, and the transistor Tr6 functions as an emitter follower, and performs a current amplification operation using the power supply voltage (+ V2) from the power supply 13 to generate power.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of the transistor Tr1 of the switching unit 11 is + V2 or less, the transistor Tr6 is connected to the potential of the collector side bus (P line). PL2 potential) exceeds the base potential (command voltage CV) to the positive side and is the closest transistor to the base potential. Therefore, the transistor operates in the active region and the voltage difference between the bus voltage and the output voltage (base voltage) is reduced. This is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr6, and the loss power is dissipated by the temperature rise of the transistor Tr6 and disappears to the outside.

  In addition, the amplifying unit 12 turns on the transistor Tr5 with the transistor Tr2 turned on, the transistor Tr5 functions as an emitter follower, performs a current amplifying operation using the power supply voltage (−V2) from the power supply 14, and supplies power. Generate.

  For example, when the current output current Io is in the negative output direction and the base potential (command voltage CV) of the transistor Tr1 of the switching unit 11 is −V2 or more, the transistor Tr5 is connected to the collector-side bus potential (N Since the transistor in which the potential of the line NL2) exceeds the base potential (command voltage CV) to the negative side and is closest to the base potential, the transistor operates in the active region and is a voltage component of the difference between the bus voltage and the output voltage (base voltage). As a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr5, and the loss power dissipates due to the temperature rise of the transistor Tr5 and disappears to the outside.

  The ground node N3 is connected to an external ground potential. That is, the potential of the ground node N3 is maintained at the ground potential.

  The power supply 13 generates a positive power supply voltage (+ V2) with respect to the ground node N3. The power supply 13 supplies the generated positive power supply voltage (+ V2) to the amplification unit 12 via the P line PL2.

  The power supply 14 generates a negative power supply voltage (−V2) with respect to the ground node N3. The power supply 14 supplies the generated negative power supply voltage (−V2) to the amplification unit 12 via the N line NL2.

  The output node N2 supplies the power generated by the amplifying unit 12 to the load LD. The load LD is, for example, an inductance load, and the phase of the flowing current is delayed with respect to the phase of the applied voltage. That is, the phase of the output current from the output node N2 is delayed by, for example, about 90 ° with respect to the phase of the output voltage from the output node N2 (see FIG. 15).

  The inventor performed a simulation on the operation of the class B amplifier circuit AMP10 shown in FIG. Specifically, the absolute value of the power supply voltage is set to V2 = 90 V, and the irradiation position of the laser beam is moved by the mirror 5a of the galvano scanner 1 at a pitch of 1.0 mm (the pitch of the rotor of the motor 5b is 0.3 ° pitch). Output current from the output node N2 to the load LD, output voltage from the output node N2 to the load LD, power loss in the power supply from the output node N2 to the load LD, in the class B amplifier circuit AMP10 A simulation was performed on changes in bus voltage.

The power loss was calculated by a method as shown in FIGS. In the case of a push-pull type amplifier circuit such as the class B amplifier circuit AMP10 shown in FIG. 14, the positive current (current flowing in the discharge direction: section A shown in FIG. 18C) is as shown in FIG. In addition, a negative current (current flowing in the direction of suction: section B shown in FIG. 18C) flows from the upper transistor Q1 of the output node N2, as shown in FIG. It flows through transistor Q2. For this reason, the method for calculating the power loss from the current-voltage waveform needs to be considered according to the direction of the current. The difference voltage obtained by subtracting the output voltage from the bus voltage is applied between the collector-emitter of each of the transistors Q1 and Q2 and the emitter resistances Re1 and Re2, and the output current Io flows. ) Is expressed by the following Equation 1, where Vb is the bus voltage and Vo is the output voltage.
P (t) = (Vb−Vo) × Io Equation 1

The average power loss of the entire amplifier circuit may be calculated by averaging the power loss P (t) over time. In other words, the positive current Io1 shown in FIG. 18A is set as in the following formula 2, and the negative current Io2 shown in FIG. 18B is set as in the following formula 3.
Io1 (t) = Io (t) (Io ≧ 0, section A)
= 0 (Io <0, section B) (2)
Io2 (t) = 0 (Io ≧ 0, section A)
= Io (t) (Io <0, section B) (3)

At this time, the average power loss Pd from time T1 to time T2 can be calculated by the following equation 4.
Pd = ∫ {Io1 (t) · (Vcc−Vo (t))
+ Io2 (t) · (−Vcc−Vo (t))} dt Equation 4

  The integral symbol of Equation 4 represents time integration from time T1 to time T2.

  When simulation was performed, the simulation result shown in FIG. 15 was obtained. In FIG. 15, the output current from the output node N2 to the load LD is indicated by a two-dot chain line, the output voltage from the output node N2 to the load LD is indicated by a broken line, and the loss power in the power supply from the output node N2 to the load LD is shown. A solid line indicates a change in bus voltage in the class B amplifier circuit AMP10 by a one-dot chain line.

  As shown in FIG. 15, there are cases where the output voltage is negative even when the output current is positive, and the output voltage is positive even when the output current is negative. For example, in the period T1 in which the output current is positive, the output voltage changes from positive → 0 → negative, whereas the bus voltage is fixed to a positive constant value V2 (= 90V). In the period T2 in which the output current is negative, the output voltage changes from negative → 0 → positive, whereas the bus voltage is fixed to a negative constant value −V2 (= −90V). As can be seen from the graph shown in FIG. 15, when the signs of the output current and the output voltage are different, a large voltage difference is generated between the output voltage and the bus voltage, and the loss power is considerably increased. It can be seen that the peak of the power loss reaches 450 W, and at that moment, the signs of the output voltage and the output current are opposite. The average power loss in the case shown in FIG. 15 reaches 239.1 W, for example.

  As described above, when the class B linear amplifier method is adopted as the driving method of the galvano scanner, the loss is about 250 W at the maximum at 2000 pps operation, and it is difficult to increase the driving speed of the galvano scanner beyond this. . When high-speed response of the motor is required, such as driving a galvano scanner, the required torque increases, and the current capacity and bus voltage required for the amplifier are also increasing.・ It is becoming unrealistic in terms of external dimensions and cost. That is, when the class B amplifier circuit AMP10 shown in FIG. 14 is used, power loss is large, and it is difficult to increase the speed of the galvano scanner while improving the accuracy of the galvano scanner.

  On the other hand, the present inventor examined other D-class, G-class, and H-class amplifier systems in order to reduce power loss. Class D amplification is a method of obtaining a necessary voltage output by switching a bus voltage by a method such as PWM and providing a low-pass filter in an output stage. Class G amplification is a method in which several fixed voltage sources are prepared and switched as a bus voltage. Class H amplification is a method of varying the bus voltage steplessly while predicting the bus voltage.

  When considered as a driving method for a galvano scanner, the class D amplifier method provides a triangular wave comparison and dead time, so the response of the amplifier is poor, the output current tends to be uneven, and the frequency characteristics depend on the voltage amplitude. Therefore, it is considered difficult to satisfy the positioning accuracy required for the galvano scanner.

  In addition, the class H amplifier system requires a control unit for changing the bus voltage while predicting it according to the output voltage, and a variable power supply having the same level of response as the main amplifier stage (for example, a bandwidth of about 200 kHz). Since a circuit is required, the circuit configuration is complicated, and it is considered difficult to keep the cost of the linear amplifier within the realization cost required for the galvano scanner.

  On the other hand, with the class G amplifier method, it is possible to satisfy the positioning accuracy required for the galvano scanner, and it is possible to keep the cost of the linear amplifier within the realization cost required for the galvano scanner. Is done.

  Under such expectation, the present inventor replaced the class B amplifier circuit AMP10 as shown in FIG. 14 as the amplifier circuit AMP in the drive amplifier 4 of the galvano scanner 1 with a class G as shown in FIG. The use of the amplifier circuit AMP20 was examined. In the following, a description will be given focusing on the parts different from the class B amplifier circuit AMP10 as shown in FIG.

  A class B amplifier circuit AMP20 shown in FIG. 16 includes a switching unit 21 and an amplifying unit 22 instead of the switching unit 11 and the amplifying unit 12, and further includes a power source 25 and a power source 26.

  The switching unit 21 selects from two types of power supply voltages (V2, V1) according to the current direction of the output current Io, the command voltage CV received at the input node N1, and the potential of each connected bus. The bus voltage is switched to the specified power supply voltage. The two types of power supply voltages include V1 (for example, V1 = V1 / 2) whose absolute value is smaller than the power supply voltage V2 in addition to the power supply voltage V2 similar to that of the class B amplifier circuit AMP10. In other words, the switching unit 21 generates a P line PL2, a P line PL1, a P line PL1, a P line PL1, Either the N line NL2 or the N line NL1 is selectively activated, the power supply voltage (+ V2) by the power supply 13, the power supply voltage (+ V1) by the power supply 25, the power supply voltage (-V2) by the power supply 14, and the power supply by the power supply 26 The bus voltage is switched between the voltage (−V1).

  Specifically, the switching unit 21 further includes Zener diodes ZD6 and ZD1, transistors Tr12 and Tr11, diodes D8 and D5, and resistors R4 and R5, as compared with the switching unit 11 (see FIG. 14).

  The Zener diode ZD6 has an anode connected to the Zener diode ZD4 and the base of the transistor Tr1, and a cathode connected to the current source CS1 and the diode D8. The Zener diode ZD1 has an anode connected to the current source CS2 and the diode D5, and a cathode connected to the Zener diode ZD3 and the base of the transistor Tr2. The transistor Tr12 is, for example, an NPN-type bipolar transistor, the base is connected between the current source CS1 and the Zener diode ZD6 via the diode D8, the collector is connected to the power supply 13, and the emitter is connected to the resistor R4. . The transistor Tr11 is, for example, a PNP-type bipolar transistor, the base is connected between the Zener diode ZD1 and the current source CS2 via the diode D5, the collector is connected to the power supply 14, and the emitter is connected to the resistor R5. .

  If the current direction of the output current Io is the positive output direction (the direction indicated by the solid line in FIG. 16), the switching unit 21 turns on at least a part of the transistors Tr1 and Tr12, and the upper transistor Tr6 in the amplification unit 12 Tr8 is operated. Then, the switching unit 21 selects a bus line having a voltage value that exceeds the base potential of each of the transistors Tr1 and Tr12 following the command voltage CV to the positive side and has the closest value.

  For example, when the base potential (command voltage CV) of each of the transistors Tr1 and Tr12 is + V1 or more, the switching unit 21 uses the base potential of each of the transistors Tr1 and Tr12 as a bus having a voltage value that exceeds the base potential and has the closest value. P line PL2 is selected. That is, the switching unit 21 turns on the transistor Tr1 and the transistor Tr12, activates the P line PL2, activates the connection between the power supply 13 and the amplification unit 22, and switches the bus voltage to the power supply voltage (+ V2) by the power supply 13.

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1 and Tr12 is not less than −V2 and less than + V1, the switching unit 21 exceeds the base potential of each of the transistors Tr1 and Tr12 to the positive side and has the closest value. P line PL1 is selected as a voltage value bus. At this time, the transistor Tr12 is in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and the transistor Tr12 is turned off. That is, the switching unit 21 turns off the transistor Tr12 and turns on the transistor Tr1, activates the P line PL1, enables the connection between the power supply 25 and the amplification unit 22, and changes the bus voltage to the power supply voltage (+ V1) by the power supply 25. Switch.

  Further, the switching unit 21 turns on at least a part of the transistors Tr2 and Tr11 when the current output current Io is in the negative output direction (the direction indicated by the broken line in FIG. 16). The transistors Tr5 and Tr3 are operated. Then, the switching unit 21 selects a bus having a voltage value that exceeds the base potential of the transistors Tr2 and Tr11 following the command voltage CV to the negative side and has the closest value.

  For example, when the base potential (command voltage CV) of each of the transistors Tr2 and Tr11 is equal to or lower than −V1, the switching unit 21 generates a voltage value bus whose voltage value is closest to the base potential of each of the transistors Tr2 and Tr11 to the negative side. N line NL2 is selected as That is, the switching unit 21 turns on the transistor Tr1 and the transistor Tr12, activates the N line NL2, activates the connection between the power supply 14 and the amplification unit 22, and switches the bus voltage to the power supply voltage (−V2) by the power supply 14.

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr2 and Tr11 is greater than −V1 and less than or equal to + V2, the switching unit 21 exceeds the base potential of each of the transistors Tr2 and Tr11 to the negative side and has the highest value. The N line NL1 is selected as a bus having a close voltage value. At this time, the transistor Tr11 is in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and the transistor Tr11 is turned off. That is, the switching unit 21 turns off the transistor Tr11 and turns on the transistor Tr2, activates the N line NL1, enables the connection between the power supply 26 and the amplification unit 22, and sets the bus voltage to the power supply voltage (−V1) by the power supply 26. Switch to.

  The amplifying unit 22 performs an amplifying operation using the power supply voltage selected by the switching unit 21, generates power, and supplies the generated power to the output node N2. Specifically, the amplifying unit 22 further includes transistors Tr8 and Tr3 and diodes D4 and D1 as compared with the amplifying unit 11 (see FIG. 14).

  The transistor Tr8 is, for example, an NPN bipolar transistor, the base is connected between the emitter of the transistor Tr12 and the resistor R4, and the collector is connected to the power supply 13. The transistor Tr8 has an emitter connected to the emitter of the transistor Tr12 via the resistor R4, is connected to the power supply 25 via the diode D4, and is connected to the collector of the transistor Tr6. The transistor Tr3 is a PNP bipolar transistor, for example, and has a base connected between the resistor R5 and the emitter of the transistor Tr11, and a collector connected to the power supply 14. The transistor Tr3 has an emitter connected to the emitter of the transistor Tr11 via the resistor R5, is connected to the power supply 26 via the diode D1, and is connected to the collector of the transistor Tr5. The diode D4 has a cathode connected to the emitter of the transistor Tr8 and the collector of the transistor Tr6, and an anode connected to the power supply 25. The diode D1 has a cathode connected to the power supply 26 and an anode connected to the emitter of the transistor Tr3 and the collector of the transistor Tr5.

  The amplifying unit 22 turns on the transistors Tr8 and Tr6 while the transistors Tr12 and Tr1 are turned on, the transistor Tr8 functions as an emitter follower, performs a current amplification operation using the power supply voltage (+ V2) from the power supply 13, and performs power Is generated.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1 and Tr12 of the switching unit 21 is equal to or higher than + V1, the transistor Tr8 is connected to the collector-side bus potential. Since the transistor (potential of the P line PL2) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, the transistor operates in the active region, and the difference between the bus voltage and the output voltage (base voltage) The voltage is shared as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr8, and the loss power is dissipated by the temperature rise of the transistor Tr8 and disappears to the outside. On the other hand, in the transistor Tr6 on the output node N2 side of the transistor Tr8 operating in the active region, the diode D4 connected to the collector is reverse-biased, so that the bus on the collector side (P line PL1) is cut off by the diode D4. The In addition, the transistor Tr6 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr8 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr6 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  In the amplifying unit 22, the transistor Tr12 is turned off and the transistor Tr6 is turned on while the transistor Tr12 is turned off and the transistor Tr1 is turned on. The transistor Tr6 functions as an emitter follower, and the power supply voltage (+ V1) by the power supply 25 Is used to generate a power by performing a current amplification operation.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1 and Tr12 of the switching unit 21 is not less than −V2 and less than + V1, the transistor Tr8 Since the potential of the bus (potential of the P line PL1) exceeds the base potential (command voltage CV) to the positive side, the transistor Tr12 in the previous stage is turned off in accordance with the reverse bias between the base and the emitter. The transistor Tr6 is a transistor whose collector-side bus potential (P-line PL1 potential) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr6, and the loss power is dissipated by the temperature rise of the transistor Tr6 and disappears to the outside.

  The amplifying unit 22 turns on the transistors Tr3 and Tr5 with the transistors Tr11 and Tr2 turned on, the transistor Tr3 functions as an emitter follower, and performs a current amplification operation using the power supply voltage (−V2) from the power supply 14 To generate power.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each of the transistors Tr2 and Tr11 of the switching unit 21 is −V1 or less, the transistor Tr3 is connected to the collector-side bus. Since the potential (the potential of the N line NL2) exceeds the base potential (command voltage CV) to the negative side and is the closest transistor to the base potential, the transistor operates in the active region and the difference between the bus voltage and the output voltage (base voltage) This voltage is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr3, and the loss power is dissipated by the temperature rise of the transistor Tr3 and disappears to the outside. On the other hand, in the transistor Tr5 on the output node N2 side of the transistor Tr3 operating in the active region, the diode D1 connected to the collector is reverse-biased, so that the bus on the collector side (N line NL1) is cut off by the diode D1. The The transistor Tr5 has an emitter follower operation, so that the emitter potential rises in the same way as the base potential (command voltage CV). However, since the collector is connected to the emitter of the transistor Tr3 operating in the active region, the collector Tr5 The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr5 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  In addition, the amplifying unit 22 turns off the transistor Tr3 and turns on the transistor Tr5 in a state where the transistor Tr11 is turned off and the transistor Tr2 is turned on, and the transistor Tr5 functions as an emitter follower. A current amplifying operation is performed using V1) to generate electric power.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each of the transistors Tr2 and Tr11 of the switching unit 21 is greater than −V1 and less than + V2, the transistor Tr3 Since the potential of the bus (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the negative side, the transistor Tr11 in the previous stage is turned off in accordance with the reverse bias between the base and the emitter. The transistor Tr5 is a transistor whose collector-side bus potential (the potential of the N line NL1) exceeds the base potential (command voltage CV) on the negative side and is closest to the base potential, and thus operates in the active region. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr5, and the loss power dissipates due to the temperature rise of the transistor Tr5 and disappears to the outside.

  The power supply 25 generates a positive power supply voltage (+ V1) with respect to the ground node N3. The power supply 25 supplies the generated positive power supply voltage (+ V1) to the amplification unit 22 via the P line PL1.

  The power supply 26 generates a negative power supply voltage (−V2) with respect to the ground node N3. The power supply 26 supplies the generated negative power supply voltage (−V1) to the amplification unit 22 via the N line NL1.

  The inventor performed a simulation on the operation of the class G amplifier circuit AMP20 shown in FIG. Specifically, the absolute value of the power supply voltage is V2 = 90V, V1 = V2 / 2 = 45V, and the irradiation position of the laser beam by the mirror 5a of the galvano scanner 1 is 1.0 mm pitch (at the angle of the rotor of the motor 5b). Loss at the output current from the output node N2 to the load LD, the output voltage from the output node N2 to the load LD, and the power supply from the output node N2 to the load LD when the movement at a pitch of 0.3 ° is repeated. A simulation was performed on the power and the change in the bus voltage in the class G amplifier circuit AMP20.

  As a result, the simulation result shown in FIG. 17 was obtained. In FIG. 17, the output current from the output node N2 to the load LD is indicated by a two-dot chain line, the output voltage from the output node N2 to the load LD is indicated by a broken line, and the loss power in the power supply from the output node N2 to the load LD is shown. A solid line indicates a change in bus voltage in the class B amplifier circuit AMP10 by a one-dot chain line.

  As can be seen from FIG. 17, for example, in the period T11 in which the output current is positive, the output voltage changes from positive → 0 → negative, whereas the bus voltage is an absolute value from a positive value + V2 (= 90V). Is switched to a small positive value + V1 (= 45V). In the period T12 in which the output current is negative, the output voltage changes from negative → 0 → positive, whereas the bus voltage is a negative value having a smaller absolute value from the negative value −V2 (= −90V). It is switched to -V1 (= -45V).

  Comparing the graph shown in FIG. 15 with the graph shown in FIG. 17, it can be seen that the loss power can be considerably suppressed by switching the bus voltage to a smaller absolute value. The average power loss at this time can be halved to about 131.6 W, for example.

  However, as can be seen from the graph shown in FIG. 17, when the signs of the output current and the output voltage are different, there is a large voltage difference between the output voltage and the bus voltage, and the loss power is still high. I understand. That is, a large voltage difference occurs between the output voltage and the bus voltage when the signs of the output current and the output voltage are different at the time of positive current output and negative current output, respectively. Therefore, a large power loss tends to occur. When the power loss is large, it is difficult to increase the speed of the galvano scanner while improving the accuracy of the galvano scanner.

  Therefore, in the first embodiment, in the class G amplifier circuit, the power loss is reduced by switching the bus voltage to a power supply voltage selected from three or more power supply voltages. For example, a circuit system is proposed in which zero voltage can be supplied at each of positive current output and negative current output. Below, it demonstrates centering on a different part from the class G amplifier circuit AMP20 (refer FIG. 16).

  Specifically, a class G amplifier circuit AMP120 as shown in FIG. 1 is used as the amplifier circuit AMP in the drive amplifier 4 of the galvano scanner 1 instead of the class G amplifier circuit AMP20 as shown in FIG. In the class G amplifier circuit AMP120, for example, a portion surrounded by a broken line is added to the class G amplifier circuit AMP20 (see FIG. 16).

  For example, transistors Tr7 and Tr10 are added so that a positive current can flow from the zero voltage line PL0. The transistor Tr10 has a Darlington connection for increasing the current amplification factor. Note that the transistor Tr10 may be omitted if the current gain hFE of the transistor Tr7 is sufficient.

  In addition, the Zener diode ZD6 determines the operating point by keeping the bias voltage of the transistor Tr7 constant. As an operation, when the output current is positive, the output voltage is zero or less (more precisely, when the forward voltage drop of the diode is cut, if a Schottky barrier diode is used, it is −0.2 V or less). Sometimes, the diode D3 becomes conductive and current is supplied from the ground node N3 via the zero voltage line PL0.

  More specifically, the class G amplifier circuit AMP120 includes a switching unit 121 and an amplifying unit 122 instead of the switching unit 21 and the amplifying unit 22.

  The switching unit 121 switches the bus voltage from three or more types of power supply voltages (V2, V1, V0) to a selected power supply voltage. The three or more types of power supply voltages include, for example, power supply voltage V2 and V1 (for example, V1 = V1 / 2) whose absolute value is smaller than power supply voltage V2, and V0 (for example, ground) whose absolute value is smaller than power supply voltage V1. Voltage). For example, the switching unit 121 generates a P line PL2, a P line PL1, a P line PL1, a P line PL1, and a P line PL1, in accordance with the current direction of the output current Io, the base potential of each transistor following the command voltage CV, and the potential of each connected bus. Any one of the zero voltage line PL0, the N line NL2, the N line NL1, and the zero voltage line NL0 is selectively activated, and the power supply voltage (+ V2) by the power supply 13, the power supply voltage (+ V1) by the power supply 25, and the ground node N3. The bus voltage is switched between the power supply voltage (V0), the power supply voltage (-V2) by the power supply 14, and the power supply voltage (-V1) by the power supply 26.

  Specifically, the switching unit 121 further includes Zener diodes ZD5 and ZD2, transistors Tr10 and Tr9, diodes D7 and D6, and resistors R2 and R3, as compared with the switching unit 21 (see FIG. 16).

  The Zener diode ZD5 has an anode connected to the Zener diode ZD6 and the diode D7, and a cathode connected to the current source CS1 and the diode D8. The Zener diode ZD2 has an anode connected to the current source CS2 and the diode D5, and a cathode connected to the Zener diode ZD1 and the diode D6. The transistor Tr10 is, for example, an NPN-type bipolar transistor, the base is connected between the Zener diode ZD5 and the Zener diode ZD6 via the diode D7, the collector is connected to the power supply 13, and the emitter is connected to the resistor R2. . The transistor Tr9 is, for example, a PNP-type bipolar transistor, the base is connected between the Zener diode ZD1 and the Zener diode ZD2 via the diode D6, the collector is connected to the power supply 14, and the emitter is connected to the resistor R3. .

  If the direction of the current output current Io is the positive output direction (the direction indicated by the solid line in FIG. 1), the switching unit 121 turns on at least a part of the transistors Tr1, Tr10, Tr12, and the upper transistor in the amplification unit 12 Tr6, Tr7, Tr8 are operated. Then, the switching unit 121 selects a bus having a voltage value that exceeds the base potential of each of the transistors Tr1, Tr10, and Tr12 that follows the command voltage CV on the positive side and that is closest in value.

  For example, when the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12 is equal to or higher than + V1, the switching unit 121 exceeds the base potential of each transistor Tr1, Tr10, Tr12 on the positive side and has the closest value. P line PL2 is selected as the value bus. That is, the switching unit 121 turns on the transistors Tr1, Tr10, Tr12, activates the P line PL2, enables the connection between the power supply 13 and the amplification unit 122, and switches the bus voltage to the power supply voltage (+ V2) by the power supply 13.

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12 is 0 or more and less than + V1, the switching unit 121 exceeds the base potential of each of the transistors Tr1 and Tr12 to the positive side and has the highest value. P line PL1 is selected as a bus having a close voltage value. At this time, the transistor Tr12 is in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and the transistor Tr12 is turned off. That is, the switching unit 121 turns off the transistor Tr12 and turns on the transistors Tr1 and Tr10, activates the P line PL1, enables the connection between the power supply 25 and the amplification unit 122, and sets the bus voltage to the power supply voltage (+ V1) by the power supply 25. ).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1 and Tr12 is −V2 or more and less than 0, the switching unit 121 exceeds the base potential of each of the transistors Tr1, Tr10, and Tr12 to the positive side and has a value. The zero voltage line PL0 is selected as the closest voltage value bus. At this time, the transistors Tr10 and Tr12 are in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 121 turns off the transistors Tr10 and Tr12 and turns on the transistor Tr1, activates the zero voltage line PL0 to enable the connection between the ground node N3 and the amplification unit 122, and supplies the bus voltage to the power supply by the ground node N3. Switch to voltage (V0).

  Further, the switching unit 121 turns on at least a part of the transistors Tr2, Tr9, Tr11 if the current output current Io direction is a negative output direction (direction indicated by a broken line in FIG. The transistors Tr5 and Tr3 on the side are operated. Then, the switching unit 121 selects a bus having a voltage value that is closest to the negative side of the base potential of the transistors Tr2, Tr9, and Tr11 that follows the command voltage CV and that has the closest value.

  For example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11 is −V1 or less, the switching unit 121 exceeds the base potential of each transistor Tr2, Tr9, Tr11 to the negative side and has the closest value. The N line NL2 is selected as the voltage value bus. That is, the switching unit 121 turns on the transistor Tr1, the transistor Tr9, and the transistor Tr12, activates the N line NL2, enables the connection between the power supply 14 and the amplification unit 122, and sets the bus voltage to the power supply voltage (−V2) by the power supply 14 Switch to.

  Alternatively, for example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11 is greater than −V1 and equal to or less than 0, the switching unit 121 exceeds the base potential of each transistor Tr2, Tr9, Tr11 to the negative side. The N line NL1 is selected as the bus having the closest voltage value. At this time, the transistor Tr11 is in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and the transistor Tr11 is turned off. That is, the switching unit 121 turns off the transistor Tr11 and turns on the transistors Tr2 and Tr9, activates the N line NL1, enables the connection between the power supply 26 and the amplification unit 122, and sets the bus voltage to the power supply voltage (− Switch to V1).

  Alternatively, for example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11 is greater than 0 and less than or equal to + V2, the switching unit 121 exceeds the base potential of each transistor Tr2, Tr9, Tr11 to the negative side and The zero voltage line NL0 is selected as the bus having the closest voltage value. At this time, the transistors Tr9 and Tr11 are in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 21 turns off the transistors Tr9 and Tr11 and turns on the transistor Tr2, activates the zero voltage line NL0, enables the connection between the ground node N3 and the amplification unit 122, and supplies the bus voltage to the power supply by the ground node N3. Switch to voltage (V0).

  The amplification unit 122 performs an amplification operation using the power supply voltage selected by the switching unit 121, generates power, and supplies the generated power to the output node N2. Specifically, the amplifying unit 122 further includes transistors Tr7 and Tr4 and diodes D3 and D2 as compared with the amplifying unit 21 (see FIG. 16).

  The transistor Tr7 is, for example, an NPN bipolar transistor, the base is connected between the emitter of the transistor Tr10 and the resistor R2, and the collector is connected to the collector of the transistor Tr8, the resistor R4, and the diode D4. The transistor Tr7 has an emitter connected to the emitter of the transistor Tr10 via the resistor R2, is connected to the ground node N3 via the diode D3, and is connected to the collector of the transistor Tr6. The transistor Tr4 is a PNP bipolar transistor, for example, and has a base connected between the resistor R3 and the emitter of the transistor Tr9, and a collector connected to the emitter of the transistor Tr3, the resistor R5, and the diode D1. The transistor Tr4 has an emitter connected to the emitter of the transistor Tr9 via the resistor R3, is connected to the ground node N3 via the diode D2, and is connected to the collector of the transistor Tr5. The diode D3 has a cathode connected to the emitter of the transistor Tr7 and the collector of the transistor Tr6, and an anode connected to the ground node N3. The diode D2 has a cathode connected to the ground node N3 and an anode connected to the emitter of the transistor Tr4 and the collector of the transistor Tr5.

  The amplifying unit 122 turns on the transistors Tr8, Tr7, and Tr6 with the transistors Tr12, Tr10, and Tr1 turned on, the transistor Tr8 functions as an emitter follower, and amplifies the current using the power supply voltage (+ V2) from the power supply 13 Operates and generates power.

  For example, when the current output current Io is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12 of the switching unit 121 is + V1 or more, the transistor Tr8 is connected to the collector-side bus. Transistor (potential of the P line PL2) exceeds the base potential (command voltage CV) to the positive side and is the closest transistor to the base potential, so that it operates in the active region, and the bus voltage and the output voltage (base voltage) The voltage difference is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr8, and the loss power is dissipated by the temperature rise of the transistor Tr8 and disappears to the outside. On the other hand, in the transistors Tr7 and Tr6 on the output node N2 side of the transistor Tr8 operating in the active region, the diodes D4 and D3 connected to the collector are reverse-biased, so that the diode-side bus (P Line PL1, zero voltage line PL0) is cut off. Further, the transistors Tr7 and Tr6 have the emitter potential lowered in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr8 operating in the active region. The collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr7 and Tr6 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 122 also turns off the transistor Tr8 and turns on the transistors Tr7 and Tr6 in a state where the transistor Tr12 is turned off and the transistors Tr10 and Tr1 are turned on, and the transistor Tr7 functions as an emitter follower. A current amplification operation is performed using the voltage (+ V1) to generate electric power.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12 of the switching unit 121 is 0 or more and less than + V1, the transistor Tr8 Since the potential of the bus (the potential of the P line PL1) exceeds the base potential (command voltage CV) to the positive side, the transistor Tr12 in the previous stage is turned off in accordance with the reverse bias between the base and the emitter. Further, the transistor Tr7 is a transistor whose collector-side bus potential (P-line PL1 potential) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, and therefore operates in the active region. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr6, and the loss power is dissipated by the temperature rise of the transistor Tr6 and disappears to the outside. On the other hand, in the transistor Tr6 on the output node N2 side from the transistor Tr7 operating in the active region, the diode D3 connected to the collector is reverse-biased, so that the bus on the collector side (zero voltage line PL0) is cut off by the diode D3. Is done. In addition, the transistor Tr6 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr7 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr6 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 122 also turns off the transistors Tr8 and Tr7 and turns on the transistor Tr6 with the transistors Tr12 and Tr10 turned off and the transistor Tr1 turned on, and the transistor Tr6 functions as an emitter follower. A current amplification operation is performed using the power supply voltage (V0) to generate electric power.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12 of the switching unit 121 is −V2 or more and less than 0, the transistors Tr8 and Tr7 are Since the potential of the bus on the emitter side (the potential of the P line PL1, the zero voltage line PL0) exceeds the base potential (command voltage CV) to the positive side, the transistors Tr12 and Tr10 in the previous stage are reverse-biased between the base and the emitter. Turn off in response to turning off. The transistor Tr6 is a transistor whose collector-side bus potential (P-line PL1 potential) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr6, and the loss power is dissipated by the temperature rise of the transistor Tr6 and disappears to the outside.

  The amplifying unit 122 uses the power supply voltage (−V2) from the power supply 14 as the transistors Tr3, Tr4, and Tr5 are turned on while the transistors Tr11, Tr9, and Tr2 are turned on, and the transistor Tr3 functions as an emitter follower. Current amplification operation to generate electric power.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11 of the switching unit 121 is −V1 or less, the transistor Tr3 Since the bus potential (the potential of the N line NL2) exceeds the base potential (command voltage CV) to the negative side and is closest to the base potential, the transistor operates in the active region, and the bus voltage and the output voltage (base voltage) This voltage difference is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr3, and the loss power is dissipated by the temperature rise of the transistor Tr3 and disappears to the outside. On the other hand, the transistors Tr4 and Tr5 on the output node N2 side of the transistor Tr3 operating in the active region are reverse-biased with the diodes D1 and D2 connected to the collector, so that the diode-side bus (N Line NL1, zero voltage line NL0) are interrupted. Further, the transistors Tr4 and Tr5 have the emitter potential lowered in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr3 operating in the active region. The collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr4 and Tr5 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 122 also turns off the transistor Tr3 and turns on the transistors Tr4 and Tr5 in a state where the transistor Tr11 is turned off and the transistors Tr9 and Tr2 are turned on, and the transistor Tr4 functions as an emitter follower. A current amplification operation is performed using the power supply voltage (−V1) to generate electric power.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11 of the switching unit 121 is greater than −V1 and equal to or less than 0, the transistor Tr3 Since the potential of the emitter side bus (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the negative side, the transistor Tr11 in the previous stage is turned off as a reverse bias between the base and the emitter. To do. The transistor Tr4 is a transistor in which the potential of the bus on the collector side (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr4, and the loss power dissipates due to the temperature rise of the transistor Tr4 and disappears to the outside. On the other hand, in the transistor Tr5 on the output node N2 side of the transistor Tr4 operating in the active region, the diode D2 connected to the collector is reverse-biased, so that the collector-side bus (zero voltage line NL0) is cut off by the diode D2. Is done. Further, the transistor Tr5 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr4 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr5 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 122 also turns off the transistors Tr3 and Tr4 and turns on the transistor Tr5 with the transistors Tr11 and Tr9 turned off and the transistor Tr2 turned on, and the transistor Tr5 functions as an emitter follower. The power is generated by performing a current amplification operation using the power supply voltage (V0) generated by.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11 of the switching unit 121 is greater than 0 and less than + V2, the transistors Tr3, Tr4 are Since the potential of the bus on the emitter side (the potential of the N line NL1 and the zero voltage line NL0) exceeds the base potential (command voltage CV) to the negative side, the transistors Tr11 and Tr9 in the previous stage are reverse-biased between the base and the emitter. Turn off in response to turning off. The transistor Tr5 is a transistor in which the potential of the bus on the collector side (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr5, and the loss power dissipates due to the temperature rise of the transistor Tr5 and disappears to the outside.

  The inventor performed a simulation on the operation of the class G amplifier circuit AMP120 shown in FIG. Specifically, the absolute value of the power supply voltage is V2 = 90V, V1 = V2 / 2 = 45V, and the irradiation position of the laser beam by the mirror 5a of the galvano scanner 1 is 1.0 mm pitch (at the angle of the rotor of the motor 5b). Loss at the output current from the output node N2 to the load LD, the output voltage from the output node N2 to the load LD, and the power supply from the output node N2 to the load LD when the movement at a pitch of 0.3 ° is repeated. A simulation was performed on the power and the change in the bus voltage in the class G amplifier circuit AMP20.

  As a result, the simulation result shown in FIG. 2 was obtained. In FIG. 2, the output current from the output node N2 to the load LD is indicated by a two-dot chain line, the output voltage from the output node N2 to the load LD is indicated by a broken line, and the loss power in the power supply from the output node N2 to the load LD is shown. A solid line indicates a change in bus voltage in the class B amplifier circuit AMP10 by a one-dot chain line.

  As can be seen from FIG. 2, for example, in the period (first period) T21 in which the output current is positive, the output voltage changes from positive → 0 → negative, whereas the bus voltage is a positive value + V2 (= 90V) to a positive value + V1 (= 45V) having a smaller absolute value and further to a value V0 (= 0V) having a smaller absolute value. Further, in the period (second period) T22 in which the output current is negative, the output voltage changes from negative → 0 → positive, whereas the bus voltage is more absolute from the negative value −V2 (= −90V). The negative value -V1 (= -45V) having a small value and the value V0 (= 0V) having a smaller absolute value are sequentially switched.

  When the graph shown in FIG. 17 is compared with the graph shown in FIG. 2, the loss is caused by switching the bus voltage to a smaller absolute value (zero voltage) after switching the bus voltage to a smaller absolute value. It turns out that electric power can be suppressed considerably. The average power loss at this time can be reduced to about 91.3 W, for example.

  As described above, in the first embodiment, in the class G amplifier circuit AMP120, the switching unit 121 switches the bus voltage to the power supply voltage selected from three or more types of power supply voltages (V2, V1, and V0). That is, the switching unit 121 changes the bus voltage from the positive power supply voltage + V2 to the positive power supply voltage + V1 (V1 <V2) and the power supply voltage V0 (V0 <V2) in the first period in which the output current from the output node N2 is positive. In the second period in which the output current from the output node N2 is negative, the bus voltage is sequentially switched from the negative power supply voltage −V2 to the negative power supply voltage −V1 and the power supply voltage V0. As a result, the voltage difference between the output voltage and the bus voltage can be reduced at the time of positive current output and negative current output, respectively, so that power loss can be reduced.

  Therefore, when the class G amplifier circuit AMP120 is applied to the galvano scanner 1, it is easy to increase the speed of the galvano scanner 1 while improving the accuracy of the galvano scanner 1.

  Further, in the first embodiment, since power loss can be reduced, a necessary power element can be reduced and the cooling system can be simplified, so that an inexpensive and small drive amplifier 4 (see FIG. 13) is configured. can do.

  In the first embodiment, the power supply voltage V0 is the ground voltage. Thereby, since the number of types of power supply voltages can be increased from the number of types of power supplies, the number of types of power supply voltages can be increased while suppressing an increase in the number of power supplies.

  In the first embodiment, the switching unit 121 enables the connection between the power source (first power source) 13 and the amplifying unit 122 in the first period in which the output current from the output node N2 is positive. The switching unit 121 is sequentially switched to a state in which the connection between the power source (second power source) 25 and the amplification unit 122 is enabled, and a state in which the connection between the ground node N3 and the amplification unit 122 is enabled. In the second period in which the output current is negative, the connection between the power supply (fourth power supply) 26 and the amplification unit 122 is enabled from the state in which the connection between the power supply (third power supply) 14 and the amplification unit 122 is enabled. The state is sequentially switched to the state in which the connection between the ground node N3 and the amplification unit 122 is enabled. Accordingly, the bus voltage can be sequentially switched from + V2 to + V1 and V0 in the first period, and the bus voltage can be sequentially switched from −V2 to −V1 and V0 in the second period.

  As shown in FIG. 3, the class G amplifier circuit AMP120i may use a field effect transistor instead of the bipolar transistor. For example, in the class G amplifier circuit AMP120i shown in FIG. 3, transistors Tr8 ′, Tr7 ′, Tr6 ′, Tr5 ′, Tr4 ′, Tr3 are used instead of the transistors Tr8, Tr7, Tr6, Tr5, Tr4, Tr3 (see FIG. 1). 'Is used. For example, the transistors Tr8 ', Tr7', Tr6 'are N-type MOS transistors, and the transistors Tr5', Tr4 ', Tr3' are P-type MOS transistors. In FIG. 3, MOS field effect transistors are exemplarily illustrated as the transistors Tr8 ′, Tr7 ′, Tr6 ′, Tr5 ′, Tr4 ′, and Tr3 ′. Also good. In this case, in the class G amplifier circuit AMP120i, the transistors Tr12, Tr10, Tr1, Tr2, Tr9, Tr11 (see FIG. 1) can be omitted. That is, since the switching unit 121i and the amplification unit 122i can be shared and the number of transistors can be reduced, the manufacturing cost of the class G amplification circuit AMP120i can be reduced.

Embodiment 2. FIG.
Next, a class G amplifier circuit according to the second embodiment will be described. Below, it demonstrates focusing on a different part from Embodiment 1. FIG.

  In the first embodiment, a circuit system that can supply a zero voltage in each of a positive current supply and a negative current supply is proposed. In the second embodiment, a positive current supply and a negative current supply are provided. We propose a circuit system that can supply a voltage of the opposite sign in each.

  Specifically, a class G amplifier circuit AMP220 as shown in FIG. 4 is used as the amplifier circuit AMP in the drive amplifier 4 of the galvano scanner 1 instead of the class G amplifier circuit AMP120 as shown in FIG. In the class G amplifier circuit AMP220, for example, a portion surrounded by a broken line is added to the class G amplifier circuit AMP20 (see FIG. 16).

  More specifically, the class G amplifier circuit AMP220 includes a switching unit 221 and an amplification unit 222 instead of the switching unit 121 and the amplification unit 122.

  The switching unit 221 includes a P line PL2, a P line PL1, a zero voltage according to the current direction of the output current Io, the base potential of each transistor following the command voltage CV, and the potential of each connected bus. One of the line PL0, the reverse voltage line PL3, the N line NL2, the N line NL1, the zero voltage line NL0, and the reverse voltage line NL3 is selectively activated, and the power supply voltage (+ V2) by the power supply 13 and the power supply voltage by the power supply 25 The bus voltage is switched between (+ V1), the power supply voltage (V0) by the ground node N3, the power supply voltage (−V2) by the power supply 14, and the power supply voltage (−V1) by the power supply 26.

  Specifically, the switching unit 221 further includes Zener diodes ZD8 and ZD7, transistors Tr15 and Tr20, diodes D11 and D10, and resistors R6 and R7, compared to the switching unit 121 (see FIG. 1).

  The Zener diode ZD8 has an anode connected to the Zener diode ZD5 and the diode D8, and a cathode connected to the current source CS1 and the diode D11. The Zener diode ZD7 has an anode connected to the current source CS2 and the diode D10, and a cathode connected to the Zener diode ZD2 and the diode D5. The transistor Tr15 is, for example, an NPN-type bipolar transistor, the base is connected between the current source CS1 and the Zener diode ZD8 via the diode D11, the collector is connected to the power supply 13, and the emitter is connected to the resistor R6. . The transistor Tr20 is, for example, a PNP-type bipolar transistor, the base is connected between the Zener diode ZD7 and the current source CS2 via the diode D10, the collector is connected to the power supply 14, and the emitter is connected to the resistor R7. .

  If the current output current Io direction is the positive output direction (the direction indicated by the solid line in FIG. 4), the switching unit 221 turns on at least a part of the transistors Tr1, Tr10, Tr12, Tr15, and The transistors Tr6, Tr7, Tr8, Tr13 are operated. Then, the switching unit 221 selects a bus having a voltage value that exceeds the base potential of each of the transistors Tr1, Tr10, Tr12, Tr15 following the command voltage CV to the positive side and has the closest value.

  For example, when the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15 is equal to or higher than + V1, the switching unit 221 exceeds the base potential of each transistor Tr1, Tr10, Tr12, Tr15 to the positive side and is a value. P line PL2 is selected as the bus having the closest voltage value. That is, the switching unit 221 turns on the transistors Tr1, Tr10, Tr12, Tr15, activates the P line PL2, enables the connection between the power supply 13 and the amplification unit 222, and changes the bus voltage to the power supply voltage (+ V2) by the power supply 13. Switch.

  Alternatively, for example, when the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15 is 0 or more and less than + V1, the switching unit 221 sets the base potential of each transistor Tr1, Tr10, Tr12, Tr15 to the positive side. P line PL1 is selected as the bus of the voltage value that exceeds At this time, the transistor Tr15 is in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and the transistor Tr15 is turned off. That is, the switching unit 221 turns off the transistor Tr15 and turns on the transistors Tr1, Tr10, Tr12, activates the P line PL1, enables the connection between the power supply 25 and the amplification unit 222, and sets the bus voltage to the power supply voltage by the power supply 25. Switch to (+ V1).

  Alternatively, for example, when the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15 is not less than −V1 and less than 0, the switching unit 221 sets the base potential of each transistor Tr1, Tr10, Tr12, Tr15 to be positive. The zero voltage line PL0 is selected as the bus of the voltage value that is closest to and close to the side. At this time, the transistors Tr12 and Tr15 are in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and is turned off. In other words, the switching unit 221 turns off the transistors Tr12 and Tr15 and turns on the transistors Tr1 and Tr10, activates the zero voltage line PL0, enables the connection between the ground node N3 and the amplification unit 222, and sets the bus voltage to the ground node N3. Switch to the power supply voltage (V0).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, and Tr15 is greater than or equal to −V2 and less than −V1, the switching unit 221 sets the base potential of each of the transistors Tr1, Tr10, Tr12, and Tr15. The reverse voltage line PL3 is selected as the bus of the voltage value that exceeds the positive side and has the closest value. At this time, the transistors Tr10, Tr12, Tr15 are in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and is turned off. In other words, the switching unit 221 turns off the transistors Tr10, Tr12, Tr15 and turns on the transistor Tr1, activates the reverse voltage line PL3, enables the reverse polarity connection between the power supply 26 and the amplification unit 222, and supplies the bus voltage to the power supply. 26 to the power supply voltage (−V1).

  Further, the switching unit 221 turns on at least a part of the transistors Tr2, Tr9, Tr11, and Tr20 when the current output current Io is in the negative output direction (the direction indicated by the broken line in FIG. 4), and the amplification unit 222 is turned on. The lower transistors Tr5, Tr4, Tr3, Tr14 in FIG. Then, the switching unit 221 selects a bus having a voltage value that exceeds the base potential of the transistors Tr2 and Tr11 following the command voltage CV on the negative side and has the closest value.

  For example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20 is −V1 or less, the switching unit 221 exceeds the base potential of each transistor Tr2, Tr9, Tr11, Tr20 to the negative side and The N line NL2 is selected as the bus having the closest voltage value. That is, the switching unit 221 turns on the transistors Tr2, Tr9, Tr11, Tr20, activates the N line NL2, enables the connection between the power supply 14 and the amplification unit 222, and sets the bus voltage to the power supply voltage (−V2) by the power supply 14 Switch to.

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, and Tr20 is greater than −V1 and equal to or less than 0, the switching unit 221 sets the base potential of each of the transistors Tr2, Tr9, Tr11, and Tr20. The N line NL1 is selected as the bus of the voltage value that exceeds the negative side and has the closest value. At this time, the transistor Tr20 is in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and the transistor Tr20 is turned off. That is, the switching unit 221 turns off the transistor Tr20 and turns on the transistors Tr2, Tr9, Tr11, activates the N line NL1, enables the connection between the power supply 26 and the amplification unit 222, and sets the bus voltage to the power supply voltage by the power supply 26. Switch to (-V1).

  Alternatively, for example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20 is greater than 0 and less than or equal to + V1, the switching unit 221 makes the base potential of each transistor Tr2, Tr9, Tr11, Tr20 negative. The zero voltage line NL0 is selected as the bus of the voltage value that is close to the side and has the closest value. At this time, the transistors Tr11 and Tr20 are in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 221 turns off the transistors Tr11 and Tr20 and turns on the transistors Tr2 and Tr9, activates the zero voltage line NL0, enables the connection between the ground node N3 and the amplification unit 222, and sets the bus voltage to the ground node N3. Switch to the power supply voltage (V0).

  Alternatively, for example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20 is greater than + V1 and less than or equal to + V2, the switching unit 221 makes the base potential of each transistor Tr2, Tr9, Tr11, Tr20 negative. The reverse voltage line NL3 is selected as the bus of the voltage value that exceeds and is closest to the side. At this time, the transistors Tr9, Tr11, and Tr20 are in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and is turned off. In other words, the switching unit 221 turns off the transistors Tr9, Tr11, Tr20 and turns on the transistor Tr2, activates the reverse voltage line NL3, enables the reverse polarity connection of the power supply 25 and the amplification unit 222, and supplies the bus voltage to the power supply. 25 to the power supply voltage (+ V1).

  The amplifying unit 222 performs an amplifying operation using the power supply voltage selected by the switching unit 221, generates power, and supplies the generated power to the output node N2. Specifically, the amplifying unit 222 further includes transistors Tr13 and Tr14 and diodes D13 and D12 as compared with the amplifying unit 121 (see FIG. 1).

  The transistor Tr13 is, for example, an NPN bipolar transistor, the base is connected between the emitter of the transistor Tr15 and the resistor R6, and the collector is connected to the power supply 13. The transistor Tr13 has an emitter connected to the emitter of the transistor Tr15 via the resistor R6, is connected to the power supply 25 via the diode D13, and is connected to the collector of the transistor Tr8. The transistor Tr14 is, for example, a PNP bipolar transistor, the base is connected between the resistor R7 and the emitter of the transistor Tr20, and the collector is connected to the power supply 14. The transistor Tr14 has an emitter connected to the emitter of the transistor Tr20 via the resistor R7, is connected to the power supply 26 via the diode D12, and is connected to the collector of the transistor Tr3. The diode D13 has a cathode connected to the emitter of the transistor Tr13 and the collector of the transistor Tr8, and an anode connected to the power supply 25. The diode D12 has a cathode connected to the power supply 26 and an anode connected to the emitter of the transistor Tr14 and the collector of the transistor Tr3. The diode D4 has an anode connected to the ground node N3. The anode of the diode D3 is connected to the power supply 26. The cathode of the diode D1 is connected to the ground node N3. The cathode of the diode D2 is connected to the power supply 25.

  The amplifying unit 222 turns on the transistors Tr13, Tr8, Tr7, and Tr6 with the transistors Tr15, Tr12, Tr10, and Tr1 turned on, the transistor Tr13 functions as an emitter follower, and supplies the power supply voltage (+ V2) from the power supply 13 The power is generated using the current amplification operation.

  For example, when the direction of the current output current Io is the positive output direction and the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15 of the switching unit 221 is + V1 or more, the transistor Tr13 Since the transistor has a bus potential (P line PL2 potential) that exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, the transistor operates in the active region, and the bus voltage and output voltage (base voltage). The voltage difference between the collector and emitter is borne as a voltage drop. At that time, a loss power of voltage × current is generated in the transistor Tr13, and the loss power dissipates due to the temperature rise of the transistor Tr13 and disappears to the outside. On the other hand, the transistors Tr8, Tr7, Tr6 on the output node N2 side of the transistor Tr13 operating in the active region are reverse-biased by the diodes D13, D4, D3 connected to the collector, so that the diodes D13, D4, D3 The bus on the collector side (P line PL1, zero voltage line PL0, reverse voltage line PL3) is cut off. Further, the transistors Tr8, Tr7, Tr6 have the emitter potential lowered in the same manner as the base potential (command voltage CV) for the emitter follower operation, but the collector is connected to the emitter of the transistor Tr13 operating in the active region. Therefore, the collector potential is the same as the base potential (command voltage CV). Thereby, the transistors Tr8, Tr7, Tr6 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistor Tr13 with the transistor Tr15 off and the transistors Tr12, Tr10, and Tr1 on, and turns on the transistors Tr8, Tr7, and Tr6. The transistor Tr8 functions as an emitter follower. Using the power supply voltage (+ V1) by the power supply 25, current amplification operation is performed to generate power.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15 of the switching unit 221 is 0 or more and less than + V1, the transistor Tr13 Since the potential of the bus on the emitter side (potential of the P line PL1) exceeds the base potential (command voltage CV) to the positive side, the transistor Tr15 in the previous stage is turned off in a reverse bias between the base and the emitter. To do. The transistor Tr8 is a transistor whose collector-side bus potential (P-line PL1 potential) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr8, and the loss power is dissipated by the temperature rise of the transistor Tr8 and disappears to the outside. On the other hand, in the transistors Tr7 and Tr6 on the output node N2 side of the transistor Tr8 operating in the active region, the diodes D4 and D3 connected to the collector are reverse-biased. The voltage line PL0 and the reverse voltage line PL3) are cut off. Further, the transistors Tr7 and Tr6 have the emitter potential lowered in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr8 operating in the active region. The collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr7 and Tr6 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistors Tr13 and Tr8 and turns on the transistors Tr7 and Tr6 while the transistors Tr15 and Tr12 are turned off and the transistors Tr10 and Tr1 are turned on. The transistor Tr7 functions as an emitter follower. The power is generated by performing a current amplification operation using the power supply voltage (V0) by the ground node N3.

  For example, when the current output current Io is the positive output direction and the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15 of the switching unit 221 is −V1 or more and less than 0, the transistor Tr13, In Tr8, the emitter-side bus potential (P-line PL1, zero-voltage line PL0 potential) exceeds the base potential (command voltage CV) to the positive side, so that the transistors Tr15 and Tr12 in the previous stage are reverse-biased between the base and the emitter. And turn off in response to turning off. Further, the transistor Tr7 is a transistor in which the potential of the bus on the collector side (the potential of the zero voltage line PL0) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, and thus operates in the active region. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a lost power corresponding to voltage × current is generated in the transistor Tr7, and the lost power is dissipated by the temperature rise of the transistor Tr7 and disappears to the outside. On the other hand, in the transistor Tr6 on the output node N2 side from the transistor Tr7 operating in the active region, the diode D3 connected to the collector is reverse-biased, so that the collector-side bus (reverse voltage line PL3) is cut off by the diode D3. Is done. In addition, the transistor Tr6 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr7 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr6 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistors Tr13, Tr8, and Tr7 and turns on the transistor Tr6 with the transistors Tr15, Tr12, and Tr10 turned off and the transistor Tr1 turned on, and the transistor Tr6 functions as an emitter follower. A current amplification operation is performed using the power supply voltage (-V1) by the power supply 26 to generate electric power.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15 of the switching unit 221 is −V2 or more and less than −V1, the transistor Tr13 , Tr8, and Tr7, the potentials of the buses on the emitter side (potentials of the P line PL1, the zero voltage line PL0, and the reverse voltage line PL3) exceed the base potential (command voltage CV) to the positive side, so the transistors Tr15, Tr12 in the previous stage , Tr10 is turned off in response to turning off with a reverse bias between the base and the emitter. Further, the transistor Tr6 is a transistor in which the potential of the bus on the collector side (the potential of the reverse voltage line PL3) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr6, and the loss power is dissipated by the temperature rise of the transistor Tr6 and disappears to the outside.

  In addition, the amplifying unit 222 turns on the transistors Tr14, Tr3, Tr4, and Tr5 with the transistors Tr20, Tr11, Tr9, and Tr2 turned on, the transistor Tr14 functions as an emitter follower, and the power supply voltage (− A current amplification operation is performed using V2) to generate electric power.

  For example, when the current output current Io is in the negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20 of the switching unit 221 is −V1 or less, the transistor Tr14 Since this is a transistor in which the potential of the side bus (the potential of the N line NL2) exceeds the base potential (command voltage CV) to the negative side and is closest to the base potential, the transistor operates in the active region, and the bus voltage and output voltage (base voltage) ) And the voltage difference between the collector and emitter as a voltage drop. At that time, a loss power of voltage × current is generated in the transistor Tr14, and the loss power is dissipated by the temperature rise of the transistor Tr14 and disappears to the outside. On the other hand, in the transistors Tr3, Tr4, Tr5 on the output node N2 side of the transistor Tr14 operating in the active region, the diodes D12, D1, D2 connected to the collector are reverse-biased, so that the diodes D12, D1, D2 The buses on the collector side (N line NL1, zero voltage line NL0, reverse voltage line NL3) are cut off. The transistors Tr3, Tr4, and Tr5 have an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr14 that operates in the active region. Therefore, the collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr3, Tr4, Tr5 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  In the amplifying unit 222, the transistor Tr14 is turned off and the transistors Tr3, Tr4, and Tr5 are turned on while the transistor Tr20 is turned off and the transistors Tr11, Tr9, and Tr2 are turned on, and the transistor Tr3 functions as an emitter follower. The power is generated by performing a current amplification operation using the power supply voltage (−V1) by the power supply 26.

  For example, when the current output current Io is in the negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20 of the switching unit 221 is greater than −V1 and less than or equal to 0, the transistor Tr14 Corresponds to the fact that the transistor Tr20 in the previous stage is turned off as a reverse bias between the base and the emitter because the potential of the emitter side bus (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the negative side. Turn off. The transistor Tr3 is a transistor in which the potential of the bus on the collector side (the potential of the N line NL1) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr3, and the loss power is dissipated by the temperature rise of the transistor Tr3 and disappears to the outside. On the other hand, in the transistors Tr4 and Tr5 on the output node N2 side of the transistor Tr3 operating in the active region, the diodes D1 and D2 connected to the collector are reverse-biased. The voltage line NL0 and the reverse voltage line NL3) are cut off. Further, the transistors Tr4 and Tr5 have the emitter potential lowered in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr3 operating in the active region. The collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr4 and Tr5 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistors Tr14 and Tr3 and turns on the transistors Tr4 and Tr5 with the transistors Tr20 and Tr11 turned off and the transistors Tr9 and Tr2 turned on, and the transistor Tr4 functions as an emitter follower. The power is generated by performing a current amplification operation using the power supply voltage (V0) by the ground node N3.

  For example, when the current output current Io is in the negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20 of the switching unit 221 is greater than 0 and less than + V1, the transistor Tr14, In Tr3, the potential of the bus on the emitter side (the potential of the N line NL1, zero voltage line NL0) exceeds the base potential (command voltage CV) to the negative side, so that the transistors Tr20 and Tr11 in the previous stage are reverse-biased between the base and the emitter. And turn off in response to turning off. The transistor Tr4 is a transistor in which the potential of the bus on the collector side (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr4, and the loss power dissipates due to the temperature rise of the transistor Tr4 and disappears to the outside. On the other hand, in the transistor Tr5 on the output node N2 side of the transistor Tr4 operating in the active region, the diode D2 connected to the collector is reverse-biased, so that the collector-side bus (reverse voltage line PL3) is cut off by the diode D2. Is done. Further, the transistor Tr5 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr4 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr5 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistors Tr11, Tr3, and Tr4 and turns on the transistor Tr5 while the transistors Tr20, Tr11, and Tr9 are turned off and the transistor Tr2 is turned on, and the transistor Tr5 functions as an emitter follower. The power is generated by performing a current amplification operation using the power supply voltage (+ V1) by the power supply 25.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20 of the switching unit 221 is greater than + V1 and less than + V2, the transistor Tr14, Since Tr3 and Tr4 have potentials on the emitter bus (N line NL1, zero voltage line NL0, reverse voltage line NL3) exceed the base potential (command voltage CV) to the negative side, transistors Tr20, Tr11, Tr9 is turned off in response to turning off with a reverse bias between the base and the emitter. Further, the transistor Tr5 is a transistor in which the potential of the bus on the collector side (the potential of the reverse voltage line NL3) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr5, and the loss power dissipates due to the temperature rise of the transistor Tr5 and disappears to the outside.

  The inventor performed a simulation on the operation of the class G amplifier circuit AMP220 shown in FIG. Specifically, the absolute value of the power supply voltage is V2 = 90V, V1 = V2 / 2 = 45V, and the irradiation position of the laser beam by the mirror 5a of the galvano scanner 1 is 1.0 mm pitch (at the angle of the rotor of the motor 5b). Loss at the output current from the output node N2 to the load LD, the output voltage from the output node N2 to the load LD, and the power supply from the output node N2 to the load LD when the movement at a pitch of 0.3 ° is repeated. A simulation was performed on the power and the change in the bus voltage in the class G amplifier circuit AMP20.

  As a result, the simulation result shown in FIG. 5 was obtained. In FIG. 5, the output current from the output node N2 to the load LD is indicated by a two-dot chain line, the output voltage from the output node N2 to the load LD is indicated by a broken line, and the loss power in the power supply from the output node N2 to the load LD is shown. A solid line indicates a change in bus voltage in the class B amplifier circuit AMP10 by a one-dot chain line.

  As can be seen from FIG. 5, for example, in the period (first period) T31 in which the output current is positive, the output voltage changes from positive → 0 → negative, whereas the bus voltage is a positive value + V2 (= 90V) to a positive value + V1 (= 45V) having a smaller absolute value, a value V0 (= 0V) having a smaller absolute value, and a negative sign value −V1 (= −45V). . Further, in the period (second period) T32 in which the output current is negative, the output voltage changes from negative → 0 → positive, whereas the bus voltage is more absolute from the negative value −V2 (= −90V). A negative value −V1 (= −45V) having a small value, a value V0 (= 0V) having a smaller absolute value, and a value + V1 (= + 45V) having an opposite sign are sequentially switched.

  When the graph shown in FIG. 2 is compared with the graph shown in FIG. 5, the bus voltage is switched to a smaller absolute value (zero voltage) after switching the bus voltage to a smaller absolute value, and then the voltage is reversed. It can be seen that the power loss can be further suppressed by switching. The average power loss at this time can be reduced to about 74.5 W, for example.

  Thus, in the second embodiment, the switching unit 221 changes the bus voltage from the positive power supply voltage + V2 to the positive power supply voltage + V1 (V1 <V2) in the first period in which the output current from the output node N2 is positive. ), The power supply voltage V0 (V0 <V1) and the negative power supply voltage −V1 are sequentially switched, and the bus voltage is changed from the negative power supply voltage −V2 in the second period in which the output current from the output node N2 is negative. The power supply voltage is sequentially switched to a negative power supply voltage −V1, a power supply voltage V0, and a positive power supply voltage + V1. As a result, the voltage difference between the output voltage and the bus voltage can be further reduced at the time of positive current output and negative current output, so that power loss can be further reduced.

  In the second embodiment, the switching unit 221 starts from the state in which the connection between the power source (first power source) 13 and the amplifying unit 222 is valid in the first period in which the output current from the output node N2 is positive. The state in which the connection between the power source (second power source) 25 and the amplification unit 222 is enabled, the state in which the connection between the ground node N3 and the amplification unit 222 is enabled, and the reverse of the power source (fourth power source) 26 and the amplification unit 222 From the state in which the connection of the power source (third power source) 14 and the amplifying unit 222 is enabled in the second period in which the polarity connection is sequentially enabled and the output current from the output node N2 is negative. A state in which the connection between the power source (fourth power source) 26 and the amplifying unit 222 is enabled, a state in which the connection between the ground node N3 and the amplifying unit 222 is enabled, and the reverse of the power source (second power source) 25 and the amplifying unit 222 very Sequentially switched in the state of being enabled connection. Accordingly, the bus voltage can be sequentially switched from + V2 to + V1, V0, and −V1 in the first period, and the bus voltage can be sequentially switched from −V2 to −V1, V0, and + V1 in the second period. it can.

  Further, in the second embodiment, the voltage of the opposite sign supplied at the time of supplying the positive current and the time of supplying the negative current is generated by the connection of the reverse polarity between the power source and the amplification unit. Thereby, the voltage of an opposite sign can be generated, suppressing the increase in the number of power supplies.

  As shown in FIG. 6, the class G amplifier circuit AMP120i may use a field effect transistor instead of the bipolar transistor. For example, in the class G amplifier circuit AMP220i shown in FIG. 6, transistors Tr13 ′, Tr8 ′, Tr7 ′, Tr6 ′, instead of the transistors Tr13, Tr8, Tr7, Tr6, Tr5, Tr4, Tr3, Tr14 (see FIG. 4), Tr5 ′, Tr4 ′, Tr3 ′, Tr14 ′ are used. For example, the transistors Tr13 ', Tr8', Tr7 ', Tr6' are N-type MOS transistors, and the transistors Tr5 ', Tr4', Tr3 ', Tr14' are P-type MOS transistors. In FIG. 6, MOS field effect transistors are exemplarily shown as the transistors Tr13 ′, Tr8 ′, Tr7 ′, Tr6 ′, Tr5 ′, Tr4 ′, Tr3 ′, and Tr14 ′. It may be a field effect transistor. In this case, in the class G amplifier circuit AMP220i, the transistors Tr15, Tr12, Tr10, Tr1, Tr2, Tr9, Tr11, Tr20 (see FIG. 4) can be omitted. That is, since the switching unit 221i and the amplification unit 222i can be made common and the number of transistors can be reduced, the manufacturing cost of the class G amplification circuit AMP220i can be reduced.

Embodiment 3 FIG.
Next, a class G amplifier circuit according to the third embodiment will be described. Below, it demonstrates centering on a different part from Embodiment 2. FIG.

  In the second embodiment, the voltage of the reverse sign supplied in each of the positive current supply and the negative current supply is generated by the reverse polarity connection between the power source and the amplification unit. In the third embodiment, the reverse sign is generated. Prepare a dedicated power supply for generating

  Specifically, as illustrated in FIG. 7, the class G amplifier circuit AMP320 includes a switching unit 321 instead of the switching unit 221, and further includes a power source (fifth power source) 327 and a power source (sixth power source) 328. Prepare.

  The switching unit 321 switches the bus voltage from the three or more types of power supply voltages (V2, V1, V0, V3) to the selected power supply voltage. The three or more types of power supply voltages are, for example, the power supply voltage V2, V1 having an absolute value smaller than the power supply voltage V2 (for example, V1 = V1 / 2), and V0 having a smaller absolute value than the power supply voltage V1 (for example, ground voltage). And V3 having an absolute value smaller than the power supply voltage V1 and larger than the power supply voltage V0. For example, the switching unit 321 includes the P line PL2, the P line PL1, the P line PL2, the P line PL1, the base potential of each transistor that follows the command voltage CV, and the potential of each connected bus. One of the zero voltage line PL0, the reverse voltage line PL3, the N line NL2, the N line NL1, the zero voltage line NL0, and the reverse voltage line NL3 is selectively activated, and the power supply voltage (+ V2) by the power supply 13 and the power supply 25 are used. The power supply voltage (+ V1), the power supply voltage (V0) by the ground node N3, the power supply voltage (-V3) by the power supply 328, the power supply voltage (-V2) by the power supply 14, the power supply voltage (-V1) by the power supply 26, and the power by the power supply 327 The bus voltage is switched between the voltage (+ V3).

  The power supply 327 generates a positive power supply voltage (+ V3) with reference to the ground node N3. The power supply 327 supplies the generated positive power supply voltage (+ V3) to the amplification unit 222 via the reverse voltage line NL3. As a result, the power source 327 can generate and supply a positive power source voltage (+ V3) having a value suitable for the voltage of the opposite sign when the negative current is supplied.

  The power supply 328 generates a negative power supply voltage (−V3) with respect to the ground node N3. The power supply 328 supplies the generated negative power supply voltage (−V3) to the amplification unit 222 via the reverse voltage line PL3. As a result, the power source 328 can generate and supply a negative power source voltage (−V3) having a value suitable for the voltage of the opposite sign when the positive current is supplied.

  The inventor conducted a simulation on the operation of the class G amplifier circuit AMP320 shown in FIG. Specifically, the absolute value of the power supply voltage is V2 = 90V, V1 = V2 / 2 = 45V, V3 = 41V, and the irradiation position of the laser beam by the mirror 5a of the galvano scanner 1 is 1.0 mm pitch (rotation of the motor 5b). Output voltage from the output node N2 to the load LD, output voltage from the output node N2 to the load LD, and output voltage from the output node N2 to the load LD. A simulation was performed on power loss in power supply and changes in bus voltage in the class G amplifier circuit AMP20.

  As a result, the simulation result shown in FIG. 8 was obtained. In FIG. 8, the output current from the output node N2 to the load LD is indicated by a two-dot chain line, the output voltage from the output node N2 to the load LD is indicated by a broken line, and the loss power in the power supply from the output node N2 to the load LD is shown. A solid line indicates a change in bus voltage in the class B amplifier circuit AMP10 by a one-dot chain line.

  As can be seen from FIG. 8, for example, in the period (first period) T41 in which the output current is positive, the output voltage changes from positive → 0 → negative, while the bus voltage is + V2 (= 90V) → It is sequentially switched from + V1 (= 45V) → V0 (= 0V) → −V3 (= −41V). In the period (second period) T42 in which the output current is negative, the output voltage changes from negative → 0 → positive, whereas the bus voltage is −V2 (= −90 V) → −V1 (= −). 45V) → V0 (= 0V) → + V3 (= + 41V).

  Comparing the graph shown in FIG. 5 with the graph shown in FIG. 8, it can be seen that the power loss can be further suppressed by changing the voltage of the opposite sign to a more appropriate value. The average power loss at this time can be reduced to about 71.7 W, for example.

  Thus, in the third embodiment, the switching unit 321 changes the bus voltage from the positive power supply voltage + V2 to the positive power supply voltage + V1 (V1 <V2) in the first period in which the output current from the output node N2 is positive. ), The power supply voltage V0 (V0 <V1) and the negative power supply voltage −V3 are sequentially switched, and the bus voltage is changed from the negative power supply voltage −V2 in the second period in which the output current from the output node N2 is negative. The power supply is sequentially switched to a negative power supply voltage −V1, a power supply voltage V0, and a positive power supply voltage + V3. Thereby, in each of the positive current output and the negative current output, the voltage with the opposite sign can be changed to a more appropriate value, and the voltage difference between the output voltage and the bus voltage can be further reduced, so that the power loss can be further reduced. .

  In the third embodiment, the switching unit 321 starts the connection between the power source (first power source) 13 and the amplification unit 222 in the first period in which the output current from the output node N2 is positive. The connection between the power supply (second power supply) 25 and the amplification unit 222 is enabled, the connection between the ground node N3 and the amplification unit 222 is enabled, and the reverse of the power supply (sixth power supply) 328 and the amplification unit 222 From the state in which the connection of the power source (third power source) 14 and the amplifying unit 222 is enabled in the second period in which the polarity connection is sequentially enabled and the output current from the output node N2 is negative. A state in which the connection between the power source (fourth power source) 26 and the amplifying unit 222 is enabled, a state in which the connection between the ground node N3 and the amplifying unit 222 is enabled, and the power source (fifth power source) 327 and the amplifying unit 222 Sequentially switched to a state of enable polarity connection. Accordingly, the bus voltage can be sequentially switched from + V2 to + V1, V0, and −V3 in the first period, and the bus voltage can be sequentially switched from −V2 to −V1, V0, and + V3 in the second period. it can.

  As shown in FIG. 9, the class G amplifier circuit AMP320i may use a field effect transistor instead of the bipolar transistor. For example, in the class G amplifier circuit AMP320i shown in FIG. 9, transistors Tr13 ′, Tr8 ′, Tr7 ′, Tr6 ′, instead of the transistors Tr13, Tr8, Tr7, Tr6, Tr5, Tr4, Tr3, Tr14 (see FIG. 7), Tr5 ′, Tr4 ′, Tr3 ′, Tr14 ′ are used. For example, the transistors Tr13 ', Tr8', Tr7 ', Tr6' are N-type MOS transistors, and the transistors Tr5 ', Tr4', Tr3 ', Tr14' are P-type MOS transistors. In FIG. 9, MOS field effect transistors are exemplarily shown as the transistors Tr13 ′, Tr8 ′, Tr7 ′, Tr6 ′, Tr5 ′, Tr4 ′, Tr3 ′, and Tr14 ′. It may be a field effect transistor. In this case, in the class G amplifier circuit AMP320i, the transistors Tr15, Tr12, Tr10, Tr1, Tr2, Tr9, Tr11, Tr20 (see FIG. 7) can be omitted. That is, since the switching unit 321i and the amplification unit 222i can be shared and the number of transistors can be reduced, the manufacturing cost of the class G amplification circuit AMP320i can be reduced.

Embodiment 4 FIG.
Next, a class G amplifier circuit according to the fourth embodiment will be described. Below, it demonstrates centering on a different part from Embodiment 3. FIG.

  In the third embodiment, a dedicated power source for generating a voltage with an opposite sign is prepared. However, when the signs of the output voltage and the output current are opposite, a regenerative current flows in a direction in which the power source is charged. There is a possibility that regenerative power is accumulated in a smoothing capacitor (not shown) and the power supply voltage rises.

  Therefore, in the fourth embodiment, a power source for generating a voltage with an opposite sign is also used for generating a voltage with the same sign, and by reusing the regenerative power accumulated in the smoothing capacitor in the power source, Suppress the rise in power supply voltage.

  Specifically, the class G amplifier circuit AMP420 illustrated in FIG. 10 includes a switching unit 421 and an amplification unit 422 instead of the switching unit 221 and the amplification unit 222.

  The switching unit 421 has a P line PL2, a P line PL1, a P line according to the current direction of the output current Io, the base potential of each transistor following the command voltage CV, and the potential of each connected bus. PL4, zero voltage line PL0, reverse voltage line PL3, N line NL2, N line NL1, N line NL4, zero voltage line NL0, and reverse voltage line NL3 are selectively activated, and a power supply voltage ( + V2), the power supply voltage (+ V1) by the power supply 25, the power supply voltage (V0) by the ground node N3, the power supply voltage (-V3) by the power supply 328, the power supply voltage (-V2) by the power supply 14, and the power supply voltage (-V1) by the power supply 26 ) And the power supply voltage (+ V3) by the power supply 327, the bus voltage is switched.

  Compared with the switching unit 221 (see FIG. 7), the switching unit 421 further includes Zener diodes ZD10 and ZD9, transistors Tr16 and Tr18, diodes D14 and D16, and resistors R8 and R9.

  The Zener diode ZD10 has an anode connected to the Zener diode ZD8 and the diode D11, and a cathode connected to the current source CS1 and the diode D14. The Zener diode ZD9 has an anode connected to the current source CS2 and the diode D16, and a cathode connected to the Zener diode ZD7 and the diode D10. The transistor Tr16 is, for example, an NPN-type bipolar transistor, the base is connected between the current source CS1 and the Zener diode ZD10 via the diode D14, the collector is connected to the power supply 13, and the emitter is connected to the resistor R8. . The transistor Tr18 is, for example, a PNP-type bipolar transistor, the base is connected between the Zener diode ZD9 and the current source CS2 via the diode D16, the collector is connected to the power supply 14, and the emitter is connected to the resistor R9. .

  If the current direction of the output current Io is the positive output direction (the direction indicated by the solid line in FIG. 10), the switching unit 421 turns on at least some of the transistors Tr1, Tr10, Tr12, Tr15, Tr16, and the amplification unit 422 The upper transistors Tr6, Tr7, Tr8, Tr13, Tr17 in FIG. Then, the switching unit 421 selects a bus having a voltage value that exceeds the base potential of each of the transistors Tr1, Tr10, Tr12, Tr15, Tr16 following the command voltage CV on the positive side and has the closest value.

  For example, when the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15, Tr16 is + V1 or more, the switching unit 421 sets the base potential of each transistor Tr1, Tr10, Tr12, Tr15, Tr16 to the positive side. P line PL2 is selected as the bus of the voltage value that exceeds and is closest. That is, the switching unit 421 turns on the transistors Tr1, Tr10, Tr12, Tr15, and Tr16, activates the P line PL2, enables the connection between the power supply 13 and the amplification unit 422, and changes the bus voltage to the power supply voltage (+ V2 by the power supply 13). ).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16 is greater than or equal to + V3 and less than + V1, the switching unit 421 selects the bases of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16. P line PL1 is selected as the bus of the voltage value that exceeds the potential to the positive side and has the closest value. At this time, the transistor Tr16 is in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and the transistor Tr16 is turned off. That is, the switching unit 421 turns off the transistor Tr16 and turns on the transistors Tr1, Tr10, Tr12, Tr15, activates the P line PL1, enables the connection between the power supply 25 and the amplification unit 422, and sets the bus voltage to the power supply 25. Switch to power supply voltage (+ V1).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16 is 0 or more and less than + V3, the switching unit 421 causes the bases of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16 to be P line PL4 is selected as the bus of the voltage value that exceeds the potential to the positive side and has the closest value. At this time, the transistors Tr15 and Tr16 are in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 421 turns off the transistors Tr15 and Tr16 and turns on the transistors Tr1, Tr10, and Tr12, activates the P line PL4, enables connection between the power supply 327 and the amplification unit 422, and sets the bus voltage to the power supply 327. Switch to power supply voltage (+ V3).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16 is −V3 or more and less than 0, the switching unit 421 causes the transistors Tr1, Tr10, Tr12, Tr15, and Tr16 to The zero voltage line PL0 is selected as the bus of the voltage value that exceeds the base potential to the positive side and has the closest value. At this time, the transistors Tr12, Tr15, and Tr16 are in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 421 turns off the transistors Tr12, Tr15, Tr16 and turns on the transistors Tr1, Tr10, activates the zero voltage line PL0, enables the connection between the ground node N3 and the amplification unit 422, and connects the bus voltage to the ground. Switching to the power supply voltage (V0) by the node N3.

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16 is −V2 or more and less than −V3, the switching unit 421 may select each of the transistors Tr1, Tr10, Tr12, Tr15, and Tr16. The reverse voltage line PL3 is selected as a bus having a voltage value that exceeds the base potential at the positive side and has the closest value. At this time, the transistors Tr10, Tr12, Tr15, and Tr16 are in a reverse bias state in which the base potential is lower than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 421 turns off the transistors Tr10, Tr12, Tr15, and Tr16 and turns on the transistor Tr1, activates the reverse voltage line PL3, and enables the reverse polarity connection between the power source 328 and the amplification unit 422, and the bus voltage Is switched to the power supply voltage (−V3) by the power supply 328.

  Further, the switching unit 421 turns on at least a part of the transistors Tr2, Tr9, Tr11, Tr20, Tr18 if the current output current Io direction is the negative output direction (the direction indicated by the broken line in FIG. 10), and amplifies it. The lower transistors Tr5, Tr4, Tr3, Tr14, Tr19 in the unit 222 are operated. Then, the switching unit 421 selects a bus having a voltage value that exceeds the base potential of the transistors Tr2 and Tr11 following the command voltage CV to the negative side and has the closest value.

  For example, when the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20, Tr18 is −V1 or less, the switching unit 421 makes the base potential of each transistor Tr2, Tr9, Tr11, Tr20, Tr18 negative. The N line NL2 is selected as the bus of the voltage value that is close to and close to the side. That is, the switching unit 421 turns on the transistors Tr2, Tr9, Tr11, Tr20, Tr18, activates the N line NL2, enables the connection between the power supply 14 and the amplification unit 422, and changes the bus voltage to the power supply voltage (− Switch to V2).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 is greater than −V1 and less than or equal to −V3, the switching unit 421 is configured so that the transistors Tr2, Tr9, Tr11, Tr20, The N line NL1 is selected as the bus having the closest voltage value that exceeds the base potential of Tr18 on the negative side. At this time, the transistor Tr18 is in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and the transistor Tr18 is turned off. That is, the switching unit 421 turns off the transistor Tr18 and turns on the transistors Tr2, Tr9, Tr11, Tr20, activates the N line NL1, enables the connection between the power supply 26 and the amplification unit 422, and sets the bus voltage to the power supply 26. Switch to power supply voltage (-V1).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 is greater than −V3 and equal to or less than 0, the switching unit 421 causes the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 to be switched. The N line NL1 is selected as a bus having a voltage value that is close to the negative side and is closest to the base potential. At this time, the transistors Tr20 and Tr18 are in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 421 turns off the transistors Tr20 and Tr18 and turns on the transistors Tr2, Tr9, and Tr11, activates the N line NL4, enables the connection between the power supply 328 and the amplification unit 422, and sets the bus voltage to the power supply 328. Switch to power supply voltage (-V3).

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 is greater than 0 and less than or equal to + V3, the switching unit 421 causes the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 to The zero voltage line NL0 is selected as the bus having the closest voltage value that exceeds the base potential to the negative side. At this time, the transistors Tr11, Tr20, and Tr18 are in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 421 turns off the transistors Tr11, Tr20, Tr18 and turns on the transistors Tr2, Tr9, activates the zero voltage line NL0, enables the connection between the ground node N3 and the amplification unit 422, and sets the bus voltage to the ground. Switching to the power supply voltage (V0) by the node N3.

  Alternatively, for example, when the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 is greater than + V3 and less than or equal to + V2, the switching unit 421 causes the transistors Tr2, Tr9, Tr11, Tr20, and Tr18 to The reverse voltage line NL3 is selected as the bus of the voltage value that exceeds the base potential on the negative side and has the closest value. At this time, the transistors Tr9, Tr11, Tr20, Tr18 are in a reverse bias state in which the base potential is higher than the emitter potential, and the base current does not flow and is turned off. That is, the switching unit 421 turns off the transistors Tr9, Tr11, Tr20, Tr18 and turns on the transistor Tr2, activates the reverse voltage line NL3, and enables the reverse polarity connection between the power supply 327 and the amplifying unit 422, and the bus voltage Is switched to the power supply voltage (+ V3) by the power supply 327.

  The amplifying unit 422 performs an amplifying operation using the power supply voltage selected by the switching unit 421, generates power, and supplies the generated power to the output node N2. Specifically, the amplifying unit 422 further includes transistors Tr17 and Tr19 and diodes D15 and D17 as compared with the amplifying unit 222 (see FIG. 7).

  The transistor Tr17 is, for example, an NPN bipolar transistor, the base is connected between the emitter of the transistor Tr16 and the resistor R8, and the collector is connected to the power supply 13. The transistor Tr17 has an emitter connected to the emitter of the transistor Tr16 via the resistor R8, is connected to the power supply 25 via the diode D15, and is connected to the collector of the transistor Tr13. The transistor Tr19 is, for example, a PNP-type bipolar transistor, the base is connected between the resistor R9 and the emitter of the transistor Tr18, and the collector is connected to the power supply 14. The transistor Tr19 has an emitter connected to the emitter of the transistor Tr18 via the resistor R9, is connected to the power supply 26 via the diode D17, and is connected to the collector of the transistor Tr14. The diode D15 has a cathode connected to the emitter of the transistor Tr17 and the collector of the transistor Tr13, and an anode connected to the power supply 25. The diode D17 has a cathode connected to the power supply 26 and an anode connected to the emitter of the transistor Tr19 and the collector of the transistor Tr14. The anode of the diode D13 is connected to the power source 327. The cathode of the diode D12 is connected to the power source 328.

  In the amplifying unit 422, the transistors Tr17, Tr13, Tr8, Tr7, and Tr6 are turned on while the transistors Tr16, Tr15, Tr12, Tr10, and Tr1 are turned on, and the transistor Tr17 functions as an emitter follower. A current amplification operation is performed using (+ V2) to generate electric power.

  For example, when the current output current Io is the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, Tr16 of the switching unit 421 is + V1 or more, the transistor Tr17 Since the collector-side bus potential (P-line PL2 potential) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, the transistor operates in the active region, and the bus voltage and output voltage (base The difference in voltage from the voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr17, and the loss power is dissipated by the temperature rise of the transistor Tr17 and is lost to the outside. On the other hand, the transistors Tr13, Tr8, Tr7, Tr6 on the output node N2 side from the transistor Tr17 operating in the active region are diodes D15, D13, D4, D3 connected to the collectors, so that the diode D15, The collector-side buses (P line PL1, P line PL4, zero voltage line PL0, reverse voltage line PL3) are cut off by D13, D4, and D3. Further, the transistors Tr13, Tr8, Tr7, Tr6 have the emitter potential lowered in the same manner as the base potential (command voltage CV) for the emitter follower operation, but the collector is connected to the emitter of the transistor Tr17 operating in the active region. Therefore, the collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr13, Tr8, Tr7, Tr6 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 422 also turns off the transistor Tr17 with the transistor Tr16 off and the transistors Tr15, Tr12, Tr10, and Tr1 on, and turns on the transistors Tr13, Tr8, Tr7, and Tr6. And a current amplification operation using the power supply voltage (+ V1) by the power supply 25 to generate power.

  For example, when the current output current Io is in the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, Tr16 of the switching unit 421 is greater than or equal to + V3 and less than + V1, the transistor Tr17 Corresponds to the fact that the transistor Tr16 in the previous stage is turned off as a reverse bias between the base and the emitter because the potential of the bus on the emitter side (potential of the P line PL1) exceeds the base potential (command voltage CV) to the positive side. Turn off. The transistor Tr13 is a transistor whose collector-side bus potential (P-line PL1 potential) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr13, and the loss power dissipates due to the temperature rise of the transistor Tr13 and disappears to the outside. On the other hand, the transistors Tr8, Tr7, Tr6 on the output node N2 side of the transistor Tr13 operating in the active region are reverse-biased by the diodes D13, D4, D3 connected to the collector, so that the diodes D13, D4, D3 The buses on the collector side (P line PL4, zero voltage line PL0, reverse voltage line PL3) are cut off. Further, the transistors Tr8, Tr7, Tr6 have the emitter potential lowered in the same manner as the base potential (command voltage CV) for the emitter follower operation, but the collector is connected to the emitter of the transistor Tr13 operating in the active region. Therefore, the collector potential is the same as the base potential (command voltage CV). Thereby, the transistors Tr8, Tr7, Tr6 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  Further, the amplifying unit 422 turns off the transistors Tr17 and Tr13 with the transistors Tr16 and Tr15 turned off and the transistors Tr12, Tr10, and Tr1 turned on, and turned on the transistors Tr8, Tr7, and Tr6. And a current amplifying operation using the power supply voltage (+ V3) by the power supply 327 to generate electric power.

  For example, when the current output current Io is in the positive output direction and the base potential (command voltage CV) of each of the transistors Tr1, Tr10, Tr12, Tr15, Tr16 of the switching unit 421 is 0 or more and less than + V3, the transistor Tr17 , Tr13 is such that the potential of the bus on the emitter side (potential of the P line PL1, P line PL4) exceeds the base potential (command voltage CV) to the positive side, so that the transistors Tr16, Tr15 in the previous stage are reverse-biased between the base and emitter. And turn off in response to turning off. Further, the transistor Tr8 is a transistor whose collector-side bus potential (P-line PL4 potential) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr8, and the loss power is dissipated by the temperature rise of the transistor Tr8 and disappears to the outside. On the other hand, in the transistors Tr7 and Tr6 on the output node N2 side of the transistor Tr8 operating in the active region, the diodes D4 and D3 connected to the collector are reverse-biased. The voltage line PL0 and the reverse voltage line PL3) are cut off. Further, the transistors Tr7 and Tr6 have the emitter potential lowered in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr8 operating in the active region. The collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr7 and Tr6 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  In addition, the amplifying unit 422 turns off the transistors Tr17, Tr13, and Tr8 and turns on the transistors Tr7 and Tr6 while the transistors Tr16, Tr15, and Tr12 are turned off and the transistors Tr10 and Tr1 are turned on. And a current amplifying operation using the power supply voltage (V0) by the ground node N3 to generate electric power.

  For example, when the current output current Io direction is a positive output direction and the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15, Tr16 of the switching unit 421 is not less than −V3 and less than 0, the transistor Since Tr17, Tr13, Tr8 have potentials on the emitter bus (P line PL1, P line PL4, zero voltage line PL0) exceeding the base potential (command voltage CV) to the positive side, transistors Tr16, Tr15 in the previous stage , Tr12 is turned off in response to turning off with a reverse bias between the base and the emitter. Further, the transistor Tr7 is a transistor in which the potential of the bus on the collector side (the potential of the zero voltage line PL0) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, and thus operates in the active region. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a lost power corresponding to voltage × current is generated in the transistor Tr7, and the lost power is dissipated by the temperature rise of the transistor Tr7 and disappears to the outside. On the other hand, in the transistor Tr6 on the output node N2 side from the transistor Tr7 operating in the active region, the diode D3 connected to the collector is reverse-biased, so that the collector-side bus (reverse voltage line PL3) is cut off by the diode D3. Is done. In addition, the transistor Tr6 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr7 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr6 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  In addition, the amplifying unit 422 turns off the transistors Tr17, Tr13, Tr8, and Tr7 and turns on the transistor Tr6 in a state where the transistors Tr16, Tr15, Tr12, and Tr10 are turned off and the transistor Tr1 is turned on, and the transistor Tr6 is turned on as an emitter follower. And a current amplifying operation using the power supply voltage (−V3) by the power supply 328 to generate electric power.

  For example, when the current output current Io direction is the positive output direction and the base potential (command voltage CV) of each transistor Tr1, Tr10, Tr12, Tr15, Tr16 of the switching unit 421 is −V2 or more and less than −V3, In the transistors Tr17, Tr13, Tr8, and Tr7, the potential of the emitter side bus (P line PL1, P line PL4, zero voltage line PL0, reverse voltage line PL3) exceeds the base potential (command voltage CV) to the positive side. Therefore, the transistors Tr16, Tr15, Tr12, Tr10 in the previous stage are turned off in accordance with the reverse bias between the base and the emitter. Further, the transistor Tr6 is a transistor in which the potential of the bus on the collector side (the potential of the reverse voltage line PL3) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr6, and the loss power is dissipated by the temperature rise of the transistor Tr6 and disappears to the outside.

  In addition, the amplifying unit 422 turns on the transistors Tr19, Tr14, Tr3, Tr4, and Tr5 with the transistors Tr18, Tr20, Tr11, Tr9, and Tr2 turned on, and the transistor Tr19 functions as an emitter follower. A current amplification operation is performed using the power supply voltage (−V2) to generate electric power.

  For example, when the current output current Io is in the negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20, Tr18 of the switching unit 421 is −V1 or less, the transistor Tr19 is , The collector side bus potential (the potential of the N line NL2) exceeds the base potential (command voltage CV) to the negative side and is the closest transistor to the base potential, so that it operates in the active region, and the bus voltage and output voltage ( The voltage difference from the base voltage is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr19, and the loss power is dissipated due to the temperature rise of the transistor Tr19 and disappears to the outside. On the other hand, in the transistors Tr14, Tr3, Tr4, Tr5 on the output node N2 side of the transistor Tr19 operating in the active region, the diodes D17, D12, D1, D2 connected to the collector are reverse-biased. The buses on the collector side (N line NL1, N line NL4, zero voltage line NL0, reverse voltage line NL3) are cut off by D12, D1, and D2. The transistors Tr14, Tr3, Tr4, and Tr5 have an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr19 that operates in the active region. Therefore, the collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr14, Tr3, Tr4, Tr5 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  In the amplifying unit 422, the transistor Tr19 is turned off while the transistor Tr18 is turned off and the transistors Tr20, Tr11, Tr9, and Tr2 are turned on, the transistors Tr14, Tr3, Tr4, and Tr5 are turned on, and the transistor Tr14 is the emitter. It functions as a follower and generates power by performing a current amplification operation using the power supply voltage (-V1) from the power supply 26.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20, Tr18 of the switching unit 421 is greater than -V1 and less than -V3. In the transistor Tr19, since the potential of the bus on the emitter side (the potential of the N line NL1) exceeds the base potential (command voltage CV) to the negative side, the transistor Tr18 in the previous stage is turned off with a reverse bias between the base and the emitter. Turn off accordingly. Further, the transistor Tr14 is a transistor in which the potential of the bus on the collector side (the potential of the N line NL1) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr14, and the loss power is dissipated by the temperature rise of the transistor Tr14 and disappears to the outside. On the other hand, in the transistors Tr3, Tr4, Tr5 on the output node N2 side of the transistor Tr14 operating in the active region, the diodes D12, D1, D2 connected to the collector are reverse-biased, so that the diodes D12, D1, D2 The bus on the collector side (N line NL4, zero voltage line NL0, reverse voltage line NL3) is cut off. The transistors Tr3, Tr4, and Tr5 have an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr14 that operates in the active region. Therefore, the collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr3, Tr4, Tr5 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  Further, the amplifying unit 422 turns off the transistors Tr19 and Tr14 with the transistors Tr18 and Tr20 turned off and the transistors Tr11, Tr9, and Tr2 turned on, and turned on the transistors Tr3, Tr4, and Tr5, and the transistor Tr3 as the emitter. It functions as a follower and generates power by performing a current amplification operation using a power supply voltage (−V3) from a power supply 328.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each of the transistors Tr2, Tr9, Tr11, Tr20, Tr18 of the switching unit 421 is greater than −V3 and equal to or less than 0, In the transistors Tr19 and Tr14, the potential of the bus on the emitter side (potential of the N line NL1 and N line NL4) exceeds the base potential (command voltage CV) to the negative side, so that the transistors Tr18 and Tr20 in the previous stage are connected between the base and emitter. Turns off in response to reverse bias. The transistor Tr3 is a transistor in which the potential of the bus on the collector side (the potential of the N line NL4) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential. The voltage difference between the voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr3, and the loss power is dissipated by the temperature rise of the transistor Tr3 and disappears to the outside. On the other hand, in the transistors Tr4 and Tr5 on the output node N2 side of the transistor Tr3 operating in the active region, the diodes D1 and D2 connected to the collector are reverse-biased. The voltage line NL0 and the reverse voltage line NL3) are cut off. Further, the transistors Tr4 and Tr5 have the emitter potential lowered in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr3 operating in the active region. The collector potential is the same as the base potential (command voltage CV). As a result, the transistors Tr4 and Tr5 operate in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistors Tr19, Tr14, and Tr3 and turns on the transistors Tr4 and Tr5 while the transistors Tr18, Tr20, and Tr11 are turned off and the transistors Tr9 and Tr2 are turned on. It functions as a follower, and generates power by performing a current amplification operation using the power supply voltage (V0) from the ground node N3.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20, Tr18 of the switching unit 421 is greater than 0 and less than + V3, the transistor Since Tr19, Tr14, and Tr3 have emitter-side bus potentials (N-line NL1, N-line NL4, and zero-voltage line NL0 potential) that exceed the base potential (command voltage CV) to the negative side, transistors Tr18, Tr20 in the previous stage , Tr11 is turned off in response to turning off with a reverse bias between the base and the emitter. The transistor Tr4 is a transistor in which the potential of the bus on the collector side (the potential of the zero voltage line NL0) exceeds the base potential (command voltage CV) to the positive side and is closest to the base potential, and thus operates in the active region. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power corresponding to voltage × current is generated in the transistor Tr4, and the loss power dissipates due to the temperature rise of the transistor Tr4 and disappears to the outside. On the other hand, in the transistor Tr5 on the output node N2 side of the transistor Tr4 operating in the active region, the diode D2 connected to the collector is reverse-biased, so that the collector-side bus (reverse voltage line PL3) is cut off by the diode D2. Is done. Further, the transistor Tr5 has an emitter potential that drops in the same manner as the base potential (command voltage CV) due to the emitter follower operation, but the collector is connected to the emitter of the transistor Tr4 that operates in the active region. The potential is the same as the base potential (command voltage CV). As a result, the transistor Tr5 operates in a saturation region where the collector-emitter voltage is substantially zero, and substantially no loss power is generated.

  The amplifying unit 222 also turns off the transistors Tr19, Tr14, Tr3, and Tr4 and turns on the transistor Tr5 while the transistors Tr18, Tr20, Tr11, and Tr9 are turned off and the transistor Tr2 is turned on. It functions as a follower and generates power by performing a current amplification operation using the power supply voltage (+ V3) from the power supply 327.

  For example, when the current output current Io direction is a negative output direction and the base potential (command voltage CV) of each transistor Tr2, Tr9, Tr11, Tr20, Tr18 of the switching unit 421 is greater than + V3 and less than + V2, the transistor In Tr19, Tr14, Tr3, Tr4, the potential of the emitter bus (N line NL1, N line NL4, zero voltage line NL0, reverse voltage line NL3) exceeds the base potential (command voltage CV) to the negative side. The transistors Tr18, Tr20, Tr11, Tr9 in the previous stage are turned off in response to the reverse bias between the base and the emitter. Further, the transistor Tr5 is a transistor in which the potential of the bus on the collector side (the potential of the reverse voltage line NL3) exceeds the base potential (command voltage CV) on the positive side and is closest to the base potential. The voltage difference between the bus voltage and the output voltage (base voltage) is borne as a voltage drop between the collector and the emitter. At that time, a loss power of voltage × current is generated in the transistor Tr5, and the loss power dissipates due to the temperature rise of the transistor Tr5 and disappears to the outside.

  The inventor performed a simulation on the operation of the class G amplifier circuit AMP420 shown in FIG. Specifically, the absolute value of the power supply voltage is V2 = 90V, V1 = V2 / 2 = 45V, V3 = 22.5V, and the irradiation position of the laser beam is set to 1.0 mm pitch (motor 5b) by the mirror 5a of the galvano scanner 1. The output current from the output node N2 to the load LD, the output voltage from the output node N2 to the load LD, and the output node N2 to the load LD are repeated. A simulation was carried out on the power loss in the power supply to the power supply and the bus voltage change in the class G amplifier circuit AMP20.

  As a result, the simulation result shown in FIG. 11 was obtained. In FIG. 11, the output current from the output node N2 to the load LD is indicated by a two-dot chain line, the output voltage from the output node N2 to the load LD is indicated by a broken line, and the loss power in the power supply from the output node N2 to the load LD is shown. A solid line indicates a change in bus voltage in the class B amplifier circuit AMP10 by a one-dot chain line.

  As can be seen from FIG. 11, for example, in the period (first period) T51 in which the output current is positive, the output voltage changes from positive → 0 → negative, whereas the bus voltage is + V2 (= 90V) → It is sequentially switched from + V1 (= 45V) → + V3 (= 22.5V) → V0 (= 0V) → −V3 (= −22.5V). In the period (second period) T52 in which the output current is negative, the output voltage changes from negative → 0 → positive, whereas the bus voltage is −V2 (= −90 V) → −V1 (= −). 45V) → −V3 (= −22.5V) → V0 (= 0V) → + V3 (= + 22.5V).

  Comparing the graph shown in FIG. 8 with the graph shown in FIG. 11, it is possible to further reduce the power loss by using the power source for generating the voltage with the opposite sign to generate the voltage with the same sign. I understand. The average power loss at this time can be reduced to about 57.2 W, for example. Comparing this value with the class B amplifier circuit AMP10 shown in FIG. 14, the amplifier power loss at the time of repeated positioning of the galvano scanner 1 mm pitch is reduced to about one fourth to one fifth as shown in the following formula 5. I understand that I can do it.

      54.7 ÷ 239.1 × 100 = 22.9 (%) Expression 5

  As described above, in the fourth embodiment, the switching unit 421 changes the bus voltage from the positive power supply voltage + V2 to the positive power supply voltage + V1 and the positive power supply in the first period in which the output current from the output node N2 is positive. The voltage + V3, the power supply voltage V0, and the negative power supply voltage −V3 are sequentially switched, and the bus voltage is changed from the negative power supply voltage −V2 to the negative power supply voltage in the second period in which the output current from the output node N2 is negative. -V1, negative power supply voltage -V3, power supply voltage V0, and positive power supply voltage + V3 are sequentially switched. Thereby, in each of the positive current output and the negative current output, the voltage with the opposite sign can be changed to a more appropriate value, and the voltage difference between the output voltage and the bus voltage can be further reduced, so that the power loss can be further reduced. .

  In the fourth embodiment, the power source for generating the reverse sign voltage is also used for generating the same sign voltage, and the regenerative power accumulated in the smoothing capacitor in the power source is reused. An increase in the power supply voltage of the power supply for generating the sign voltage can be suppressed. As a result, regenerative power can be reused as a power source and efficiency is improved compared to the case where regenerative power is consumed by adding a regenerative resistor in the power source for generating a voltage with an opposite sign. Loss can be reduced.

  In the fourth embodiment, the switching unit 421 enables the connection between the power supply (first power supply) 13 and the amplification unit 422 in the first period in which the output current from the output node N2 is positive. The connection between the power supply (second power supply) 25 and the amplification unit 422 is enabled, the connection between the power supply (fifth power supply) 327 and the amplification unit 422 is enabled, and the connection between the ground node N3 and the amplification unit 422 The switch is sequentially switched to the enabled state, and the reverse polarity connection of the power source (sixth power source) 328 and the amplifying unit 422 is enabled. Further, the switching unit 421 activates the connection of the power source (third power source) 14 and the amplifying unit 422 from the state in which the connection between the power source (third power source) 14 and the amplification unit 422 is valid in the second period in which the output current from the output node N2 is negative. ) The connection between the H.26 and the amplification unit 422 is enabled, the connection between the power source (sixth power supply) 328 and the amplification unit 422 is enabled, the connection between the ground node N3 and the amplification unit 422 is enabled, and The power supply (fifth power supply) 327 and the amplifying unit 422 are sequentially switched to a state where the reverse polarity connection is enabled. Accordingly, the bus voltage can be sequentially switched from + V2 to + V1, + V3, V0, and −V3 in the first period, and the bus voltage is switched from −V2 to −V1, −V3, V0, and + V3 in the second period. It can be switched sequentially.

  As shown in FIG. 12, the class G amplifier circuit AMP420i may use a field effect transistor instead of the bipolar transistor. For example, in the class G amplifier circuit AMP420i shown in FIG. 12, transistors Tr17 ′, Tr13 ′, Tr8 ′ are substituted for the transistors Tr17, Tr13, Tr8, Tr7, Tr6, Tr5, Tr4, Tr3, Tr14, Tr19 (see FIG. 10). , Tr7 ′, Tr6 ′, Tr5 ′, Tr4 ′, Tr3 ′, Tr14 ′, and Tr19 ′ are used. For example, the transistors Tr17 ', Tr13', Tr8 ', Tr7', Tr6 'are N-type MOS transistors, and the transistors Tr5', Tr4 ', Tr3', Tr14 ', Tr19' are P-type MOS transistors. In FIG. 12, MOS-type field effect transistors are exemplarily illustrated as the transistors Tr17 ′, Tr13 ′, Tr8 ′, Tr7 ′, Tr6 ′, Tr5 ′, Tr4 ′, Tr3 ′, Tr14 ′, and Tr19 ′. However, it may be a junction type field effect transistor. In this case, in the class G amplifier circuit AMP420i, the transistors Tr16, Tr15, Tr12, Tr10, Tr1, Tr2, Tr9, Tr11, Tr20, Tr18 (see FIG. 12) can be omitted. That is, since the switching unit 421i and the amplification unit 422i can be shared and the number of transistors can be reduced, the manufacturing cost of the class G amplification circuit AMP420i can be reduced.

  As described above, the class G amplifier circuit according to the present invention is useful for driving a galvano scanner.

  DESCRIPTION OF SYMBOLS 1 Galvano scanner, 2 Control apparatus, 3 D / A converter, 4 Drive amplifier, 5 Galvano scanner main body, 5a Mirror, 5b Motor, 5c Encoder, 6 Encoder signal processing circuit, 11 Switching part, 12 Amplification part, 13 Power supply, 14 power supply, 21 switching section, 22 amplification section, 25 power supply, 26 power supply, 121,121i switching section, 122,122i amplification section, 221,221i switching section, 222,222i amplification section, 321,321i switching section, 327 power supply, 328 power supply, 421, 421i switching unit, 422, 422i amplifier, AMP amplifier circuit, AMP10 class B amplifier circuit, AMP20 class G amplifier circuit, AMP120, AMP120i class G amplifier circuit, AMP220, AMP22 i G-class amplifier circuit, AMP320, AMP320i G class amplifier circuit, AMP420, AMP420i G class amplifier circuit, LD load, N1 input node, N2 output node, N3 ground node.

Claims (7)

An input node that receives the command voltage;
According to the command voltage received at the input node, a switching unit that switches the bus voltage to a power supply voltage selected from three or more power supply voltages;
An amplification unit that performs an amplification operation using the selected power supply voltage to generate power; and
An output node for outputting the generated power to a load in which a phase of a flowing current is delayed with respect to a phase of an applied voltage;
A ground node connected to the ground potential;
A first P line provided with a first power supply for generating the positive first power supply voltage with respect to the ground node;
A second P line provided with a second power supply for generating the second power supply voltage positive with respect to the ground node;
A first N line provided with a third power supply for generating the negative first power supply voltage with respect to the ground node;
A second N line provided with a fourth power supply for generating the negative second power supply voltage with respect to the ground node;
A first zero voltage line having one end connected to the ground node and the other end connected to the amplifier on the P side from the output node;
A second zero voltage line having one end connected to the ground node and the other end connected to the amplifier on the N side of the output node;
With
The three or more types of power supply voltages are:
A first power supply voltage corresponding to the maximum amplitude of the output voltage from the output node;
A second power supply voltage having an absolute value smaller than the first power supply voltage;
A third power supply voltage having an absolute value smaller than the second power supply voltage;
Including
The third power supply voltage is a ground voltage;
The ground node is shared by the first zero voltage line, the second zero voltage line, the first P line, the second P line, the first N line, and the second N line. Has been
The switching unit activates the first P-line and activates the connection between the first power source and the amplification unit in a first period in which an output current from the output node is positive. The second P line is activated to enable the connection between the second power source and the amplifier, and the first zero voltage line is activated to enable the connection between the ground node and the amplifier. By sequentially switching, the bus voltage is sequentially switched from the positive first power supply voltage to the positive second power supply voltage and the third power supply voltage, and the output current from the output node is negative. In the period 2, the second N line is activated from the state where the first N line is activated and the connection between the third power source and the amplifying unit is enabled, and the fourth power source and the amplifying unit are connected. Enable connection And sequentially switching to a state in which the second zero voltage line is activated and the connection between the ground node and the amplifying unit is enabled, thereby changing the bus voltage from the negative first power supply voltage to the negative one. A class G amplifying circuit, wherein the second power supply voltage and the third power supply voltage are sequentially switched. The switching unit changes the bus voltage from the positive first power supply voltage to the positive second power supply voltage, the third power supply voltage, and the negative second power supply voltage in the first period. In the second period, the bus voltage is sequentially changed from the negative first power supply voltage to the negative second power supply voltage, the third power supply voltage, and the positive second power supply voltage in the second period. The class G amplifier circuit according to claim 1, wherein the class G amplifier circuit is switched to. In the first period, the switching unit enables a connection between the second power source and the amplification unit from a state where the connection between the first power source and the amplification unit is enabled, the ground node, and The connection between the amplification unit and the fourth power source and the amplification unit are sequentially switched to enable the connection of the opposite polarity, and in the second period, the third power supply and the A state in which the connection of the fourth power source and the amplifier unit is enabled from a state in which the connection of the amplifier unit is enabled, a state in which the connection of the ground node and the amplifier unit is enabled, and the second power source and the The class G amplifier circuit according to claim 4, wherein the amplifier unit is sequentially switched to a state in which the reverse polarity connection of the amplifier unit is enabled. The three or more types of power supply voltages further include a fourth power supply voltage having an absolute value smaller than the second power supply voltage and larger than the third power supply voltage,
The switching unit changes the bus voltage from the positive first power supply voltage to the positive second power supply voltage, the third power supply voltage, and the negative fourth power supply voltage in the first period. In the second period, the bus voltage is sequentially switched from the negative first power supply voltage to the negative second power supply voltage, the third power supply voltage, and the positive fourth power supply voltage in the second period. The class G amplifier circuit according to claim 1, wherein the class G amplifier circuit is switched to. A fifth power supply for generating the fourth power supply voltage positive with respect to the ground node;
A sixth power supply for generating the negative fourth power supply voltage with respect to the ground node;
Further comprising
In the first period, the switching unit enables a connection between the second power source and the amplification unit from a state where the connection between the first power source and the amplification unit is enabled, the ground node, and The connection between the amplifying unit and the sixth power source and the amplifying unit are sequentially switched to the enabled state, and the third power source and the From the state in which the connection of the amplification unit is enabled, the state in which the connection of the fourth power source and the amplification unit is enabled, the state in which the connection of the ground node and the amplification unit is enabled, and the fifth power source and the The class G amplifier circuit according to claim 6, wherein the amplifier unit is sequentially switched to a state in which the reverse polarity connection of the amplifier unit is enabled. The three or more types of power supply voltages further include a fourth power supply voltage having an absolute value smaller than the second power supply voltage and larger than the third power supply voltage,
In the first period, the switching unit changes the bus voltage from the positive first power supply voltage to the positive second power supply voltage, the positive fourth power supply voltage, the third power supply voltage, and The negative power supply voltage is sequentially switched to the negative fourth power supply voltage. In the second period, the bus voltage is changed from the negative first power supply voltage to the negative second power supply voltage, the negative fourth power supply voltage, The class G amplifier circuit according to claim 1, wherein the switching is sequentially performed to the third power supply voltage and the positive fourth power supply voltage. A fifth power supply for generating the fourth power supply voltage positive with respect to the ground node;
A sixth power supply for generating the negative fourth power supply voltage with respect to the ground node;
Further comprising
In the first period, the switching unit activates the connection between the second power source and the amplification unit from the state in which the connection between the first power source and the amplification unit is validated. A state in which the connection between the power source and the amplifying unit is enabled, a state in which the connection between the ground node and the amplifying unit is enabled, and a state in which the reverse polarity connection between the sixth power source and the amplifying unit is enabled In the second period, the connection between the third power supply and the amplification unit is enabled from the state in which the connection between the fourth power supply and the amplification unit is enabled, the sixth power supply, and Sequentially switched to a state in which the connection of the amplifying unit is enabled, a state in which the connection of the ground node and the amplifying unit is enabled, and a state in which the reverse polarity connection of the fifth power source and the amplifying unit is enabled With features The class G amplifier circuit according to claim 8.

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