JP5847505B2 - Vibrator unit, oscillation circuit, and reception circuit - Google Patents

Description

  The present invention relates to a vibrator unit externally attached to a circuit as a crystal vibrator, and an oscillation circuit and a reception circuit using the vibrator unit, and more particularly to compensation of temperature characteristics of the crystal vibrator.

  Quartz resonators have a high-accuracy oscillation frequency and are indispensable parts for modern electronics such as quartz watches, wireless communications, and computers. Quartz resonators are provided as parts (vibrator units). For example, circuits that use oscillation signals, such as microcomputers and watch ICs, are designed so that an oscillation circuit can be completed simply by connecting a crystal resonator. There are many. Specifically, as shown in FIG. 13, an integrated circuit 2 such as a microcomputer or a clock IC uses an inverter 4 as an oscillation amplifier, and includes an inverter 4 and capacitors Cin and Cout connected to its input / output terminals. A part of the oscillation circuit is formed. The integrated circuit 2 is provided with external connection terminals Nin and Nout so that a resonator can be connected to the feedback path from the output terminal to the input terminal of the inverter 4. An oscillation circuit is configured by connecting a resonator unit 6 containing a crystal resonator as a resonator to the terminals Nin and Nout.

  Although the quartz resonator has high accuracy, it can be further improved by compensating the temperature characteristics. As the prior art, Patent Document 1 below discloses that a temperature compensation circuit including a passive element is connected in series with a crystal resonator. Another conventional technique is TCXO (temperature compensated crystal oscillator). FIG. 14 is a schematic circuit diagram illustrating the TCXO. The TCXO 8 incorporates the crystal resonator and the temperature compensation circuit 10 in one package, and oscillates by itself to output an oscillation signal. The integrated circuit 2 has a TCXO 8 connected to a terminal Nin, and can use an oscillation signal whose temperature is compensated. The temperature compensation circuit 10 of the TCXO 8 basically operates constantly. In addition, TCXO (DTCXO) that performs temperature compensation digitally always performs digital processing operation using an oscillation signal generated therein.

Japanese Patent Laid-Open No. 10-65445

  There are various types of crystal resonators such as AT cut and BT cut depending on the cutting angle, and the vibration mode and temperature characteristics are different. For example, the amount of change in frequency of an AT cut vibrator is a cubic function of temperature, whereas it is a quadratic function of an X cut vibrator. It is not always easy to suitably design a temperature compensation circuit composed of passive elements in response to such a difference in temperature characteristics.

  On the other hand, when the TCXO is connected to a circuit module designed to complete an oscillation circuit by connecting a resonator as in the integrated circuit 2 described above, the circuit module is provided as a part of the oscillation circuit. The inverter 4 and the like have a redundant configuration. Further, the redundant portion performs charge / discharge of the capacitors Cin and Cout and the amplification operation of the inverter 4 at the frequency fosc in accordance with the oscillation signal of the source oscillation frequency fosc input from the TCXO, so that originally unnecessary current consumption is generated. The problem of becoming larger arises.

  The present invention has been made to solve the above-described problems, and provides a vibrator unit, an oscillation circuit, and a receiving circuit that can appropriately compensate for temperature characteristics of a crystal vibrator with low power consumption. For the purpose.

  A vibrator unit according to the present invention is integrally configured including a crystal resonator, and includes an external connection terminal for connecting the crystal resonator to an external circuit, and is connected to the crystal resonator. A variable capacitor, a temperature sensor that detects a temperature in the vicinity of the crystal resonator, and a temperature compensation circuit that controls the capacitance of the variable capacitor, and the temperature compensation circuit includes: The capacitance of the variable capacitor is adjusted based on a detection output of the temperature sensor in response to an external trigger signal input.

  In another vibrator unit according to the present invention, the variable capacitor varies the capacitance discretely according to a digital value control value output from the temperature compensation circuit, and the temperature compensation circuit includes the temperature compensation circuit, It has an arithmetic circuit that operates independently of the crystal resonator, performs an analog calculation on the detection output that is an analog signal, and generates the capacitance control value representing the calculation result.

  In still another resonator unit according to the present invention, the temperature compensation circuit generates a clock pulse used for driving the arithmetic circuit at a higher frequency than the crystal resonator in response to an input of the trigger signal. A generation circuit;

  In another vibrator unit according to the present invention, the arithmetic circuit is a loop that traces the base and emitter of an even number of transistors that are input transistors or output transistors, and the direction of the diode formed by the base-emitter junction is reversed. Is an arithmetic circuit that performs the analog calculation represented by the same number of translinear loops on the loop and generates the capacity control value, and in the circuit having the translinear loop, the connection of the translinear loop Is modified between the emitter of the transistor in which the direction of the diode is forward and the emitter of the transistor in the reverse direction, and the modified loop circuit is modified to connect a potential comparison circuit to the divided portion, Connected to the emitters of the input transistors, each with the analog operation Input current supply means for supplying an input current as an input, a control circuit for generating a trial value for the calculation result, and a trial current having a magnitude corresponding to the trial value, connected to the emitter of the output transistor And a trial current generating means for supplying, and the potential comparison circuit compares the potentials on both sides of the divided portion to generate a comparison output according to the result, and the control circuit outputs the comparison output to the comparison output. Based on this, the trial value corresponding to the potential equilibrium state at the division point is searched and output as the capacity control value.

  In the vibrator unit according to the present invention, the potential comparison circuit has a comparator that outputs one of two types of output states as the comparison output depending on the magnitude relationship between the potentials on both sides of the divided portion. The control circuit receives a clock pulse, sequentially increments or decrements the count value for each clock pulse, outputs the count value as the trial value, and changes the output state of the comparison output. A determination circuit that detects and uses the trial value corresponding to the change as the capacity control value.

  Further, in the vibrator unit according to the present invention, the potential comparison circuit includes a voltage-current conversion circuit that generates a current corresponding to a potential difference between both sides of the divided portion as the comparison output, and the control circuit includes: A capacitor for charging the current of the comparison output; a switch for selectively discharging the capacitor in an on state; and a voltage across the terminals of the capacitor, and an on / off state of the switch according to the output A hysteresis comparator that alternately repeats charging / discharging of the capacitor, a counter that sequentially increases or decreases the count value for each output pulse of the hysteresis comparator, and outputs the count value as the trial value, and the hysteresis Judgment of reaching the potential equilibrium state based on the period of change in the output of the comparator , It can be configured to have a decision circuit for the trial value corresponding to the time of the arrival and the capacity control value.

  One of preferable aspects of the vibrator unit according to the present invention is that the oscillator circuit is configured by being connected as a resonator to the oscillation amplifier which is the external circuit, and the variable capacitor is the oscillation circuit. The temperature compensator adjusts the capacitance of the variable capacitor to compensate for temperature fluctuations in the oscillation frequency of the oscillation circuit.

  In another preferable aspect of the vibrator unit according to the present invention, a frequency component corresponding to a resonance characteristic is extracted from a received signal input to an input terminal of the external connection terminals, and an output of the external connection terminal is extracted. The variable capacitor is connected in series with the crystal resonator between the input terminal and the output terminal, and the temperature compensation unit is configured to function as a filter circuit that outputs from a terminal. The capacitance of the capacitor is adjusted to compensate for temperature fluctuations in the resonance frequency of the filter circuit.

  An oscillation circuit according to the present invention includes an oscillation amplifier and a resonator externally connected between the input and output terminals of the oscillation amplifier, and the resonator is the vibrator unit according to the present invention. There is something.

  A receiving circuit according to the present invention is a front-end circuit that receives a radio signal and outputs a received signal, a rear-stage circuit that receives a signal of a target frequency extracted from the received signal, and an external circuit between the two circuits. A filter circuit that extracts a signal of the target frequency according to resonance characteristics, wherein the filter circuit is the vibrator unit according to the present invention.

  According to the present invention, it is possible to obtain a resonator unit, an oscillation circuit, and a reception circuit that can favorably compensate for the temperature characteristics of a crystal resonator with less power consumption than when a TCXO is connected.

FIG. 3 is a schematic diagram for illustrating a schematic configuration of a vibrator unit and an oscillation circuit according to the first embodiment of the present invention. It is a typical circuit diagram which shows the structural example of a variable capacitor. It is a schematic circuit diagram of a temperature sensor circuit. It is a graph which shows the relationship between the temperature T and the temperature current Ix which the temperature sensor circuit produces | generates, the reference current Ir. It is a circuit diagram which shows the basic composition of an example of an arithmetic circuit. It is typical sectional drawing which shows the structure of the bipolar transistor formed in a p-type semiconductor substrate using a CMOS process. It is a schematic diagram explaining the principle of frequency temperature compensation based on the capacity | capacitance control value Dcnt in a vibrator | oscillator unit. It is a typical block diagram which shows an example of a structure of an electric potential comparison circuit and a control circuit. FIG. 9 is a schematic timing diagram relating to the circuit shown in FIG. 8. It is a schematic circuit diagram which shows the other example of a structure of an electric potential comparison circuit and a control circuit. FIG. 11 is a schematic timing diagram regarding the circuit shown in FIG. 10. It is a schematic diagram which shows the structure of the outline of the radio | wireless receiving circuit which used the vibrator | oscillator unit as a crystal filter based on the 2nd Embodiment of this invention. It is a schematic diagram of a conventional oscillation circuit with an externally attached crystal resonator. It is a typical circuit diagram for demonstrating TCXO which is a prior art.

  Hereinafter, embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings.

[First Embodiment]
FIG. 1 is a schematic diagram for illustrating a schematic configuration of the vibrator unit 20 and the oscillation circuit 22 according to the first embodiment. The vibrator unit 20 is used by being connected to an integrated circuit 24 such as a microcomputer or a clock IC. Like the integrated circuit 2 described above, the integrated circuit 24 uses the inverter 26 as an oscillation amplifier, and includes the inverter 26 and capacitors Cin and Cout connected to its input / output terminals as a part of the oscillation circuit 22. Further, the integrated circuit 24 is provided with terminals Nin and Nout for connecting a resonator to the feedback path of the inverter 26.

The resonator unit 20 includes a crystal resonator Xtal, a variable capacitor (variable capacitor) C _V , and a temperature compensation unit 28, and is integrally configured in the form of a package or the like. The vibrator unit 20 has two external connection terminals N1 and N2 corresponding to both terminals of the crystal vibrator Xtal. The vibrator unit 20 has a trigger signal input terminal Ntg for starting the temperature compensation operation. The vibrator unit 20 includes a terminal to which a positive voltage power source Vdd is supplied and a terminal connected to the ground GND as a power source used for the operation of the temperature compensation unit 28 and the like.

  The vibrator unit 20 has terminals N1 and N2 connected to the terminals Nout and Nin of the integrated circuit 24, whereby an oscillation circuit 22 in which the circuit on the integrated circuit 24 side and the vibrator unit 20 are combined is configured.

The temperature compensation unit 28 includes a temperature sensor circuit 30. As described above, the temperature sensor circuit 30 is enclosed in the same package as the crystal unit Xtal, and detects the temperature in the vicinity of the crystal unit Xtal. When the trigger signal is input to the terminal Ntg, the temperature compensation unit 28 performs an operation of adjusting the capacitance of the variable capacitor _CV based on the detection output of the temperature sensor circuit 30. When the adjustment operation is completed, the temperature compensation unit 28 stops the operation and starts the adjustment operation for each trigger signal. Temperature compensating section 28 and the variable capacitor C _V is configured capacity set for the capacitor C _V is held in the stop period of the temperature compensating section 28.

In the present embodiment, the temperature compensation unit 28 includes an arithmetic circuit 32. The arithmetic circuit 32 performs an analog operation on the detection output given by the temperature sensor circuit 30 as an analog signal, and determines a capacitance to be set in the variable capacitor _CV . In addition, the variable capacitor _CV has a configuration in which the capacitance is discretely changed according to an input digital value (capacity control value). In response to this, the temperature compensation unit 28 outputs the capacity control value Dcnt as a calculation result of the analog calculation.

FIG. 2 is a schematic circuit diagram showing a configuration example of the variable capacitor _CV . The capacitor _CV is connected, for example, between one end of the crystal unit Xtal and the ground GND. C _V includes M element capacitors c _{i in} parallel (i is a natural number less than or equal to M), and each element capacitor c _i is a switch element sw _i made of a MOS transistor or the like (i is a natural number less than or equal to M). To the terminal on the N2 side of Xtal. Capacitance of the capacitor _{c i} as parameters cu,
c _i = cu · 2 ⁽ⁱ⁻¹⁾ (1)
Is set to, by changing the combination of _{c i} which are connected in parallel by the switching element sw _{i, C V} can be discretely changed in ^{2 M} stage interval cu from 0 to ⁽² M -1) cu .

The switch sw _i is turned on / off using each bit value of the capacity control value Dcnt expressed in binary. Therefore, the number of bits of the capacitance control value Dcnt and the number of element capacitors constituting the variable capacitor _CV are basically matched. In this embodiment, the least significant bit (LSB) of Dcnt is the first bit, the most significant bit (MSB) is the Mth bit, and sw _i is controlled by the value of the i th bit. For the reason described later, in this embodiment, the switch sw _i is turned off when an H (High) level potential representing a bit value “1” is applied, and an L (Low) level potential representing “0”. It is configured to be turned on when is applied.

_CV becomes a part of the load capacity, and by adjusting this, the oscillation frequency f of the oscillation circuit 22 can be changed. Qualitatively, f increases as _CV is increased. Incidentally, the load capacitance C _L, the equivalent series capacitance of the crystal oscillator, the equivalent parallel capacitance respectively C _1, C _0, when the series resonance frequency represented as f _r, the load resonance frequency f _L at a certain temperature following The formula holds.
(F _L −f _r ) / f _r = C ₁ / {2 (C _L + C ₀ )} (2)

  FIG. 3 is a schematic circuit diagram of the temperature sensor circuit 30. The temperature sensor circuit 30 generates a current Ix proportional to the absolute temperature T as a temperature detection output. The temperature sensor circuit 30 also generates a reference current Ir independent of the temperature T.

  For example, a current Ix proportional to T can be generated using a bandgap reference circuit. The portion related to the generation of the current Ix of the temperature sensor circuit 30 includes an n-channel MOS transistor M1 having a drain connected to the positive voltage power supply Vdd, and two current paths formed between the source of M1 and the ground GND. Have. The gate of the MOS transistor M1 is commonly connected to the gate of the n-channel MOS transistor M2 whose drain is connected to the positive voltage power supply Vdd and the output terminal of the operational amplifier 40. Resistive elements R1, R2 and a pnp transistor Qt1 are arranged in series from the source side of M1 in the first current path. A resistor element R1 and a pnp transistor Qt2 are arranged in series in the second current path.

Transistors Qt1 and Qt2 have their bases and collectors grounded. These transistors Qt1 and Q3 have the same characteristics, but the emitter of the transistor Qt1 has a size K times (K> 1) as compared with the transistor Qt2, and the base-emitter voltages Vbe1, Vbe2 is Vbe1 <Vbe2. The operational amplifier 40 controls the currents It1 and It2 flowing in the first and second current paths so that the sum of the voltage drop at the resistance element R1 and Vbe1 of the transistor Qt1 is equal to Vbe2 of the transistor Qt2. As a result, the current It1 becomes a current proportional to the absolute temperature T (referred to as _IPTAT ). Further, since the voltage of the resistance element R1 in the first current path is equal to the voltage of the resistance element R1 in the second current path, It2 = It1. Therefore, the current 2I _PTAT flows through the transistor M1. The current flowing through the transistor M1 is taken out as a detection output current Ix by the transistor M2 which forms a current mirror circuit with M1.

  A portion related to generation of the reference current Ir of the temperature sensor circuit 30 includes a current path including an n-channel MOS transistor M3 and a resistor R3 connected in series between the positive voltage power supply Vdd and the ground GND, It consists of a current mirror circuit that extracts current. The drain of M3 is connected to Vdd, and a resistor R3 is connected between the source and ground GND. The current flowing through the current path is controlled by the operational amplifier 42 so that the potential on the transistor M3 side of the resistor R3 matches the source potential of the transistor M1. Since the source potential of M1 is temperature independent, the current is temperature independent. The current is taken out as the reference current Ir by the transistor M3 and the transistor M4 constituting the current mirror circuit.

  FIG. 4 is a graph showing the relationship between the temperature current Ix and reference current Ir generated by the temperature sensor circuit 30 and the temperature T. The horizontal axis represents the absolute temperature T, and the vertical axis represents the current value. The temperature current Ix increases in proportion to T, while the reference current Ir becomes constant.

  Here, the frequency-temperature characteristic of the crystal resonator is expressed by a quadratic curve or a cubic curve, and is usually set to be symmetric about around 25 ° C. Therefore, if both currents Ix and Ir are set to be equal at the center temperature, it is expected that analog operations described later will be facilitated. The temperature T0 at the intersection can be shifted by changing the reference current Ir by adjusting the resistor R3, for example.

  FIG. 5 is a circuit diagram showing a basic configuration of an example of the arithmetic circuit 32. The arithmetic circuit 32 uses the translinear principle, and can be said to constitute a translinear loop in a pseudo manner as will be described later.

Here, the translinear principle means that the number of semiconductor junctions in the clockwise direction (CW) polarity and the counterclockwise direction (CCW) polarity in a loop coupled so as to make a round of the base and emitter of a plurality of transistors. When the number of semiconductor junctions is the same, the product of the collector current of the transistor in which the base current flows in the clockwise direction is equal to the product of the collector current of the transistor in which the base current flows in the counterclockwise direction. is there. The following equation represents the translinear principle, where the left side is the product of the collector currents I _Ci of N transistors having a base-emitter junction with a clockwise (CW) polarity, and the right side is counterclockwise (CCW). It is the product of the collector currents I _Cj of N transistors with polar base-emitter junctions. Here, i and j are both natural numbers of N or less.

  A translinear circuit using the principle is used to configure an analog arithmetic circuit. For example, a multiplier circuit, a division circuit, a square circuit, a square root circuit, or the like can be realized by the translinear circuit.

  A portion using the translinear principle in the arithmetic circuit 32 is referred to as an analog arithmetic unit 50. The arithmetic circuit 32 includes a current output type D / A converter (DAC: Digital-to-Analog Converter) 52, a potential comparison circuit 54, and a control circuit 56 in addition to the analog arithmetic unit 50.

  It can be said that the analog computing unit 50 constitutes a pseudo-translinear loop as described later. Similar to the original translinear loop, the analog operation unit 50 is configured using bipolar transistors. In this embodiment, the bipolar transistor is formed by a CMOS process. FIG. 6 is a schematic view showing the structure of the bipolar transistor, and shows a cross section perpendicular to the semiconductor substrate. FIG. 6 shows an example in which the semiconductor substrate forming the IC is a p-type substrate (hereinafter referred to as p-sub) 60 to which p-type impurities are introduced and p-type conductivity (first conductivity type) is given. Yes. An n-well 62, which is a semiconductor region in which an n-type impurity is introduced into the surface of the p-sub 60 and is made to have n-type conductivity (second conductivity type), is formed. Further, a p-type region 64 is formed in the n-well 62. As a result, a pnp-type transistor having the p-sub 60 as the collector (C), the n-well 62 as the base (B), and the p-type region 64 as the emitter (E) is formed. Incidentally, in the CMOS process, the n-well 62 is formed by the step of forming a region that becomes a channel of the p-type MOS transistor. Specifically, a mask having an opening in the region where the n-well 62 is formed is formed of a photoresist or the like. It is formed by ion implantation and thermal diffusion of n-type impurities. The p-type region 64 is formed by a step of forming diffusion layer regions for the source and drain of the p-channel MOS transistor. Specifically, after forming a mask, the p-type region 64 is formed by ion implantation of p-type impurities. In the bipolar transistor formed by this CMOS process, the collector is fixed at the substrate potential Vsub. For a p-type substrate, Vsub can be the ground GND.

  The pnp transistors Qt1 and Qt2 of the temperature sensor circuit 30 can also be manufactured in the same process as the bipolar transistor of the analog calculation unit 50.

The analog operation unit 50 shown in FIG. 5 is configured using the above-described bipolar transistor made by a CMOS process. The analog calculation unit 50 shows an example of a case where the crystal resonator has a frequency temperature characteristic of a quadratic curve. The compensation for the temperature characteristic can be performed approximately by changing the oscillation frequency f when the variable capacitor _CV is increased by a quadratic function of (T−T0). A configuration example will be described.

The arithmetic circuit 32 is formed between the positive voltage power source V ₊ (which can be set to the same Vdd as the temperature sensor circuit 30) and the ground GND. The analog calculation unit 50 includes four transistors Q1 to Q4. As described above, the collectors of the transistors Q1 to Q4 are grounded. The bases of Q1 and Q3 are also grounded. On the other hand, the base of Q2 is connected to the emitter of Q1, and the base of Q4 is connected to the emitter of Q3.

  Transistors Q1 to Q3 correspond to an input transistor supplied from outside the arithmetic circuit 32 as an input current that is input to the arithmetic circuit 32, and Q4 is an output transistor that provides an output current that is an arithmetic result in the arithmetic circuit 32. Equivalent to. The collectors of the transistors Q1 to Q4 are the p-sub 60 as described above, and are set to the common potential GND. For this reason, there is a restriction that the collectors of the transistors Q1 to Q4 cannot be used for supplying the input current or extracting the output current.

  Here, Q1 to Q4 are all pnp type, and on the translinear loop constituted by transistors of the same type in this way, the emitter of the transistor whose direction of the diode is the reverse direction to the emitter of the transistor whose direction is the forward direction. There is a place to connect the.

  In the present embodiment, the connection between Q2 and Q4 corresponds to this point. If the emitter of Q2 and the emitter of Q4 are autonomously set to the same potential, the transistors Q1 to Q4 constitute a translinear loop. On the other hand, the analog operation unit 50 divides between the emitter of Q2 and the emitter of Q4, and their potential relationship is different from the original translinear loop in that it is controlled from outside the loop. Because of this difference, the transistors Q1 to Q4 and their control mechanism are referred to as quasi-translinear loops. This quasi-translinear loop has a circuit configuration (modified loop circuit) in which the potential comparison circuit 54 is modified at a location where the connection of the translinear loop is divided. The potential comparison circuit 54 compares the potentials on both sides of the divided part and generates a comparison output according to the result.

  The analog calculation unit 50 includes current sources I1 to I3 as current input means for supplying an input current to the emitters of the transistors Q1 to Q3. In the circuit shown in FIG. 5, the current sources I1 and I2 supply the temperature current Ix obtained from the temperature sensor circuit 30 to the emitters of the transistors Q1 and Q2, respectively. The current source I3 supplies the reference current Ir obtained from the temperature sensor circuit 30 to the emitter of the transistor Q3.

  On the other hand, a current DAC 52 is connected to the emitter of the transistor Q4 as trial current generating means for generating and supplying a trial current It having a magnitude corresponding to a trial value Nt described later. The emitter of the transistor Q4 is further connected to a current source I4 that supplies a current 2Ix and a current source I5 that supplies a current Ir. The current DAC 52 and the current source I4 supply currents It and 2Ix from the emitter of Q4 to the base, respectively, and the current source I5 supplies the current Ir in the opposite direction. As a result, the current flowing through Q4 is (2Ix-Ir + It).

If the emitter of Q2 and the emitter of Q4 are autonomously set to the same potential, the transistors Q1 to Q4 are
Ix ² = Ir (2Ix-Ir + Iout) (4)
In FIG. 5, a current lout represented by the following equation is obtained as a calculation result at a terminal to which the current DAC 52 is connected.
Iout = (Ix−Ir) ² / Ir (5)

  On the other hand, in the arithmetic circuit 32, the control circuit 56 controls the current DAC 52 based on the output of the potential comparison circuit 54, and the arithmetic result is expressed as a digital value for the arithmetic expression (4) expressed by the original translinear loop. To output. The control circuit 56 sets a value assumed as a calculation value which is digital data representing the calculation result, evaluates whether the value is a calculation value, and if the value is not a calculation value, changes the value and evaluates it. To search for the calculated value. Here, a value to be set as a trial as an operation value is referred to as a trial value.

Specifically, the control circuit 56 generates a trial value Nt and inputs it to the current DAC 52. The current DAC 52 generates a current (trial current) It corresponding to the trial value and supplies it to the emitter of the output transistor Q4. Here, the trial current It is given by the following equation, where ΔI is a discretization current (current per 1 LSB) of the current DAC 52.
It = Nt · ΔI (6)

If the trial current It is equal to Iout expressed by the equation (5), the quasi-translinear loop can be regarded as the same state as the state where the translinear principle of the equation (4) is established. That is, a state equivalent to the original translinear loop is realized, and the emitter potential Vα of Q4 and the emitter potential Vβ of Q2 are in an equilibrium state. On the other hand, the less It is than Iout, based Q4 - emitter voltage V _BE is smaller than the translinear loop, V.alpha is lower than V?, It conversely if the amount exceeds Iout, V.alpha is higher than V?.

The potential comparison circuit 54 receives the Vα and Vβ and generates a comparison output thereof. The control circuit 56 detects a trial value corresponding to the equilibrium state of Vα and Vβ from the comparison output, and uses this as a calculation result to determine the capacitance. The control value Dcnt is output from the arithmetic circuit 32 to the variable capacitor _CV .

The arithmetic circuit 32 uses the translinear principle, but can be manufactured by a standard CMOS process instead of a bipolar process or a Bi-CMOS process. That is, not only the current DAC 52, the potential comparison circuit 54, and the control circuit 56 but also the bipolar transistors Q1 to Q4 related to the translinear principle are manufactured by the CMOS process as described above. Therefore, an IC including the temperature compensation unit 28 including the arithmetic circuit 32 or the temperature sensor circuit 30, and an IC including the temperature compensation unit 28 and the variable capacitor _CV can be manufactured by a CMOS process, Compared with an IC to be manufactured, it is possible to reduce power consumption, improve integration density, and reduce manufacturing costs.

  Incidentally, the calculation relating to the analog quantity can be performed using a digital arithmetic circuit in addition to the analog arithmetic circuit such as the above-described translinear circuit. In a configuration using a digital arithmetic circuit, an input signal which is an analog signal is converted into digital data by an A / D converter (ADC: Analog-to-Digital Converter) and input to the digital arithmetic circuit.

  However, the calculation accuracy of digital calculation is affected by the resolution of the ADC. In particular, in the calculation of a nonlinear function, the influence of the quantization error due to the ADC is also nonlinear. Therefore, when setting the resolution of the ADC, it is necessary to consider not only the required accuracy but also the order of the function and the range of the input signal. For example, when it is attempted to obtain a predetermined accuracy by a function calculation including a power of input data x, it is necessary to reduce the quantization error of x as x increases and the order of x increases. Become heavier. An increase in the number of input data bits also increases the burden on the digital arithmetic circuit.

  On the other hand, in the configuration using the analog arithmetic circuit, the arithmetic is performed by analog signal processing. That is, the input signal is input to the analog arithmetic circuit as an analog signal, and the analog arithmetic circuit generates a physical quantity such as voltage and current corresponding to the arithmetic result. Therefore, this configuration does not cause a problem associated with A / D conversion of the input signal.

  The arithmetic circuit 32 can be configured as a semiconductor device by a CMOS process while performing the non-linear arithmetic operation expressed by the equation (5) while having the above advantages of the analog arithmetic circuit.

Here, using the parameter Ax, ΔI is changed to ΔI = Ir / Ax (7)
If the discretization error is ignored, the capacity control value Dcnt output from the arithmetic circuit 32 is
Dcnt = Ax {(Ix-Ir) / Ir} ² (8)
It is expressed. As described above, since Ir = Ix is set at the temperature T0, Dcnt becomes Dcnt = 0 at the temperature T0, and Dcnt is proportional to (T−T0) ² .

FIG. 7 is a schematic diagram for explaining the principle of frequency temperature compensation based on the capacity control value Dcnt in the vibrator unit 20. In the figure, the horizontal axis is the temperature T. The vertical axis represents the frequency f, the left side represents the oscillation frequency f of the crystal resonator Xtal, and corresponds to the frequency-temperature characteristic curve 70 of the quadratic function of the crystal resonator Xtal. This temperature characteristic indicates the oscillation frequency f in a state where the variable capacitor C _V is not provided (that is, C _V = 0), and the temperature compensation range [T0−ΔT, T0 + ΔT] set around the vertex temperature T0. It is designed to be equal to or greater than the target oscillation frequency f _a Te. Specifically, f = f _A at temperatures T0−ΔT and T0 + ΔT, and the maximum value of the oscillation frequency f at temperature T0 is expressed as f _A + Δf _MAX .

On the other hand, the vertical axis on the right side shows the amount of change Δf of the oscillation frequency f due to the variable capacitor _CV . The Δf is the amount of change in the oscillation frequency when changing the C _V as a part of the load capacitance C _L of the oscillating circuit 22 are based on the frequency at C V _{= 0.}

As described above, the variable capacitor _CV is set to a capacitance value in which the switch element sw _i is turned on and the element capacitors c _i are connected in parallel. The switch element sw _i corresponding to the bit whose value is “0” in the binary representation Dcnt is turned on. Dcnt as described above is proportional to _{^{(T-T0) 2, C}} V follows a quadratic function of the temperature T as a maximum value ⁽² M -1) cu at a temperature T0. This configuration corresponds to a simple subtraction using a so-called 1's complement.

For example, the parameter Ax is set so that a quadratic function representing _CV at both ends of the temperature compensation range, that is, temperatures T0−ΔT, T0 + ΔT, becomes a minimum value 0 of _CV . In this case, Δf at temperatures T0−ΔT and T0 + ΔT is zero. FIG. 7 shows a change in Δf corresponding to _CV that changes with temperature in this way as a frequency correction amount curve 72.

The frequency correction amount curve 72 is a downward convex function having a minimum point at the temperature T0. Therefore, by performing the frequency correction by the temperature compensation unit 28 and the variable capacitor _CV, an excess from the target oscillation frequency f _A in the temperature compensation range of the frequency temperature characteristic curve 70 that is a convex quadratic function is suitable. Is offset by That is, as shown in the corrected characteristic curve 74 shown in FIG. 7, the oscillation frequency f that the vibrator unit 20 brings to the oscillation circuit 22 within the temperature compensation range can be maintained at the target oscillation frequency f _A or a value near it.

Here, the oscillation frequency f of the crystal resonator may have a manufacturing error, and the value f _A + Δf _{MAX of the} f at T = T0 may vary due to the error. Correspondingly, it is preferable that the correction amount Δf _MAX can be individually adjusted at T = T0 of the oscillation frequency f by the variable capacitor _CV . Specifically a configuration for adding the offset amount to the capacitance value C _V, by including the offset amount at T = T0 C _V, excess from the target oscillation frequency f _A in the temperature compensation range of frequency-temperature characteristic curve 70 So that the minutes are offset. For example, the variable capacitor _CV is configured such that the set value when Dcnt = 0 is a large value having a margin corresponding to the width of the capacitance value for offset adjustment. In the individual adjustment for each transducer, the offset value to be added to Dcnt is adjusted to lower _CV, and the offset value is obtained so that the excess of the frequency f at T = T0 is preferably offset. For example, the offset value can be stored in the vibrator unit 20 in a nonvolatile memory and read when the power is turned on.

  Further, the second-order coefficient of the frequency temperature characteristic of the vibrator may vary depending on the production lot. Corresponding to this, it is preferable to be able to individually adjust the secondary coefficients when correcting the quadratic function. As understood from the equation (8), Ax corresponds to the second-order coefficient, and Ax is a ratio between ΔI and Ir as shown in the equation (7). Therefore, Ax can be switched as a configuration in which a ratio for obtaining ΔI with Ir as a reference can be selected from several ways. The setting of Ax can also be stored in a nonvolatile memory and read when the power is turned on.

  In the above description, in order to facilitate understanding of the essence of the present invention, the frequency temperature characteristic of the crystal unit Xtal is a quadratic function, and an analog calculation is relatively represented by the equation (4) or (5). A simple example is shown. However, even if the frequency temperature characteristic is another function such as a cubic function, the temperature correction of the oscillation frequency can be performed by designing an analog operation corresponding to the function. In addition, it is also possible to change the circuit configuration of the analog calculation unit 50 to the above-described quadratic function characteristics to perform analog calculation with higher accuracy correction.

  FIG. 8 is a schematic block diagram showing an example of the configuration of the potential comparison circuit 54 and the control circuit 56. The potential comparison circuit 54 uses a comparator 80. The control circuit 56 includes a clock pulse generation circuit 82, a counter 84, a data latch circuit 86, and a timing generator 88. FIG. 9 is a schematic timing chart of the circuit shown in FIG.

  The timing generator 88 receives the pulse 100 of the trigger signal TRG input to the terminal Ntg of the vibrator unit 20 and starts operation control of each part of the temperature compensation unit 28. For example, the timing generator 88 sets the enable signal (enable) to the H level in synchronization with the rising edge of the trigger pulse 100.

  The enable signal is input to the temperature sensor circuit 30 and the clock pulse generation circuit 82, and these circuits operate while the enable signal is at the H level. For example, the clock pulse generation circuit 82 starts an oscillation operation when the enable signal becomes H level, and generates clock pulses at a predetermined cycle.

  Here, the clock pulse generation circuit 82 operates independently of the crystal resonator Xtal. That is, the clock pulse generation circuit 82 oscillates without using the crystal resonator Xtal, and generates a clock pulse at a frequency independent of the oscillation frequency of the crystal resonator Xtal. As will be described later, the clock pulse generated by the clock pulse generation circuit 82 is used for the operation of searching the capacitance control value Dcnt by changing the trial value Nt, and does not affect the oscillation frequency of the oscillation circuit 22. However, it can be configured using a circuit that can be formed on an IC, such as an RC oscillation circuit or a ring oscillator.

  Further, the frequency of the clock pulse generation circuit 82 can be set independently of the crystal resonator Xtal as described above. For example, the frequency is set to a frequency higher than that of the crystal resonator Xtal so that the temperature compensation unit 28 is operated at high speed. It can be operated. The number of trials until the capacitance control value Dcnt is obtained does not change depending on the frequency of the clock pulse. However, the trial current It is supplied for each trial by increasing the frequency, and the computation time is performed by operating the analog computation unit 50. Becomes shorter. That is, power consumption is reduced by shortening the current supply time in the analog arithmetic unit 50 and the current DAC 52.

  The comparator 80 receives the potentials Vα and Vβ of the analog computing unit 50, and outputs one of two types of potentials of H level and L level according to the magnitude relationship between them. Here, as the comparison output Vcmp, the comparator 80 outputs an H level when Vα> Vβ, and outputs an L level when Vα ≦ Vβ.

  The comparison output Vcmp is input to the timing generator 88 as a stop signal (stop), and is used to detect the timing at which the operation of the temperature compensation unit 28 is stopped. The comparison output Vcmp is input to the AND circuit 90 together with the output clock of the clock pulse generation circuit 82.

  The AND circuit 90 outputs a count pulse (count) in synchronization with the clock from the clock pulse generation circuit 82 when Vcmp is at the H level.

When the counter 84 receives the pulse 102 of the initialization signal (init) output from the timing generator 88 in synchronization with the input of the trigger pulse 100, the counter 84 sets the count value to the initial value. In this embodiment, the counter 84 is configured to count down, the initial value is set to (2 ^M −1), and the count value is decremented by 1 each time a pulse is input from the AND circuit 90.

  The count value of the counter 84 is input to the current DAC 52 as the trial value Nt and also output to the data latch circuit 86.

When the update latch (update) pulse 104 is input from the timing generator 88, the data latch circuit 86 rewrites the latch content with the count value input at that time and holds the content. The timing generator 88 generates a pulse 104 when the comparison output Vcmp input as a stop signal becomes L level. As will be described later, Vcmp is switched from the H level to the L level at the timing when the operation result is obtained. Therefore, the capacity control value Dcnt is latched in the data latch circuit 86, and the data latch circuit 86 stores the M pieces of latched data. An H level or L level potential representing the bit value is output in parallel and applied to the M switches SW _{i of} the variable capacitor C _V. In this configuration, the timing generator 88 functions as a determination circuit that detects a change in the comparison output Vcmp and sets the trial value Nt corresponding to the change as the capacitance control value Dcnt.

In the above configuration, the trial current It supplied from the current DAC 52 to Q4 decreases by ΔI by the count-down operation of the counter 84. At the same time, V _BE of Q4 decreases sequentially, and Vα decreases sequentially. Basically, Vα> Vβ at the start of the countdown, and Vα approaches Vβ as the countdown proceeds. In this state, the comparison output Vcmp is at the H level. Further, the countdown further proceeds. When It ≦ Iout with respect to Iout represented by the equation (5), Vα ≦ Vβ is established, and the comparison output Vcmp is switched to the L level.

  The transition of the Vcmp to the L level means the end of the analog operation, the output of the count pulse (count) from the AND circuit 90 is stopped, and the timing generator 88 generates a pulse 106 having a predetermined width as the end signal (end). To do. Within the period of this pulse 106, the timing generator 88 generates a pulse 104 of the update signal. The width of the pulse 106 is set according to the time required for the stop operation of the temperature compensation unit 28 such as generation of the pulse 104, and the falling edge of the enable signal is shifted from the end of the calculation. That is, the clock pulse generation circuit 82 is caused to generate a clock necessary for the operation of the logic circuit of the temperature compensation unit 28 within the period of the pulse 106 from the end of the calculation. When the pulse 106 falls, the enable signal is switched to the L level, the temperature sensor circuit 30 and the clock pulse generation circuit 82 are stopped, and the operation of the temperature compensation unit 28 is stopped.

As described above, since the temperature compensation unit 28 operates only intermittently, the power consumption is reduced. Further, as described above, the clock driving the temperature compensation unit 28 can be increased to reduce the power consumption in each operation. Note that the variable capacitor _CV shown in FIG. 2 basically does not consume power.

  As shown in FIG. 1, in this embodiment, the trigger signal is given from the integrated circuit 24. For example, when the integrated circuit 24 is a clock IC, a 256-Hz clock CK is normally output to the outside. The clock signal CK can be used as the trigger signal. In addition, since the temperature change is usually relatively gradual, the temperature compensation operation in the vibrator unit 20 can be performed in a longer cycle than the clock CK, for example, every minute, and by reducing the frequency as such. Further, power consumption can be further reduced in the temperature compensation unit 28 and the like. Specifically, a frequency dividing circuit may be provided in the vibrator unit 20 to divide the clock CK input to the terminal Ntg to generate a trigger signal and input it to the temperature compensation unit 28.

  If the timepiece IC is driving a stepping motor for driving a pointer, the driving pulse may be used as the trigger signal. There are motor drive pulses that send several short pulses continuously for one rotation of the motor. In that case, filter processing or masking is used to handle as a single trigger. It is possible to increase the period by dividing the frequency.

  The vibrator unit 20 can also be configured to periodically perform a temperature compensation operation after receiving a single activation pulse. For example, the vibrator unit 20 may be provided with a frequency dividing circuit that divides the oscillation signal of the crystal resonator Xtal when a start pulse is input and generates a trigger pulse to the temperature compensation unit 28.

  In the example of the circuit configuration of the analog operation unit 50 shown in FIG. 5, it is necessary to allow current to flow into the emitters of the transistors Q1 to Q4. In this regard, the current (2Ix−Ir + Iout) of the transistor Q4 given by the second factor on the right side of the equation (4) includes a subtraction term (−Ir). In such a case, if the Iout search is performed from the side with a small It, that is, the counter 84 is counted up, it may be possible that the current direction is reversed during the trial process. In the configuration described above, a configuration in which the counter 84 is counted down is adopted in consideration of such concerns. However, under conditions such as calculation contents and temperature compensation range where such inconvenience does not occur, either count-up or count-down may be performed.

  Further, the control circuit 56 may generate the trial value Nt by the binary search method and search for the capacity control value Dcnt.

FIG. 10 is a schematic circuit diagram showing another example of the configuration of the potential comparison circuit 54 and the control circuit 56. The potential comparison circuit 54 uses the V / I conversion circuit 120. The control circuit 56 includes a capacitor C _CH1 , a switch SW _CH1 , a hysteresis comparator 122, a counter 84, a data latch circuit 86, a balance detection circuit 128, and a timing generator 130. FIG. 11 is a schematic timing chart of the circuit shown in FIG.

The V / I conversion circuit 120 includes a transconductance amplifier (OTA) and outputs a current Icmp corresponding to the input voltage ΔV to the differential input terminals (+) and (−). Specifically, when transconductance is expressed in gm,
Icmp = gm · ΔV
It is. The current Icmp becomes a comparison output of the potential comparison circuit 54. The differential input terminal (+) receives a potential Vα, the differential input terminal (−) receives a potential Vβ,
ΔV = Vα−Vβ
It is.

The capacitor _CCH1 is connected between the output terminal of the V / I conversion circuit 120 and the ground GND, and charges the current Icmp.

The switch SW _CH1 selectively discharges the capacitor C _CH1 in the on state. Specifically, the switch SW _CH1 is connected in parallel to the capacitor C _CH1 and shorts both ends of the capacitor C in the on state. For example, the switch SW _CH1 is formed of a MOS transistor, and is turned on / off by the output voltage Vsch of the hysteresis comparator 122 applied to the gate. Here, the switch SW _CH1 is turned on when Vsch is at H level, and is turned off when Vsch is at L level.

The hysteresis comparator 122 receives the inter-terminal voltage Vcap of the capacitor C _CH1 , switches the ON / OFF state of the switch SW _CH1 according to the output voltage Vsch, and alternately repeats charging / discharging of the capacitor C _CH1 . The hysteresis comparator 122 sets the two threshold values VthH and VthL to VthH>VthL> 0, and switches Vsch from L level to H level when Vcap becomes VthH or more, and changes Vsch from H level to L level when Vcap becomes VthL or less. Switch to.

  The balance detection circuit 128 is a circuit that detects the arrival of Vα and Vβ in an equilibrium state based on the period of change in the output of the hysteresis comparator 122. The balance detection circuit 128 receives Vsch from the hysteresis comparator 122, determines that the potential balance is in a state where Vsch does not change for a predetermined time, and lowers the output Veq from the H level to the L level. The output Veq is input to the timing generator 130 as a stop signal (stop), and is used to detect the timing at which the operation of the temperature compensation unit 28 is stopped.

The counter 84 and the data latch circuit 86 have the same configuration as that shown in FIG. 8. When the initialization pulse 102 is input from the timing generator 130, the counter 84 sets the count value to the initial value (2 ^M −1). To do.

  The timing generator 130 sets the enable signal (enable) to the H level in synchronization with the rising edge of the trigger pulse 100, whereby the temperature sensor circuit 30 starts operating. The timing generator 130 generates an initialization pulse 102 in synchronization with the input of the trigger pulse 100 and outputs it to the counter 84.

At the start of the search for the capacitance control value Dcnt, the count value of the counter 84 is set to (2 ^M −1) as described above, basically Vα> Vβ, and the capacitor C _CH1 is the output current of the V / I conversion circuit 120. It is charged with Icmp. Capacitor C _CH1 , switch SW _CH1 and hysteresis comparator 122 constitute an oscillation circuit, and periodically generate a pulse at the output of hysteresis comparator 122.

The counter 84 counts down the output pulse of the hysteresis comparator 122. Accordingly, the trial value Nt is decreased by 1 from (2 ^M −1), and the trial current It supplied from the current DAC 52 to Q4 is decreased by ΔI. At the same time, V _BE of Q4 decreases sequentially, and Vα decreases sequentially. As the countdown proceeds, Vα approaches Vβ, and Icmp decreases. As Icmp decreases, a longer period of the output pulses of the hysteresis comparator 122 becomes longer the time required to charge the capacitor C _CH1, ideally Finally the Vα and Vβ are balanced oscillation stops. The trial value Nt in this state corresponds to the capacity control value Dcnt.

  In practice, Vα can only be changed discretely, so oscillation generally does not stop completely, and even when Vα equal to Vβ can be set, it takes a long time to completely stop oscillation. obtain. Therefore, the equilibrium detection circuit 128 is set with a predetermined time constant τ, and determines that the potential is balanced when the period after the most recent output pulse of the hysteresis comparator 122 falls reaches τ. For example, τ can be set based on the time constant of charging at Icmp with respect to the allowable value of (Vα−Vβ). Since the adjustment accuracy of Vα depends on ΔI of the current DAC 52, τ can also be set according to ΔI.

For example, the balance detection circuit 128 includes a current source Ich, a capacitor C _CH2 , a switch SW _CH2 and an inverter 132. The capacitor C _CH2 is charged by the current source Ich, and when the switch SW _CH2 is turned on by the output pulse of the hysteresis comparator 122, the capacitor C _CH2 is discharged. The charging time constant can be set by adjusting the size of C _CH2 and Ich, and the time from the discharge until the voltage of the capacitor C _CH2 reaches the H level is set to τ. Accordingly, the voltage of the capacitor C _CH2 when period τ has elapsed from the output pulse falls in the hysteresis comparator 122 exceeds the H level, the output Veq inverter 132 changes from H level to L level.

  The balance detection circuit 128 and the timing generator 130 determine the arrival of the potential equilibrium state based on the period of change in the output of the hysteresis comparator 122, and determine the trial value Nt corresponding to the arrival as the capacity control value Dcnt. Corresponds to a circuit.

  As described above, the vibrator unit 20 itself does not generate an oscillation signal used in an external circuit, and the oscillator unit 20 such as TCXO always performs its own oscillation operation and supplies the oscillation signal to the external circuit. Is different. In this respect, the vibrator unit 20 basically does not consume power as compared with the oscillator. Further, the oscillation circuit 22 configured by connecting the vibrator unit 20 to the integrated circuit 24 designed to connect the resonator is a redundant circuit unlike the case where an oscillator such as TCXO is connected to the integrated circuit 24. A portion does not occur, and power is not consumed wastefully in that portion.

  Unlike the simple crystal unit, the vibrator unit 20 has a temperature compensation function for frequency characteristics. In this respect, the temperature compensator 28 consumes electric power, but the temperature compensator 28 does not need to be operated at all times, and can be operated intermittently for a short period of time with a relatively long period to reduce power consumption. In addition, the control amount generated by the temperature compensation unit 28 is digital data, and the switch is controlled by the data and the capacitance of the capacitor for adjusting the oscillation frequency is discretely switched, so that the temperature compensated state can be reduced with less power consumption. Can be maintained.

  In the above-described embodiment, the analog operation is performed using a pseudo translinear loop. However, the analog operation may be performed using a circuit having a principle and form other than the translinear loop. For example, multiplication and division can be performed by a Gilbert multiplier.

  The form of the integral configuration of the vibrator unit 20 is not limited to a package, and may be formed integrally on a substrate, for example.

1 and 2 of the above-described embodiment, a configuration in which the variable capacitor _CV is connected to the output side (terminal N2 side) of the vibrator unit 20 is shown, but _CV is the input side of the vibrator unit 20 ( It may be provided on the terminal N1 side) or on both.

As described above, the vibrator unit according to the present invention is particularly preferably configured to include the analog calculation unit 50, the current DAC 52, and the potential comparison circuit 54 and control the variable capacitor _CV with a digital value. However, one of the main features of the present invention is a vibrator unit including an external connection terminal for connecting both terminals of the crystal vibrator to an external circuit, which is integrally configured including the crystal vibrator. A variable capacitor connected to the crystal unit; and a temperature compensation unit that controls a capacitance of the variable capacitor. The temperature compensation unit includes a temperature sensor that detects a temperature in the vicinity of the crystal unit. The present invention resides in that the capacitance of the variable capacitor is adjusted based on the detection output of the temperature sensor in response to the input of a trigger signal from the outside of the child unit, and the present invention is not limited to the configuration of the above embodiment.

[Second Embodiment]
FIG. 12 is a schematic diagram illustrating a schematic configuration of a wireless reception circuit using the vibrator unit according to the second embodiment as a crystal filter. For example, the receiving circuit is mounted on a radio timepiece and used to receive a standard radio wave. A crystal filter 200 as a vibrator unit is externally attached to a radio signal receiving IC 202. The crystal filter 200 receives a reception signal processed by a pre-stage circuit such as a tuner 210 and a low noise amplifier (LNA) 212 of the reception IC 202 from an external connection terminal Nin. The crystal filter 200 has a crystal resonator Xtal connected between the external connection terminals Nin and Nout1. In the configuration shown in FIG. 12, one end of the crystal oscillator Xtal is connected to a terminal Nout1, the other end is connected to the terminal Nin through the variable capacitor C _V1. In other words, the variable capacitor C _V1 and crystal oscillator Xtal are connected in series between the external connection terminals Nin and Nout1. The crystal filter 200 are serially connected variable capacitance capacitor C _V2 and capacitor Crep between the external connection terminals Nin and Nout2. Further, the crystal filter 200 has a temperature compensation unit 214 and a trigger signal input terminal Ntg for starting its operation. In addition, the vibrator unit 200 as a power source used for the operation of the temperature compensation unit 214 includes a terminal to which a positive voltage power source Vdd is supplied and a terminal connected to the ground GND.

The path made up of the variable capacitor C _V1 and the crystal unit Xtal extracts a narrowband frequency component corresponding to the frequency (target frequency) of the reception target station or the like according to the resonance characteristics of the crystal unit Xtal from the input signal. The extracted signal is output from the terminal Nout1. The capacitor Crep is a replica capacitor of the crystal unit Xtal and is set to an equivalent capacitance of Xtal. The variable capacitor C _V2 and a signal output from the terminal Nout2 via capacitor Crep, noise signals in phase output from the terminal Nout1 appears. Signals output from each of Nout1 and Nout2 are input to a differential amplifier circuit 216, which is a subsequent circuit provided in the receiving IC 202. The differential amplifier circuit 216 removes common mode noise appearing in the two signals input from the crystal filter 200 and outputs the signal to subsequent circuits.

In this crystal filter 200, the variable capacitors C _V1 and C _V2 are configured in the same manner as the variable capacitor C _V of the first embodiment, and the capacitance is discretely determined based on the digital data output from the temperature compensation unit 214. Can be changed.

The basic configuration of the temperature compensation unit 214 is the same as that of the temperature compensation unit 28. The calculation content performed by the analog calculation unit of the temperature compensation unit 214 may be different from that of the analog calculation unit 50 of the above embodiment. When a trigger pulse is input to the terminal Ntg, the temperature compensation unit 214 obtains a capacitance control value Dcnt based on analog calculation so that the frequency characteristic of the crystal unit Xtal is constant in the operating temperature range, and the variable capacitance capacitor C _V1, controls the _{C V2} in common Dcnt.

  Thereby, the temperature change of the center frequency of the crystal filter 200 can be compensated. For example, a quartz filter used for receiving a standard radio wave of a radio clock has a steep characteristic, so that the sensitivity is greatly deteriorated when the center frequency is slightly shifted, but the quartz filter 200 of the present embodiment is used. Therefore, it is possible to avoid the influence of temperature change and maintain good sensitivity.

  The crystal filter 200 has a feature of reducing power consumption similar to that of the vibrator unit 20 of the first embodiment, such as operating only when the temperature compensation unit 214 receives a trigger pulse.

  20 vibrator unit, 22 oscillation circuit, 24 integrated circuit, 26 inverter, 28, 214 temperature compensation unit, 30 temperature sensor circuit, 32 operation circuit, 40, 42 operational amplifier, 50 analog operation unit, 52 current DAC, 54 potential comparison Circuit, 56 control circuit, 60 p-type substrate, 62 n-well, 64 p-type region, 80 comparator, 82 clock pulse generation circuit, 84 counter, 86 data latch circuit, 88, 130 timing generator, 120 V / I conversion circuit , 122 hysteresis comparator, 128 balance detection circuit, 132 inverter, 200 crystal filter, 202 receiving IC, 210 tuner, 212 LNA, 216 differential amplifier circuit.

Claims (9)

A vibrator unit that includes a crystal unit and is configured integrally, and includes an external connection terminal for connecting the crystal unit to an external circuit,
A variable capacitor connected to the crystal unit;
A temperature compensator for controlling the capacitance of the variable capacitor;
Have
The temperature compensation unit is
A temperature sensor for detecting the temperature in the vicinity of the crystal oscillator,
The operating independently of the crystal oscillator, the temperature sensor each time the input of the trigger signal from the outside of the transducer unit, as a calculation operation for obtaining the pre-Symbol capacity control value for adjusting the capacitance of the variable capacitor An analog calculation is performed on the detection output that is an analog signal of the signal, and the capacitance control value that is a digital value representing the calculation result is generated. An arithmetic circuit that holds the operation and stops the arithmetic operation,
The variable capacitor is configured to discretely change the capacitance according to a capacitance control value of the digital value output from the temperature compensation unit;
A vibrator unit characterized by The vibrator unit according to claim 1 ,
The temperature compensation unit has a clock pulse generation circuit that generates a clock pulse used for driving the arithmetic circuit at a frequency higher than that of the crystal unit in response to an input of the trigger signal. . The vibrator unit according to claim 1 ,
The arithmetic circuit is:
A loop that traces the base and emitter of an even number of transistors that are input transistors or output transistors, and the two directions on the loop of the diode formed by the base-emitter junction are defined as the forward direction and the reverse direction. An arithmetic circuit that performs the analog calculation represented by a translinear loop in which the number of diodes and the number of diodes in the reverse direction are the same number on the loop, and generates the capacitance control value,
In the circuit having the translinear loop, the connection of the translinear loop is divided between the emitter of the transistor whose forward direction is the diode and the emitter of the transistor whose reverse direction is the reverse direction, and A modified loop circuit that has been modified to connect the potential comparison circuit;
An input current supply means connected to the emitter of the input transistor and for supplying an input current to be an input for the analog operation to each of the input transistors;
A control circuit for generating a trial value for the calculation result;
Trial current generating means connected to the emitter of the output transistor and generating and supplying a trial current having a magnitude corresponding to the trial value;
Have
The potential comparison circuit compares the potentials on both sides of the divided portion and generates a comparison output according to the result,
The control circuit searches for the trial value corresponding to the potential equilibrium state at the divided portion based on the comparison output and outputs the trial control value as the capacitance control value.
A vibrator unit characterized by The vibrator unit according to claim 3 ,
The potential comparison circuit includes, as the comparison output, a comparator that outputs one of two types of output states according to the magnitude relationship between the potentials on both sides of the divided portion,
The control circuit includes:
A counter that receives a clock pulse, sequentially increases or decreases the count value for each clock pulse, and outputs the count value as the trial value;
A determination circuit that detects a change in the output state of the comparison output and uses the trial value corresponding to the change as the capacity control value;
A vibrator unit characterized by comprising: The vibrator unit according to claim 3 ,
The potential comparison circuit includes, as the comparison output, a voltage-current conversion circuit that generates a current corresponding to a potential difference between both sides of the divided portion,
The control circuit includes:
A capacitor for charging the current of the comparison output;
A switch for selectively discharging the capacitor in an on state;
A hysteresis comparator that receives the voltage between the terminals of the capacitor and switches the on / off state of the switch according to the output to alternately repeat charging / discharging of the capacitor;
A counter that sequentially increases or decreases the count value for each output pulse of the hysteresis comparator and outputs the count value as the trial value;
A determination circuit that determines whether the potential equilibrium state has been reached based on a period of change in the output of the hysteresis comparator, and that uses the trial value corresponding to the arrival time as the capacity control value;
A vibrator unit characterized by comprising: A vibrator unit which is described in any one of claims 1 to 5 and is connected to an oscillation amplifier which is the external circuit as a resonator to constitute an oscillation circuit,
The variable capacitor is a part of the load capacity of the oscillation circuit,
The temperature compensation unit adjusts the capacitance of the variable capacitor to compensate for temperature fluctuations in the oscillation frequency of the oscillation circuit;
A vibrator unit characterized by The frequency component according to any one of claims 1 to 5 , wherein a frequency component corresponding to a resonance characteristic is extracted from a reception signal input to an input terminal of the external connection terminals, and an output of the external connection terminal A vibrator unit that functions as a filter circuit that outputs from a terminal,
The variable capacitor is connected in series with the crystal resonator between the input terminal and the output terminal,
The temperature compensation unit adjusts the capacitance of the variable capacitor to compensate for a temperature variation of a resonance frequency of the filter circuit;
A vibrator unit characterized by In an oscillation circuit having an oscillation amplifier and a resonator externally connected between the input and output terminals of the oscillation amplifier,
The oscillation circuit according to claim 6 , wherein the resonator is the vibrator unit according to claim 6 . A front-stage circuit that receives a radio signal and outputs a received signal; a rear-stage circuit that receives a signal of a target frequency extracted from the received signal; and the target frequency that is externally connected between the two circuits according to resonance characteristics A receiving circuit having a filter circuit for extracting a signal of
The receiving circuit according to claim 7 , wherein the filter circuit is the vibrator unit according to claim 7 .

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