JP5814056B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device that converts a DC voltage into a DC voltage obtained by stepping up or down a DC voltage, and in particular, can detect an abnormality of the device by detecting the voltage of an intermediate capacitor that performs a charge / discharge operation by switching of a DC / DC power conversion unit. The present invention relates to a DC / DC power conversion apparatus.

  A conventional DC / DC power conversion apparatus performs a voltage conversion from direct current to direct current by controlling the amount of energy stored in and discharged from the reactor by using an on / off operation of a switch element. In addition, since this reactor has a problem that it is large and heavy, the voltage applied to the reactor is reduced by using charging and discharging of the capacitor, and the inductance value required for the reactor is reduced, thereby reducing the size of the reactor. A technique for reducing the weight is known (see Patent Document 1).

In addition, power conversion devices are used in various devices such as power generation devices using solar cells, wind power generation devices, fuel cell systems, and hybrid vehicles.
For example, in a power conditioner device that converts DC power from a distributed power source such as a solar power generator or a gas engine generator into AC power of a commercial system, a booster circuit that boosts DC power from the distributed power source; An electrolytic capacitor that smoothes the DC power boosted by the boost circuit and an inverter circuit that converts the DC power smoothed by the electrolytic capacitor into AC power of a commercial system are provided.
The electrolytic capacitor deteriorates depending on the frequency of use and the usage environment, causing capacity loss and leading to a major failure of the power conditioner device. Therefore, it is necessary to recognize in advance whether this electrolytic capacitor has deteriorated (capacity loss). Is known (see Patent Document 2).

  In Patent Document 2, the booster circuit starts the boosting operation and sequentially charges DC power to the electrolytic capacitor. When the boosting completion level is reached, the boosting operation is stopped. Next, discharge the voltage charged in the electrolytic capacitor, measure the discharge time from the start of discharge until it falls below the reference voltage value, and when it is determined that the discharge time is below the normal reference discharge time, It is determined that the capacity of the electrolytic capacitor has deteriorated.

  Also, in a power conversion device such as a DC / DC converter device that boosts a DC voltage input from a DC power source such as a solar cell and controls it to a constant voltage and outputs it to a load, power conversion detected by an input voltage sensor Based on the difference between the input voltage of the circuit and the output voltage of the power conversion circuit detected by the output voltage sensor, it is determined whether an abnormality has occurred in the circuit including the input voltage sensor, the output voltage sensor, and the power conversion circuit. It is also known to do (see Patent Document 3).

JP-A-61-92162 JP 2008-43061A JP 2011-24294 A

Conventional Patent Document 2 can detect the capacity deterioration of the electrolytic capacitor itself,
There has been a problem that it is not possible to detect a failure such that the voltage value of the electrolytic capacitor cannot be normally detected due to abnormality of the voltage sensor.
Patent Document 3 detects an abnormality based on the difference between the input voltage detected by the input voltage sensor and the output voltage detected by the output voltage sensor. The input voltage sensor, the output voltage sensor, and the power conversion It was difficult to identify the location where the abnormality occurred in the circuit, and the control circuit for detecting the abnormality was complicated.

  The present invention has been made to solve the above-described problems, and detects that the voltage value of the intermediate capacitor of the power conversion unit has fallen into a state where it cannot be normally detected due to an abnormality of the voltage sensor or the like. It is in obtaining the power converter device.

The power conversion device of the present invention includes a DC / DC power conversion unit that boosts a DC voltage from an input power source, controls the DC voltage to a predetermined DC voltage, and outputs the voltage to a load. There line discharge operation, in order to shift to the output capacitor energy stored DC voltage to the input capacitor, the power converter in which the voltage of the intermediate capacitor as detected by a voltage sensor that temporarily store energy, intermediate A setting unit having a voltage setting means for setting a detection start voltage value for detecting an undervoltage of the voltage stored in the capacitor and a time setting means for setting a predetermined determination time, and operation of the DC / DC power conversion unit It has a timer that measures time from the time when charging of the intermediate capacitor becomes possible after the start, and the time measured by this timer is set by the time setting means When the voltage stored in the intermediate capacitor does not rise above the detection start voltage value set by the voltage setting means even after the elapse of a predetermined determination time, an abnormality detection unit that detects as an undervoltage of the intermediate capacitor is provided. The control of the DC / DC power conversion unit is stopped when the abnormality detection unit detects an undervoltage of the intermediate capacitor.

According to the present invention, in a power conversion device such as a photovoltaic power conditioner, when the voltage value of the intermediate capacitor cannot be normally detected due to an abnormality of the voltage sensor or the like, abnormal control leading to heat generation or overvoltage of the capacitor A state can be prevented.
In addition, by detecting an abnormality at the time of initial operation at the start of operation, there is an effect of suppressing the influence range of component failure and device damage.

1 is an overall configuration diagram of a power conversion device to which the present invention is applied. It is a block diagram of the control circuit of the power converter device in Embodiment 1 of this invention. It is a timing diagram explaining the operation of undervoltage detection at the time of operation of the power converter of the present invention. It is a timing diagram explaining the operation | movement of the undervoltage detection at the time of the driving | operation start of the power converter device of this invention. It is a program flowchart of the control circuit of the power converter device of this invention.

Embodiment 1 FIG.
Hereinafter, a power converter according to Embodiment 1 of the present invention will be described with reference to FIGS. In addition, although this embodiment demonstrates the DC / DC power converter device of the solar power generation power conditioner which has a multilevel chopper circuit as a power converter device, this invention is not limited to this.

FIG. 1 shows an overall configuration diagram of a power conversion device to which the present invention is applied. In FIG. 1, a power conversion device 10 converts an input power source 20 of a DC power source obtained by a solar power generator or the like, and converts DC into AC. Connected to a load 30 connected to a system such as a factory in combination with an inverter. The power conversion device 10 includes a DC / DC power conversion unit 11 and a control circuit 12 thereof. Between the DC / DC power conversion unit 11 and the control circuit 12, a capacitor (described later) in the DC / DC power conversion unit 11 is provided. Differential amplifier circuits 13a, 13b, and 13c for inputting signals from voltage sensors (not shown) that detect the stored voltage are connected.

  The DC / DC power converter 11 is turned ON / OFF by a smoothing input capacitor Cin for leveling the DC input voltage Vin from the input power supply 20, a reactor L for boosting operation, and a signal from the control circuit 12. The first and second switching elements S1 and S2, such as IGBTs (Insulated Gate Bipolar Transistors) connected in series with each other, and the first and second switching elements S1 and S2 are turned on and off. An intermediate capacitor Cf that performs a discharging operation, first and second diodes D1 and D2 connected in series to prevent backflow from the output, and a smoothing output capacitor Cout connected to the output side are provided.

  The input power source 20, the reactor L, and the first and second switching elements S1 and S2 are connected in series with each other. The first and second switching elements S1 and S2 and the first and second diodes D1 and D2 are connected in series with each other, and the whole is connected in parallel with the smoothing output capacitor Cout. The intermediate capacitor Cf is connected in parallel to the first diode D1 and the second switching element S2.

The operation of the DC / DC power conversion apparatus 10 having such a configuration will be described.
1) When converting to a DC output voltage Vout smaller than twice the input voltage Vin First, the first switching element S1 is turned on and the second switching element S2 is turned off. At this time, the input voltage Vin of the input power source 20 (the input capacitor Cin may be regarded as a DC power source in an operation within a predetermined time since the capacitance is large) is input capacitor Cin → reactor L → first diode D1. The current is passed through the path of the intermediate capacitor Cf → the first switching element S1 → the input capacitor Cin, and the DC voltage energy of the input capacitor Cin is transferred to the reactor L and the intermediate capacitor Cf.

Next, when both the first switching element S1 and the second switching element S2 are OFF, the energy accumulated in the reactor L is changed from the reactor L → the first diode D1 → the second diode D2 → the output capacitor Cout → The current is passed through the path of the input capacitor Cin → reactor L, and the output capacitor Cout is transferred.
Next, the first switching element S1 is turned off and the second switching element S2 is turned on. At this time, the energy accumulated in the intermediate capacitor Cf is energized through the path of the intermediate capacitor Cf → second diode D2 → output capacitor Cout → input capacitor Cin → reactor L → second switching element S2 → intermediate capacitor Cf, While shifting to the output capacitor Cout, energy is stored in the reactor L.

Next, when both the first switching element S1 and the second switching element S2 are OFF, the energy accumulated in the reactor L is changed from the reactor L → the first diode D1 → the second diode D2 → the output capacitor Cout → The current is passed through the path of the input capacitor Cin → reactor L, and the output capacitor Cout is transferred.
By repeating this series of operations, the input voltage Vin is boosted and adjusted in the range of Vin ≦ Vout <2 × Vin and output as the output voltage Vout.

2) When converting to a DC output voltage Vout larger than twice the input voltage Vin First, both the first switching element S1 and the second switching element S2 are turned ON. At this time, the input voltage Vin of the input power source 20 is energized through the path of the input capacitor Cin → reactor L → second switching element S2 → first switching element S1 → input capacitor Cin, and the energy of the DC voltage of the input capacitor Cin. Moves to reactor L.
Next, the first switching element S1 is turned on and the second switching element S2 is turned off. At this time, the energy accumulated in the reactor L is energized through the path of the reactor L → the first diode D1 → the intermediate capacitor Cf → the first switching element S1 → the input capacitor Cin → the reactor L, and shifts to the intermediate capacitor Cf. .

  Next, both the first switching element S1 and the second switching element S2 are turned on. At this time, the DC voltage Vin of the input capacitor Cin is energized through the path of input capacitor Cin → reactor L → second switching element S2 → first switching element S1 → input capacitor Cin, and the energy of the DC voltage of the input capacitor Cin. Moves to reactor L.

Next, the first switching element S1 is turned off and the second switching element S2 is turned on. At this time, the energy accumulated in the reactor L and the energy accumulated in the intermediate capacitor Cf are the reactor L → second switching element S2 → intermediate capacitor Cf → second diode D2 → output capacitor Cout → input capacitor Cin → reactor. Electricity is passed through the path L and the output capacitor Cout is transferred.
By repeating this series of operations, the input voltage Vin is boosted and adjusted in the range of Vout> 2 × Vin and output as the output voltage Vout.

  In the case of step-down as well as step-up, the first and second switching elements S1 and S2 can be obtained by ON / OFF control, and thus the power converter functions as a multi-level chopper circuit. Since there is no feature in the step-up or step-down operation of the converter, further explanation is omitted.

Next, the control circuit of the power converter according to the present invention will be described with reference to FIG.
In FIG. 2, the voltage sensor input unit 41 inputs a signal from a voltage sensor (not shown) that detects the voltage stored in the input capacitor Cin, the intermediate capacitor Cf, and the output capacitor Cout of the DC / DC power converter 11. . The control calculation unit 42 compares the input voltage Vin of the input capacitor Cin input from the voltage sensor input unit 41 and the output voltage Vout of the output capacitor Cout, and performs switching so that the output voltage Vout becomes a predetermined value based on the comparison result. The duty ratio of the ON / OFF times of the elements S1 and S2 is calculated. The gate pulse output unit 43 generates a signal pulse to be input to the gates of the switching elements S1 and S2 based on a signal from the control calculation unit 42.

Here, in the power conversion device shown in FIG. 1, since the stable output voltage Vout cannot be obtained unless the voltage Vcf stored in the intermediate capacitor Cf is maintained at a normal value, the overvoltage / undervoltage of the intermediate capacitor Cf is reduced. It needs to be detected.
Therefore, as means for detecting an undervoltage of the intermediate capacitor Cf, a setting unit 44 in the control circuit 12, a state signal output unit 45 that outputs a signal corresponding to the operating state of the power conversion unit 11, and an undervoltage are detected. And an abnormality detection unit 46. Moreover, when the abnormality detection unit 46 detects an undervoltage of the intermediate capacitor Cf, an operation stop control unit 47 that stops the control of the DC / DC power conversion unit 11 is provided.

  The setting unit 44 sets a detection start voltage value V1 to detect an insufficient voltage stored in the intermediate capacitor Cf, and the detection start voltage value V1 set by the voltage setting unit 441. A determination value setting unit 442 for setting a small undervoltage determination value V2 and a time setting unit 443 for setting a predetermined determination time T1 for monitoring time after the start of charging are provided.

  The state signal output unit 45 is “0” when the DC / DC power conversion unit 11 is stopped, and an operation state unit 451 that outputs a signal “1” when the DC / DC power conversion unit 11 is in an operation state, and a DC / DC power conversion unit 11 is a charge start unit 452 that outputs a “1” (or ON) signal when the intermediate capacitor Cf starts charging after operation, and outputs a “0” (or OFF) signal when charging is not started. have.

  The abnormality detection unit 46 includes a timer 461 that measures time from the time when the intermediate capacitor Cf can be charged after the operation of the DC / DC power conversion unit 11 is started, and the voltage stored in the intermediate capacitor Cf is an undervoltage determination value V2. The voltage stored in the intermediate capacitor Cf is set even if the counter 462 for measuring the time below and the time measured by the timer 461 exceed the predetermined determination time T1 set by the time setting means 443. When the voltage does not increase to the detection start voltage value V1 or more set by the means 441, the first determination unit 463 that determines that the intermediate capacitor Cf is insufficient voltage, and the voltage stored in the intermediate capacitor Cf is equal to or greater than the detection start voltage value V1. The count value by the counter 462 (the duration during which the voltage of the intermediate capacitor Cf has become the undervoltage determination value V2 or less) is predetermined. (For example, 3 counts = 3 ms) or more, the second determination unit 464 that determines that the voltage is insufficient for the intermediate capacitor Cf, and the voltage stored in the intermediate capacitor Cf is detected by the voltage setting unit 441. Generates a detection flag that outputs a flag that makes the undervoltage detection "invalid" when the voltage value is less than V1, and that makes the undervoltage detection "valid" when it rises above the detection start voltage value V1 set by the voltage setting means 441 Instrument 465.

  The counter 462 of the abnormality detection unit 46 may be replaced with a timer. In addition, the abnormality detection unit 46 in the control circuit 12 may be realized by dedicated hardware, but a memory, a CPU, and the like are provided in the control circuit 12 to realize each function by software. Also good.

Next, a method of detecting an undervoltage of the intermediate capacitor Cf by the control circuit of FIG. 2 will be described with reference to FIGS.
First, as shown in FIG. 3, after the operation of the power converter 10 is started, after the charging start condition is established (ON), the voltage Vcf of the intermediate capacitor Cf rises and exceeds the detection start voltage value V <b> 1 to detect an undervoltage detection flag. The case where becomes “valid” will be described.

The operation state unit 451 of the state signal output unit 45 outputs a signal “1” indicating that the power converter 10 is in an operation state as shown in FIG. An “ON” signal indicating the start of charging of Cf is output as shown in FIG.
The voltage Vcf charged in the intermediate capacitor Cf rises sequentially as shown in FIG. 3B, and the voltage Vcf is set to the detection start voltage value V1 shown in FIG. If exceeded, the detection flag generator 465 sets the undervoltage detection flag “valid” as shown in FIG.

From the time when the voltage Vcf of the intermediate capacitor Cf becomes equal to or lower than the undervoltage determination value V2 (V2 <V1) shown in FIG. When the counter 462 starts counting and the counter value by the counter 462 becomes a predetermined value (for example, 3 counts) or more, the second determination unit 464 determines that the intermediate capacitor Cf is undervoltage. And the 2nd determination part 464 sends an error signal to the operation stop control part 47, and stops control of the power converter device 10. FIG.
When the counter 462 is replaced with a timer, the second determination unit 464 determines that the time during which the voltage Vcf of the intermediate capacitor Cf is equal to or less than the undervoltage determination value V2 continues for a settling time (for example, 3 ms). The undervoltage of the intermediate capacitor Cf is determined and the control of the power converter 10 is stopped.

  In this method of detecting an undervoltage of the intermediate capacitor Cf, the operation of the power converter 10 is started, and after the charging of the intermediate capacitor Cf is once completed, the voltage drop is monitored. This is possible only when the voltage value of Cf is normally read. If the voltage value cannot be read, such as the disconnection of the input of the voltage sensor that detects the voltage value of the intermediate capacitor Cf, the charge state of the intermediate capacitor Cf cannot be monitored, and an abnormal control state such as overcharge or heat generation of the intermediate capacitor Cf occurs. There is a problem of falling.

Therefore, the present invention has a function of detecting an undervoltage even when the voltage value of the intermediate capacitor Cf cannot be read due to an input disconnection of the voltage sensor. Hereinafter, a method for detecting an undervoltage of the intermediate capacitor Cf will be described.
As shown in FIG. 4, after the operation of the power converter 10 is started, after charging becomes possible (ON), the voltage Vcf of the intermediate capacitor Cf does not rise to a predetermined value, and the flag of the undervoltage detection is still “invalid”. The case will be described.

The operation state unit 451 of the state signal output unit 45 outputs a signal “1” indicating that the power conversion device 10 is in an operation state as shown in FIG. An “ON” signal indicating the start of charging of Cf is output as shown in FIG. The timer 461 measures time from this point.
The voltage Vcf charged in the intermediate capacitor Cf slightly increases as shown in FIG. 4B, but even if the time measurement by the timer 461 exceeds the determination time T1 set by the time setting means 443, When the voltage Vcf of the intermediate capacitor Cf does not rise above the detection start voltage value V1 set in the voltage setting unit 441 shown in FIG. 4A, the first determination unit 463 determines that the voltage is insufficient for the intermediate capacitor Cf. . And the 1st determination part 463 sends an error signal to the operation stop control part 47, and stops control of the power converter device 10. FIG.

This operation will be described based on the program flowchart of the control circuit 12 shown in FIG.
First, in step S1, it is determined whether or not the power converter 10 is in operation. If the power conversion device 10 is operating in step S1 (YES), the process proceeds to step S2, and if the power conversion device 10 is not operating (NO), the process proceeds to step S3. In step S3, the detection of the undervoltage of the intermediate capacitor Cf is set to “invalid”.

  In step S2, it is determined whether or not the voltage Vcf of the intermediate capacitor Cf is equal to or higher than the detection start voltage value V1. In step S2, if the voltage Vcf of the intermediate capacitor Cf is equal to or higher than the detection start voltage value V1 (YES), the process proceeds to step S4. If the voltage Vcf of the intermediate capacitor Cf is less than the detection start voltage value V1 (NO), the process proceeds to step S5. move on. In step S4, the detection of the undervoltage of the intermediate capacitor Cf is set to “valid”, and the process proceeds to step S5.

In step S5, it is determined whether or not the detection of the undervoltage of the intermediate capacitor Cf is effective. In step S5, if the undervoltage detection is valid (YES), the process proceeds to step S6. If the undervoltage detection is invalid (NO), the process proceeds to step S12.
In step S6, it is determined whether or not the voltage Vcf of the intermediate capacitor Cf has become the undervoltage determination value V2 or less. In step S6, when the voltage Vcf of the intermediate capacitor Cf becomes the undervoltage determination value V2 or less (YES), the process proceeds to step S7, and when the voltage Vcf of the intermediate capacitor Cf is not the undervoltage determination value V2 or less (NO), the process proceeds to step S7. Proceed to S8.

In step S7, the counter 462 for detecting whether the time during which the undervoltage determination value V2 or less continues for the settling time or longer is updated (Cnt), and the counter 462 starts counting.
On the other hand, in step S8, the counter 462 for detecting whether the time during which the undervoltage determination value V2 or less continues for the settling time or longer is cleared (Cnt = 0), and the counter 462 does not count.

In step S9, it is determined whether the count by the counter 462 is greater than or equal to a predetermined value (3 as an example). In step S9, if the count by the counter 462 becomes equal to or greater than a predetermined value (YES), the process proceeds to step S10, and if the count by the counter 462 does not exceed the predetermined value, the process proceeds to step S11.
In step S10, it is detected that the voltage Vcf of the intermediate capacitor Cf has become an insufficient voltage, and the process proceeds to step S11. At the same time, the control of the power conversion device 10 is stopped and the end is reached. The operation of step S11 will be described later.

The above is the undervoltage detection method in the case where the undervoltage detection flag is “valid” (Vcf> V1) after the charging start condition is established (ON) after the operation of the power conversion device 10 is started as described with reference to FIG.
Next, the undervoltage detection method when the undervoltage detection flag is “invalid” (Vcf <V1) will be described with reference to the program flowchart of FIG.

Step S12 monitors the condition for starting charging the intermediate capacitor Cf when the detection of the undervoltage of the intermediate capacitor Cf is “invalid” in step S5. In step S12, when charging is started (YES), the process proceeds to step S13, and when charging is not started (NO), the process proceeds to step S14. In step S13, the timer 461 for monitoring the determination time T1 is updated (Timer), and the time by the timer 461 is measured.
On the other hand, in step S14, the timer 461 that monitors the determination time T1 is cleared (Timer = 0), and the time measurement by the timer 461 is not performed.

In step S15, it is determined whether or not the measurement time Timer by the timer 461 exceeds the determination time T1. In step S15, when the measurement time Timer by the timer 461 exceeds the determination time T1 (YES), the process proceeds to step S16, and when the measurement time Timer by the timer 461 does not exceed the determination time T1 (NO), the process proceeds to step S17. move on.
In step S16, since the measurement time Timer by the timer 461 exceeds the determination time T1, it is detected that the voltage Vcf of the intermediate capacitor Cf has become an insufficient voltage, and at the same time, the control of the power converter 10 is stopped. And end.

  In step S11, when the undervoltage detection flag is “valid” (Vcf> V1), the timer 461 for monitoring the determination time T1 is cleared (Timer = 0), while step S17 is performed. When the undervoltage detection flag is “invalid” (Vcf <V1), the count by the counter 462 is cleared (Cnt = 0).

In the above description, the abnormal state of the voltage sensor is detected by hardware. However, by detecting the abnormal state of the voltage sensor by software, it is compared with the countermeasures by H / W such as duplication of the voltage sensor. Thus, the cost is low and the main circuit structure can be simplified.
Further, in the present invention, the embodiments can be appropriately modified and omitted within the scope of the invention.

DESCRIPTION OF SYMBOLS 10: Power converter 11: DC / DC power converter 12: Control circuit 20: Input power supply 30: Load 41: Voltage sensor input part 42: Control calculating part 43: Gate pulse output part 44: Setting part 45: Status signal output Unit 46: Abnormality detection unit 47: Operation stop control unit 441: Voltage setting unit 442: Determination value setting unit 443: Time setting unit 451: Operation state unit 452: Charging start unit 461: Timer 462: Counter 463: First determination Unit 464: Second determination unit 465: Detection flag generator Cin, Cf, Cout: Capacitor L: Reactor D1, D2: Diode S1, S2: Switching element

Claims (3)

Boosts the DC voltage from the input power source has a DC / DC power converting unit to be output to the load is controlled to a predetermined DC voltage, have rows charge-discharge operation by the switching of the DC / DC power converting unit, an input In order to transfer the energy of the DC voltage stored in the capacitor to the output capacitor , in the power converter in which the voltage of the intermediate capacitor that has once stored energy is detected by a voltage sensor, the voltage stored in the intermediate capacitor A setting unit having a voltage setting unit for setting a detection start voltage value for detecting a shortage voltage and a time setting unit for setting a predetermined determination time, and the intermediate capacitor after the operation of the DC / DC power conversion unit is started Has a timer that measures time from the time when charging becomes possible, and the time measured by this timer is a predetermined time set by the time setting means. Provided with an abnormality detection unit that detects an insufficient voltage of the intermediate capacitor when the voltage stored in the intermediate capacitor does not rise above the detection start voltage value set by the voltage setting means even after a predetermined time has elapsed. The power conversion device is configured to stop the control of the DC / DC power conversion unit when the abnormality detection unit detects an undervoltage of the intermediate capacitor.   The setting unit is provided with determination value setting means for setting an undervoltage determination value that is smaller than the detection start voltage value set by the voltage setting means, and the abnormality detection unit is configured such that the voltage stored in the intermediate capacitor is Claims wherein the intermediate capacitor is detected as an undervoltage when a period of time that has been below the undervoltage determination value set by the determination value setting means continues for a predetermined time after rising above the detection start voltage value. The power converter according to 1.   When the voltage stored in the intermediate capacitor is less than the detection start voltage value set by the voltage setting means, the undervoltage detection is invalidated, and when the voltage rises above the detection start voltage value set by the voltage setting means 2. A detection flag generator for generating a detection flag for validating undervoltage detection is provided, and the timer measures time from the time when charging of the intermediate capacitor becomes possible while the detection flag is invalid. The power converter device described in 1.

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