JP5777147B2 - Temperature sensor - Google Patents

Description

  The present invention relates to a temperature sensor that measures the temperature of an object surface.

In a conventional planar temperature sensor, for example, as described in Patent Document 1, measurement cells are arranged in a matrix, and in each measurement cell, a thin film transistor and a resistor are connected in series.
Since the electrical resistance of the resistor has temperature dependence, the temperature was measured using this. Specifically, at the time of measurement, with the thin film transistor turned on, a current is passed through the resistor,
The change in the current value (electric resistance of the resistor) was measured to measure the temperature of each measurement cell.

JP 2006-170642 A

However, the conventional planar temperature sensor has a problem that the measurement itself causes a temperature fluctuation and the measurement result cannot be trusted. That is, the resistor for measuring the electrical resistance is directly connected to the thin film transistor, and the thin film transistor self-heating raises the temperature of the resistor so that the thin film transistor is turned on. It was a hindrance. In addition, since the temperature dependence of the electrical resistance is weak, the conventional planar temperature sensor has a problem that it is difficult to measure a slight temperature change. In this way, the conventional surface temperature sensor
There was a problem that the measurement results were not reliable and the measurement resolution was low. In other words, there is a problem that a high-performance and practical surface temperature sensor does not exist.

SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

Application Example 1 A temperature sensor according to this application example is a temperature sensor including a measurement cell that measures temperature, and the measurement cell includes a first measurement thin film transistor, a first capacitance element, and a second measurement use. A thin film transistor and a second capacitive element, wherein the first capacitive element is connected to the first measurement thin film transistor, the second capacitive element is connected to the second measurement thin film transistor, and the first measurement thin film transistor And the width of the second measurement thin film transistor are different, or the capacitance of the first capacitor element and the capacitor of the second capacitor element are different.
Since the thin film transistor can be formed in units of micrometers, according to this configuration, a temperature sensor having a very high spatial resolution of several micrometers can be realized. In addition, since the thin film transistor does not self-heat during the temperature measurement period, accurate temperature measurement can be realized. Further, the first measurement thin film transistor and the second measurement thin film transistor measure the temperature for different temperature ranges, or the first capacitance element and the second capacitance element differ in temperature range. Therefore, accurate temperature measurement can be realized over a wide temperature range. In other words, it is possible to realize a practical surface temperature sensor that is highly reliable, capable of precise measurement, and measures a wide temperature range.

Application Example 2 In the temperature sensor according to the above application example, the width of the first measurement thin film transistor is W ₀₁ , the capacity of the first capacitance element is C _1, and the width of the second measurement thin film transistor is W _02. When the capacitance of the second capacitor element is C ₂ , the value of C ₁ / W ₀₁ is preferably in the range of 8 to 50 times the value of C ₂ / W ₀₂ .
According to this configuration, the first measurement thin film transistor and the first capacitor element measure the temperature in a relatively high temperature range, and the second measurement thin film transistor and the second capacitor element have a relatively low temperature range. Since the temperature is measured for the target, accurate temperature measurement can be performed over a wide temperature range.

Application Example 3 In the temperature sensor according to the application example, the measurement cell further includes at least a third measurement thin film transistor and a third capacitance element, and the third capacitance element is connected to the third measurement thin film transistor. The width of the third measurement thin film transistor is preferably different from the width of the first measurement thin film transistor and the width of the second measurement thin film transistor.
According to this configuration, the first measurement thin film transistor, the second measurement thin film transistor, and the third measurement thin film transistor measure the temperature in different temperature ranges, respectively, and thus, over a very wide temperature range. Accurate temperature measurement can be realized.

Application Example 4 In the temperature sensor according to the application example, the measurement cell further includes at least a third measurement thin film transistor and a third capacitance element, and the third capacitance element is connected to the third measurement thin film transistor. The capacitance of the third capacitive element is preferably different from the capacitance of the first capacitive element and the capacitance of the second capacitive element.
According to this configuration, the first capacitive element, the second capacitive element, and the third capacitive element measure the temperature for different temperature ranges, so accurate temperature measurement is achieved over an extremely wide temperature range. it can.

Application Example 5 In the temperature sensor according to the application example described above, the width of the first measurement thin film transistor is W ₀₁ , the capacity of the first capacitance element is C _1, and the width of the second measurement thin film transistor is W _02. , The capacitance of the second capacitor element is C _2, and the width of the third measurement thin film transistor is W _0.
3 and the capacitance of the third capacitor element is C ₃ , the value of C ₁ / W ₀₁ is in the range of 8 to 50 times the value of C ₂ / W ₀₂ , and the value of C ₂ / W ₀₂ Is preferably in the range of 8 to 50 times the value of C ₃ / W ₀₃ .
According to this configuration, the first measurement thin film transistor and the first capacitor element measure the temperature in a relatively high temperature range, and the third measurement thin film transistor and the third capacitor element have a relatively low temperature range. Temperature measurement, and the second measurement thin film transistor and the second capacitance element measure the temperature in the middle of these ranges, so accurate temperature measurement over a significantly wide temperature range is required. Can do.

Application Example 6 In the temperature sensor according to the application example described above, the temperature sensor according to the application example further includes a first selection circuit that is arranged along the first direction and selects a measurement cell, and a plurality of measurement cells are arranged along the first direction. It is preferable to arrange.
According to this configuration, since a plurality of measurement cells are arranged in the first direction and are individually selected, the spatial distribution of the temperature in the first direction can be measured. Therefore, even if the temperature varies along the first direction, the temperature can be measured quantitatively and accurately as a function of location.

Application Example 7 In the temperature sensor according to the application example described above, the temperature sensor according to the application example further includes a second selection circuit that is arranged along a second direction intersecting the first direction and selects a measurement cell. It is preferable that a plurality are arranged along the direction.
According to this configuration, since a plurality of measurement cells are arranged in the second direction and are individually selected, the spatial distribution of the temperature in the second direction can be measured. Thus, even if the temperature varies along the second direction, the temperature can be measured quantitatively and accurately as a function of location.

(Application Example 8) The temperature sensor according to the application example further includes a first thin film transistor and a second thin film transistor, and the first thin film transistor and the second thin film transistor form a differential transistor pair, and the first thin film The gate of the transistor is preferably connected to one of the source and drain of the first measurement thin film transistor.
According to this configuration, a differential transistor pair is provided in each measurement cell, so that even if the surface temperature sensor has a large area or high definition, the temperature can be measured with high accuracy. Can do. Further, since the temperature measurement period and the measurement result output period can be separated, the thin film transistor does not self-heat at the time of measurement, and accurate temperature measurement is realized.

FIG. 3 is a perspective external view schematically showing the temperature sensor according to the first embodiment. FIG. 3 is a diagram for explaining the measurement principle of the temperature sensor according to the first embodiment. FIG. 3 illustrates a circuit of a temperature sensor according to the first embodiment. FIG. 6 is a diagram for explaining a timing chart when measuring a temperature with the temperature sensor according to the first embodiment. FIG. 3 is an equivalent circuit diagram when measuring the temperature with the temperature sensor according to the first embodiment. 2A and 2B are diagrams for explaining a planar layout of various circuits used in the temperature sensor according to the first embodiment. FIG. 3A is an output circuit, FIG. FIG. 6 illustrates a circuit of a temperature sensor according to the second embodiment. The figure explaining the circuit of the temperature sensor concerning the modification 1.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the scales are different for each layer and each member so that each layer and each member can be recognized in the drawing.

(Embodiment 1)
"Temperature sensor overview"
FIG. 1 is a perspective external view schematically showing a temperature sensor according to the present embodiment. Hereinafter, the outline of the temperature sensor will be described with reference to FIG.

The temperature sensor 1 according to this embodiment is formed on a flexible substrate 2 such as a soft plastic film. A plurality of measurement cells (i, j) are arranged in a matrix on the substrate 2 to form a measurement circuit 3. Each measurement cell includes a first measurement thin film transistor T01 (hereinafter simply referred to as T01), a first capacitance element Cp1 (hereinafter simply referred to as Cp1), and a second measurement thin film transistor T02 (hereinafter simply referred to as T02). Abbreviated) and the second capacitor element Cp2 (
(Hereinafter simply referred to as Cp2)) (see FIG. 3). Cp1 is connected to one of the source electrode or drain electrode of T01, and Cp2 is connected to one of the source electrode or drain electrode of T02. The source electrode and the drain electrode of the transistor are switched according to the potential. Hereinafter, for convenience of explanation, the electrode connected to Cp1 and Cp2 is used as the drain electrode of each transistor. The width of the channel formation region of T01 is W ₀₁ (hereinafter, this width is simply referred to as width W ₀₁ ), the capacitance of Cp1 is C ₁ (hereinafter, this capacitance is simply referred to as capacitance C ₁ ), and the channel formation of T02 is performed. When the width of the region is W ₀₂ (hereinafter this width is simply abbreviated as width W ₀₂ ) and the capacitance of Cp2 is C ₂ (hereinafter this capacitance is simply abbreviated as capacitance C ₂ ), the width W
The ratio of the capacity C _{1 to 01} (C ₁ / W ₀₁ ) is different from the ratio of the capacity C ₂ to width W ₀₂ (C ₂ / W ₀₂ ). Specifically, in order to realize this, the width W ₀₁ and the width W ₀₂ may be different, the capacitance C ₁ and the capacitance C ₂ may be different, or the width (width W ₀₁ and width W W ₀₂ ) and capacity (capacitance C ₁ and capacity C ₂ ) may be different at the same time. Here, the width W ₀₁ and the width W ₀₂ are different, and the capacitance C ₁ and the capacitance C ₂ are different.

The temperature is measured using a phenomenon in which the charge initially charged in the capacitor (capacitor C ₁ or capacitor C ₂ ) increases or decreases due to the off-state current of the measurement thin film transistor (T01 or T02). The temperature is mainly measured by using the phenomenon that the charge charged in the capacitor decreases due to the off-current. On the other hand, the temperature is measured by using the phenomenon that the empty capacitor is charged by the off-current. May be.

Returning to FIG. 1, the description will be continued.
In addition to the measurement circuit 3, the substrate 2 includes an output circuit 4, a first selection circuit 51, and a first processing circuit 5.
2, a second selection circuit 61, and a second processing circuit 62 are provided. The plurality of measurement cells arranged in the measurement circuit 3 are sequentially selected by the first selection circuit 51 and the second selection circuit 61 arranged on the outer periphery of the measurement circuit 3. One side of the substrate 2 in a first direction (in a direction parallel to the x-axis,
Another direction intersecting (substantially orthogonal to) the first direction is the second direction (y)
The first selection circuit 51 and the first processing circuit 52 are formed along the first direction outside the measurement circuit 3, and the second selection circuit 61. And second processing circuit 6
2 is formed along the second direction outside the measurement circuit 3. A plurality of measurement cells are formed along the first direction, and are selected in the first direction by the first selection circuit 51. Similarly, a plurality of measurement cells are formed along the second direction and selected by the second selection circuit 61 in the second direction. The selected measurement cell is connected to the output circuit 4 and temperature measurement is performed. In this way, the temperature is sequentially measured in the measurement cells arranged in a matrix, and a surface distribution related to the temperature is obtained.

"Measurement Principle"
FIG. 2 is a diagram for explaining the measurement principle of the temperature sensor according to this embodiment. Hereinafter, FIG.
The principle of measuring the temperature will be described with reference to FIG.

FIG. 2 shows how the transfer characteristics of an N-type thin film transistor have temperature dependence.
The transfer characteristic of a transistor generally has an on region (in the case of FIG.
. 5V or more) and an off region (in the case of FIG. 2, the gate voltage is about 0V or less) and a sub-threshold region (
In the case of FIG. 2, the gate voltage is classified into a range between about 0V and about 1.5V. Each region has a temperature dependency, but the temperature dependency in the off region is the strongest. This is because the off-current value changes most sensitively to the spread of the Fermi function. The off current is
This is due to heat generation of electron-hole pairs, phonon assisted tunneling with pool Frenkel effect, and interband tunneling. The Fermi function changes exponentially even with a slight change in temperature, and strongly influences these mechanisms (particularly, heat generation of electron-hole pairs and phonon assisted tunneling accompanied by the Pool Frenkel effect). Therefore, the temperature dependence of the off-current value becomes extremely strong. In fact, it can be seen from FIG. 2 that the off current at 200 ° C. is several thousand times the off current at 50 ° C. On the other hand, the on-current increases only several times at the same temperature change. That is, the off current is 1000 times more sensitive to temperature than the on current. Roughly speaking, every time the temperature rises by 50 ° C., the off-state current increases 10 times. In other words, even if the temperature rises only 5 ° C., the off current increases by 26%. In short, even with only a slight temperature change, the off-current value shows a large change that can be measured, so that highly accurate temperature measurement can be realized. As described above, the off-state current of the measurement thin film transistor changes drastically according to the temperature, so that the amount of charge accumulated in the capacitors (capacitance C ₁ and capacitance C ₂ ) also changes according to the temperature. The temperature is measured by measuring this change in charge amount (or change in capacitance potential).

"circuit"
FIG. 3 is a diagram for explaining a circuit of the temperature sensor according to the present embodiment. Hereinafter, the circuit of the temperature sensor will be described with reference to FIG. As for the source and drain of the N-type thin film transistor, the higher the potential, the higher the potential becomes the drain, and the lower the potential becomes the source. For reference, FIG. 3 shows the source and drain of each thin film transistor as s and d, respectively.

First, a description will be given with reference to FIG.
The temperature sensor 1 includes a measurement circuit 3, an output circuit 4, a first selection circuit 51, a first processing circuit 52, a second selection circuit 61, and a second processing circuit 62. In the measurement circuit 3, the measurement cell (i, j) has M
They are arranged in a matrix of rows and N columns. M and N are integers of 1 or more (1 ≦ i ≦ M, 1 ≦ j ≦
N). The first selection circuit 51 selects one specific row line from the M row lines R (i) in the first direction. Therefore, the first selection circuit 51 is also a row selection circuit. For the first selection circuit 51, a shift register or a decoder is used. The first processing circuit 52 processes the selection signal from the first selection circuit 51 so as to be suitable for measurement. Specifically, a level shifter for converting the selection potential and a buffer for selecting a row line stably at high speed are provided. The second selection circuit 61 selects one specific column line from the N column lines CL (j) in the second direction. Therefore, the second selection circuit 61 is also a column selection circuit. For the second selection circuit 61, a shift register or a decoder is used. The second processing circuit 62 processes the selection signal from the second selection circuit 61 so as to be suitable for measurement. Specifically, a level shifter for converting the selection potential and a buffer for selecting the column line stably at high speed are provided.

Returning to FIG. 3, the description will be continued.
The second processing circuit 62 includes column selection transistors T3C and T4C in addition to the circuit described above. Column selection transistors T3C and T4C are provided in pairs for each column. The output circuit 4 outputs measurement results as LDOUT and XLDOUT. Among these circuits, the measurement circuit 3, the output circuit 4, and the column selection transistors T3C and T4C in the second processing circuit 62 are formed of thin film transistors. In the present embodiment, in addition to these, the first selection circuit 51, the first processing circuit 52, and the second selection circuit 61 are also formed by thin film transistors (N-type and P-type) having a CMOS configuration. Circuits other than the column selection transistors T3C and T4C in the circuit 51, the first processing circuit 52, the second selection circuit 61, and the second processing circuit 62 may be formed by an external silicon IC chip.

The measurement cell (i, j) is located in i row and j column, and T01, Cp1, T02,
Cp2. Cp1 and Cp2 sandwich the dielectric film between the first electrode and the second electrode. The drain electrode of T01 is connected to the first electrode of Cp1, and the source electrode is the charging column line CC.
The gate electrode is connected to the charging row line RC. The second electrode of Cp1 is the second power source (
In this case, it is connected to a negative power supply V _ss ). Similarly, the drain electrode of T02 is connected to the first electrode of Cp2, the source electrode is connected to the charging column line CC, and the gate electrode is connected to the charging row line RC. The second electrode of Cp2 is connected to the second power source. T01 and T02 have different channel formation region widths. The width W ₀₁ is 1 μm and the width W ₀₂ is 10 μm. Cp
1 and Cp2 have different capacities. In Cp1, the size of the first electrode and the second electrode is 200
Since it is μm × 200 μm and the thickness of the dielectric film (SiO ₂ as a preferred example) is 69 nm,
Capacitance C ₁ is 20 pF. On the other hand, in Cp2, the size of the first electrode and the second electrode is 200 μm.
Since × 100 μm and the thickness of the dielectric film is also 69 nm, the capacitance C ₂ is 10 pF. As a result, the value of C ₁ / W ₀₁ is 20 pF / [mu] m becomes, the value of C ₂ / W ₀₂ becomes 1 pF / [mu] m, the value of C ₁ / W ₀₁ is a 20 times the value of C ₂ / W ₀₂ It has become.

The temperature is the drain potential (ie, Cp) of the measurement thin film transistor T01 or T02.
It is measured by outputting information on the first electrode potential of the capacitive element such as 1 or Cp2. Hereinafter, when it is not necessary to distinguish between T01 and T02, the measurement thin film transistor is abbreviated as T0. Similarly, when it is not necessary to distinguish between Cp1 and Cp2, it is abbreviated as Cp as a generic term for a capacitive element. In order to accurately measure the temperature, the measurement thin film transistor T0 includes a part of a differential amplifier circuit. A part of the differential amplifier circuit is a differential transistor pair and a row selection transistor pair. The differential transistor pair includes a first thin film transistor T1 and a second thin film transistor T2. The row selection transistor pair is the row selection transistor T3.
R and T4R.

The gate of the first thin film transistor T1 is connected to the drain of the measurement thin film transistor T0. Therefore, the gate potential of the first thin film transistor T1 changes according to the temperature. On the other hand, the reference signal V _ref is supplied to the gate of the second thin film transistor T2, and the second thin film transistor T2 operates as a reference transistor. Thus, the electrical characteristics of the first thin film transistor T1 and the electrical characteristics of the second thin film transistor T2 are compared, and the temperature in the measurement cell is measured. In other words, the difference between the gate potential of the first thin film transistor T1 and the gate potential of the second thin film transistor is differentially amplified, and the temperature in the measurement cell is output as a voltage value or a current value.

Since the first thin film transistor T1 and the second thin film transistor T2 form a differential transistor pair, they are arranged symmetrically with each other. That is, the drains of both transistors are connected to the first power source, and both transistors are arranged in parallel to the power source. The first power supply is a positive power supply _Vdd . In order to reduce the measurement error, the gate capacitance of the first thin film transistor T1 is significantly smaller than the capacitance of the capacitive element Cp. The remarkably small is specifically 1/10 or less. Actually, the gate capacitance of the first thin film transistor T1 is
About 0.005 pF (for example, gate area 10 μm ² , gate insulating film SiO ₂ , gate insulating film thickness 69 nm) to 0.05 pF (for example, gate area 100 μm ² , gate insulating film Si
O ₂ and gate insulating film thickness 69 nm), but since the capacitance of the capacitive element Cp is 1 pF or more, the gate capacitance of the first thin film transistor T1 is 1/20 of the capacitance of the capacitive element Cp.
It is as follows.

The drain of the row selection transistor T3R is connected to the source of the first thin film transistor T1, and the source is connected to the jth column selection transistor T3C via the jth odd column line CO (j).
Connected to the drain. Similarly, the drain of the row selection transistor T4R is connected to the source of the second thin film transistor T2, and the source is j through the even column line CE (j) of the j column.
This is connected to the drain of the column selection transistor T4C in the column. The gates of the row selection transistors T3R and T4R attached to T01 are connected to the row line R (2i-1) of the 2i-1th row. The gates of the row selection transistors T3R and T4R attached to T02 are connected to the 2i-th row line R (2i). Thus, the column selection transistor T3C and the row selection transistor T3R form a third thin film transistor T3, and the column selection transistor T4C and the row selection transistor T4R form a fourth thin film transistor T4.

The temperature sensor 1 further includes a fifth thin film transistor T5 and a sixth thin film transistor T6 in the output circuit 4, and the fifth thin film transistor T5 and the sixth thin film transistor T6 form a current mirror pair. In the current mirror pair, the sources of both transistors are connected in common, and the same potential is applied to the gate, so that during saturation operation (V _ds > V _gs −V _th > 0),
Even if the drain potentials of both transistors are slightly different, they are transistor pairs that pass the same current. Here, the gates of both thin film transistors are connected to the drain of the fifth thin film transistor. Further, the drain of the fifth thin film transistor T5 is connected to the source of the column selection transistor T3C, and the drain of the sixth thin film transistor T6 is connected to the source of the column selection transistor T4C.

The temperature sensor 1 further includes a seventh thin film transistor T7 in the output circuit 4. The seventh thin film transistor T7 is a current source transistor. A current source transistor is a transistor that performs a saturation operation and always supplies a constant current even if the drain potential slightly varies. The source of the fifth thin film transistor T5 and the source of the sixth thin film transistor T6 are connected to the drain of the seventh thin film transistor T7, and the source of the seventh thin film transistor T7 is connected to the second power source. The second power source is a negative power source V _ss . The first control signal Cnt1 is supplied to the gate of the seventh thin film transistor T7. Since the fifth thin film transistor T5 and the sixth thin film transistor T6 always pass the same current and the seventh thin film transistor T7 supplies a constant current, the fifth thin film transistor T5 and the sixth thin film transistor T6 always have the same current (the seventh Half of the current through the thin film transistor T7).

The third thin film transistor T3 is always disposed between the first thin film transistor T1 and the fifth thin film transistor T5 while changing the column selection transistor and the row selection transistor every time column selection or row selection is performed. The thin film transistor T1 and the fifth thin film transistor T5 can be electrically connected. Similarly, the fourth thin film transistor T4 is always disposed between the second thin film transistor T2 and the sixth thin film transistor T6 while changing the column selection transistor and the row selection transistor every time the column selection or the row selection is performed. ,
The second thin film transistor T2 and the sixth thin film transistor T6 can be electrically connected. That is, when a selection signal (high potential signal) is supplied to the row line R (2i-1) of the 2i-1 row, the first thin film transistor T1 arranged in the measurement cell of the 2i-1 row is an odd column. The second thin film transistor T2 is electrically connected to the even column line CE.
On the other hand, when a non-selection signal (low potential signal) is input to the row line R (2i-1), the first thin film transistor T1 and the odd column line CO are electrically insulated, and the second thin film transistor T2 and the even column line. C
It is electrically insulated from E.

When a selection signal (high potential signal) is input to the column line CL (j) of the jth column while the selection signal is supplied to the row line R (2i-1), the column selection transistor T3C of the jth column is turned on. Since the ON state is established, the odd-numbered column line CO in the j-th column and the fifth thin film transistor T5 are connected. as a result,
The first thin film transistor T1 and the fifth thin film transistor T5 which are located in the measurement cell (i, j) in i row and j column and attached to T01 are electrically connected. Similarly, the column line CL (j) of the jth column
When the selection signal (high potential signal) is input to the j-th column, the column selection transistor T4C in the j-th column is turned on, so that the even-numbered column line CE in the j-th column and the sixth thin film transistor T6 are connected. As a result, the second thin film transistor T located in the measurement cell (i, j) in i row and j column and attached to T01
2 and the sixth thin film transistor T6 are electrically connected. Conversely, the column line CL (
When a non-selection signal (low potential signal) is input to j), column selection transistors T3C and T4 in the jth column
Since C is turned off, the output circuit 4, the j-th odd column line CO, and the j-th even column line C
It is electrically insulated from E. In this manner, the differential transistor pair in the measurement cell selected by the row line and the column line among the plurality of measurement cells is connected to the output circuit 4. Measurement result from the output circuit 4, the drain potential V ₆ of the sixth thin film transistor T6 is output as LDOUT, drain potential V ₅ of the fifth TFT T5 is output as XLDOUT.

The selection signal or non-selection signal supplied to the column line CL shifts the output from the second selection circuit 61 as necessary, and the output from the level shifter is reinforced by a buffer.
That is, the column selection transistors T3C and T4C are controlled by the second selection circuit 61. or,
The selection signal or the non-selection signal supplied to the row line R shifts the output from the first selection circuit 51 as necessary, and the output from the level shifter is reinforced by a buffer. That is, the row selection transistors T3R and T4R are controlled by the first selection circuit 51. Here, the column selection is performed with the row selected, but the row selection may be performed with the column selected. The odd-numbered column line here is simply a name, which means a column line provided in an odd-numbered transistor row (T1 or T3), and an even-numbered column line is also simply a name and has an even-numbered transistor row ( It means a column line provided at T2 or T4).

In the present embodiment, two measurement thin film transistors (T01 and T02) are provided in the measurement cell.
And two capacitance elements (Cp1 and Cp2) are provided, but the present embodiment is not limited to this example. Even if k is an integer of 2 or more and k measurement thin film transistors (T01 and T02, T0k) and k capacitance elements (Cp1, Cp2,... Cpk) are provided in one measurement cell. good. In this case, the q-th measurement thin film transistor T0q and the q-th capacitance element Cpq are connected with q being an integer between 1 and k, and the values of k C _q / W _0q are all different. Further, k row lines are provided for one measurement cell. Specifically, the gates of the row selection transistors T3R and T4R attached to T01 are ki- (k-1) -th row lines R (
ki-k + 1) and the gates of the row selection transistors T3R and T4R attached to T0q are connected to the row line R (ki-k + q) of the ki- (k-q) -th row.

Next, the relationship between the width W _0q and the capacitance C _q will be described. Hereinafter, the ratio of the capacitance to the channel formation region width is referred to as a width-capacitance ratio. The off-current value of the measurement thin film transistor is proportional to the channel formation region width. For this reason, the width-capacity ratio quantitatively represents the difficulty of discharging the charge charged in the capacitor. For example, when Cpq is charged to the positive power supply potential V _dd at time 0 and charge is leaked with an off-current of T0q for time t, the first electrode potential V _q (t
) Is described as V _q (t) = V _dd exp (−t / τ _q ). Where τ _q is the time constant,
Using the proportionality coefficient A, it is expressed as τ _q = AC _q / W _0q . The proportional coefficient A has a unit dimension of smF ⁻¹ and is expressed by A = A ₀ exp (ε / k _B T). Here, T is a temperature expressed in absolute temperature, and k _B is a Boltzmann constant and k _B = 8.61 × 10 ⁻⁵ eV / K. In this embodiment, the plexus potential factor is A ₀ = 1.595 × 10 ⁻⁸ ms · μm / p.
At F, the activation energy was ε = 0.517 eV. Since the main mechanism of off-current generation is phonon assisted tunneling with Pool Frenkel effect, the electron excitation energy from the valence band to the vicinity of the center of the silicon band gap corresponds to the activation energy. However, these values (particularly, the plain exponential factor A ₀ ) are values unique to the thin film transistor, and differ depending on the structure and manufacturing method of the thin film transistor.

The change in the first electrode potential (V _q / V _dd ) can be accurately measured when the value falls within the range of 5% to 95%. That is, accurate temperature measurement is possible when 0.05 ≦ V _q / V _dd ≦ 0.95. This means that 0.3338 ≦ (AC _q ) / (t _MP W _0q ) ≦ 19.50 when the measurement period MP described later with reference to FIG. 4 is t _MP . Accordingly, the length t _MP and the width capacity ratio of the measurement period MP are determined so as to satisfy this equation. As described above, the q-th width-capacitance ratio C _q / W _0q is proportional to the time constant of the first electrode potential drop of Cpq depending on the OFF current of T0q. For this reason, if the k width capacity ratios are all different, the temperature can be measured in different temperature ranges in a single measurement period. That is, the temperature can be measured in a wide temperature range. When k width / capacitance ratios C _q / W _0q are arranged in descending order of C ₁ / W ₀₁ > C ₂ / W ₀₂ >...> C _k / W _0k , a certain width-capacity ratio is smaller than that. Ideally, it is approximately 20 times the width-capacity ratio of the smallest value. As shown in FIG. 2, since the logarithm of the off-current value is approximately proportional to the temperature, it is almost 20 times (2
(× 10 times) must be considered as a power of 10, and the value is approximately 2 × 10 ^0.6 (8 times) to 2 × 10 ^1.4 (50 times). That is, 8 × C _{q + 1} / W _{0q + 1} ≦ C _q / W _0q ≦ 50 × C _{q + 1} /
Each width-capacitance ratio is determined so as to satisfy W _{0q + 1} . However, q here is an integer greater than or equal to 1 and less than or equal to k-1.

When the q-th width-capacitance ratio C _q / W _0q is 20 times the _{q + 1-th} width-capacitance ratio C _{q + 1} / W _{0q + 1} ,
The time constant of the potential drop at the first electrode of Cpq is 20 times the time constant of the potential drop at the first electrode of Cpq + 1. As a result, a high temperature range is measured at T01 and Cp1, and T02 and Cp2 are measured.
And it will be possible to measure a lower temperature range. At the same time, the measured temperature ranges slightly overlap, and there is no temperature range that is not measured between them. That is, the lower limit of the temperature range measured by T01 and Cp1 is lower than the upper limit of the temperature range measured by T02 and Cp2, and the temperature can be measured over a wide temperature range without omission. The measurement method will be described in detail later. For example, Table 1 shows a measurement range when the measurement period MP is 2.5 milliseconds and three width-capacity ratios are used.

In Table 1, the white cells are in a temperature range suitable for measurement (when the value of V _q / V _dd falls within the range of 5% to 95%), and the shaded cells are outside this temperature range. The third to fifth columns of Table 1 represent the time constant τ _q , and the sixth to eighth columns represent values obtained by dividing the time constant τ _q by the length t _MP of the measurement period MP. As can be seen from the third and sixth columns of Table 1, T01 and Cp1 (q = 1)
The temperature can be accurately measured in the range of 50 ° C to 130 ° C. On the other hand, from the fourth and seventh columns,
It can be seen that T02 and Cp2 (q = 2) can accurately measure the temperature in the range of 10 ° C. to 60 ° C. From the fifth and eighth columns, it can be seen that T03 and Cp3 (q = 3) can accurately measure the temperature in the range of -30 ° C to 10 ° C. Thus, by providing three sets of the thin film transistor T0 for measurement and the capacitive element Cp connected thereto in one measurement cell, −30
A wide temperature range from ℃ to 130 ℃ can be accurately measured in a short time.

"Measurement method"
FIG. 4 is a diagram for explaining a timing chart for driving the circuit when the temperature is measured by the temperature sensor according to the present embodiment. Hereinafter, a measurement method using a temperature sensor will be described with reference to FIG.

The temperature measurement includes a preparation period PP, a measurement period MP, and an output period OP. During the preparation period PP, the measurement thin film transistor T0 is turned on, and the capacitive element Cp is charged to a predetermined potential.
In the measurement period MP, the measurement thin film transistor T0 is turned off, and the charge previously charged from the first thin film transistor T1 and the capacitive element Cp is leaked. Since the leakage charge amount is temperature-dependent, the gate potential of the first thin film transistor T1 decreases according to the temperature. Output period O
For P, an output corresponding to the lowered gate potential is taken out from each measurement cell. This is the basic cycle of temperature measurement.

In actual temperature measurement, first, prior to temperature measurement, a reference signal V _ref supplied during measurement
Determine the potential value. As described above, the temperature sensor 1 compares the electrical characteristics of the second thin film transistor T2 that is the reference transistor with the electrical characteristics of the first thin film transistor T1 whose gate potential changes according to the temperature. On the other hand, a thin film transistor generally has slightly different electrical characteristics for each transistor. In order to correct this, the value of the reference signal V _ref corresponding to the reference temperature is determined for each measurement cell. A specific method for determining the value of the reference signal V _ref will be described below.

(1) The temperature sensor 1 is installed in a heat reservoir at a reference temperature so that all measurement cells are at the reference temperature. The reference temperature is appropriately set within the measurement target temperature range. It is desirable that the reference temperature is approximately the lower limit of the range. For example, when the temperature range to be measured is a winter temperature in a cold region and is expected to be in the range of −20 ° C. to 30 ° C., the reference temperature is set to about −20 ° C.

(2) For all the second thin film transistors T2, the provisional reference high potential H _r expressed by Equation 1 is set as the selection potential of the reference signal V _ref .

ここでＶ_ddは正電源電位、Ｖ_thは薄膜トランジスターの閾値電圧の平均値、δは０．０
５Ｖから０．３Ｖ程度の小さい電圧値である。仮の基準高電位は、例えばＨ_r＝４．０５
Ｖである。

Here, V _dd is a positive power supply potential, V _th is an average value of threshold voltages of thin film transistors, and δ is 0.0
It is a small voltage value of about 5V to 0.3V. The temporary reference high potential is, for example, H _r = 4.05
V.

(3) The temperature is measured by the method described later, and the output results from all the differential transistor pairs (V
The time of the measurement period MP is determined so that the average value of ₅₋ V ₆ ) becomes almost zero. In other words, the length of the measurement period MP is determined so as to satisfy Formula 2. Almost zero means that the average value of the output result is -0.4V
It means to enter the range of + 0.4V.

(4) The temperature of the heat reservoir is again measured using the time of the measurement period MP thus determined. At that time, so that the LDOUT output and the XLDOUT output become equal (V
A reference high potential value of V _ref to be provided for each differential transistor pair is determined and stored in a storage device provided in the external controller (so that ₅ = V ₆ ). Thereafter, the temperature sensor 1 is placed on the measurement target, and measurement is started.

Next, a temperature measurement method will be described. When measuring the temperature, the external controller supplies appropriate signals and power to the first selection circuit 51, the first processing circuit 52, the second selection circuit 61, the second processing circuit 62, etc. As a result, each row line or column line is supplied. The following signals shown in FIG. 4 are supplied to the output circuit 4 and the like.

In the preparation period PP, first, the charging column line CC is set to the positive power supply potential V _dd . Next, the charging line R
C is set to the second high potential H ₂ and then returned to the negative power supply potential V _ss . Next, the potential of the charging column line CC is returned to the negative power supply potential V _ss . As a result, in all the measurement cells, the first electrodes of all the capacitive elements Cp are charged to the positive power supply potential V _dd . Note that the negative power supply potential V _ss is a potential lower than the positive power supply potential V _dd , for example, V _ss = 0 V (ground potential). The positive power supply potential is, for example, V _dd = 4.8 V,
The second high potential is, for example, H ₂ = 7.3V.

In the measurement period MP, the charging column line CC is set to the negative power supply potential V _ss . The charging row line RC is also set to the negative power supply potential V _ss . As a result, the measurement thin film transistor T0 is turned off, and an off current corresponding to the temperature is leaked to the charging column line CC. Thus, at the end of the measurement period MP, the gate potential of the first thin film transistor T1 becomes the first high potential H ₁ .

After the measurement period MP ends, the process proceeds to the output period OP. In the output period OP, the third high potential H ₃ is supplied to the first control signal Cnt1. This value is, for example, H ₃ = 1.6V. In the output period OP, first, row lines R (1) to R (kM) are alternately selected one by one. Usually 1
Selection is made in order from the row line R (1) of the row to the row line R (kM) of the last kM row.
A selection signal potential (second high potential H ₂ ) is selectively supplied to the row line, and a non-selection signal potential (negative power supply potential V _ss ) is supplied when not selected.

In a period in which one row line is selected, column lines (CL (1) to CL (N)) are alternately selected one by one. Normally, selection is made in order from the first column line CL (1) to the Nth column line CL (N) of the last column. A selection signal potential (second high potential H ₂ ) is selectively supplied to the column line, and a non-selection signal potential (negative power supply potential V _ss ) is supplied when not selected.

In this way, a specific set is selected from a set of k × M × N thin film transistors T0 for measurement and capacitive elements Cp. The reference high potential corresponding to the selected set is read from the storage device of the external controller and is set as V _ref . Since the reference high potential supplied to the gate of the second thin film transistor T2 is set so that the output voltage is V ₅ = V ₆ if the measurement thin film transistor T0 of the set is equal to the reference temperature, V V Reading the values of ₅ or V ₆ gives the selected set of temperatures. For example, since the leakage current is small when the selected set is lower than the reference temperature, the first high potential (the gate potential of the first thin film transistor T1) is the reference high potential (the gate potential of the second thin film transistor T2). Higher than. As a result, LDOUT
Since the potential of (V ₆ ) decreases and the potential of XLDOUT (V ₅ ) increases, the value of V ₅ −V ₆ becomes positive. On the other hand, if the selected set is higher than the reference temperature, the potential of LDOUT (V ₆ ) becomes high and the potential of XLDOUT (V ₅ ) becomes low, so the value of V ₅ -V ₆ becomes negative. Become. In this measurement method, the charge remaining in the capacitive element Cp is maintained throughout the output period. That is, temperature measurement is performed non-destructively (measurement does not affect the object to be measured, that is, without changing the amount of charge), and therefore, even if the temperature sensor has a large area or high definition. Accurate measurement will be performed.

"how to use"
When using a temperature sensor, a low frequency measurement mode and a high frequency measurement mode may be provided. The low frequency measurement mode is a period in which measurement is repeated at low frequency in preparation for the high frequency measurement mode. In the high frequency measurement mode, the temperature sensor repeats measurement at high frequency. For example, when a temperature sensor is used in a freezing prevention zone of a water supply, the low frequency measurement mode is set during a warm day, and the high frequency measurement mode is set during a period when the temperature starts to decrease and is likely to freeze. Or
The low frequency measurement mode is selected when the temperature change is slow, and the high frequency measurement mode is set when the temperature change is slow.

In both the low frequency measurement mode and the high frequency measurement mode, the temperature sensor performs the measurement operation by the method described in the “Measurement Method” section above, but the measurement frequency is different. In the low frequency measurement mode, the number of measurements performed within a unit time is small, and in the high frequency measurement mode, this is high. When a period for selecting and measuring all the measurement cells arranged in M rows and N columns is a frame period, and a time from one frame period to the next frame period is a standby period, the measurement frequency is the frame period and the standby period. The reciprocal of the sum of the period (1 / (frame period + standby period)).
That is, the measurement frequency in the high frequency measurement mode is set larger than the measurement frequency in the low frequency measurement mode. As an example, in the high-frequency measurement mode, the standby period is set to zero, and the frame frequency (the reciprocal of the frame period) and the measurement frequency are matched. On the other hand, the standby period in the low frequency measurement mode is set to a relatively long time of several milliseconds or more (for example, 1 second), and the measurement frequency in the low frequency measurement mode is made to substantially coincide with the reciprocal of the standby period.

By providing such a low frequency measurement mode and a high frequency measurement mode, power consumption can be reduced in the low frequency measurement mode, and time resolution can be maximized in the high frequency measurement mode. . Here, the frame period is the same in both the low frequency measurement mode and the high frequency measurement mode, and the standby period is changed. However, the present invention is not limited to this, and the frame period may be changed between the low frequency measurement mode and the high frequency measurement mode. Absent. That is, the clock frequency in the high frequency measurement mode may be set higher than the clock frequency in the low frequency measurement mode to increase the measurement frequency in the high frequency measurement mode.

"Transistor size and driving conditions"
FIG. 5 is an equivalent circuit diagram when the temperature is measured by the temperature sensor according to the present embodiment.
Next, with reference to FIG. 5, conditions for realizing high-sensitivity and high-performance measurement will be described. Hereinafter, the first thin film transistor T1 is abbreviated as T1. Similarly, the second thin film transistor T2 to the seventh thin film transistor T7 are also abbreviated. Note that represents a drain potential of T3 in V _3, represents the drain potential of T4 drain potential of V _4, T7 V ₇ at.

Since T1 and T2 are differential input pairs, nonlinear operation such as saturation operation is desirable. T3 and T4 are selection transistors, and linear operation is desirable from the viewpoint of widening the output potential range.
Thus, for the T3 and T4, the source drain voltage V _ds is as small as possible, V ₃ =
V ₅ and V ₄ = V ₆ become desirably. T5 and T6 must be in saturation with the current mirror pair. Also, since T7 is a current source transistor, it must be in an arrow-saturated operation.

  First, the symbol of Equation 3 is used to express the current equation of the transistor.

ここでＷはトランジスターチャンネル形成領域の幅、Ｌはトランジスターチャンネル形
成領域の長さ、Ｃ_oxは単位面積当たりのゲート絶縁膜容量、μは移動度である。すると、
飽和特性の近似式は数式４で表される。

Here, W is the width of the transistor channel formation region, L is the length of the transistor channel formation region, C _ox is the gate insulating film capacitance per unit area, and μ is the mobility. Then
The approximate expression of the saturation characteristic is expressed by Expression 4.

又、線型特性の近似式は数式５で表される。

Further, the approximate expression of the linear characteristic is expressed by Expression 5.

本実施形態では薄膜トランジスターの閾値電圧をＶ_thで表し、薄膜トランジスター間の
Ｖ_th変動は僅かであると近似する。即ち、Ｔ１からＴ７のＶ_thは総て等しいと近似する。
又、Ｖ_thは正であるとし、全体の電流（Ｔ７の電流）を２Ｉとする。まず、Ｔ１からＴ７
のＺをＺ₁からＺ₇で表し、これらを数式６の関係とする。

In this embodiment, the threshold voltage of the thin film transistor is represented by V _th , and it is approximated that the V _th variation between the thin film transistors is slight. That is, it is approximated that V _{th of} T1 to T7 are all equal.
Further, it is assumed that V _th is positive, and the entire current (current of T7) is 2I. First, from T1 to T7
Z is represented by Z ₁ to Z ₇ , and these are represented by the relationship of Equation 6.

数式６が満たされていると、Ｔ１のゲート電位Ｈ₁とＴ２のゲート電位Ｈ_rとの差は線型
増幅されて出力される。以下、各トランジスターに求められる駆動条件を検討する。

If Equation 6 is satisfied, the difference between the gate potential H _r of the gate potential H ₁ and T2 T1 is output is linearly amplified. Hereinafter, driving conditions required for each transistor will be examined.

(1) The saturation operation of T1 is desirable. Therefore, it is desirable that the saturation conditions represented by Expression 7 and Expression 8 are satisfied.

その結果、Ｔ１のドレイン電流は次式となる。

As a result, the drain current of T1 is as follows.

(2) Saturation operation is desirable for T2. Therefore, it is desirable that the saturation condition represented by Expression 10 and Expression 11 is satisfied.

その結果、Ｔ２のドレイン電流は次式となる。

As a result, the drain current of T2 is as follows.

(3) T3 is preferably linear. Therefore, it is desirable that the linear condition expressed by Equation 13 is satisfied.

その結果、Ｔ３のドレイン電流は次式となる。

As a result, the drain current of T3 is as follows.

(4) T4 is preferably linear. Therefore, it is desirable that the linear condition expressed by Equation 15 is satisfied.

その結果、Ｔ４のドレイン電流は次式となる。

As a result, the drain current of T4 is as follows.

(5) It is desirable that T5 operates in saturation. Therefore, it is desirable that the saturation condition expressed by Equation 17 is satisfied.

その結果、Ｔ５のドレイン電流は次式となる。

As a result, the drain current of T5 is as follows.

(6) It is desirable that T6 operates in saturation. Therefore, it is desirable that the saturation condition expressed by Equation 19 and Equation 20 is satisfied.

その結果、Ｔ６のドレイン電流は次式となる。

As a result, the drain current of T6 is as follows.

(7) It is desirable for T7 to perform a saturation operation. Therefore, it is desirable that the saturation condition expressed by Equation 22 is satisfied.

その結果、Ｔ７のドレイン電流は次式となる。

As a result, the drain current of T7 is as follows.

ここで、数式２２を満たす為に、数式２４とする。

Here, in order to satisfy Expression 22, Expression 24 is used.

δは例えば０．１Ｖ程度で、容易に飽和条件を満たすには０．３Ｖ程度未満の正の値が
理想である。

For example, δ is about 0.1V, and a positive value less than about 0.3V is ideal for easily satisfying the saturation condition.

  Next, in order to satisfy Expressions 13 and 15, Expression 25 is used.

これにより、少なくとも数式２６と数式２７とが満たされる様になる。

As a result, at least Expressions 26 and 27 are satisfied.

  From Equation 23 regarding T7 and Equation 16 regarding T4, the following equation is obtained.

この数式２８に数式２４と数式２５とを適応すると、次の様になる。

Applying Equation 24 and Equation 25 to Equation 28 yields the following.

数式２９の右辺に関しては、数式３０を考慮する。

For the right side of Equation 29, Equation 30 is considered.

ここで数式３１とする。

Here, Equation 31 is used.

こうすれば、数式３２が得られる。

In this way, Expression 32 is obtained.

即ち、Ｔ４はゲート電圧がＶ_th＋１Ｖ以上ならば、線型動作する。更に、Ｔ４での電位
降下を確実に０．１Ｖ未満と小さくし、Ｔ４を線型動作させる為には、概ね次式が満たさ
れれば良い。

That is, T4 operates linearly when the gate voltage is V _th + 1V or more. Furthermore, in order to reliably reduce the potential drop at T4 to less than 0.1 V and to make T4 perform a linear operation, the following equation should generally be satisfied.

数式３３は数式３４と変形される。

Equation 33 is transformed to Equation 34.

この場合、数式３５の関係が得られる。

In this case, the relationship of Formula 35 is obtained.

即ち、明らかに線型条件（数式１５）は満たされる。

That is, the linear condition (Formula 15) is clearly satisfied.

Next, the configuration is determined to satisfy all desirable conditions. Formula 36 is given for Formula 23 related to T7 and Formula 21 related to T6.

こうすると、数式２１と数式２３とから数式３７が得られる。

In this way, Expression 37 is obtained from Expression 21 and Expression 23.

  Next, Equation 38 is given for Equation 9 relating to T1 and Equation 18 relating to T5.

こうすると、数式３９が得られる。

In this way, Equation 39 is obtained.

Ｔ７とＴ４の議論（数式２８から数式３５までの議論）により、数式４０と数式４１で
表される関係になっている。

Based on the discussion of T7 and T4 (discussion from Equation 28 to Equation 35), the relationship is expressed by Equation 40 and Equation 41.

数式３９に数式４１を代入し、数式３７と連立させると、数式４２と数式４３の解が得
られる。

By substituting Equation 41 into Equation 39 and simultaneously with Equation 37, the solutions of Equation 42 and Equation 43 are obtained.

  From Expression 12 regarding T2 and Expression 21 regarding T6, Expression 44 is obtained.

数式４４に数式３７と数式４０とを代入すると、数式４５が得られる。

Substituting Equation 37 and Equation 40 into Equation 44 yields Equation 45.

The following shows how to satisfy each of the conditions that should be satisfied in order to realize high-sensitivity and high-performance measurement.

  Formula 7 as a preferred condition: Formula 7 is expressed by Formula 46 from Formula 41 and Formula 42.

  Formula 10 as a suitable condition: Formula 10 is expressed by Formula 46 from Formula 40 and Formula 44.

Formula 8 as a preferred condition: Formula V is positively satisfied if Formula 47 holds because V _th is positive.

Formula 11 as a preferred condition: Since Formula 11 is positive in V _th , if Formula 48 holds,
Surely satisfied.

Formula 13 and Formula 15 as preferred conditions: Formula 13 and Formula 15 are Formula 24 and Formula 3
Filled with 4.

Formula 17 as a preferred condition: Formula 17 is expressed by Formula 46 from Formula 42 and Formula 43.

Formula 19 as a preferred condition: Formula 19 is expressed by Formula 49 from Formula 42 and Formula 45.

従って、計測温度が基準温度よりも高温の時の方が低温の時よりも高精度に温度計測が
なされる。その意味では、基準温度は測定対象温度範囲の下限値に設定するのが好ましい
。

Therefore, temperature measurement is performed with higher accuracy when the measured temperature is higher than the reference temperature than when the measured temperature is lower. In that sense, the reference temperature is preferably set to the lower limit value of the measurement target temperature range.

  Formula 22 as a preferred condition: Formula 24 to Formula 22 become Formula 50.

これに数式４３を適応すると、数式２２は、数式５１となる。

Applying equation 43 to this, equation 22 becomes equation 51.

数式２４により、これは、数式５２を意味する。

According to Equation 24, this means Equation 52.

From Equation 47 and Equation 52, the preferred condition for H ₁ is Equation 53.

In order to satisfy the right side of Formula 53, the gate potential of T1 is charged to V _dd during the preparation period PP,
Discharge during the measurement period MP. When the first high potential H ₁ is equal to the reference high potential H _r , the output (V ₅
Since −V ₆ ) becomes zero, in order to make it easy to satisfy the left side of the first high potential H ₁ , the provisional reference high potential is set in the middle of the right side and the left side of Formula 53 and set as Formula 1. .

The positive power supply voltage V _dd can be set to three times or more of the third high potential H ₃ as shown in the equation 54. Note that Formula 54 takes into account Formula 24.

Since the first high potential H ₁ is in the vicinity of the positive power supply voltage, Formula 55 is obtained from Formula 43 and Formula 42 even when V _dd is three times the smallest H ₃ .

即ち、Ｔ１とＴ５、Ｔ７にはほぼ均等なドレイン電圧が印加され、これらのトランジス
ターは飽和動作する。同様にＴ２、Ｔ６、Ｔ７にもほぼ均等なドレイン電圧が掛かり、飽
和動作する。Ｖ_ddが３倍よりも大きくなると、Ｔ１やＴ５、Ｔ７に掛かるソースドレイン
電圧は更に高くなるので、差動増幅範囲は更に広がる。

That is, substantially equal drain voltages are applied to T1, T5, and T7, and these transistors operate in saturation. Similarly, almost equal drain voltages are applied to T2, T6, and T7, and a saturation operation is performed. When V _dd is larger than three times, the source / drain voltages applied to T1, T5, and T7 are further increased, so that the differential amplification range is further expanded.

In summary, the potential relationship is such that the formula 54 related to V _dd , the formula 24 related to H ₃ , the formula 25 related to H ₂ , and the formula 1 related to H _r are satisfied. As an example, V _th = 1.5
As V, δ = 0.1V, γ = 1V, positive power supply potential V _dd = 4.8 V, third high potential H ₃ =
1.6 V, second high potential H ₂ = 7.3 V, and provisional reference high potential H _r = 4.05 V.

Regarding the transistor size, Formula 6 and Formula 34, Formula 36, Formula 38 to Formula 5 are used.
6.

この様な電気関係とトランジスターサイズとを採用する事で、高感度で正確な計測が実
現する。但し、Ｔ３とＴ４とは、実際には列選択トランジスターと行選択トランジスター
との直列接続なので、列選択トランジスターや行選択トランジスターのＺはＺ₃やＺ₄の二
倍とする。即ち、Ｔ３ＣやＴ３Ｒ、Ｔ４Ｃ、Ｔ４ＲのＺをそれぞれＺ_3C、Ｚ_3R、Ｚ_4C、Ｚ
_4Rにて表現した時に数式５７とする。

By adopting such electrical relationship and transistor size, highly sensitive and accurate measurement is realized. However, the T3 and T4, in fact because the series connection of the column selection transistor and a row select transistor, Z of the column selection transistor and row select transistors is twice the Z ₃ and Z _4. That is, Z of T3C, T3R, T4C, and T4R is changed to Z _3C , Z _3R , Z _4C , Z, respectively.
_When expressed in _4R , Formula 57 is obtained.

"Planar layout"
6A and 6B are diagrams for explaining the planar layout of various circuits used in the temperature sensor according to the present embodiment. FIG. 6A is an output circuit, FIG. 6B is a column selection transistor, and FIG. 6C is a measurement cell (i).
, J). Hereinafter, the planar layout of these circuits will be described with reference to FIG.

The method of manufacturing the thin film transistor will be described in detail later.
In addition, it has a gate wiring metal layer GM constituting the gate electrode and a source wiring metal layer SM mainly connected to the source / drain electrodes. An insulating film is provided between these three layers and is electrically separated unless connected by a contact hole. As shown in FIG. 6A, the current mirror pair T5 and T6 are formed adjacent to each other in plan view. That is, the semiconductor layer SL of T5
And the semiconductor layer SL of T6 are arranged next to each other. The two semiconductor layers are arranged as close as possible to each other as long as the design rule permits, without another semiconductor layer being located between them. Of course, the gate electrodes are common and are arranged at the shortest distance so that the gate electrode of T5 and the gate electrode of T6 are straight. The sources of both transistors are connected by a gate wiring metal layer GM and are connected to the drain of T7. Since the arrangement of T5 and T6 is close, the gate electrode is formed at the shortest distance, and the source contact is connected by the gate wiring metal layer GM, the temperatures of both transistors are substantially equal, and the current mirror pair operates accurately. It will be a thing.

Similarly, as shown in FIG. 6B, the column selection transistor pairs T3C and T4C are also arranged so that the semiconductor layers SL of both transistors are adjacent to each other and the gate electrodes are straight. As a result, the temperatures of the two transistors become substantially equal, and the amplification error caused by the column selection transistor pair can be minimized.

In the measurement cell, as shown in FIG. 6C, the differential transistor pair T1 and T2 are arranged adjacent to each other, and the drains of both transistors are connected to _Vdd by the gate wiring metal layer GM.
Thereby, the temperature of both transistors becomes substantially equal, and accurate differential amplification is performed. The row selection transistor pairs T3R and T4R are also arranged so that the semiconductor layers SL of both transistors are adjacent to each other and the gate electrodes are straight. As a result, the temperatures of both transistors are substantially equal, and the amplification error caused by the row selection transistor pair can be minimized.

"Manufacturing method of temperature sensor"
In the temperature sensor 1, a thin film circuit is formed on a flexible plastic film substrate 2. Here, a method for manufacturing the temperature sensor 1 will be described. Specifically, the temperature sensor 1 is manufactured by peeling the thin film circuit first formed on the glass substrate and transferring it to a plastic film.

As a 1st process, a peeling layer is provided on the glass substrate used as a manufacturer board | substrate. The release layer has a thickness of 5
It is a hydrogenated amorphous silicon film of about 0 nm. After forming a silicon oxide film serving as a base insulating film on the release layer, a thin film circuit including a thin film transistor is manufactured. For the thin film circuit, a known low temperature process polycrystalline silicon thin film transistor manufacturing method is applied. Specifically, a laser-crystallized polycrystalline silicon semiconductor layer is provided on the base insulating film, and then a gate insulating layer using a silicon oxide film and a metal obtained by adding an additive to aluminum or aluminum are used. A gate electrode (gate wiring metal layer GM) is formed. Furthermore, a first interlayer insulating layer using a silicon oxide film, a source contact and a drain contact (source wiring metal layer SM) using aluminum or a metal obtained by adding an additive to aluminum, and a second using a polyimide resin. Interlayer insulating layer (protective film), indium tin oxide (ITO: Indium Tin Oxid)
An electrode terminal (mounting terminal) using e) is created.

Next, as a second step, a temporary adhesive is applied to the surface of the thin film circuit, and the manufacturer substrate is attached to the temporary transfer substrate. As a temporary adhesive, what mixed polyvinyl pyrrolidone resin in order to give water solubility to acrylic resin is used. The temporary transfer substrate is a smooth glass substrate.

Next, as a third step, the manufacturer substrate is removed and the thin film circuit is transferred to a temporary transfer substrate. As a method of removing the manufacturer's substrate, laser light is irradiated from the back of the manufacturer's substrate to weaken the adhesive force inside or at the interface of the release layer, and then the manufacturer's substrate and the temporary transfer substrate are peeled off. By doing so, the thin film circuit is transferred to the temporary transfer substrate.

Next, in a fourth step, the peeling layer remaining on the back surface of the thin film circuit is removed, and charges existing on the back surface of the thin film circuit are removed using, for example, an ionizer. In this way, it is possible to remove a certain amount of peeling electrification and frictional electrification with air during drying.

Next, as a fifth step, the back surface of the thin film circuit is attached to the first surface side of the plastic film using a permanent adhesive made of, for example, an acrylic resin. As the plastic film, a film having high heat resistance such as polyimide can be used.

After affixing the plastic film, as a sixth step, the supporting substrate is bonded to the second side of the plastic film (the side opposite to the first side) using a temporary adhesive. This temporary adhesive is a material that easily loses its adhesiveness upon stimulation with heat, ultraviolet light, or the like, and is insoluble in a solvent that dissolves the temporary adhesive.

Next, as a seventh step, the temporary transfer substrate is removed using a solvent (in this case, water) that dissolves the temporary adhesive. Thereafter, the temporary adhesive is washed away.

Next, as an eighth step, a mounting operation is performed. First, tape wiring is mounted on the mounting terminals. In this case, an anisotropic conductive paste or anisotropic conductive film is disposed between the mounting terminal and the tape wiring, and both are adhered. Thereafter, a stimulus such as heat or ultraviolet light is applied to the temporary adhesive to remove the support substrate. Finally, the tape wiring is connected to an external controller provided outside the temperature sensor 1. Thus, the temperature sensor 1 is completed.

In addition to the plastic film described above, the substrate 2 has a thickness of 50 micrometers to 5 micrometers.
It may be a thin metal foil of about 00 micrometers or a thin glass of about 10 to 200 micrometers in thickness. Since these substrates have flexibility, they can be applied to any shape such as the skin of a robot. However, when the temperature sensor 1 is used for planar applications, the thickness is about 0.4 mm to 2 mm. Glass may be used as the substrate. Also, the manufacturing method is a method of thinly cutting the glass after forming a thin film circuit on the thick glass,
A method of directly forming a thin film circuit on a plastic film or metal foil may be used. In the case of direct formation, an amorphous silicon thin film transistor, an oxide thin film transistor using an oxide containing zinc or tin as a semiconductor layer, or the like can be used.

As described above, according to the temperature sensor 1 according to the present embodiment, the following effects can be obtained.
Since a thin film transistor can be formed in units of micrometers, a temperature sensor with a very high spatial resolution of several micrometers can be realized. In addition, accurate temperature measurement is possible without being affected by the self-heating of the transistor. Furthermore, since the first measurement thin film transistor and the second measurement thin film transistor measure the temperature in a different temperature range, accurate temperature measurement can be realized over a wide temperature range.

In addition, by changing the capacitance of the first capacitive element and the capacitance of the second capacitive element, accurate temperature measurement can be realized over a wide temperature range.

Also, by setting the value of C ₁ / W _{01 to be} in the range of 8 to 50 times the value of C ₂ / W ₀₂ , the target temperature range is relatively high for the first measurement thin film transistor and the first capacitor element. As the temperature measurement is performed and the temperature measurement is performed for a relatively low temperature range with the second measurement thin film transistor and the second capacitor element, accurate temperature measurement can be performed over a wide temperature range.

Furthermore, when the measurement cell includes a third measurement thin film transistor and a third capacitance element, the first measurement thin film transistor, the second measurement thin film transistor, and the third measurement thin film transistor have different temperatures. Since temperature is measured for a range, accurate temperature measurement can be realized over an extremely wide temperature range.

Furthermore, since the capacitance of the first capacitive element, the capacitance of the second capacitive element, and the capacitance of the third capacitive element are different from each other, it is possible to measure the temperature for different temperature ranges. This makes it possible to achieve accurate temperature measurement over an extremely wide temperature range.

Also, the value of C ₁ / W ₀₁ is set in the range of 8 to 50 times the value of C ₂ / W ₀₂ , and the value of C ₂ / W ₀₂ is set to C ₃
/ W ₀₃ can be in the range of about 8 to 50 times the value, so the first measurement thin film transistor and the first capacitance element measure the temperature for a relatively high temperature range, and the third measurement thin film transistor The temperature is measured for a relatively low temperature range with the third capacitor element, and the temperature is measured for the intermediate temperature range between the second measurement thin film transistor and the second capacitor element, and the temperature is measured over an extremely wide temperature range. Accurate temperature measurement.

Further, since a plurality of measurement cells are arranged in the first direction and are individually selected, the temperature spatial distribution in the first direction can be measured. Therefore, even if the temperature differs along the first direction, the temperature can be accurately measured.

In addition, since a plurality of measurement cells are arranged in the second direction and are individually selected, the spatial distribution of the temperature in the second direction can be measured. Therefore, even if the temperature varies along the second direction, the temperature can be accurately measured.

In addition, since the differential transistor pair is provided in each measurement cell, the temperature can be measured with high accuracy even if the planar temperature sensor has a large area or becomes high definition. Further, since the temperature measurement period and the measurement result output period can be separated, the thin film transistor does not self-heat at the time of measurement, and accurate temperature measurement is realized.

(Embodiment 2)
"One differential input pair is shared by multiple measurement thin film transistors"
FIG. 7 is a diagram illustrating a circuit of the temperature sensor according to the second embodiment. Hereinafter, the temperature sensor according to the present embodiment will be described. In addition, about the component same as Embodiment 1, the same number is attached | subjected and the overlapping description is abbreviate | omitted.

This embodiment (FIG. 7) differs from the first embodiment (FIG. 3) in the number of differential input pairs provided in the measurement cell. Along with this, the circuit configuration in the measurement cell has also changed. Other configurations are almost the same as those of the first embodiment.

As shown in FIG. 7, T01, Cp1, T02, Cp2, T03, and Cp3 are provided in the measurement cell (i, j) located in i row and j column. T01, T02, and T0
The drain electrode 3 is connected to the first electrodes Cp1, Cp2 and Cp3, respectively, and further connected to one of the source / drain electrodes of the switching transistors S1, S2 and S3. Here, for convenience of explanation, the electrodes to which the drain electrodes of T01, T02, and T03 are connected are
The source electrodes of the switching transistors S1, S2, and S3 are used. T01, T02 and T
The source electrode 03 is connected to the charging column line CC, and the gate electrode is connected to the charging row line RC. The second electrodes of Cp1, Cp2, and Cp3 are connected to the second power source (negative power source V _ss ). The drain electrodes of the switching transistors S1, S2 and S3 are the first thin film transistors T1.
Connected to the gate electrode. The gate electrodes of the switching transistors S1, S2, and S3 are respectively connected to the switching row lines RS (3i), RS (3i-1), and RS (3i−
2). The drain electrodes of the first thin film transistor T1 and the second thin film transistor T2 are connected to the first power supply (positive power supply V _dd ), and the source electrode is the row selection transistor T3.
The drain electrodes of R and T4R are connected. The source electrodes of the row selection transistors T3R and T4R are connected to the odd-numbered column line CO (j) and the even-numbered column line CE (j) of the jth column, respectively. The gate electrodes of the row selection transistors T3R and T4R are both connected to the i-th row line R (i).

T01, T02, and T03 all have different channel formation region widths, and the width W
₀₁ is 1 μm, width W ₀₂ is 10 μm, and width W ₀₃ is 100 μm. Also, Cp1, Cp2, and C
In p3, both have different capacities. In Cp1, the size of the first electrode and the second electrode is 2
Since it is 00 μm × 200 μm and the thickness of the dielectric film (SiO ₂ as a preferred example) is 69 nm, the capacitance C ₁ is 20 pF. On the other hand, in Cp2, the size of the first electrode and the second electrode is 200.
Since the thickness of the dielectric film is 69 nm, and the capacitance C ₂ is 10 pF.
It is. Cp3 is a size of 100 [mu] m × 100 [mu] m of the first electrode and the second electrode, the thickness of the dielectric film is also there in 69 nm, the capacitance C ₃ is 5 pF. As a result, the value of C ₁ / W ₀₁ is 20 pF / μm and the value of C ₂ / W ₀₂ is 1 pF / μm, so the value of C ₁ / W ₀₁ is C
It is 20 times the value of ₂ / _W02 . Since the value of C ₃ / W ₀₃ is 0.05 pF / μm, the value of C ₂ / W ₀₂ is 20 times the value of C ₃ / W ₀₃ . Therefore, as described in Table 1 of Embodiment 1, when the length of the measurement period MP is 2.5 milliseconds, a set of T01 and Cp1 can measure a temperature range of 50 ° C. to 130 ° C., A set of T02 and Cp2 can measure a temperature range of 10 ° C to 60 ° C, and a set of T03 and Cp3 can measure a temperature range of -30 ° C to 10 ° C. Note that the channel formation region width W _s of the switching transistors S1, S2, and S3 is preferably equal to or less than one tenth of the minimum width of the measurement thin film transistor T0. Since T01 is the narrowest in the measurement thin film transistor T0, specifically, it is preferable to satisfy W _s ≦ W _01/10 . This is because the leakage current to the gate electrode of the first thin film transistor T1 is reduced through the switching transistors S1, S2, and S3 during the measurement period MP, and the measurement accuracy is improved.

The temperature is measured by the procedure described below. First, as detailed in the first embodiment, when the temperature of the heat reservoir is measured, the differential transistor is set so that the LDOUT output and the XLDOUT output become equal (V ₅ = V ₆ ). A reference high potential value of _Vref to be provided for each pair is determined and stored in a storage device provided in the external controller. Thereafter, the temperature sensor 1 is placed on the measurement target, and measurement is started.

Next, prior to the preparation period PP, the gate electrode of the first thin film transistor is reset.
In this state, all the measurement thin film transistors T0 and all the switching transistors S are temporarily turned on in a state where the charging column line CC is set to the negative power supply potential V _ss . After this reset operation, all the switching transistors S are turned off to charge the capacitive element Cp. This can be achieved by temporarily turning on all the measuring thin film transistors T0 while the charging column line CC is at the positive power supply potential _Vdd .

Next, the measurement period MP is started. In this state, the charging column line CC is set to the negative power supply potential V _ss, and all the measurement thin film transistors T0 are turned off.

Next, the output period OP starts. The measurement result of temperature is output by sequentially selecting the measurement cells. The measurement cell (i, j) is selected by supplying a selection signal (second high potential H ₂ ) to the i-th row line R (i) and the j-th column line CL (j). The Measurement cell (i, j) assumes a state of being selected, go to select the switching transistor S is sequentially width smaller capacitance ratio C _q / W _0q. In this embodiment, first, T03 and Cp3 are selected (the second high potential H ₂ is supplied to RS (3i-2)), then T02 and Cp2 are selected (the second high potential is set to RS (3i-1)). Supply potential H ₂ )
Finally, T01 and Cp1 are selected (the second high potential H ₂ is supplied to RS (3i)). That is, the measurement target temperature range in each measurement cell is selected in order from the set of T0q and Cpq. By measuring in descending order of the first electrode potential of the capacitive element, it is possible to accurately measure a wide range of temperatures. This can be seen from the following example. For example, it is assumed that the temperature is −10 ° C. At this time, Cp1
The first electrode potential 0.999V _dd next, the first electrode potential is 0.981V _dd next Cp2, the first electrode potential of Cp3 becomes 0.687V _dd. Therefore, if you measure from Cp3,
Accurate measurement is made. On the other hand, if Cp1 or Cp2 is measured prior to Cp3, the gate electrode of the first thin film transistor T1 is charged by the measurement, so that it becomes an error when measuring Cp3. For example, assume that the temperature is 100 ° C. At this time, the first electrode potential of Cp1 is 0.454V _dd , the first electrode potential of Cp2 is 0V, and the first electrode potential of Cp3 is also 0V. Therefore, Cp3 to Cp2, Cp
Even if it measures to p1, the measurement of Cp3 or Cp2 does not affect the measurement of Cp1, but an exact measurement is made. In this way, when k capacitive elements Cpq are provided in one measurement cell, the switching transistor S is turned on in ascending order of the width-capacitance ratio Cq / W0q, and each measurement is performed in ascending order of the temperature range to be measured. Outputs the temperature measurement result in the cell.

As described above, according to the temperature sensor 1 of the present embodiment, the following effects can be obtained in addition to the effects of the first embodiment.
Since one differential transistor pair is used in each measurement cell, a measurement error caused by the differential transistor pair can be completely avoided at least in the measurement cell. As a result, more accurate measurement is realized. Further, since the number of transistors included in each measurement cell is reduced, the area of the measurement cell can be reduced. As a result, the measurement cells can be arranged with high density, and the spatial resolution in temperature measurement can be increased.

The present invention is not limited to the above-described embodiment, and various changes and improvements can be added to the above-described embodiment. A modification will be described below.

(Modification 1)
"The circuit is formed by PMOS"
FIG. 8 is a diagram for explaining a circuit of a temperature sensor according to the first modification. Hereinafter, the temperature sensor according to this modification will be described. In addition, about the component same as Embodiment 1, the same number is attached | subjected and the overlapping description is abbreviate | omitted.
This modified example (FIG. 8) differs from the first embodiment (FIG. 3) in the conductivity type of the thin film transistor that constitutes the circuit of the temperature sensor 1. Other configurations are almost the same as those of the first embodiment.

In the first embodiment, a circuit of the temperature sensor 1 (measurement circuit 3) using an N-type thin film transistor.
And the output circuit 4 and the column selection transistor of the second processing circuit 62). In this modification, these circuits are configured using P-type thin film transistors T1 to T7. In this case, the first power source is the negative power source V _ss and the second power source is the positive power source V _dd . The source and drain of the P-type thin film transistor is the source having the higher potential and the drain having the lower potential. In FIG. 8, s and d indicate the source and drain for reference. As a P-type thin film transistor, poly (9,9-dioctylfluorene-codithiophene) is used in the semiconductor layer.
(F8T2), poly (3-hexylthiophene) (P3HT), poly [5,5′-bis (3-dodecyl-2tinyl) -2,2′-bithiophene] (PQT-12), PBTT
An organic thin film transistor using an organic substance such as pentacene can be used.

The transistor size is the same as in the first embodiment. Although the driving method is the same as that in FIG. 4 of the first embodiment, the potential in the non-selection period is set to V _dd, and various high potentials H ₂ , H ₃ , and H _r in the selection period have negative absolute values larger than V _dd Change the way. Note that the threshold voltage V _thP of the P-type thin film transistor is negative. Specifically, the formula 54 relating to V _dd is changed to the formula 58.

又、Ｈ₃に関する数式２４は数式５９へと変えられる。

Also, the equation 24 related to H ₃ is changed to the equation 59.

又、Ｈ₂に関する数式２５は数式６０へと変えられる。

In addition, Formula 25 relating to H ₂ is changed to Formula 60.

又、Ｈ_rに関する数式１は数式６１へと変えられる。

Also, Equation 1 relating to H _r is changed to Equation 61.

Therefore, for example, assuming that V _thP = −1.5 V, δ _P = −0.1 V, γ _P = −1 V, V _ss =
0 V, V _dd = 4.8 V, H ₃ = 3.2 V, H ₂ = −2.5 V, and H _r = 0.75 V. If it is difficult to prepare a negative voltage like H ₂ here, V _dd is set so that all potentials are positive.
And V _ss may be shifted by a certain amount. For example, Formula 58 relating to V _dd is changed to Formula 62.

これに応じて、Ｖ_ssを数式６３へと変える。

In response to this, V _ss is changed to Equation 63.

上記例では全体が２．５Ｖずれて、Ｖ_dd＝７．３Ｖ、Ｖ_ss＝２．５Ｖ、Ｈ₃＝５．７Ｖ
、Ｈ₂＝０Ｖ、Ｈ_r＝３．２５Ｖとなる。

In the above example, the whole is shifted by 2.5 V, V _dd = 7.3 V, V _ss = 2.5 V, H ₃ = 5.7 V
H ₂ = 0V and H _r = 3.25V.

As described above, according to the temperature sensor 1 according to this modification, the temperature sensor 1 can be realized with a P-type thin film transistor without using an N-type thin film transistor.

In the above example, the column selection transistors of the measurement circuit 3, the output circuit 4, and the second processing circuit 62 are all formed of P-type thin film transistors. However, in addition to this, some of these circuits are P-type. Other parts may be N-type. For example, the output circuit 4 may be formed of a P-type thin film transistor, and the measurement circuit 3 may be formed of an N-type thin film transistor. Further, a differential transistor pair (T1 and T2 pair), a row selection transistor pair (T3R and T4R pair),
If the thin film transistors paired inside each pair such as a column selection transistor pair (T3C and T4C pair) and a current mirror pair (T5 and T6 pair) are of the same conductivity type, a thin film is not formed between the pair. The conductivity type of the transistor may be different.

DESCRIPTION OF SYMBOLS 1 ... Temperature sensor, 2 ... Board | substrate, 3 ... Measurement circuit, 4 ... Output circuit, 51 ... First selection circuit, 5
2 ... 1st processing circuit, 61 ... 2nd selection circuit, 62 ... 2nd processing circuit.

Claims (8)

A temperature sensor including a measurement cell for measuring temperature,
The measurement cell includes at least a first measurement thin film transistor, a first capacitance element, a second measurement thin film transistor, and a second capacitance element,
The first capacitive element is connected to one of a source or a drain of the first measurement thin film transistor,
The second capacitive element is connected to one of a source and a drain of the second measurement thin film transistor;
The width of the first thin film transistor for measurement is W ₀₁ and the capacitance of the first capacitive element is C _1.
The width of the second measurement thin film transistor is W ₀₂ and the capacitance of the second capacitor element is
Upon a C _2, a temperature sensor, characterized in that the value of C 1 _{/ W 01} is in the range of 8 times the value of _C 2 _{/ W 02} 50 times.   Furthermore, the first switching transistor, the second switching transistor and the first thin film
With transistors,
  The gate of the first thin film transistor is a source of the first thin film transistor for measurement.
Or connected to one of the drains via the first switching transistor,
The second switching to one of the source and drain of the second measurement thin film transistor
The temperature sensor according to claim 1, wherein the temperature sensor is connected via a transistor.   Furthermore, a row line and a row selection transistor are provided,
  The gate of the row selection transistor is connected to the row line, and the first thin film transistor
The temperature sensor according to claim 2, wherein the line selection transistor is connected to the row selection transistor.
Sir.   The width of the first switching transistor and the width of the second switching transistor
The width of the first measurement thin film transistor and the width of the second measurement thin film transistor
The temperature sensor according to claim 3, wherein the temperature sensor is not more than 1/10 of a small width.   Furthermore, a first first thin film transistor and a second first thin film transistor are provided,
  The gate of the first first thin film transistor is the source of the first measurement thin film transistor.
Connected to one of the source and drain,
  The gate of the second first thin film transistor is the source of the second measurement thin film transistor.
The temperature sensor according to claim 1, wherein the temperature sensor is connected to one of a source and a drain.   Furthermore, odd row lines, even row lines, first row selection transistors and second row selection transistors
With
  The gate of the first row selection transistor is connected to the odd row line, and the first first selection transistor
A thin film transistor and the first row selection transistor are connected;
  The gate of the second row selection transistor is connected to the even row line, and the second first selection transistor
A thin film transistor and the second row selection transistor are connected to each other.
The temperature sensor according to claim 5. Furthermore, the measurement cell includes at least a third measurement thin film transistor and a third capacitance element,
The third capacitive element is connected to the third measurement thin film transistor,
The width of the third measurement thin film transistor is W _03, and the capacitance of the third capacitance element is C _3.
The value of C ₂ / W ₀₂ is in the range of 8 to 50 times the value of C ₃ / W _03.
The temperature sensor according to any one of claims 1 to 6, wherein   A plurality of the measurement cells are arranged in a matrix,
  Furthermore, a row selection circuit for selecting an arbitrary row from the measurement cell;
  A column selection circuit that selects an arbitrary column from the measurement cell.
The temperature sensor according to any one of 1 to 6.

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