JP5679679B2 - Optical print head and image forming apparatus using the same - Google Patents

Description

  The present invention relates to an optical print head and an image forming apparatus using the same.

  An optical print head used as an exposure means for an electrophotographic printer has, for example, a printed circuit board on which wiring conductors of a predetermined pattern are formed, and a plurality of LED arrays provided on the upper surface of the printed circuit board. . In this optical print head, a predetermined power is applied to each LED element of the LED array based on a print signal from the outside, and the LED elements are selectively made to emit light individually. Then, the emitted light is irradiated onto an external photosensitive drum through a lens to form a predetermined latent image on the surface of the photosensitive drum, which is developed and transferred to a sheet or the like.

  Each LED array is connected to a control IC. The circuit of the control IC includes a reference power supply circuit, an ON / OFF control FET circuit, a current correction circuit, and the like as described in the following patent documents and others. For example, in the case of a control IC of 8 mm width used for a 600 dpi optical print head, one control IC has 192 driving FETs.

JP 2001-277583 A

  However, when printing is performed using such an optical print head, there are cases where uneven printing (difference in exposure energy) occurs. This unevenness in printing tends to become prominent particularly when the printing rate is high. For example, when the above-described 600 dpi control IC is used, ON / OFF control of one driving FET is performed, and the remaining 191 driving FETs are kept OFF. A quantity was obtained. However, when 191 drive FETs were turned on and the remaining one drive FET was controlled to be turned on / off, the exposure amount varied significantly.

  Therefore, when this was verified in detail, it was found that the rising speed of the output (drain voltage) of each driving FET varies depending on the ON / OFF state of the other 191 driving FETs. It was.

  Therefore, there is a demand for an optical print head in which each driving FET can drive a light emitting element without being influenced by the operation of the other driving FET, and exposure with each light emitting element can be performed with a desired exposure amount. It has been.

An optical print head according to an aspect of the present invention includes a substrate, a light emitting element array including a plurality of light emitting elements arranged in a row on the substrate, and a drive for driving the light emitting element array provided on the substrate. An optical print head having a circuit unit, wherein the drive circuit unit includes a plurality of drive elements configured by transistors arranged in rows corresponding to the plurality of light emitting elements, and the plurality of drive elements. A potential supply circuit that supplies a potential to one terminal, and a plurality of signal wirings that connect the one terminal and an output terminal of the potential supply circuit, and the signal wiring is the output terminal of the potential supply circuit a common signal wire connected to, so as to branch from the co communication No. wiring, have a plurality of individual signal lines that extend towards the respective drive elements, the gate capacitance of the transistor C, the potential supply Circuit Maximum serial constant when the wiring resistance of the signal wiring is represented by a product of both when the R between the output terminal and the one terminal of the drive element and τ (τ = RC), time constant
When the value is τmax, the minimum value is τmin, and the exposure time is T, (3τmax−3τmin) / (4T + 3τmax + 3τmin) <0.1 is established .

  An image forming apparatus according to an aspect of the present invention includes the optical print head and a photoconductor disposed to face the light emitting element array of the optical print head.

  According to the optical print head of one embodiment of the present invention, each driving element can drive the light emitting element without being influenced by the operation of the other driving element, and exposure by each light emitting element can be performed with a desired exposure amount. It can be carried out.

  According to the image forming apparatus of one embodiment of the present invention, an image with reduced print unevenness can be formed.

1 is a schematic diagram illustrating a configuration example of an image forming apparatus according to an embodiment of the present invention. (A), (b) is a schematic top view of the optical print head by embodiment of this invention. FIG. 3 is a circuit diagram illustrating a configuration example of a drive circuit unit in the optical print head of FIG. 2. It is a circuit diagram which shows the structural example of a reference voltage generation circuit. It is a circuit diagram which shows the connection state of a driving transistor and a correction transistor. It is a top view of the signal wiring which connects a reference voltage generation circuit and a drive circuit. It is a top view which shows typically the wiring which connects a reference voltage generation circuit and the transistor for a drive of each drive circuit. (A) is a schematic plan view of the optical print head, and (b) is a diagram for explaining a configuration of a reference voltage generation circuit, a common signal wiring, and an individual signal wiring between adjacent drive circuit units. .

  Hereinafter, embodiments of the present invention will be described in detail.

(Embodiment 1)
FIG. 1 shows the configuration of a multi-photosensitive drum type printer 1. The printer 1 includes, for example, four photosensitive drums 1a to 4a, developing devices 1b to 4b provided around the photosensitive drums 1a to 4a, and upper portions of the photosensitive drums 1a to 4a. LED print heads 1c to 4c as writing optical systems, a transfer belt 2 onto which latent images formed on the respective photosensitive drums 1a to 4a are sequentially transferred, and a registration roller for conveying recording paper onto the transfer belt 2 A pair 3 and a fixing roller pair 4 that receives the copied recording paper from the transfer belt 2 and performs fixing processing are provided.

  The LED print heads 1c to 4c as writing optical systems form latent images on the corresponding photosensitive drums 1a to 4a, and the latent images are copied onto the recording paper fed from the pair of registration rollers 3, The copied recording paper is sent to the fixing roller pair 4 where fixing processing is performed.

  As shown in FIG. 2A, the LED print head 1c includes a printed circuit board 8, a plurality of LED arrays 9 arranged on the printed circuit board 8, and a plurality of drive circuit units corresponding to the plurality of LED arrays 9. 11. The plurality of drive circuit units 11 drive the corresponding LED arrays 9 respectively. The LED array 9 has a plurality of LED elements 10 arranged in a row. The LED elements 10 are arranged in a straight line on the upper surface of the printed circuit board 8 as shown in FIG.

  Each LED element 10 has a plurality of terminal electrodes, and a predetermined power is applied through these terminal electrodes. The plurality of LED elements 10 can selectively emit light individually. Light emitted from the LED element 10 is applied to the external photosensitive drum 1a via the lens 1d, whereby a predetermined latent image is formed on the surface of the photosensitive drum 1a.

  Here, the wavelength of the light emitted by the LED element 10 may be in any range. The emission wavelength of the LED element 10 depends on the characteristics of the photosensitive drum, and when an α-Si drum is used as the photosensitive drum, for example, a 685 ± 10 nm one is used.

  2 shows the configuration of the LED print head 1c, the configuration of the LED print heads 2c to 4c is the same.

  The drive circuit unit 11 includes a plurality of drive circuits 12. The plurality of drive circuits 12 correspond to the plurality of LED elements 10. The plurality of drive circuits 12 apply predetermined power to the corresponding LED elements 10 based on a print signal from the outside to selectively cause the LED elements 10 to emit light individually. For example, when A4 size printing is performed, 65 8 mm LED arrays 9 are arranged on the printed circuit board 8, and thus the LED print heads 1 c to 4 c of 600 dpi each have 65 × 192 LED elements 10 mounted thereon. .

  The drive circuit unit 11 may be arranged on one side of the LED array 9 as shown in FIG. 2A, but is arranged on both sides of the LED array 9 as shown in FIG. Also good. In this case, the drive circuit unit 11 includes a first drive circuit unit 11 a and a second drive circuit unit 11 b provided on both sides of the LED array 9. The first drive circuit unit 11 a includes the drive circuit 12 corresponding to the even-numbered LED elements 10 of the LED array 9, and the second drive circuit unit 11 b corresponds to the odd-numbered LED elements 10 of the LED array 9. The drive circuit 12 is provided.

  Hereinafter, the configuration of the drive circuit unit 11 will be described in detail. As shown in FIG. 3, the drive circuit unit 11 includes a plurality of drive circuits 12-1 to 12 -m (m is an integer of 2 or more) corresponding to the plurality of LED elements 10, and a plurality of drive circuits 12. And a reference voltage generation circuit 13 connected to 12-m.

  The drive circuits 12-1,... 12-m have drive transistors Tr1, Tr2, Tr3, respectively. The driving transistors Tr1, Tr2, and Tr3 perform switching control of the LED element 10. Specifically, the drain terminal of the driving transistor Tr1 is connected to the LED element 10, and the gate terminal of the driving transistor Tr1 is connected to an inverter composed of the driving transistors Tr2 and Tr3. The inverter inverts the input signal and outputs the inverted signal to the gate terminal of the driving transistor Tr1. Here, the driving transistor Tr2 is, for example, a PMOS transistor, and the driving transistor Tr3 is, for example, an NMOS transistor. In the following, when distinguishing the m drive circuits, they are represented as drive circuit 12-1, drive circuit 12-2, and drive circuit 12-m. write.

  The reference voltage generation circuit 13 supplies a predetermined potential to the drain terminal of the driving transistor Tr3. When the driving transistor Tr3 is turned on, the drain voltage of the driving transistor Tr3 is applied to the gate terminal of the driving transistor Tr1. At this time, a current flows through the driving transistor Tr1, and the current is output from the output terminal 14. The LED element 10 emits light by this current.

As shown in FIG. 4, the reference voltage generation circuit 13 includes an operational amplifier 131, a transistor Tr4, a resistor 132, and a current mirror circuit 133. The operational amplifier 131 amplifies the reference voltage Vref and outputs it. This output signal is applied to the gate terminal of the transistor Tr4. Thus, when the transistor Tr4 is turned on, a current flows through the transistor Tr4 and a current Iref flows through the resistor 132. The current value of the current Iref depends on the resistance value Rref of the resistor 132. The current mirror circuit 133 causes a current Irefout having the same current value as the current Iref to flow through the drain terminal of the driving transistor Tr3. That is, by determining the resistance value Rref, the current Irefout flowing through the drain terminal of the driving transistor Tr3 can be determined.

  Further, as shown in FIG. 5, the drive circuit 12 includes n (n is an integer of 2 or more) correction transistors Tr1k (k = 2 to n + 1), Tr2k, and Tr3k. Similarly to the driving transistors Tr1, Tr2, Tr3, the correction transistors Tr1k, Tr2k, Tr3k are connected to the LED element 10 at the drain terminal of the correction transistor Tr1k, and the gate terminal of the correction transistor Tr1k is used for correction. The inverter is composed of transistors Tr2k and Tr3k. When the correction transistor Tr1k is turned on, the current flowing through the correction transistor Tr1k is added to the current flowing through the drive transistor Tr1 and output from the output terminal 14. The LED element 10 emits light by the current output from the output terminal 14. Note that the drain terminal of the correction transistor Tr3k is also supplied with a predetermined potential by another reference voltage generation circuit having the same configuration as that of the reference voltage generation circuit 13. In addition, the drive circuit 12 has various other circuit configurations, but only those necessary for the description are described and the rest are omitted.

  6 is a top view schematically showing signal wirings connecting the output terminals of the reference voltage generation circuit 13 of FIG. 3 and the drain terminals of the driving transistors Tr3 of the driving circuits 12-1,... 12-m. is there. As shown in FIG. 6, the output terminal of the reference voltage generation circuit 13 and the drain terminals of the plurality of driving transistors Tr3 are connected separately. Specifically, the signal line includes a common signal line 14 connected to the output terminal of the potential supply circuit 13 and a plurality of signal lines extending toward the driving transistors Tr3 so as to branch from the common signal line 14. Individual signal wiring 15.

  The conventional driving circuit has a common wiring extending along the arrangement direction of the driving transistors Tr3 (indicated by an arrow D in FIG. 5), and the common wiring and the drain terminals of the plurality of driving transistors Tr3 are connected to each other. Since the signal lines are connected using different signal lines, the individual signal lines 15 are not branched from the common signal lines 14 unlike the signal lines of the optical print head according to the present embodiment. Of the plurality of individual signal wirings 15, in particular, for the plurality of individual signal wirings 15 including the individual signal wiring 15 having a long distance between the common signal wiring 14 and the driving transistor Tr 3, the direction in which the driving transistors Tr 3 are arranged. Each has an extended portion 15a extending along the line.

  In an electrophotographic system, the density of printing is determined by exposure energy, and is expressed by exposure illuminance (= LED drive current) × lighting time (= time for turning on driving transistors). That is, in order to perform exposure with each LED element 10 with a desired exposure amount, it is necessary to control the LED drive current and the ON time of the drive transistor Tr1.

  Here, the LED drive current can be adjusted to a predetermined level by the correction transistor Tr1k in the drive circuit 12.

On the other hand, regarding the lighting time, it is necessary to control the rise time of the drain voltage of the driving transistor Tr1. As shown in FIG. 3, the driving transistor Tr1 is controlled by an inverter composed of the driving transistors Tr2 and Tr3. Therefore, in order to control the rise time of the drain voltage of each driving transistor Tr1, the driving transistor T1
It is necessary to control the rise time of the drain voltage of the driving transistor Tr3 applied to the gate terminal of r1.

  The rise time of the drain voltage of the driving transistor Tr3 depends on the wiring resistance of the signal wiring that connects the output terminal of the reference voltage generation circuit 13 and the drain terminal of each driving transistor Tr3. In the optical print head 1 c according to the present embodiment, as described above, the signal wiring is connected to the output terminal of the potential supply circuit 13 and the driving signal is branched so as to branch from the common signal wiring 14. Since the plurality of individual signal wirings 15 extending toward the transistor Tr3 are provided, the wiring resistance of the individual signal wiring 15 connected to each driving transistor Tr3 can be individually determined as compared with the conventional signal wiring. it can. Therefore, the operations of the plurality of driving transistors Tr3 can be individually controlled, and the operation of each driving transistor Tr3 can be suppressed from being influenced by the operations of the other driving transistors Tr3.

  Further, the wiring resistance of the individual signal wiring 15 connected to each driving transistor Tr3 can be changed, for example, by changing the wiring width of the individual signal wiring 15 and the conductive material used as the individual signal wiring. For example, the individual signal wiring 15 having a longer distance (hereinafter also referred to as “wiring length”) between the common signal wiring 14 and the drain terminal of the driving transistor Tr3 has a larger wiring width. The wiring resistance can be the same or substantially the same as that of the individual signal wiring 15 having a short wiring length. That is, the wiring resistance between the potential supply circuit 13 and the drain terminal of each driving transistor Tr3 can be made the same or substantially the same, and the deviation of the rising speed of the drain voltage among the plurality of driving transistors Tr3 is reduced. can do. As a result, it is possible to reduce the deviation of the rising speed of the drain voltages of the plurality of driving transistors Tr1, and it is possible to perform the exposure by each LED element 10 with a desired exposure amount.

Further, it is known that, in a normal electrophotographic system, printing unevenness becomes remarkable when the integrated exposure amount exceeds 10%. Here, when the LED energization current is I and the exposure time is T, the exposure energy E (= transition part (rising part) + stable part (flat part)) for forming a latent image is expressed by the following equation (1). Are in a relationship.
E ∝ 3τI / 2 + I × (T-3τ)
Ｉ I × (3τ / 2 + (T-3τ))
Ｉ I × (T-3τ / 2) (1)
Note that τ is a time constant when the gate capacitance is C and the wiring resistance is R, and is expressed by τ = RC (95% transition time is linearly approximated by 3τ).

Since the ratio of the deviation (max−min) / 2 of the exposure energy E to the central value (max + min) / 2 of the exposure energy E is 10% or less when the integrated exposure amount is 10% or less, the time constant If the maximum value of τmax is τmax and the minimum value is τmin,
{3τmax / 2-3τmin / 2} / {2T + 3τmax / 2 + 3τmin / 2} <0.1
{3τmax-3τmin} / {4T + 3τmax + 3τmin} <0.1 (2)
Holds. Therefore, it is preferable to form the signal wiring so that Expression (2) is satisfied. The maximum value τmax of the time constant is the maximum wiring resistance value Rmax and gate capacitance C among the wiring resistance values of the signal wiring between the output terminal of the potential supply circuit 13 and the drain terminal of each driving transistor Tr3. The minimum value τmin of the time constant is the minimum wiring resistance value Rmin and the gate among the wiring resistance values of the signal wiring between the output terminal of the potential supply circuit 13 and the drain terminal of each driving transistor Tr3. The product of the capacitance C.

Further, since the signal wirings can be regarded as having the same overall thickness, the length and wiring width of the longest individual signal wiring 15 are Lmax and Wmax, respectively, and the length of the individual signal wiring 15 is If the length and the wiring width of the shortest are Lmin and Wmin, respectively,
{Lmax / Wmax-Lmin / Wmin} / {Lmax / Wmax + Lmin / Wmin} <0.1 (3)
Can be approximated as Therefore, it is preferable to form the signal wiring so that Expression (3) is satisfied.

  The individual signal wiring 15 that connects the drain terminal of each driving transistor Tr3 and the common signal wiring 14 includes a first individual signal wiring and a second individual signal wiring, and the first individual signal wiring and the second individual signal wiring. It is also possible to reduce the resistance value between the drain terminal of each driving transistor Tr3 and the common signal line 14 by connecting the individual signal lines in parallel.

  FIG. 7 is a top view schematically showing individual signal wirings connecting the common signal wiring 14 and the drain terminals of the driving transistors Tr13. As shown in FIG. 7, the common signal wiring 14 and the drain terminal of the driving transistor Tr3 of the driving circuit 12-p (p is an integer of 1 or more) are the first individual signal wiring 16-pa and the second individual signal wiring 16 Connected by -pb. The first and second individual signal wirings 16-pa and 16-pb are connected in parallel. For example, the common signal line 14 and the drain terminal of the drive transistor Tr3 of the drive circuit 12-m are connected by a first individual signal line 16-pa and a second individual signal line 16-pb connected in parallel.

  Note that the drive circuit unit 11 may be configured as an IC chip. Further, when a silicon substrate is used instead of the printed board 8, elements such as transistors and wirings may be formed on the silicon substrate. In these cases, a wiring layer in which wirings 15-pa and 15-pb are formed in an IC chip or on a silicon substrate is laminated via an insulating layer, and the two wirings are formed by through conductors or the like provided in the insulating layer. If the layers are connected, a configuration in which the two individual signal wirings 16-pa and 16-pb are connected in parallel can be easily realized.

  As described above, since the plurality of individual signal wirings 15 extending toward the respective driving transistors Tr3 are provided so as to branch from the common signal wiring 14 connected to the output terminal of the potential supply circuit 13, a plurality of individual signal wirings 15 are provided. Since the supply of the reference voltage to the drain terminal of the driving transistor Tr3 is performed individually for each driving transistor Tr3, it is possible to suppress the influence of the operation of the other driving transistor Tr3.

  Further, since the common signal wiring 14 and the drain terminal of each driving transistor Tr3 are connected by the individual signal wiring 15 connected in parallel, the driving transistor Tr3 of each driving transistor Tr3 is more than the case where the conventional signal wiring is used. The resistance of the wiring connected to the drain terminal can be lowered. Thereby, the rising speed of the output (drain voltage) of the driving transistor Tr1 of each driving circuit 12 can be increased.

  Note that the wiring width of at least one of the individual signal wirings 16-pa and 16-pb may be adjusted according to the distance between the common signal wiring 14 and the drain terminal of the driving transistor Tr3, that is, the signal wiring length. . For example, the longer the signal wiring length, the larger the wiring width of at least one of the individual signal wirings connected in parallel.

  According to this configuration, the difference in wiring resistance due to the distance between the reference voltage generation circuit 13 and the driving transistor Tr3 is reduced, and a constant current can be supplied to the LED elements 10 corresponding to the plurality of driving transistors Tr3. it can. That is, the exposure amount by the plurality of LEF elements 10 can be made constant.

  Further, as shown in FIG. 8, in the optical printer head 1c, the reference voltage generation circuit 13, the common signal wiring of the signal wiring, and the individual signal wiring between the adjacent driving circuit units 11-1 and 11-2. The arrangement may be symmetric (line symmetric). That is, in FIG. 8, the reference voltage generation circuit 13, the common signal wiring 14, and the individual signal wiring 15 may be arranged symmetrically with respect to the straight line CC. Accordingly, the LED element 12a at the right end of the drive circuit unit 11-1 in FIG. 8A and the LED element 12b at the left end of the drive circuit unit 11-2, that is, between adjacent LED elements 12a and 12b. Thus, the wiring length between the reference voltage generation circuit 13 and the drain terminal of the driving transistor Tr3 can be made the same or substantially the same, and the deviation of the rising speed of the drain voltage between the adjacent driving transistors Tr3 is reduced. can do. The same description applies between the adjacent drive circuit units 11-2 and 11-3. As a result, not only the deviation of the exposure amount between the LED elements 12 in one LED array 9 but also the deviation of the exposure amount between the LED elements 12 in the adjacent LED array 9 can be suppressed. FIG. 8 shows a configuration example in which one drive circuit unit 11 is associated with one LED array 9, but a plurality of drive circuit units 11 are associated with one LED array 9. Even in this case, it is preferable that the arrangement of the potential supply circuit 13, the common signal wiring 14, and the individual signal wiring 15 is symmetrical between the adjacent drive circuit units 11. In this case, the deviation of the exposure amount between the LED elements 12 in one LED array 9 can be suppressed.

  In the above description, the 600 dpi optical print head has been described. However, the same configuration can be applied to a 1200 dpi optical print head.

The printed circuit board 8 may be made of any material, but is preferably made of an electrically insulating material such as glass epoxy resin. A plurality of wiring conductors, a plurality of LED arrays 9 and the like are supported on the upper surface of the printed board 8.
The LED element 10 is manufactured by a known semiconductor manufacturing technique. Specifically, when manufacturing a GaAsP-based LED array, for example, a wafer made of GaAs is first heated in a furnace to a high temperature and an appropriate amount of AsH ₃ (arsine), PH ₃ (phosphine), and Ga (gallium) is used. A single crystal of n-type semiconductor GaAsP (gallium-arsenic-phosphorus) is grown on the surface of the wafer by contacting the gas containing it, and then a windowed film of Si ₃ N ₄ (silicon nitride) is coated on the surface of the GaAsP single crystal. A semiconductor wafer having a pn junction is formed by exposing a Zn (zinc) gas to the window and diffusing Zn into a part of the n-type semiconductor GaAsP single crystal to form a p-type semiconductor. Is manufactured by dicing a large number of LED elements 10 for each LED element group, and cutting out the LED array 9 from a single semiconductor wafer in large quantities. It is. As another semiconductor manufacturing method, a MOCVD method is used to grow a crystal having a required wavelength by introducing AsH ₃ , trimethylgallium, and trimethylaluminum into a GaAs substrate or Si substrate in the form of gas, and photoetching is performed. There is a method of manufacturing by performing individual light emitter separation.

  Moreover, the method of mounting the LED array 9 on the printed circuit board 8 is as follows, for example. A conductive adhesive such as an adhesive liquid or Ag-pace is applied to a predetermined region on the upper surface of the printed circuit board 8 to which the wiring conductor is attached, that is, a region to which the LED array 9 is attached. Apply using a dispenser. Then, a plurality of LED arrays 9 are arranged in a line on the adhesive application surface, heat is applied to the anisotropic conductive adhesive in a state where each LED array 9 is pressed against the printed circuit board 8, and the resin in the adhesive is removed. The LED array 9 is attached to the upper surface of the printed circuit board 8 by thermosetting.

Next, the photosensitive drums 1a to 4a will be described. The photosensitive drums 1a to 4a can form a latent image with light from the print head for writing, and can print on a recording sheet with the formed latent image. The photosensitive drums 1a to 4a are arranged substantially parallel to the LED print heads 1c to 4c so as to be separated from the LED print heads 1c to 4c by a predetermined distance.

  Each of the photosensitive drums 1a to 4a has a structure in which a photoconductive layer made of an inorganic semiconductor such as amorphous silicon or an organic semiconductor is attached to the outer surface of a cylindrical base made of aluminum metal or the like. When the photoconductive layer is rotated around an axis by a motor or the like (not shown) and the photoconductive layer is irradiated with light from the print head, the specific resistance of the photoconductive layer is drastically reduced to form a predetermined latent image on the photoconductive layer. Form. The latent images formed on the photosensitive drums 1a to 4a are converted into a toner image through a development process, and a predetermined image is recorded by transferring and fixing the toner image on a recording sheet.

  The present invention is not limited to the above-described embodiment, and various modifications and improvements can be made without departing from the gist of the present invention. For example, in the above-described embodiment, the present invention is applied to an LED print head. Although described, other print heads, for example, other print heads such as an EL head, a plasma dot head, a liquid crystal shutter head, a fluorescent head, and a PLZT can be applied.

1: Printers 1a to 4a: Photosensitive drums 1b to 4b: Developing devices 1c to 4c: LED print head 2: Transfer belt 3: Registration roller pair 4: Fixing roller pair 8: Print substrate 8
9: LED array 10: LED element 11: drive circuit unit 12: drive circuit 13: reference voltage generation circuit 14: common signal wiring 15: individual signal wiring

Claims (7)

An optical print head comprising a substrate, a light emitting element array composed of a plurality of light emitting elements arranged in a row on the substrate, and a drive circuit unit for driving the light emitting element array provided on the substrate. ,
The drive circuit unit includes a plurality of drive elements configured by transistors arranged in a row corresponding to the plurality of light emitting elements, and a potential supply circuit that supplies a potential to one terminal of the plurality of drive elements. A plurality of the one terminal and a signal wiring connecting the output terminal of the potential supply circuit,
The signal wiring includes a common signal wiring connected to the output terminal of the potential supply circuit and a plurality of individual signal wirings extending toward the driving elements so as to branch from the common signal wiring. And
A time constant represented by a product of the transistor, where C is the gate capacitance, and R is the wiring resistance of the signal wiring between the output terminal of the potential supply circuit and one terminal of the drive element is τ ( (τ = RC) where the maximum value of the time constant is τmax, the minimum value is τmin, and the exposure time is T, (3τmax−3τmin) / (4T + 3τmax + 3τmin) <0.1
The optical print head is formed so that   2. The optical print head according to claim 1, wherein each of the plurality of individual signal wirings includes a plurality of first signal wirings each having an extending portion extending along an arrangement direction of the driving elements.   3. The optical print head according to claim 1, wherein the plurality of individual signal wirings have a larger wiring width as a distance between an output terminal of the potential supply circuit and one terminal of the driving element is longer. The plurality of individual signal wirings correspond to the first individual signal wiring provided in the first wiring layer and the first individual signal wiring provided in the second wiring layer located above the first wiring layer. Each having a second individual signal wiring
The optical print head according to claim 1, wherein the first individual signal wiring and the second individual signal wiring are connected in parallel. A plurality of the drive circuit units are arranged,
2. The optical print head according to claim 1, wherein the arrangement of the potential supply circuit, the common signal wiring, and the individual signal wiring is symmetrical between the adjacent drive circuit units. The optical print head according to claim 5, wherein the plurality of drive circuit units are arranged corresponding to the light emitting element array. An optical print head according to any one of claims 1 to 6,
An image forming apparatus including a photoconductor disposed to face the light emitting element array.

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