JP5664028B2 - Manufacturing method of electronic device - Google Patents

Manufacturing method of electronic device Download PDF

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JP5664028B2
JP5664028B2 JP2010195004A JP2010195004A JP5664028B2 JP 5664028 B2 JP5664028 B2 JP 5664028B2 JP 2010195004 A JP2010195004 A JP 2010195004A JP 2010195004 A JP2010195004 A JP 2010195004A JP 5664028 B2 JP5664028 B2 JP 5664028B2
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aggregate
metal particles
electronic device
base
metal
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JP2012054358A (en
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水越 正孝
正孝 水越
阿部 英之
英之 阿部
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Fujitsu Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]

Description

本発明は、電子装置の製造方法に関し、例えば、第1基体と第2基体とを接合する電子装置の製造方法に関する。   The present invention relates to a method for manufacturing an electronic device, for example, a method for manufacturing an electronic device that joins a first base and a second base.

基体同士を接合する(例えば、基板に半導体チップを接合する)方法として、はんだを用いることが知られている。はんだは、接合材料としては優れているが熱伝導率は高くない。また、はんだは温度サイクル試験において劣化する。銀等の金属粒子に有機接着材料を添加した金属にペーストを用い基体同士を接合することが知られている。銀は熱伝導率が最も高い金属であるが、この方法では、銀ペーストの熱伝導率は低い。そこで、高熱伝導率を得るために、金属粒子を有機材料を介在させずに焼結させバンプを形成することが知られている(例えば、特許文献1)。   It is known to use solder as a method for bonding the substrates (for example, bonding a semiconductor chip to a substrate). Solder is excellent as a bonding material, but its thermal conductivity is not high. Solder also deteriorates in a temperature cycle test. It is known that substrates are bonded to each other by using a paste on a metal obtained by adding an organic adhesive material to metal particles such as silver. Silver is the metal with the highest thermal conductivity, but with this method the thermal conductivity of the silver paste is low. Therefore, in order to obtain high thermal conductivity, it is known to form bumps by sintering metal particles without interposing an organic material (for example, Patent Document 1).

特開2007−19144号公報JP 2007-19144 A

しかしながら、金属粒子の表面に酸化物が形成されていると、金属粒子同士を接合することが難しい。このため、基体同士の接合が弱くなってしまう。一方、金属粒子として酸化し難い金属として例えば金を用いると、安価にすることができない。   However, when oxides are formed on the surfaces of the metal particles, it is difficult to join the metal particles together. For this reason, the bonding between the substrates is weakened. On the other hand, if, for example, gold is used as the metal that is difficult to oxidize as the metal particles, the cost cannot be reduced.

本電子装置の製造方法は、基体同士の強固な接合を形成することを目的とする。   An object of the manufacturing method of the electronic device is to form a strong bond between the substrates.

例えば、第1基体と第2基体とを、金属粒子と有機溶剤とを含む金属ペーストを介し接着させる工程と、前記金属ペーストの有機溶剤を除去することにより、前記金属粒子の凝集体を形成する工程と、前記凝集体を構成する金属粒子の表面を、還元性ガスを用い還元させる工程と、前記凝集体を構成する金属粒子の表面を還元させる工程の後、前記第1基体と前記第2基体とを押圧し、前記第1基体と前記第2基体とを、前記金属粒子間の界面及び間隙を含む前記凝集体の状態を維持したまま前記凝集体を介して接合する工程と、を含むことを特徴とする電子装置の製造方法を用いることができる。
For example, an aggregate of the metal particles is formed by bonding the first substrate and the second substrate via a metal paste containing metal particles and an organic solvent, and removing the organic solvent of the metal paste. After the step, the step of reducing the surface of the metal particles constituting the aggregate using a reducing gas, and the step of reducing the surface of the metal particles constituting the aggregate, the first base and the second Pressing the substrate, and joining the first substrate and the second substrate through the aggregate while maintaining the state of the aggregate including the interface and gap between the metal particles. An electronic device manufacturing method characterized by this can be used.

本電子装置の製造方法によれば、基体同士の強固な接合を形成することができる。   According to the method for manufacturing the electronic device, it is possible to form a strong bond between the substrates.

図1(a)から図1(d)は実施例1に係る電子装置の製造方法を示す断面図である。FIG. 1A to FIG. 1D are cross-sectional views illustrating a method for manufacturing an electronic device according to the first embodiment. 図2は、実施例2に係る電子装置の製造方法を示す断面図(その1)である。FIG. 2 is a cross-sectional view (part 1) illustrating the method of manufacturing the electronic device according to the second embodiment. 図3は、実施例2に係る電子装置の製造方法を示す断面図(その2)である。FIG. 3 is a sectional view (No. 2) illustrating the method for manufacturing the electronic device according to the second embodiment. 図4は、実施例2に係る電子装置の製造方法を示す断面図(その3)である。FIG. 4 is a sectional view (No. 3) illustrating the method for manufacturing the electronic device according to the second embodiment. 図5は、実施例2に係る電子装置の製造方法を示す断面図(その4)である。FIG. 5 is a sectional view (No. 4) illustrating the method for manufacturing the electronic device according to the second embodiment. 図6は、実施例2に係る電子装置の製造方法を示す断面図(その5)である。FIG. 6 is a sectional view (No. 5) illustrating the method for manufacturing the electronic device according to the second embodiment. 図7は、実施例2に係る電子装置の製造方法を示す断面図(その6)である。FIG. 7 is a sectional view (No. 6) illustrating the method for manufacturing the electronic device according to the second embodiment. 図8は、各工程における金属ペーストまたは凝集体の温度を示す図である。FIG. 8 is a diagram showing the temperature of the metal paste or aggregate in each step. 図9(a)は、凝集体を潰す前、図9(b)は、凝集体を潰した後の凝集体のSEM画像の模式図である。9A is a schematic diagram of an SEM image of the aggregate before the aggregate is crushed, and FIG. 9B is a schematic diagram of the SEM image of the aggregate after the aggregate is crushed. 図10は、実施例2に係る電子装置を含むモジュールの例である。FIG. 10 is an example of a module including the electronic device according to the second embodiment. 図11(a)は実施例3に係る電子装置の断面図、図11(b)は、図11(a)のバンプの拡大図である。FIG. 11A is a cross-sectional view of the electronic device according to the third embodiment, and FIG. 11B is an enlarged view of the bump in FIG.

以下、図面を参照に実施例について説明する。   Embodiments will be described below with reference to the drawings.

図1(a)から図1(d)は実施例1に係る電子装置の製造方法を示す断面図である。図1(a)のように、第1基体10aと第2基体20aとを、金属粒子32と有機溶剤34とを含む金属ペースト30を介し接着させる。図1(b)のように、金属ペースト30の有機溶剤34を除去することにより、金属粒子32の凝集体36を形成する。図1(c)のように、凝集体36を構成する金属粒子32の表面を還元性ガスを用い還元させる。図1(d)のように、第1基体10aと第2基体20aとを矢印45のように押圧することにより、第1基体10aと第2基体20aとを凝集体36を用い接合する。実施例1によれば、図1(d)のように、凝集体36は、金属粒子32を含み隙間があるため、隙間のない一体の金属よりも変位し易く、温度サイクルによる劣化を抑制できる。また、金属粒子36の表面の酸化物を除去した後、金属粒子32同士を接合することができる。よって、第1基体10aと第2基体20aとの接合を強固にすることができる。   FIG. 1A to FIG. 1D are cross-sectional views illustrating a method for manufacturing an electronic device according to the first embodiment. As shown in FIG. 1A, the first base 10a and the second base 20a are bonded via a metal paste 30 containing metal particles 32 and an organic solvent 34. As shown in FIG. 1B, the aggregate 36 of the metal particles 32 is formed by removing the organic solvent 34 of the metal paste 30. As shown in FIG. 1C, the surface of the metal particles 32 constituting the aggregate 36 is reduced using a reducing gas. As shown in FIG. 1D, the first base 10a and the second base 20a are pressed as shown by an arrow 45 to join the first base 10a and the second base 20a using the aggregate 36. According to the first embodiment, as shown in FIG. 1D, the aggregate 36 includes the metal particles 32 and has a gap, so that the aggregate 36 is more easily displaced than an integral metal without a gap and can suppress deterioration due to a temperature cycle. . Moreover, after removing the oxide on the surface of the metal particles 36, the metal particles 32 can be joined together. Therefore, the bonding between the first base 10a and the second base 20a can be strengthened.

実施例2は、第1基体がDCB(Direct Copper Bonding)基板であり、第2基体がIGBT(Insulated Gate Bipolar Transistor)を備える半導体素子の例である。図2から図7は、実施例2に係る電子装置の製造方法を示す断面図である。図2のように、DCB基板10の表面に金属ペースト30を配置する。DCB基板10は、例えば金属層12、絶縁層14および配線層16を含む。金属層12および配線層16は、例えば主に銅を含む金属である。絶縁層14は例えばセラミックであり、例えば酸化アルミニウムを主に含む。金属ペースト30は、金属粒子32と有機溶剤34とを含む。金属粒子32は、例えば銀または銅を主に含む。有機溶剤32としては、例えばエステルアルコール、ターピネオール、パインオイル、ブチルカルビトールアセテート、ブチルカルビトール、カルビトールを用いることができる。これらの有機溶剤は比較的低温において乾燥することができる。また、金属ペースト30は、金属粒子32の凝集防止のため、アクリル系樹脂、セルロース系樹脂、アルキッド樹脂の少なくとも一種を含んでいてもよい。例えば、アクリル系樹脂としてメタクリル酸メチル重合体を、セルロース系樹脂としてエチルセルロースを、アルキッド樹脂として無水フタル酸樹脂を用いることができる。金属ペースト30の配置方法としては、例えば印刷法またはディスペンス法を用いることができる。金属ペースト30の厚さは例えば30μmである。   Example 2 is an example of a semiconductor element in which the first base is a DCB (Direct Copper Bonding) substrate and the second base is provided with an IGBT (Insulated Gate Bipolar Transistor). 2 to 7 are cross-sectional views illustrating the method for manufacturing the electronic device according to the second embodiment. As shown in FIG. 2, the metal paste 30 is disposed on the surface of the DCB substrate 10. The DCB substrate 10 includes, for example, a metal layer 12, an insulating layer 14, and a wiring layer 16. The metal layer 12 and the wiring layer 16 are, for example, a metal mainly containing copper. The insulating layer 14 is made of ceramic, for example, and mainly contains aluminum oxide, for example. The metal paste 30 includes metal particles 32 and an organic solvent 34. The metal particles 32 mainly contain silver or copper, for example. As the organic solvent 32, for example, ester alcohol, terpineol, pine oil, butyl carbitol acetate, butyl carbitol, carbitol can be used. These organic solvents can be dried at relatively low temperatures. Further, the metal paste 30 may contain at least one of an acrylic resin, a cellulose resin, and an alkyd resin for preventing aggregation of the metal particles 32. For example, methyl methacrylate polymer can be used as the acrylic resin, ethyl cellulose can be used as the cellulose resin, and phthalic anhydride resin can be used as the alkyd resin. As a method for arranging the metal paste 30, for example, a printing method or a dispensing method can be used. The thickness of the metal paste 30 is, for example, 30 μm.

図3のように、DCB基板10と半導体素子20とを金属ペースト30を介し接着させる。半導体素子20は、例えば背面電極22、半導体基板24および表面電極26を含む。背面電極22は例えばチタン、ニッケルまたは金を含む。表面電極26は、例えば主にアルミニウムを含む。半導体基板24は主にシリコンを含む。半導体基板24にはIGBTが形成され、表面電極26および背面電極22は、IGBTに電気的に接続されている。DCB基板10と半導体素子20とを金属ペースト30を介し接着させる際は、金属ペースト30の粘度に応じた圧力を用いDCB基板10と半導体素子20とを押圧することが好ましい。DCB基板10と半導体素子20とを例えば数MPaの圧力で押圧することができる。   As shown in FIG. 3, the DCB substrate 10 and the semiconductor element 20 are bonded through a metal paste 30. The semiconductor element 20 includes, for example, a back electrode 22, a semiconductor substrate 24, and a surface electrode 26. The back electrode 22 includes, for example, titanium, nickel, or gold. The surface electrode 26 mainly contains aluminum, for example. The semiconductor substrate 24 mainly contains silicon. An IGBT is formed on the semiconductor substrate 24, and the front electrode 26 and the back electrode 22 are electrically connected to the IGBT. When bonding the DCB substrate 10 and the semiconductor element 20 via the metal paste 30, it is preferable to press the DCB substrate 10 and the semiconductor element 20 using a pressure corresponding to the viscosity of the metal paste 30. For example, the DCB substrate 10 and the semiconductor element 20 can be pressed with a pressure of several MPa.

図4のように、金属ペースト30の有機溶剤34を除去し、金属粒子32の凝集体36を形成する。有機溶剤34を除去する方法としては、例えば金属ペースト30を加熱することにより、有機溶剤34を揮発分離させる。例えば、200℃の温度で10分間加熱することができる。金属ペースト30の加熱を、例えば減圧下で行なうことにより、より有機溶剤34を揮発させることができる。また、金属ペースト30の加熱を、酸素を含有しない雰囲気中で行なうことにより、金属粒子32の表面のさらなる酸化を抑制することができる。凝集体36においては、金属粒子32同士は例えばファンデルワールス力により結合している。以上により、金属粒子32同士が接し、仮焼結される。凝集体36中には、例えば全体の体積に対し数10%の隙間が形成されている。   As shown in FIG. 4, the organic solvent 34 of the metal paste 30 is removed to form an aggregate 36 of the metal particles 32. As a method for removing the organic solvent 34, the organic solvent 34 is volatilized and separated by, for example, heating the metal paste 30. For example, it can be heated at a temperature of 200 ° C. for 10 minutes. The organic solvent 34 can be further volatilized by heating the metal paste 30 under reduced pressure, for example. Further, by performing heating of the metal paste 30 in an atmosphere not containing oxygen, further oxidation of the surface of the metal particles 32 can be suppressed. In the aggregate 36, the metal particles 32 are bonded together by, for example, van der Waals force. As described above, the metal particles 32 are in contact with each other and temporarily sintered. In the aggregate 36, for example, a gap of several tens of percent is formed with respect to the entire volume.

図5のように、凝集体36により接着されたDCB基板10および半導体素子20を容器42中に導入する。凝集体36を構成する金属粒子32の表面を還元性ガス44を用い還元させる。還元性ガス44が凝集体36の金属粒子32間の隙間に到達し、金属粒子32に形成されている酸化物を還元する。還元性ガス44を凝集体36の隙間に容易に到達させるため、容器42内を減圧(例えば10Pa)し、還元性ガス44を導入することができる。容器42内の減圧と還元性ガス44の導入を複数回繰り返すと、金属粒子32の表面をより還元することができる。さらに、ヒータ40を用い凝集体36の表面を加熱させることにより、金属粒子32の表面をより還元することができる。凝集体36の温度は、例えば150℃から200℃とすることができる。例えば175℃とすることができる。還元性ガス44としては、例えばギ酸を含むガスとすることができる。例えば、窒素等の不活性ガスにギ酸ガスを添加したガスを還元性ガス44とすることができる。ギ酸ガスの濃度は例えば10ppmから10%とすることができる。ギ酸ガスは130℃以上で還元性を有するため、凝集体36の温度は、130℃以上が好ましい。還元性ガスとしては、ギ酸ガス以外にもプラズマ水素またはラジカル水素を含むガスとすることもできる。   As shown in FIG. 5, the DCB substrate 10 and the semiconductor element 20 bonded by the aggregate 36 are introduced into the container 42. The surface of the metal particles 32 constituting the aggregate 36 is reduced using a reducing gas 44. The reducing gas 44 reaches the gaps between the metal particles 32 of the aggregate 36 and reduces the oxide formed on the metal particles 32. In order for the reducing gas 44 to easily reach the gaps between the aggregates 36, the inside of the container 42 can be decompressed (for example, 10 Pa), and the reducing gas 44 can be introduced. If the decompression in the container 42 and the introduction of the reducing gas 44 are repeated a plurality of times, the surface of the metal particles 32 can be further reduced. Furthermore, the surface of the metal particles 32 can be further reduced by heating the surface of the aggregate 36 using the heater 40. The temperature of the aggregate 36 can be set to 150 ° C. to 200 ° C., for example. For example, it can be 175 degreeC. As the reducing gas 44, for example, a gas containing formic acid can be used. For example, a gas obtained by adding a formic acid gas to an inert gas such as nitrogen can be used as the reducing gas 44. The concentration of formic acid gas can be, for example, 10 ppm to 10%. Since formic acid gas has a reducing property at 130 ° C. or higher, the temperature of the aggregate 36 is preferably 130 ° C. or higher. The reducing gas may be a gas containing plasma hydrogen or radical hydrogen in addition to formic acid gas.

図6のように、例えば荷重印加治工具46を用い、DCB基板10と半導体素子20とを押圧する。凝集体36の各金属粒子32が結合し凝集体36が潰れる。これにより、DCB基板10と半導体素子20とが凝集体36を用い接合される。例えば、凝集体36の金属粒子32間の隙間は、DCB基板10と半導体素子20とを押圧する前の半分以下となる。金属粒子32間に隙間が形成されているため、凝集体36に加えられる圧力が金属粒子32の材料の降伏応力以下であっても、凝集体36を潰すことができる。押圧の圧力が小さくともよいため、荷重印加治工具46を小型化できる。例えば、金属粒子32が銀の場合、押圧の圧力を10MPa程度にすることができる。DCB基板10と半導体素子20とを押圧する際は、凝集体36をヒータ40を用い加熱することが好ましい。これにより、金属粒子32をより強固に接合させることができる。金属粒子32が銀の場合、凝集体36の温度は例えば250℃とすることができる。また、押圧の時間は例えば10〜30分とすることができる。   As shown in FIG. 6, the DCB substrate 10 and the semiconductor element 20 are pressed using, for example, a load application jig 46. The metal particles 32 of the aggregate 36 are combined to collapse the aggregate 36. As a result, the DCB substrate 10 and the semiconductor element 20 are bonded using the aggregate 36. For example, the gap between the metal particles 32 of the aggregate 36 is less than half before pressing the DCB substrate 10 and the semiconductor element 20. Since gaps are formed between the metal particles 32, the aggregate 36 can be crushed even if the pressure applied to the aggregate 36 is equal to or lower than the yield stress of the material of the metal particles 32. Since the pressing pressure may be small, the load applying jig 46 can be downsized. For example, when the metal particles 32 are silver, the pressing pressure can be about 10 MPa. When pressing the DCB substrate 10 and the semiconductor element 20, it is preferable to heat the aggregate 36 using the heater 40. Thereby, the metal particle 32 can be joined more firmly. When the metal particles 32 are silver, the temperature of the aggregate 36 can be set to 250 ° C., for example. Moreover, the time of a press can be made into 10 to 30 minutes, for example.

金属粒子32として銀を用い5mm×5mmの基板の半導体素子を用いDCB基板10との接合強度を測定した。図6の工程を窒素雰囲気中で行った場合、DCB基板10と半導体素子20との接合強度は約200Nである。一方、図6の工程を約10Paに減圧して行なった場合、DCB基板10と半導体素子20との接合強度は約400Nである。このように、DCB基板10と半導体素子20とを押圧する際は、容器42内を減圧(例えば真空)にすることが好ましい。窒素雰囲気等の大気圧において、押圧を行った場合、凝集体36の金属粒子32の隙間に窒素ガス等のガスがトラップする。これにより、金属粒子32間の金属接合を阻害する。よって、DCB基板10と半導体素子20との接合強度が低下するものと考えられる。   The bonding strength with the DCB substrate 10 was measured using a semiconductor element of a 5 mm × 5 mm substrate using silver as the metal particles 32. When the process of FIG. 6 is performed in a nitrogen atmosphere, the bonding strength between the DCB substrate 10 and the semiconductor element 20 is about 200N. On the other hand, when the process of FIG. 6 is performed at a reduced pressure of about 10 Pa, the bonding strength between the DCB substrate 10 and the semiconductor element 20 is about 400N. Thus, when the DCB substrate 10 and the semiconductor element 20 are pressed, the inside of the container 42 is preferably decompressed (for example, vacuum). When pressing is performed at an atmospheric pressure such as a nitrogen atmosphere, a gas such as nitrogen gas is trapped in the gap between the metal particles 32 of the aggregate 36. Thereby, metal joining between the metal particles 32 is inhibited. Therefore, it is considered that the bonding strength between the DCB substrate 10 and the semiconductor element 20 decreases.

図7のように、凝集体36の金属粒子32が潰れ、金属粒子32の金属同士が相互拡散することにより金属粒子32同士が接合する。これにより、DCB基板10と半導体素子20とを凝集体36を介し接合することができる。   As shown in FIG. 7, the metal particles 32 of the aggregate 36 are crushed, and the metals of the metal particles 32 are diffused to each other, thereby joining the metal particles 32 together. Thereby, the DCB substrate 10 and the semiconductor element 20 can be joined via the aggregate 36.

図8は、各工程における金属ペーストまたは凝集体の温度を示す図である。図8のように、図4のDCB基板10と半導体素子20との仮接着工程は、DCB基板10と半導体素子20との荷重が例えば1MPa、温度が200℃、時間が2分の条件にて行なう。図5の金属粒子32表面の還元工程は、例えば減圧下において、温度が175℃の条件にて行なう。図6のDCB基板10と半導体素子20との接合工程は、DCB基板10と半導体素子20との荷重が例えば10MPa、温度が250℃、時間が10〜30分の条件にて行なう。このように、各温度を異なる温度とすることができる。例えば、仮接着工程においては、金属粒子32が潰れない程度とするため、仮接着工程の荷重は接合工程の荷重より小さいことが好ましい。また、仮接着工程の温度は接合工程の温度より低いことが好ましい。   FIG. 8 is a diagram showing the temperature of the metal paste or aggregate in each step. As shown in FIG. 8, the temporary bonding process between the DCB substrate 10 and the semiconductor element 20 in FIG. 4 is performed under the condition that the load between the DCB substrate 10 and the semiconductor element 20 is, for example, 1 MPa, the temperature is 200 ° C., and the time is 2 minutes. Do. The reduction process of the surface of the metal particle 32 in FIG. The joining process of the DCB substrate 10 and the semiconductor element 20 in FIG. 6 is performed under the conditions that the load between the DCB substrate 10 and the semiconductor element 20 is, for example, 10 MPa, the temperature is 250 ° C., and the time is 10 to 30 minutes. Thus, each temperature can be a different temperature. For example, in the temporary bonding process, the load in the temporary bonding process is preferably smaller than the load in the bonding process so that the metal particles 32 are not crushed. Moreover, it is preferable that the temperature of a temporary bonding process is lower than the temperature of a joining process.

図9(a)は、凝集体36を潰す前、図9(b)は、凝集体36を潰した後の凝集体36のSEM(走査型電子顕微鏡)画像の模式図である。図9(a)のように、凝集体36を潰す前においては、金属粒子32が集積し金属粒子32間に隙間38が形成されている。図9(b)のように、凝集体36を潰した後においては、金属粒子32が接合し隙間38の体積が小さくなっている。   9A is a schematic diagram of an SEM (scanning electron microscope) image of the aggregate 36 before the aggregate 36 is crushed, and FIG. 9B is a schematic diagram of the aggregate 36 after the aggregate 36 is crushed. As shown in FIG. 9A, before crushing the aggregate 36, the metal particles 32 are accumulated and a gap 38 is formed between the metal particles 32. As shown in FIG. 9B, after the aggregate 36 is crushed, the metal particles 32 are joined and the volume of the gap 38 is reduced.

実施例2によれば、図5のように、凝集体36を構成する金属粒子32の表面を還元性ガス44を用い還元させる。その後、DCB基板10と半導体素子20と押圧することにより、DCB基板10と半導体素子20とを凝集体36を用い接合する。これにより、実施例1と同様に、DCB基板10と半導体素子20との接合を強固にすることができる。   According to Example 2, as shown in FIG. 5, the surface of the metal particles 32 constituting the aggregate 36 is reduced using the reducing gas 44. Thereafter, the DCB substrate 10 and the semiconductor element 20 are pressed to join the DCB substrate 10 and the semiconductor element 20 using the aggregate 36. Thereby, similarly to Example 1, the junction between the DCB substrate 10 and the semiconductor element 20 can be strengthened.

また、図5において、凝集体36を構成する金属粒子32の表面を還元させる際には、凝集体36を構成する金属粒子32の表面を還元性ガス44に曝す工程と、還元性ガス44を吸引する工程、とを交互に行なう。これにより、金属粒子32表面の酸化物をより除去することができる。   In FIG. 5, when reducing the surface of the metal particles 32 constituting the aggregate 36, the step of exposing the surface of the metal particles 32 constituting the aggregate 36 to the reducing gas 44, and the reducing gas 44 The step of sucking is alternately performed. Thereby, the oxide of the metal particle 32 surface can be removed more.

金属粒子32は、銀、銅および錫の少なくとも一つを含むことが好ましい。例えば、金属粒子32は、銀、銅および錫、またはこれらの合金とすることができる。金属粒子32を例えば金とした場合、金属粒子32の表面に酸化物が形成され難い。しかしながら、金は高価である。実施例1によれば、金属粒子32として、安価であるが酸化し易い銀、銅または錫を用いることができる。これにより、電子装置を安価に提供することができる。   The metal particles 32 preferably contain at least one of silver, copper and tin. For example, the metal particles 32 can be silver, copper and tin, or alloys thereof. When the metal particles 32 are gold, for example, it is difficult for oxides to be formed on the surfaces of the metal particles 32. However, gold is expensive. According to Example 1, silver, copper, or tin that is inexpensive but easily oxidized can be used as the metal particles 32. Thereby, an electronic device can be provided at low cost.

金属粒子32の径が小さいと、還元工程において、金属粒子32間に還元性ガスを十分に浸透させることが難しくなる。一方、金属粒子32の径が大きいと、凝集体36の強度を大きくできない。よって、金属粒子32の径は、例えば0.1μm以上かつ1μm以下であることが好ましく、0.2μm以上かつ0.8μm以下であることがより好ましい。   When the diameter of the metal particles 32 is small, it becomes difficult to sufficiently penetrate the reducing gas between the metal particles 32 in the reduction process. On the other hand, when the diameter of the metal particles 32 is large, the strength of the aggregate 36 cannot be increased. Therefore, the diameter of the metal particles 32 is preferably 0.1 μm or more and 1 μm or less, and more preferably 0.2 μm or more and 0.8 μm or less.

図10は、実施例2に係る電子装置を含むモジュールの例である。DCB基板10の外周に樹脂ケース50が設けられている。樹脂ケース50内には外部接続端子54が設けられている。外部接続端子54は半導体素子20の表面電極26とボンディングワイヤ51を用い電気的に接続されている。半導体素子20とボンディングワイヤ51とは封止ゲル52により封止されている。DCB基板10の金属層12と銅ベース58とが凝集体56により接合されている。凝集体56は、凝集体36と同じ方法で形成されている。銅ベース58には、サーマルグリース59を介し放熱フィン60が接続される。図10のように、第1基体を銅ベース58とし、第2基体をDCB基板10とすることもできる。   FIG. 10 is an example of a module including the electronic device according to the second embodiment. A resin case 50 is provided on the outer periphery of the DCB substrate 10. An external connection terminal 54 is provided in the resin case 50. The external connection terminal 54 is electrically connected to the surface electrode 26 of the semiconductor element 20 using a bonding wire 51. The semiconductor element 20 and the bonding wire 51 are sealed with a sealing gel 52. The metal layer 12 of the DCB substrate 10 and the copper base 58 are joined by an aggregate 56. The aggregate 56 is formed by the same method as the aggregate 36. A heat radiating fin 60 is connected to the copper base 58 via a thermal grease 59. As shown in FIG. 10, the first base may be the copper base 58 and the second base may be the DCB substrate 10.

IGBTは、インバータ等の電圧変換用半導体素子に用いられている。IGBTを実装したモジュールは、小型化が要求される。図10のような、IGBTを含むモジュールにおいては、放熱性の優れたDCB基板10が用いられる。また、IGBTチップの背面電極12をフロティングにするためDCB基板10には絶縁層14が設けられている。はんだ材料による接合は、はんだの粒界においてすべり破壊を起こす。IGBTチップをDCB基板10にはんだを用い接合した場合、IGBTチップの発熱サイクルによりはんだが劣化する。はんだが劣化すると放熱性が悪くなり、IGBTチップの温度が上昇し、はんだが加速度的に劣化する。   The IGBT is used for a voltage conversion semiconductor element such as an inverter. A module mounted with an IGBT is required to be downsized. In a module including an IGBT as shown in FIG. 10, a DCB substrate 10 having excellent heat dissipation is used. In addition, an insulating layer 14 is provided on the DCB substrate 10 to float the back electrode 12 of the IGBT chip. Joining with a solder material causes slip failure at the grain boundaries of the solder. When the IGBT chip is joined to the DCB substrate 10 using solder, the solder deteriorates due to the heat generation cycle of the IGBT chip. When the solder deteriorates, the heat dissipation becomes worse, the temperature of the IGBT chip rises, and the solder deteriorates at an accelerated rate.

一方、はんだの代わりに有機金属ペーストまたはナノサイズの金属粒子を用いたダイアタッチ材料を用いた場合、有機材料が残存するため熱伝導率が悪い。例えば、錫系はんだの熱伝導率が60W/m・Kであるのに対し、有機材料金属ペーストまたはナノサイズの金属粒子を用いたダイアタッチ材料の熱伝導率は約5W/m・Kである。   On the other hand, when a die attach material using an organic metal paste or nano-sized metal particles instead of solder is used, the organic material remains, resulting in poor thermal conductivity. For example, while the thermal conductivity of tin-based solder is 60 W / m · K, the thermal conductivity of a die attach material using an organic material metal paste or nano-sized metal particles is about 5 W / m · K. .

実施例2によれば、金属粒子36の表面の酸化物を除去した後、金属粒子32同士を接合することができる。よって、凝集体36の熱伝導率を大きくすることができる。例えば、銀粒子を用いた凝集体の熱伝導率は、約300W/m・Kと高く、はんだ接合に比べて5倍の放熱が期待できる。また、凝集体36には隙間があるため、温度サイクルによる劣化を抑制できる。   According to the second embodiment, the metal particles 32 can be bonded to each other after the oxide on the surface of the metal particles 36 is removed. Therefore, the thermal conductivity of the aggregate 36 can be increased. For example, the thermal conductivity of the aggregate using silver particles is as high as about 300 W / m · K, and a heat release of 5 times that of solder joints can be expected. Moreover, since the aggregate 36 has a gap, deterioration due to the temperature cycle can be suppressed.

実施例2は、第1基体としてDCB基板10の例を、第2基板としてIGBTが形成された半導体素子20の例を説明した。半導体素子20にはIGBT以外のデバイスが形成されていてもよい。第1基体および第2基体は実装基板または半導体素子とすることができる。例えば、第1基体および第2基体の両方を、実装基板とすることもできる。また、第1基体および第2基体の両方を、半導体素子とすることもできる。   In the second embodiment, the example of the DCB substrate 10 as the first substrate and the example of the semiconductor element 20 in which the IGBT is formed as the second substrate have been described. Devices other than IGBTs may be formed in the semiconductor element 20. The first substrate and the second substrate can be a mounting substrate or a semiconductor element. For example, both the first base and the second base can be used as mounting boards. Further, both the first substrate and the second substrate can be semiconductor elements.

実施例3は、凝集体をバンプとして使用する例である。図11(a)は実施例2に係る電子装置の断面図、図11(b)は、図11(a)のバンプの拡大図である。図11(a)および図11(b)のように、実装基板70は、絶縁性の基板72の表面に電極74が形成されている。半導体素子80は、半導体基板82の表面にパッド86が形成され、パッド86上(図11(a)および図11(b)においては下)に電極88が形成されている。半導体素子80の表面には絶縁性の保護膜84が形成されている。半導体素子80は、実装基板70に凝集体90をバンプとして用いフリップチップ実装されている。凝集体90は、金属粒子92を含み、実施例1の凝集体30と同様に形成されている。実施例3のように、凝集体90をバンプとして用いることもできる。   Example 3 is an example in which an aggregate is used as a bump. FIG. 11A is a cross-sectional view of the electronic device according to the second embodiment, and FIG. 11B is an enlarged view of the bump in FIG. 11A. As shown in FIGS. 11A and 11B, the mounting substrate 70 has an electrode 74 formed on the surface of an insulating substrate 72. In the semiconductor element 80, a pad 86 is formed on the surface of the semiconductor substrate 82, and an electrode 88 is formed on the pad 86 (below in FIG. 11A and FIG. 11B). An insulating protective film 84 is formed on the surface of the semiconductor element 80. The semiconductor element 80 is flip-chip mounted on the mounting substrate 70 using the aggregate 90 as a bump. The aggregate 90 includes metal particles 92 and is formed in the same manner as the aggregate 30 of the first embodiment. As in Example 3, the aggregate 90 can be used as a bump.

以上、本発明の実施例について詳述したが、本発明は係る特定の実施例に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形・変更が可能である。   Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

実施例1〜3を含む実施形態に関し、さらに以下の付記を開示する。
付記1:第1基体と第2基体とを、金属粒子と有機溶剤とを含む金属ペーストを介し接着させる工程と、前記金属ペーストの有機溶剤を除去することにより、前記金属粒子の凝集体を形成する工程と、前記凝集体を構成する金属粒子の表面を還元性ガスを用い還元させる工程と、前記凝集体を構成する金属粒子の表面を還元させる工程の後、前記第1基体と前記第2基体とを押圧することにより、前記第1基体と前記第2基体とを前記凝集体を用い接合する工程と、を含むことを特徴とする電子装置の製造方法。
付記2:前記凝集体を構成する金属粒子の表面を還元させる工程は、前記凝集体を構成する金属粒子の表面を前記還元性ガスに曝す工程と、前記還元性ガスを吸引する工程、とを交互に行なうことを特徴とする付記1記載の電子装置の製造方法。
付記3:前記凝集体を用い接合する工程は、減圧下で行なうことを特徴とする付記1または2記載の電子装置の製造方法。
付記4:前記凝集体を用い接合する工程は、前記凝集体に、前記金属粒子の材料の降伏応力以下の圧力を加えることを特徴とする付記1から3のいずれか一項記載の電子装置の製造方法。
付記5:前記金属粒子の径は0.1μm以上かつ1μm以下であることを特徴とする付記1から4のいずれか一項記載の電子装置の製造方法。
付記6:前記還元性ガスはギ酸を含むことを特徴とする付記1から5のいずれか一項記載の電子装置の製造方法。
付記7:前記金属粒子は、銀、銅および錫の少なくとも一つを含むことを特徴とする付記1から6のいずれか一項記載の電子装置の製造方法。
The following additional remarks are disclosed regarding the embodiment including Examples 1 to 3.
Appendix 1: Adhering the first base and the second base via a metal paste containing metal particles and an organic solvent, and removing the organic solvent of the metal paste to form an aggregate of the metal particles After the step of reducing the surface of the metal particles constituting the aggregate using a reducing gas and the step of reducing the surface of the metal particles constituting the aggregate, the first base and the second A method of manufacturing an electronic device, the method comprising: joining the first base and the second base using the aggregate by pressing the base.
Appendix 2: The step of reducing the surface of the metal particles constituting the aggregate includes the step of exposing the surface of the metal particles constituting the aggregate to the reducing gas and the step of sucking the reducing gas. The method of manufacturing an electronic device according to appendix 1, wherein the method is performed alternately.
Appendix 3: The method of manufacturing an electronic device according to Appendix 1 or 2, wherein the step of joining using the aggregate is performed under reduced pressure.
APPENDIX 4: The step of joining using the agglomerate applies a pressure equal to or less than a yield stress of the material of the metal particles to the agglomerate. The electronic device according to any one of appendices 1 to 3, Production method.
Supplementary Note 5: The method for manufacturing an electronic device according to any one of Supplementary notes 1 to 4, wherein the diameter of the metal particles is 0.1 μm or more and 1 μm or less.
Appendix 6: The method for manufacturing an electronic device according to any one of Appendixes 1 to 5, wherein the reducing gas includes formic acid.
Appendix 7: The method of manufacturing an electronic device according to any one of Appendixes 1 to 6, wherein the metal particles include at least one of silver, copper, and tin.

10 DCB基板
10a 第1基体
20 半導体素子
20a 第2基体
30 金属ペースト
32 金属粒子
34 有機溶剤
36 凝集体
44 還元性ガス
DESCRIPTION OF SYMBOLS 10 DCB board | substrate 10a 1st base | substrate 20 Semiconductor element 20a 2nd base | substrate 30 Metal paste 32 Metal particle 34 Organic solvent 36 Aggregate 44 Reducing gas

Claims (4)

第1基体と第2基体とを、金属粒子と有機溶剤とを含む金属ペーストを介し接着させる工程と、
前記金属ペーストの有機溶剤を除去することにより、前記金属粒子の凝集体を形成する工程と、
前記凝集体を構成する金属粒子の表面を、還元性ガスを用い還元させる工程と、
前記凝集体を構成する金属粒子の表面を還元させる工程の後、前記第1基体と前記第2基体とを押圧し、前記第1基体と前記第2基体とを、前記金属粒子間の界面及び間隙を含む前記凝集体の状態を維持したまま前記凝集体を介して接合する工程と、
を含むことを特徴とする電子装置の製造方法。
Adhering the first base and the second base via a metal paste containing metal particles and an organic solvent;
Removing the organic solvent of the metal paste to form an aggregate of the metal particles;
Reducing the surface of the metal particles constituting the aggregate using a reducing gas;
After the step of reducing the surface of the metal particles constituting the aggregate, the first base and the second base are pressed, and the first base and the second base are brought into contact with the interface between the metal particles and Joining via the aggregates while maintaining the state of the aggregates including gaps;
A method for manufacturing an electronic device, comprising:
前記凝集体を構成する金属粒子の表面を還元させる工程は、前記凝集体を構成する金属粒子の表面を前記還元性ガスに曝す工程と、前記還元性ガスを吸引する工程、とを交互に行なうことを特徴とする請求項1記載の電子装置の製造方法。   The step of reducing the surface of the metal particles constituting the aggregate is alternately performed by exposing the surface of the metal particles constituting the aggregate to the reducing gas and sucking the reducing gas. The method of manufacturing an electronic device according to claim 1. 前記凝集体を用い接合する工程は、減圧下で行なうことを特徴とする請求項1または2記載の電子装置の製造方法。   3. The method of manufacturing an electronic device according to claim 1, wherein the step of bonding using the aggregate is performed under reduced pressure. 前記凝集体を用い接合する工程は、前記凝集体に、前記金属粒子の材料の降伏応力以下の圧力を加えることを特徴とする請求項1から3のいずれか一項記載の電子装置の製造方法。   4. The method of manufacturing an electronic device according to claim 1, wherein in the step of bonding using the aggregate, a pressure equal to or lower than a yield stress of the material of the metal particles is applied to the aggregate. 5. .
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