JP5617026B2 - Multilayer ceramic capacitor - Google Patents

Multilayer ceramic capacitor Download PDF

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JP5617026B2
JP5617026B2 JP2013238541A JP2013238541A JP5617026B2 JP 5617026 B2 JP5617026 B2 JP 5617026B2 JP 2013238541 A JP2013238541 A JP 2013238541A JP 2013238541 A JP2013238541 A JP 2013238541A JP 5617026 B2 JP5617026 B2 JP 5617026B2
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average particle
ceramic capacitor
multilayer ceramic
dielectric
laminate
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浩一郎 森田
浩一郎 森田
克哉 谷口
克哉 谷口
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太陽誘電株式会社
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  The present invention relates to a multilayer ceramic capacitor. In particular, the present invention relates to a multilayer ceramic capacitor in which the CR product, which is the product of capacitance and insulation resistance, is improved, and a method for manufacturing the same.

  With the downsizing and thinning of digital electronic devices such as mobile phones, there is a need for smaller chip sizes and larger capacities required for multilayer ceramic capacitors (MLCCs) mounted on electronic circuit boards. Increasing year by year. In order to increase the capacitance of a small monolithic ceramic capacitor, it is necessary to make the dielectric layer thin and to laminate in a high density and multiple layers. However, when the thickness of the dielectric layer is made on the order of microns or less, the so-called one-particle fine structure in which the layer thickness and the particle diameter of the dielectric layer are almost equal is approached.

  In a dielectric layer having a one-particle structure, since the grain boundary between dielectric particles is reduced, there is a concern about the deterioration of the reliability of the multilayer ceramic capacitor, such as a decrease in insulation resistance and a decrease in withstand voltage. Also, when the dielectric particles grow excessively when the ceramic capacitor is fired, the same problem occurs that the grain boundary in the dielectric layer is reduced and the insulation resistance is lowered. In this way, there is a trade-off between securing the capacitance due to higher density of the multilayer ceramic capacitor and the insulation resistance, and the CR product (product of the capacitance and the insulation resistance value) is the quality characteristic of the multilayer ceramic capacitor. It is used as one index for comparing.

  As a prior art for improving the reduction in CR product due to thinning, for example, Patent Document 1 contains a large-diameter crystal particle having a particle size of 0.4 μm or more in a proportion of 10 to 30% by volume, A dielectric laminated structure containing small-diameter particles having a particle diameter of 0.25 μm or less in a proportion of 50 to 70% by volume is disclosed.

  In addition, as a technique for achieving both acquisition of electrostatic capacity and good insulating properties or reliability by the growth of dielectric particles, a method for controlling the aspect ratio of dielectric particles (for example, Patent Document 2), one particle per layer A method for controlling the ratio (for example, Patent Document 3) and a method for making the dielectric composition highly insulating (for example, Patent Document 4) have been proposed.

JP 2001-338828 A JP 2010-212503 A JP-A-11-317322 JP 2010-180124 A

  However, even if any of these conventional techniques is used, there is an upper limit to the CR product of the multilayer ceramic capacitor, that is, when the capacitance is increased below a certain layer thickness, the insulation resistance rapidly decreases. The problem of (see, for example, FIG. 10) could not be solved.

  The present invention has been made to solve such a problem, and by suppressing the grain growth in a portion where the progress of grain growth by firing is relatively fast, the CR product can be improved compared to the conventional one. An object of the present invention is to provide a multilayer ceramic capacitor capable of obtaining a sufficient CR product even with a dielectric thickness of 1 μm or less.

In order to solve the above-described problems, the present invention provides a laminate in which dielectric layers and internal electrode layers are alternately laminated, a cover portion that covers the top and bottom of the outermost layer in the lamination direction of the laminate, and the laminate And a side margin portion covering both sides of the outermost edge in a direction orthogonal to the stacking direction of the body, the dielectric constituting the dielectric layer existing at the outermost layer position in the stacking direction of the stacked body the average particle diameter of the particles is the D 1, the average particle diameter of the dielectric particles forming the dielectric layer present in a central position in the stacking direction of the laminate is D 2, the in the stacking direction of the laminate In the case where the average particle diameter of the dielectric particles constituting the dielectric layer existing at the intermediate position equally divided between the outermost layer position and the central position is D 3 , the average particle diameters D 1 , D 2 and D 3 The multilayer ceramic capacitor has a relationship of 1.5 × D 1 <D 3 and 1.2 × D 2 <D 3 .

The multilayer ceramic capacitor preferably satisfies the condition of 1.5 × D 2 <D 3 . In the case where the average particle diameter of the dielectric particles present in the outermost edge position in the direction perpendicular to the lamination direction of the laminate has to be D 4, the relationship of the mean particle diameter D 3 and D 4, 1. It is preferable to further satisfy the condition of 5 × D 4 <D 3 .

In the multilayer ceramic capacitor, it is preferable that a grain growth inhibitor for suppressing grain growth of the dielectric layer is added to the cover portion.

In the multilayer ceramic capacitor, it is preferable that a grain growth inhibitor for suppressing grain growth of the dielectric layer is added to the side margin portion .

In the multilayer ceramic capacitor, a grain growth inhibitor for suppressing grain growth of the dielectric layer is added to a reverse pattern sheet that compensates for a step generated between the dielectric layer and the internal electrode layer. It is preferable.

  In the multilayer ceramic capacitor, it is preferable that the grain growth inhibitor includes at least one element selected from the group consisting of Mn, Mg, and rare earth elements.

  According to the present invention, in a high-end monolithic ceramic capacitor that requires a small size and a large capacity, a sufficient CR product can be realized even when the dielectric thickness is 1 μm or less.

FIG. 1 is a perspective view schematically showing a multilayer ceramic capacitor according to an embodiment of the present invention by partially cutting the inside. FIG. 2 is a diagram schematically showing the difference in the particle size of the dielectric particles divided into regions of a cross section of the laminate. FIG. 3 is a cross-sectional view showing one layer of each of the green sheet and the conductive paste film before firing. FIG. 4 is a cross-sectional view showing one layer in which a reverse pattern sheet is formed on a green sheet and a conductive paste film before firing. FIG. 5 is a schematic diagram of the outermost layer portion of the laminate. FIG. 6 is a schematic view of a 50% intrusion portion of the laminate. FIG. 7 is a schematic diagram of a 25% intrusion portion of the laminate. FIG. 8 is a schematic cross-sectional view showing the inside of the laminated body in an enlarged manner in order to explain the average particle diameter. FIG. 9 is an enlarged schematic cross-sectional view showing an electrode side end portion of the laminate in order to explain the average particle diameter. FIG. 10 is a graph showing the CR product characteristics of the multilayer ceramic capacitor of the present invention compared with the comparative example.

  Hereinafter, a multilayer ceramic capacitor according to an embodiment of the present invention will be described. FIG. 1 is a perspective view schematically showing a part of the multilayer ceramic capacitor 1 cut away. The multilayer ceramic capacitor 1 is formed on a ceramic sintered body 10 having a chip size and a shape (for example, a 1.0 × 0.5 × 0.5 mm rectangular parallelepiped) defined by a standard, and on both sides of the ceramic sintered body 10. And a pair of external electrodes 20. FIG. 1 shows a cross section in which one corner of a rectangular parallelepiped monolithic ceramic capacitor 1 is cut. Moreover, the cross section of the laminated body 11 is expanded and shown in the circle of FIG.

The ceramic sintered body 10 is fired with, for example, BaTiO 3 (barium titanate) as a main component, and is a laminated body (also referred to as an internal active layer) in which dielectric layers 12 and internal electrode layers 13 are alternately laminated. ) 11. The inner power active layer refers to a portion of the substantially rectangular parallelepiped multilayer body 11 that contributes to the power storage operation of the multilayer ceramic capacitor 1.

  The multilayer body 11 has, for example, a thickness per dielectric layer 12 sandwiched between two internal electrode layers 13 according to specifications such as capacitance and endurance voltage required for the multilayer ceramic capacitor 1. It has a high-density multilayer structure that is 0.8 μm or less. In addition, a margin portion 14 is formed so as to cover the outside of the stacked body 11.

As shown in detail in FIG. 1, the margin portion 14 includes a cover portion 15 that covers the top and bottom of the outermost layer in the stacking direction of the stacked body 11, and both sides of the outermost edge in the direction orthogonal to the stacking direction of the stacked body 11. And a side margin portion 16 to be covered. The margin portion 14 is made of, for example, ceramic fired with BaTiO 3 as a main component, like the dielectric layer 12. The ceramic margin portion 14 covering the multilayer body 11 is formed in order to protect the dielectric layer 12 and the internal electrode layer 13 from external contamination such as moisture and contamination, and to prevent deterioration of the multilayer body 11 over time. .

FIG. 2 is a diagram schematically showing the ceramic sintered body 10 cut along the stacking direction, and the difference in the particle size of the dielectric particles divided into the cross-sectional areas of the stack 11. In FIG. 2, the stacked body 11 is shown as a region A and a region B, and the other region is a margin portion 14 (a cover portion 15 and a side margin portion 16).

According to one aspect of the present invention, present in the outermost layer position P 1 in the stacking direction of the stacked body 11, the average particle diameter of the dielectric particles forming the dielectric layer is D 1, the lamination of the laminated body 11 existing in the center position P 2 in the direction, the average particle diameter of the dielectric particles forming the dielectric layer is D 2, between the outermost position P 1 in the stacking direction of the stacked body 11 and the center position P 2 When the average particle diameter of the dielectric particles constituting the dielectric layer existing in the equally divided intermediate position P 3 is D 3 , at least in these average particle diameters,
1.5 × D 1 <D 3 Formula (1)
Satisfy the condition of
In addition, at these average particle sizes:
1.2 × D 2 <D 3 (2)
It is preferable to satisfy the following condition.
Further, in the above formula (2), 1.5 × D 2 <D 3 ... Formula (2) ′
It is preferable to satisfy the following condition.
Here, the central position P 2 is a 50% penetration position in the stacking direction into the laminated body (internal electric active layer) 11, and the intermediate position P 3 is the inside of the laminated body (internal electric active layer) 11. This corresponds to a 25% penetration position in the stacking direction. The average particle diameter outermost position P 1 where D 1 is measured, the upper and may be a both positions the lower side of the laminate (inner conductive active layer) 11, a position of only one Also good.

  According to the above mathematical formulas (1), (2) and (2) ′, dielectric particles in both side portions and / or the central portion (region A in FIG. 2) along the stacking direction of the multilayer body 11 of the multilayer ceramic capacitor 1. It is understood that the average particle size is smaller than the average particle size in the other part (region B in FIG. 2). By partially suppressing the grain growth and firing the multilayer body so as to obtain such a particle size distribution of the dielectric particles, it is possible to reduce a decrease in CR product due to an increase in the capacity of the multilayer ceramic capacitor 1. .

Further, the multilayer ceramic capacitor 1 according to the embodiment is located at the intermediate position P 3 when the average particle diameter of the dielectric particles existing at the outermost edge position P 4 in the direction orthogonal to the stacking direction of the multilayer body 11 is D 4. with respect to the average particle diameter D 3 of the dielectric particles present,
1.5 × D 4 <D 3 (3)
It is more preferable to satisfy the condition. Incidentally, the average particle diameter D 4, since the contribution to the electrostatic capacity is small, is not an essential configuration of the present invention, since the contribution is large in the insulating resistance, it is possible to obtain a higher CR product. Further, at least 1.2 × D 4 <D 3 ... (3) ′
It only has to satisfy the conditions.

  When the grain growth of dielectric particles becomes excessive due to firing, the number of grain boundaries in the dielectric layer decreases, which causes a decrease in insulation resistance and a decrease in withstand voltage. In a conventional multilayer ceramic capacitor fired in a reducing atmosphere, it has been found that the ratio of grain growth is relatively higher in the vicinity of both end portions and in the vicinity of the center portion in the stacking direction of the multilayer body than in other portions. The inventors first reached a one-particle structure in the vicinity of both ends or the center of the laminate during firing, which resulted in a decrease in the insulation resistance of the entire capacitor and a decrease in the CR product. Focusing on a certain point, the idea of reducing the reduction of the CR product by suppressing the grain growth at a portion where the ratio (speed) of the grain growth is high was obtained.

In order to obtain the particle size distribution of the dielectric particles represented by the above formula (1), in one embodiment, a grain growth inhibiting element is added to the cover portion 15 that covers the outside of the multilayer body 11. Thus, grain growth of dielectric particles near both end portions of the outermost layer position P 1 (area A in FIG. 2) is suppressed than that of the other region (region in FIG. 2 B).

In order to obtain the particle size distribution of the dielectric particles represented by the above formulas (2) and (2) ′, in another embodiment, the firing temperature and the maximum temperature in a reducing atmosphere are used. by adjusting the retention time, it grain growth of other regions of the dielectric particles present near the center penetrating the center position P 2 in the stacking direction (region a in FIG. 2) (region of FIG. 2 B) More suppressed. Moreover, the effective temperature increase rate is about 5000-10000 degreeC / hr.

Further, in order to obtain the particle size distribution of the dielectric particles represented by the above formulas (3) and (3) ′, in another embodiment, the side margin portion 16 that covers the outside of the multilayer body 11 is provided. A grain growth inhibiting element is added. To and / or reverse the pattern sheet 24 as grain growth inhibiting element side margin portion 16 is added may be one grain growth inhibiting element is added. Thus, grain growth of dielectric particles present in outermost position P 4 near (region A in FIG. 2) which it is suppressed more than in the other regions (the region in FIG. 2 B).

Here, FIG. 3 is a cross-sectional view showing one layer of each of the green sheet 22 that becomes the dielectric layer 12 and the conductive paste film 23 that becomes the internal electrode layer 13 after firing. FIG. 4 is a cross-sectional view showing one layer in which the reverse pattern sheet 24 is formed on the green sheet 22 and the conductive paste film 23. The reverse pattern sheet 24 referred to in FIG. 4 has a pattern opposite to that of the conductive paste film 23 in order to compensate for the level difference between the green sheet 22 and the conductive paste film 23. The reverse pattern sheet 24 is mainly composed of, for example, BaTiO 3 similar to the green sheet 22. The reverse pattern sheet 24 may be formed by screen printing on the green sheet 22 or may be formed by laminating a sheet having an opening corresponding to the internal electrode layer 13 on the green sheet 22.

The grain growth inhibiting element added to the cover portion 15, the side margin portion 16 and / or the reverse pattern sheet 24 preferably includes at least one element selected from the group consisting of Mn, Mg, and rare earth elements, for example. In addition, the grain growth suppressing element may be included in the laminate (internal electric active layer) 11, but in that case, the amount is larger than the amount included in the cover portion 15, the side margin portion 16 and / or the reverse pattern sheet 24. A small amount is included. Preferably, the difference in addition amount of 0.5 mol or more per 100 mol of BaTiO 3 is sufficient.

  According to the present embodiment, in the laminate 11, the particle diameter of the dielectric particles satisfying the above-described mathematical formulas (1) and (2), preferably satisfying the mathematical formula (2) ′, (3) or (3) ′. By suppressing the grain growth so as to have a distribution, it is possible to reduce the decrease in the CR product accompanying the increase in the capacity of the multilayer ceramic capacitor 1 compared to the conventional case.

  Next, examples of the multilayer ceramic capacitor (hereinafter referred to as “MLCC”) of the present invention will be described.

<Production of MLCC>
(1) Production of MLCC molded body First, BaTiO 3 powder having an average particle size of 40 nm to 400 nm or less was prepared as a raw material powder for dielectric green sheets, reverse pattern sheets, covers, and side margins. In this example, Mg and Mn as grain growth inhibitors were added in an amount of 1.0 mol per 100 mol of BaTiO 3 to the raw slurry of the reverse pattern sheet, the cover sheet serving as the cover portion, and the side sheet serving as the side margin portion. The prepared dielectric material powder was wet-mixed with an organic solvent, a 1.0 μm thick dielectric green sheet was applied by a doctor blade method, and dried. Similarly, a reverse pattern sheet, a cover sheet, and a side sheet were formed into a sheet shape.

  A conductive paste film containing Ni was screen-printed in a predetermined pattern on the green sheet. Further, in order to fill a step between the green sheet and the conductive paste film, a reverse pattern sheet having a pattern complementary to the conductive paste film was formed on the green sheet by screen printing. The reverse pattern sheet has the same thickness as that of the conductive paste film. As described above, a predetermined amount of the above-described grain growth inhibitor for suppressing grain growth of the dielectric layer due to firing is added to the reverse pattern sheet (see Table 1).

  101 sheets of green sheets on which conductive paste films and reverse pattern sheets were arranged were stacked so that the side from which the conductive paste films were drawn was staggered, thereby obtaining a laminate sheet having a stacking number n of 100. Thereafter, a plurality of cover sheets were pressure-bonded to the upper and lower surfaces of the laminate sheet so that the total thickness of the cover portion was 20 μm. As described above, a predetermined amount of a grain growth inhibitor for inhibiting grain growth of the dielectric layer due to firing is added to the cover sheet.

  A plurality of side sheets were pressure-bonded to both side surfaces of a rectangular laminate obtained by cutting the laminate sheet to a predetermined size so that the total thickness of the side margin portions was 40 μm. As described above, a predetermined amount of a grain growth inhibitor shown in Table 1 is added to the side sheet to suppress grain growth of the dielectric layer due to firing. As a result, an MLCC molded body having dimensions of 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height was obtained.

(2) Firing of MLCC molded body A sample of the MLCC molded body was debindered at a temperature of 300 ° C in an N 2 atmosphere. Thereafter, the temperature was raised from a temperature range of 1150 ° C. to 1250 ° C. in a reducing atmosphere containing H 2 at a rate of temperature increase of 6000 ° C./hr, and the temperature was maintained for 10 minutes to 2 hours for firing. After the temperature was lowered, the temperature was raised from 800 ° C. to 1050 ° C. in an N 2 atmosphere, and re-oxidation treatment was performed while maintaining the temperature. In order to form an external electrode in the MLCC sintered body thus obtained, Ni paste containing glass frit was applied to both end faces where the internal electrode was exposed, and baking treatment was performed in an N 2 atmosphere.
As a result, a sample of MLCC was obtained.

Table 1 shows the production conditions of the MLCC sample used in this experiment.

<MLCC evaluation method>
(1) Evaluation Method of Average Particle Size of Dielectric Particles Cross section of dielectric layer taken by scanning electron microscope (SEM) by exposing the cross section by cutting parallel to the end face on which the MLCC external electrode is formed The particle size of the dielectric particles was measured based on the photograph. Position measuring particle size, the outermost position P 1 in the stacking direction to evaluate the average particle diameter D 1, the center position P 2 in the stacking direction to evaluate the average particle diameter D 2, the mean particle diameter D 3 4 for the outermost edge position P 4 in the direction orthogonal to the stacking direction for evaluating the average particle diameter D 4 and the intermediate position P 3 equally divided between the outermost layer position P 1 and the central position P 2. It is a place.

Here, the outermost position P 1, as shown in Figure 5, the dielectric layer 12 from the first layer (outermost layer) to the third layer, observed in a region within the range of 15μm with respect to the center line The grain diameter of the dielectric particles was measured. In the center position P 2 is 50% penetration portion of the stack, as shown in FIG. 6, (when n = 100, from the 50 layers 52 layers) from the n / 2-layer second n / 2 + 2 layer to The grain diameter of the dielectric particles observed in a region within a range of 15 μm with respect to the center line of the dielectric layer 12 was measured. In the intermediate position P 3 is 25% penetration portion of the stack, as shown in FIG. 7, (when n = 100, from the 25 layers 27 layers) from the n / 4 layers the n / 4 + 2 layer to The grain diameter of the dielectric particles observed in a region within a range of 15 μm with respect to the center line of the dielectric layer 12 was measured. In outermost position P 4, to measure the grain diameter of the dielectric particles observed in a region within the range of 2μm toward the center from the end of the internal electrode layers (see Figure 9).

Based on the SEM image, the maximum length of the dielectric particles in the stacking direction and the maximum length in the direction orthogonal to the stacking direction were measured, and their simple arithmetic average value was evaluated as the grain diameter of the dielectric particles. In each area at a position P 1, P 2, P 3 and P 4, by measuring the grain size of all of the dielectric particles present in the area, was determined and their simple arithmetic mean. The final average value measured for 20 MLCC chips manufactured under the same conditions was evaluated as average particle diameters D 1 , D 2 , D 3 and D 4 in this example. As shown in FIG. 8 and FIG. 9, the particle size including the portion outside the region was also measured for the particles that were out of the region.

The average particle diameter D 1 may be measured at the outermost layer position of both the upper and lower laminate it may be measured at the outermost layer position of only one. The average particle diameter D 3 may be measured at 25% penetration position of both from the upper side of the laminate and lower, it may be measured by 25% penetration position of only one. The average particle diameter D 4 may be measured at the outermost edge positions of both left and right of the stack may be measured at the outermost edge position of only one.

<Evaluation results of MLCC>
Table 2 shows the evaluation results for the dielectric layer of the produced MLCC. In the prepared sample, the CR product was evaluated to be 2000F · Ω as a specified value, and a sample showing a CR product higher than that was evaluated as acceptable.

In Table 2, samples with numbers marked with * (No. 1, 5, 9, and 12) are listed as comparative examples in which the CR product is smaller than 2000 F · Ω. For samples with a CR product greater than 2000 F · Ω, the first average particle size ratio D 3 / D 1 is greater than 1.5 and the second average particle size ratio D 3 / D 2 is greater than 1.2. It was big. In addition, a sample in which the second average particle size ratio D 3 / D 2 is larger than 1.5 and the third average particle size ratio D 3 / D 4 is larger than 1.5 is a CR larger than 2500 F · Ω. The product was obtained.

  FIG. 10 is a graph showing qualitatively the CR product characteristics of the multilayer ceramic capacitor of the present invention compared with the comparative example. The multilayer ceramic capacitor according to the embodiment of the present invention has a higher CR product than the comparative example according to the prior art. This means that even at a high firing temperature, grain growth in a portion where the grain growth rate in the laminate is high (for example, the region A shown in FIG. 2) is suppressed, and as a result, high insulation resistance is maintained. It means that. In addition, in the multilayer ceramic capacitor according to the example of the present invention, as shown in FIG. 10, there was no disadvantageous characteristic that the CR product drastically dropped as in the prior art in a high firing temperature range.

1 Multilayer ceramic capacitor (MLCC)
10 Ceramic sintered body 11 Laminated body (internal electric active layer)
12 Dielectric layer 13 Internal electrode layer 14 Margin portion 15 Cover portion 16 Side margin portion 20 External electrode 22 Green sheet 23 Conductive paste film 24 Reverse pattern sheet

Claims (6)

  1. A laminate in which dielectric layers and internal electrode layers are alternately laminated; a cover portion that covers the top and bottom of the outermost layer in the lamination direction of the laminate; and an outermost edge in a direction orthogonal to the lamination direction of the laminate A laminated ceramic capacitor comprising side margin portions covering both sides,
    Present in the outermost layer position in the stacking direction of the laminate, the average particle diameter of the dielectric particles constituting the dielectric layers sandwiched by the internal electrode layers is D 1,
    Existing in the center position in the stacking direction of the laminate, the average particle diameter of the dielectric particles constituting the dielectric layers sandwiched by the internal electrode layer is D 2,
    The average particle diameter of the dielectric particles constituting the dielectric layer sandwiched between the internal electrode layers existing at an intermediate position equally divided between the outermost layer position and the central position in the stacking direction of the stacked body is D In the case of 3
    The relationship between the average particle diameters D 1 , D 2 and D 3 is
    1.5 × D 1 <D 3 , and
    1.2 × D 2 <D 3
    Meet the requirements of
    The average particle size D 1 is the dielectric layer 1/2 or less of the thickness of multilayer ceramic capacitors.
  2. Further, the relationship between the average particle diameters D 2 and D 3 is
    1.5 × D 2 <D 3
    The multilayer ceramic capacitor according to claim 1, wherein the following condition is satisfied.
  3. In still present in the outermost edge position in the direction perpendicular to the lamination direction of the laminate, when the average particle size of the sandwiched by internal electrode layers dielectric particles are to be D 4,
    The relationship between the average particle diameters D 3 and D 4 is
    1.5 × D 4 <D 3
    The multilayer ceramic capacitor according to claim 1, further satisfying the above condition.
  4.   The multilayer ceramic capacitor according to claim 1, wherein a grain growth inhibitor for suppressing grain growth of the dielectric layer is added to the cover portion.
  5.   The multilayer ceramic capacitor according to claim 4, wherein a grain growth inhibitor for suppressing grain growth of the dielectric layer is added to the side margin portion.
  6.   The multilayer ceramic capacitor according to claim 4 or 5, wherein the grain growth inhibitor contains at least one element selected from the group consisting of Mn and Mg.
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JP2945529B2 (en) * 1991-10-31 1999-09-06 太陽誘電株式会社 Multilayer ceramic capacitor and method of manufacturing the same
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JP2003133164A (en) * 2001-10-29 2003-05-09 Taiyo Yuden Co Ltd Laminated ceramic capacitor and its manufacturing method
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