JP5604373B2 - Instruction speculative execution tracing - Google Patents

Description

  The field of the invention relates to data processing, and more specifically to a diagnostic mechanism for monitoring data processing operations.

  There are many situations in which it is desirable to track the processing performed by a processing circuit. For example, such information is useful during development of a data processing system. A tracing tool is an example of a tool useful for such work.

  By tracing the activity of a data processing system and generating a trace stream that includes data representing the activity of each step in the system, it is very useful for system development. Such a tracing tool uses various means for tracing the flow of a program such as an embedded trace macrocell (ETM, ARM Limited, a trademark of Cambridge) existing on a chip to be monitored.

  Monitoring the overall activity of a processing system step by step results in a tremendous amount of data to collect, transmit and store. Various methods have been devised to reduce this amount of information. Trace data is generated by tracing only some instructions such as branch and read / store instructions, and other "trace invalid" instructions are inferred from the trace of these "trace valid" instructions and information of the instruction stream. Reduce the amount. By providing a function for switching on and off the trace so that the trace data is not generated for the execution portion regarded as invalid, it is possible to further reduce the trace stream. U.S. Pat. No. 7,707,394 describes the ability to trace only a portion of instructions.

  Most processor instruction set architectures include the ability to speculatively execute instructions to increase processing speed. For example, if the condition is the state of the data processing system when the branch is processed, execute if the condition is true, branch to the destination, and if the condition is false, continue without executing the next sequential instruction Since branch instructions can be expected to execute in some way, subsequent instructions can be executed before the condition is known to be true or false. If the prediction is wrong, it is necessary to cancel the speculatively executed instruction and return the processor to the state before the branch.

  When tracing speculatively executed instructions, it is not always easy to match the trace stream output to the instructions that are actually committed.

  Viewed from a first aspect, the present invention provides a trace unit that generates a trace data item that indicates the processing activity of at least one processor executing at least one instruction stream, wherein the at least one instruction stream is a plurality. A trace circuit that speculatively executes at least a portion of the instructions and wherein the trace unit is controlled by current trace control data and monitors the behavior of the at least one processor And a data store for storing at least a part of the trace control data related to the corresponding instruction group among the executed instruction groups, the trace circuit responding to detection of execution of the instruction group The trace control data is stored in the data store. And wherein the trace circuit is responsive to detecting the at least one processor canceling the speculatively executed at least one instruction group and the trace control data stored in the data store. At least a part is extracted, and the trace circuit is controlled by the extracted trace control data.

  The present invention recognizes that tracing a data processing device that executes speculative instructions may make it difficult to understand the trace data output if the speculatively executed instructions are later canceled. The present invention addresses this problem by accumulating trace control data in the data store for each instruction group that is executed, and in this way, if instructions that are speculatively executed are canceled, Trace control data values that were previously used can be retrieved from the data store. Therefore, it is possible to restore the trace control data that was current at that time.

  In some embodiments, the trace unit further comprises a storage circuit that stores the current trace control data to control the trace circuit, wherein the trace circuit includes at least one speculatively executed instruction. In response to detecting the at least one processor that cancels a group, the retrieved trace control data is stored in the storage circuit.

  The trace control data may be the logic state used to control the trace circuit, but in some embodiments it is stored in the storage circuit.

  In some embodiments, the trace control data is stored in the data store along with an identifier that identifies the corresponding instruction group.

  The accumulated trace control data needs to be related to the corresponding instruction group in some way. This can be related by an identifier, or can be related in other forms such as a storage form.

  In some embodiments, the trace circuit is configured to retrieve the at least part of the trace control data stored in the data store of the canceled instruction group.

  In order for the trace circuit to function properly, if the instruction group is canceled, the trace control data that was current at the start of the canceled instruction group must be restored. In some embodiments, the trace control data that was current at the start of the group is stored in the group's data store and is retrieved. In another embodiment, trace control data that was current at the end of group execution is accumulated for the group. In this case, the trace control data of the group immediately before the canceled group is retrieved.

  In some embodiments, the group comprises an instruction group, and when the first instruction in the group is executed, all of the instructions in the group are executed.

  Instructions can be grouped in several ways. In some embodiments, the group consists of a single instruction, but in this case the data store for storing trace control data is large. The instructions should be grouped so that the entire group is executed when the first instruction in the group is executed. In other words, no exception occurs within the group and the instruction is canceled and committed as a whole group. An instruction that is speculatively executed is committed or canceled when its end is known, i.e., when the guess is correct or not, committed if correct, canceled if incorrect .

  In some embodiments, the trace control data comprises a sticky value, and the trace circuit is responsive to the sticky value having a predetermined value and is executed later regardless of whether the trace enable signal has an enabled value. The trace value of the trace valid instruction is output. The trace valid instruction is an instruction that triggers output of a trace data item.

  The problem with canceling a traced speculative instruction is that the instruction group may be canceled if the trace outputs only the trace element of the trace-enabled instruction, and the trace of the subsequent instruction indicates that another instruction has been executed. Yes, trace enable may be switched on or off at different times, so if the last instruction in the instruction group is not a trace valid instruction and trace enable is switched off before the next instruction is traced, The diagnostic device that diagnoses the trace data does not know that the trace invalid instruction has been executed. This problem is addressed by the use of sticky values in the trace control data.

  The trace circuit is responsive to detecting execution of a final instruction in one instruction group of the instruction group that is not a trace valid instruction that triggers output of a trace data item, and in the trace control data to control a subsequent instruction group The sticky value is set, and the sticky value is stored in the data store of a subsequent instruction group.

  That is, if the last instruction in the group is a trace invalid instruction that does not output a trace element, a sticky value is set for the subsequent group. Thus, when a subsequent trace valid instruction is executed, the trace element is output, regardless of whether tracing is enabled or not. When the trace element is output, the sticky value stored in the storage circuit is reset. Based on this sticky value, the diagnostic device that analyzes the trace data recognizes that the trace invalid instruction has actually been executed. When the speculatively executed instruction group is canceled, the sticky value applied to the canceled instruction is returned to the storage circuit. Since the sticky value is accumulated for the succeeding instruction group, the sticky value is updated when this group is canceled, and the trace element is output in the next trace valid instruction. Can be suggested.

  In some embodiments, the trace control data comprises a previously traced value, and the trace circuit sets the value of the trace enable signal when the last instruction of the preceding group is executed to the previous-traced value of the subsequent group. And the trace circuit is stored and set in association with the processor canceling a speculatively executed instruction group, the trace enable value enabled, and the canceled group. In response to the previous-traced value, a trace element is output indicating that the trace is on.

  As a further problem with canceling speculatively executed instructions, if tracing is turned on for an instruction group and this instruction group is later canceled, the instruction output to tell that tracing is on is Lost. The previous-traced value is used to instruct the output of the trace on signal in view of the canceled instruction. In a simple setting method of the previous-traced value, the trace enable value of the last instruction of the preceding group is accumulated as the previous traced value of the succeeding group. This makes it easy to indicate whether or not tracing was enabled when execution of the instruction group was completed.

  In some embodiments, the trace control data comprises an initial-traced value, and the initial-traced value is set in response to trace being enabled upon execution of the first instruction of the instruction group, the trace circuit Executed after the cancellation in response to detecting the processor that cancels the instruction group, the initial-traced value that is cleared in the instruction group, and the previous-traced set in the instruction group A status element indicating the execution address of the instruction is output.

  A further problem arises if tracing is enabled during the execution of a speculative group and then this group is canceled. When the trace is enabled, a status trace element indicating the execution address is output, and the diagnostic device can understand that the trace is enabled again. If these instructions are later canceled, the diagnostic device considers that execution is proceeding from the execution address output because of the canceled instruction, causing a problem. The use of an initial-traced value helps to avoid this problem by triggering the output of a further state element that points to a further execution instruction address. That is, in response to the cancellation of the group, if the initial-traced of the canceled group is clear and the previously traced of the same group is set, a further state element is output. If previously traced is set, it means that tracing was enabled when the last instruction of the preceding group, in this case the group before the canceled group, was executed, and initial-traced is Clear means that the trace was not enabled when the first instruction of the canceled group was executed. During execution of the canceled group, tracing may be enabled and a status element may have been output. An additional state element is then output.

  In some embodiments, the trace control data comprises a traced interesting value, the traced interesting value is set in response to a group trace element being output, and is cleared when the group trace element is not output. become.

  A further trace control value that can be used in embodiments of the present invention is a traced interesting value. This is used to indicate when a group trace element is output and when a group trace element is not output. This can be used to determine when a committed group was not traced, and the commit count value in the trace output does not suggest that this group was traced. This can also be used in the case of counter folding described later.

  In some embodiments, the trace control data comprises a trace start / stop value for the group, the trace start / stop value affects whether or not a trace enable is set, and the trace start / stop value is , Set in response to detection of a predetermined behavior of the at least one processor.

  Whether tracing is enabled is controlled by a particular processor state. In some embodiments, trace enable can be turned on or off by the start / stop value, regardless of whether it is controlled by these states. Conventional processors use this control value. However, in this case, since the embodiment of the present invention accumulates the group value, the value can be returned to an appropriate value when the group is canceled later.

  In some embodiments, the trace control data comprises a trace multiple value, and if the value is set, indicates that the group comprises two trace valid instructions that generate a trace element; If is not set, it means that the group includes one or zero trace valid instructions.

  An instruction group may be limited to no more than two trace valid instructions. In this case, by including a trace multiple value in the trace control data, it can be indicated whether or not there are two trace valid instructions in the group. As you will see later, this allows you to trace the group using fewer values.

  In another embodiment, the trace multiple value comprises a value indicating the number of trace valid instructions in the group.

  In another embodiment, the trace multiple value is a few bits, indicating the number of trace valid instructions in the group. By doing this, it is possible to indicate by a 2-bit value whether there are 1, 2, 3, or 4 trace valid instructions in the group, and it is more efficient than storing two trace keys (specifying the first value and the last value). It is.

  In some embodiments, the trace unit is configured to generate an index value and accumulate the index value assigned to each of the instruction groups, the index value being generated each time a trace element is generated. Updated to

  One method of tracking the trace elements that are generated provides an index value that is allocated to each instruction group and updated each time a trace element is generated. Information provided from such an index is easy to compress and is understood by a diagnostic device that analyzes trace data.

  In some embodiments, the trace unit includes a counter that generates the index value, and the trace circuit includes an initial counter value that indicates the counter value at the start of execution of the group, and an end of execution of the group. At least one of the last counter value indicating the counter value of the hour is stored in the data store of each instruction group.

  There are several ways to index trace information by index value, but some embodiments include a counter. Counters are a simple way to provide indexing functions and provide an index that can be easily compressed. In some embodiments, both the first and last counter values of the group are stored, while in other embodiments, only one of them is stored. When an instruction is canceled or committed, by using the counter value at the start of group execution and the counter value at the end of group execution, out of the output trace elements, the canceled instruction and the committed instruction It is possible to accurately determine which trace element is involved. Even when only one of them is accumulated, when the number of trace valid instructions in the group is limited to 2 and the group's multiple traced value is accumulated, it relates to the canceled instruction and the committed instruction. The trace element can be determined. In this case, the other of the first value and the last value can be estimated. The advantage of this is that the counter value is multi-bit while the multiple traced value is a single bit.

  In some embodiments, the trace circuit receives a cancel instruction from the data processor indicating that the speculatively executed selected instruction group has been canceled and indicates the canceled selected instruction group. A cancel trace item is generated, and information related to a difference between the current counter value and the counter value at the start of execution of the canceled group is configured to be included in the cancel trace item.

  If an instruction group is canceled, it is important that this can be estimated by a diagnostic device that analyzes the trace elements, otherwise the diagnostic device will not be able to correctly analyze the executed stream. By indexing a trace element using a counter value, the diagnostic device can be canceled by providing a cancel trace entry that indicates how many of the trace elements output in the stream have been canceled. Can be instructed.

  In some embodiments, the trace circuit is configured to determine the information regarding the difference depending on the traced-interesting value.

  If there are instructions that were not traced in the canceled group, the output information regarding the number of canceled instruction groups should not indicate that the canceled group did not output a trace element. The traced interesting value is used to modify the output value so that this is not suggested.

  In some embodiments, the trace unit is responsive to receipt of a commit indication from the data processing device that communicates that a speculatively executed select instruction group has been committed, and a commit trace that indicates the select group Generate an item and include information about the difference between the current counter value and the last counter value of the selected group.

  Similar to cancel, the index of the instruction group can be used to indicate which instruction has been committed. Traced interviewing is also useful when calculating the output value to indicate a committed instruction. If there are groups that have no traced instructions, the commit signal does not suggest that some of the output trace elements belong to these groups.

  According to a second aspect of the present invention, there is provided a data processing unit comprising: a data processing device that executes an instruction stream; and a trace unit according to the first aspect of the present invention that monitors the data processing device.

  A third aspect of the present invention provides a method for generating a trace data item indicating processing activity of at least one processor executing at least one instruction stream, wherein the at least one instruction stream comprises a plurality of instruction groups. The at least one processor speculatively executes at least a portion of the instructions, and the method monitors the behavior of the at least one processor using a trace circuit controlled by current trace control data. Storing at least a portion of the trace control data associated with one instruction group of the executed instruction group; and at least one processor for canceling the at least one speculatively executed instruction group. In response to detection, the canceled Extracting at least a part of the trace control data stored in the data store of the instruction group executed immediately before the measurement execution instruction, and controlling the trace circuit by the extracted trace control data; Is provided.

  A fourth aspect of the present invention provides trace means for generating trace data items indicating processing activity of at least one processor executing at least one instruction stream, the at least one instruction stream comprising a plurality of instruction groups The at least one processor speculatively executes at least part of the instructions, and the tracing means comprises trace monitoring means for monitoring the behavior of the at least one processor controlled by current trace control data; Data storage means for storing at least a part of the trace control data related to the corresponding instruction group among the executed instruction groups, wherein the trace monitoring means responds to detection of execution of the instruction group. The at least part of the trace control data The trace monitoring means is responsive to the at least one processor canceling the at least one instruction group executed speculatively and executed before the canceled speculative execution instruction. At least a part of the trace control data stored in the data storage unit of the instruction group is extracted, and the trace monitoring unit is controlled by the extracted trace control data.

  The above and other objects, features and advantages of the present invention will become apparent upon reading the following detailed description of exemplary embodiments in conjunction with the accompanying drawings.

It is a figure which shows the system which has a data processor and the diagnostic apparatus which analyzes the program execution by a data processor. 1 is a diagram illustrating a data processing apparatus having a trace unit according to an embodiment of the present invention. It is a figure which shows one Embodiment of the trace unit by this invention. It is a figure which shows schematically the setting of trace start / stop value. FIG. 4 is a diagram illustrating an example of instructions in a group, execution, and tracing. FIG. 4 is a diagram illustrating an example of instructions in a group, execution, and tracing. FIG. 4 is a diagram illustrating an example of instructions in a group, execution, and tracing. FIG. 4 is a diagram illustrating an example of instructions in a group, execution, and tracing. FIG. 4 is a diagram illustrating an example of instructions in a group, execution, and tracing. FIG. 4 is a diagram illustrating an example of instructions in a group, execution, and tracing. FIG. 6 shows a trace unit according to another embodiment of the invention. It is a figure which shows the flowchart which shows how a trace control value is set according to execution of an instruction | indication. It is a figure which shows the flowchart which shows how a trace control value is set according to execution of an instruction | indication. It is a figure which shows the flowchart which shows how a trace control value is set according to execution of an instruction | indication. It is a figure which shows how a trace control value changes during execution of an instruction group. FIG. 3 illustrates a method for tracing data according to an embodiment of the present invention.

  The system seen in FIG. 1 includes a data processing device 5 that partially speculatively executes an instruction stream, and a trace unit 40 that monitors instruction execution and generates a trace stream 42, the trace stream 42 being an output. 52 to the diagnostic device 140. The diagnostic device 140 has diagnostic logic 142, which may take the form of a software program. The diagnostic logic 142 analyzes the trace stream in connection with the program executed by the processor 10, and the trace stream is stored in the data store. The diagnosis logic 144 outputs information related to program execution by the data processing device 5, and the output information is useful for failure diagnosis.

  A data processing apparatus 5 including a trace unit 40 according to an embodiment of the present invention is shown in FIG. The data processing device 5 comprises a processor core 10 (data processing unit) and a trace unit 40 configured to monitor the processing activity of the processor core 10 and to generate trace data items indicative of the processing activity of the core, The data item is output at output 52 as a trace stream.

  The processor core 10 includes a fetch unit 20 and an execution unit 25. The fetch unit 20 fetches instructions from a memory (not shown), and these instructions are delivered to the execution unit 25 and executed by the execution unit 25. Since the processor core 10 is a speculative processor, the fetch unit 20 is configured to fetch instructions for the execution unit 25, which are predicted (but not guaranteed) by the branch prediction unit 30 on demand. The execution unit 25 executes these instructions speculatively, and cancels or commits the instructions when it is later determined whether the guess is correct.

  Trace unit 40 is configured to generate trace elements indicative of processing activity of processor core 10 including speculative instruction execution and output them as a trace data stream at output 52. While it is possible in principle that the trace unit 40 buffers trace data items generated in the context of speculatively executed instructions and releases them to the output trace stream when the speculation is resolved, A considerable storage space is required in the trace unit 40, which is expensive in terms of area.

  Therefore, the trace unit 40 of the embodiment shown in FIG. 2 generates trace data for both speculatively executed instructions and non-speculatively executed instructions, and when it is determined whether the guess is correct. It is configured to generate a cancel signal or a commit signal. Thus, the diagnostic device that analyzes the trace data can understand the trace data.

  In FIG. 3, the trace unit 40 is shown in more detail. The trace unit 40 includes a trace circuit 50 that receives a signal from the processor core. The trace unit monitors the signal, generates trace elements accordingly, outputs the trace elements in the form of a trace stream, and the trace stream is sent to the diagnostic device. The trace unit 40 also receives the trace enable signal, which sets the trace enable bit in the trace circuit. trace enable controls whether or not a trace element is output.

  The trace unit 40 of this embodiment has a register 60 for accumulating trace control data, and the trace control data controls the operation of the trace circuit 50 together with the trace enable value. Note that in some embodiments, these values are not stored in the register, and the data is only the detected signal value. Furthermore, these control values have two possible values in many embodiments and are generally represented as a single bit. The trace unit also has a data store 65 that stores trace information, such as trace control data regarding instructions that have been speculatively executed and not yet committed or canceled. With this information, when the instruction is canceled up to the value before execution, the register 60 is updated, and information on cancellation and commit of the instruction group is output to the trace stream. As a result, sufficient information is transmitted to the diagnostic device, and the diagnostic device can determine which of the items of the trace stream is related to the canceled command. The trace circuit outputs a trace signal indicating which instruction is canceled or committed, and also outputs a trace item indicating the processing activity of the processor. Thus, the diagnostic device can understand the trace stream and can recognize how many of the traced instructions have been canceled or committed.

  In order for the trace circuit to operate normally, it is important to reset the trace control value changed at the time of the speculative execution to a value before the execution of the illegal speculation.

  In order to manage speculative execution efficiently, instructions are managed as instruction groups. This is possible when instructions are grouped into indivisible instruction blocks that are committed and canceled together and no exceptions occur within the group.

  The trace circuit uses these groups when tracing instructions, and uses the trace key to count each time a trace valid instruction is executed and a trace element is output. Trace key values at the start and end of group execution are called first and last values and are stored in the data store 65. This allows the beginning and end of the group to be determined as instructions are committed and canceled as a group. Trace keys are sometimes output to allow the diagnostic device to accurately determine the processing position in the instruction stream. Normally, this can be determined by outputting a trace element indicating that a trace valid instruction has been executed and a count value indicating the number of instructions canceled or committed.

  Now, how the trace key is generated and stored will be described in detail. The trace unit 40 is provided with a trace index unit 70. The index unit 70 is configured to allocate an index value or a trace key to at least some of the trace data items generated by the trace unit 50. Specifically, the index unit 70 is configured to generate an index value as a predetermined index value sequence, and the (n + 1) th index value is determined from the nth index value in the predetermined sequence. In the illustrated embodiment, this function is provided by a counter 72 in the index unit 70.

  The trace unit 50 includes a counter 72 that provides a predetermined index value sequence, which the trace unit 40 can allocate to (part of) the trace data items to be generated. Trace unit 40 also includes a data store 65 that can store the index values generated by counter 72. The data store 65 stores the first and last counter values of each group that are speculatively executed, along with further trace control values for that group. For the first instruction in a speculatively executed instruction group, the trace unit 40 is configured to store the current counter value from the counter 72 in the first index storage unit (indexed by group number) of the data store 65. Is done. Conversely, when a new group starts, the current counter value is stored in the last index storage unit of the data store 65.

  In the illustrated embodiment, the data store 65 has sufficient entries to correspond to the processor's maximum guess depth in terms of instruction groups. The maximum guess depth of the processor is the maximum number of entries that must be held in the data store 65, beyond which the processor must commit or cancel the instruction group and the entry in the index storage unit is empty .

  Some data stores store oldest uncommitted values. This value is used to output to the diagnostic tool which instructions are actually committed in response to a signal to commit a particular group.

  It is not easy to trace instructions during speculative execution, especially when the value of trace enable switches during group execution. To be able to successfully track this execution, the data store 65 accumulates further values because more information is needed on the first and last count values.

  A register 60 that accumulates current trace control data for controlling the trace circuit accumulates a previously traced value, a sticky bit, an initial traced value, and a traced interesting value. The previously traced value is the trace enable value of the last instruction of the preceding group, and the sticky bit is set when the preceding instruction does not output the trace data, and is cleared when outputting. The value of the sticky bit when the last instruction of the preceding group is executed is stored in the data store 65 as the sticky bit of the succeeding group, but the value in the register 60 is updated and updated as the instruction is executed. The value is not stored in the data store 65 of the group. The initial traced value is the trace enable of the first instruction in the group, and traced interesting indicates that the traced instruction is in the group. From these values, the diagnostic device indicates, for example, that the trace circuit indicates that two groups have been committed, especially if the trace is not enabled and not actually traced in one of these groups. You can determine how they are related. With respect to the following figures, it will be explained how these values are updated and used.

  The data store 65 also stores the trace start / stop values for the group. This is the value of the start / stop bit before the first instruction in the group. If the trace is disabled in the stop state after the start transition, that is, if trace enable becomes 0, trace-enable depends on other sources until the stop transition.

  The start condition may be, for example, the address of the first instruction in the subroutine, and the stop condition may be the address of the last instruction in the subroutine. By doing this, only the instructions in this subroutine are traced.

  In order to make the start / stop behavior consistent after cancellation, it is necessary to accumulate the start / stop value in the data store and to return to the accumulated value at the time of cancellation. This is because the start / stop behavior is defined not only by speculatively executed instructions but also by structurally executed instructions.

  When a new group starts, the start / stop values before the first instruction in the group is processed are accumulated in the row in the data store corresponding to the group.

  When the group is canceled, the start / stop bits are taken from the row in the data store corresponding to the canceled instruction.

  FIG. 4 schematically shows how the start / stop bit is set and used to determine if the trace is enabled. When an instruction address is received, a check is performed to see if the instruction address is within the range defined when the trace unit was configured. If so, the start / stop bit is set. Similarly, verification is performed to check whether the instruction address is within the stop address range determined when the trace unit is configured. If within range, the start / stop bit is cleared.

  An example of instruction groups A, B, C, and D that are executed, traced, and committed is shown in FIG. The trace output in this case is an E atom, and the key is not output, but is updated for each instruction, and a part thereof is stored in the data store 65 of FIG.

  In this example, group A is executed. Since group A contains a branch instruction, trace element E is output when tracing is enabled, and key 1 which is the value of counter 72 in FIG. 3 is assigned to this instruction and accumulated as group A. And the counter increases. The next instruction to be executed is in group B. Since this is a new group, the current trace key value key 2 is assigned to the branch instruction of group B. Since group B contains branches and tracing is still enabled, another trace element is output and counter 72 is incremented to key 3. The next instruction is in a new group, which is also a branch, and trace is still enabled, so more trace elements are output, trace key 3 is assigned to this instruction, and counter 72 is incremented.

  The next instruction to be executed is in group D. This instruction is a trace invalid instruction. Since the trace circuit is configured not to generate a trace element, the trace element is not output and the key is not increased. Next is a branch instruction, which generates a trace element, the current value 4 of the trace key is assigned to it, and the counter is incremented. Next, when the trace circuit 50 receives from the processor a commit signal indicating that the group C has been committed, the group C and the preceding groups A and B are no longer speculative. Since this needs to be communicated to the diagnostic tool that is analyzing the trace output, a commit signal is added to the trace output. This commit signal must indicate exactly the committed group. For this purpose, the key value of the committed group minus the key value of the oldest previous commit stored (store 80 in FIG. 3) is output. In this case, since there is no commit in the preceding group, the output value is the key value key 3-0 allocated to the final instruction of group C, and the key 3 signal is output. The diagnostic device can now determine that the instructions in groups A, B, and C have been committed.

  The last key value key 3 stored in the group is stored in the oldest committed store.

  In this embodiment, instead of storing the first counter value and the last counter value for each group as seen in the data store 65 of FIG. 3, a single key value is stored in the data store 65. This is the key value assigned to the last instruction in the group.

  The example shown in FIG. 6 is similar to FIG. 5, but the trace is disabled during execution of some instructions. In FIG. 6, the trace is disabled for group C execution and group D half. In this case, the execution of group A triggers the output of the trace element, trace key 1 which is the current value of counter 72 is accumulated as the key value of group A, and counter 72 is incremented. Next, when the group B is entered, the current counter value 2 is accumulated as the group B, and execution of the branch instruction in the group B triggers the output of the trace element and the increase to the key value 3. The trace output is then disabled and the output of the trace element is not triggered when branch C is executed. Accordingly, the current value 3 of the counter key is accumulated as group C, but the value does not increase because the trace element is not output. Then, in a new group D, the first instruction is a trace invalid instruction, and in any case the trace is disabled, so no trace element is output and the counter is not incremented. Trace is then enabled and the next trace valid instruction to be executed is a branch in group D, so the trace element is output, the current key value 3 is accumulated as this group, and the counter is incremented to 4.

  The trace circuit receives a signal telling that group C is committed. A signal indicating this needs to be transmitted in the trace output stream. However, group C is not traced.

  To deal with this problem, a traced interesting value is used in the trace control data. This value is set when there is a trace valid instruction traced in the instruction group and is cleared when there is no traced instruction. That is, it is not set if there are no traced instructions. Therefore, in the case of group C, this is cleared. This is used when a group is committed or canceled. In this case, group C is committed and its traced interesting value is clear. Since the key value accumulated in group C is 3 and the traced interesting bit is clear, the commit is calculated to be the accumulated key value-oldest uncommitted value (in this case 0) -1, i.e. 2. The Therefore, a commit 2 signal is transmitted and the diagnostic apparatus can estimate that the previous two trace elements belong to the committed group. That is, it can be estimated that groups A and B are committed. If 1 is not subtracted from the commit value, a commit 3 signal is output, and the diagnostic tool for analyzing the trace output assumes that the first three traced instructions including branch D have been committed. This is an error. If traced-interesting is set, 1 is not subtracted from the key value, but in this case, branch C is traced.

  The oldest uncommitted value is then set to key 3.

  The traced-interesting value can also be used when the guess reaches the guess depth of the processor and the counter wraps around. In this case, the key to commit or cancel may be the same value as the oldest previous commit. This provides a calculation commit value of zero. Otherwise, it is not known whether the commit is 0 or the maximum guess depth N. This can be estimated from the last group of traced-interesting bits, and if it is set, the value must be N, not zero, and if it is clear, the value must be zero instead of N.

  In some embodiments, the data store 65 stores the first and last counter values of the instruction group. By using these values, it is possible to determine the value of the trace stream that needs to be canceled or committed in response to canceling and committing speculative instructions. This will be described below.

  In some embodiments, such as the embodiment seen in FIG. 3, the first counter value and the last counter value are stored in each group of data stores 65. The counter 72 provides a predetermined sequence of index values that the trace unit 40 can allocate to (part of) the trace data items that it generates. In the case of the first instruction in a speculatively executed instruction group, the trace unit 40 is configured to store the current counter value from the counter 72 as the initial value of the group, and conversely, a new group starts. Sometimes, the current counter value is stored as the last value of the group.

  The data store 65 is configured to have sufficient entries corresponding to the maximum speculative depth of the processor in terms of instruction groups. The maximum speculative depth of the processor is the maximum number of entries that must be held by the index storage unit, beyond which the processor must commit or cancel the instruction group and the entries in the index storage unit will be empty .

  The use of the first and last values will be described with reference to Table 1 below.

  Table 1 shows a counter value and an oldest uncommitted value in the trace unit 110 in a situation where the processor core 100 instructs to cancel the group B and commit the group A after speculatively executing the instruction groups A, B, and C. And how the tracking table is updated.

  Group A begins with a load (LDR) instruction, which is “interesting” and is currently being traced. The entry of the first index unit 230 corresponding to group A (“A.first”) is currently stored with a counter value of 0, and the counter is incremented to 1. Finally, the current counter value 1 is stored in the entry (“A. last”) of the last index unit 240 corresponding to the group A. The next instruction in group A is a move instruction (MOV), which is not “interesting” and is not traced. The last instruction in group A is a branch-if-equal (BEQ) instruction, which is “interesting” and is traced, so the counter is incremented to two. Then, the entry (“A. last”) of the last index unit 240 corresponding to the group A is updated with the current counter value 2. In the last step of each instruction, the entry of the last index unit 240 corresponding to the current group is always updated with the current counter value. Of course, this only has some effect if the counter is updated with that instruction. The remaining instructions in Table 1 do not explicitly explain this “last” value update.

  Group B begins with an ADD instruction, which is not “interesting” and is not traced, but because it is the first instruction of a new group, the current counter value 2 is stored in the entry of the first index value storage unit (B.first) = 2). The second instruction in group B is a SUB instruction, which is similarly not “interesting”, not traced, and does not update the value.

  Group C begins with a store (STR) instruction, which is “interesting” and is traced, so the C. The first counter value is stored in the first entry, and the counter is incremented to 3. The second instruction of group C is a branch-if-not-equal (BNE) instruction, which is also “interesting” and is traced, so the counter is updated to 4.

  Next, the processor core 100 instructs to cancel the groups B and C because the speculative execution of the group B is inappropriate. In response to this, the trace unit 110 (controlled by the trace control unit 200) refers to the current count value 4 of the counter 210 and the value 2 initially stored in the entry (B.first) of the index storage unit 230. The trace unit 110 determines that two trace data items should be canceled (4-2), and generates a trace data item indicating this. The counter 210 is reset to 2 (to cancel 2 items from 4).

  Next, the processor core 100 determines that the speculative execution of the instruction group A is appropriate and instructs the instruction group A to commit. In response, the trace unit 110 (under the control of the trace control unit 200) sends the value (currently 0) stored in the oldest uncommitted storage unit 250 and the entry (A. last) of the last index storage unit 240 corresponding to this group. ) Refer to 2. The trace unit 110 determines that two trace data items should be committed (2-0), and generates a trace data item indicating this. The value stored in the oldest uncommitted storage unit 250 is reset to the “last” value read in this group, to 2 in this example.

  In the embodiment described with reference to Table 1, cancellation and commit are performed by referring to the number of events, and the generated trace data item indicates the number of events to be canceled or committed. In another embodiment, the trace unit can generate a cancel / commit trace item by reference to the event number. In this case, in the case of a cancel trace item, the event number is taken from the “first” value, that is, from the corresponding entry in the first index value accumulation unit, and in the case of a commit trace item, from the “last” value, that is, the last index value accumulation. The event number is taken from the corresponding entry in the unit. Although it seems that hardware can be reduced by committing and canceling by event number (since subtraction is not required), when cancel / commit is instructed by the number of events, there is usually a leading zero, so it can usually be compressed. Whether to commit / cancel based on the “number of events” or to commit / cancel based on the “event number” can be determined according to a system request. That is, the determination can be made based on which of the hardware reduction of the trace unit and the bandwidth reduction in the trace stream is important.

  Further examples will be described with reference to Table 2 below. The trace unit in this example further screens the trace generated by not tracing the store (STR) instruction. The values of groups A and B in Table 2 are the same as those in Table 1. However, since the STR instruction is not traced in the first instruction of group C, the count does not increase. Thus, the count increases to 3 when a BNE instruction (traced) is encountered in group C.

  When the processor core issues a “cancel B” message, the trace unit 110 has a current count of 3. Since first is 2 (similar to the example in Table 1), it is determined that only one trace item should be canceled (3-2). Similarly, the count is decreased by 1 (decreased to a value of 2). When the processor core issues a “commit A” message as shown in Table 1, the oldest uncommitted count is 0, Since last = 2, two trace entries are committed. The oldest uncommitted count is updated to 2.

  The use of previous-traced control values in the control register 60 is illustrated in FIG. Here, since the instruction executed when the trace is off is canceled, the output of the trace on signal is prohibited because it is unnecessary. The previous-traced value is a trace enable value when the last instruction of the preceding group is executed. Therefore, in the example of FIG. 7, the previous-traced value of group B is clear. When trace is enabled in group B, a trace on signal is output along with trace element E in branch B, and a state element 2000 (not shown) that indicates the program execution position by the core when the trace is turned on. Is output. When group C is executed, tracing is turned off again. Thereafter, group C is canceled and group D is executed. Since group C is cancelled, the group preceding group D is group B, and the trace of this group is enabled, so the previous-traced value of group D is set. Although trace enable has changed, the trace circuit receives the setting of previous-traced and prohibits the output of the trace-on signal. If the group C is not canceled, the previous-traced is set in the group D, and the trace on signal is generated in response to the transition of the trace enable signal.

  FIG. 8 shows another example in which the value of trace enable changes. In this case, group A is a branch, trace is enabled, trace elements are output, and initial-traced is set because it is the trace enable value of the first instruction in the group. Trace is then not enabled and group B execution begins. Since the trace is not enabled by the first instruction of group B, initial-traced of group B is cleared, and since the trace is enabled by the final instruction of group A, previous-traced is set. Trace is enabled on the second instruction of group B, which is in the middle of the group, so in response, the trace on signal is always output, and state 3004 indicates the execution position of the processor when the trace is turned on. Is output. Thereafter, the next instruction of group B is executed and the trace element is output. A cancel signal instructing cancellation of group B is received from the core. Since there is one trace element output in group B, the cancellation is 1.

  The trace circuit checks the canceled group B initial-traced value and the currently accumulated previous-traced value. If initial-traced is clear and previous-traced is set, trace enable changes the value during execution of the canceled group, and the status element is output. A new state element is output according to these values.

  In this case, the next instruction to be executed is a trace invalid instruction of group C, and the status element 4000 is output according to the initial traced value accumulated in group B and the previously traced value accumulated in group C. The diagnostic device knows that the trace is from address 4000, not address 3004.

  In summary, if previous_traced taken from the same row of the table corresponding to the canceled group is 1 and initial_traced is 0, the force-state-output is output. In FIG. 8, group B is cancelled. The previous instruction of group B is traced, but the first instruction of group B is not traced, so previous_traced = 1 and initial_traced = 0. Since the previous_traced value is 1 in the first group after cancellation, the second trace-on is not output.

  There are four values for previous_traced and initial_traced.

  Another problem that arises when tracing speculative instructions found in FIG. 9 is addressed by embodiments of the present invention. As described above, since the execution of the trace invalid instruction can be suggested by tracing the execution of the trace valid instruction, the trace invalid instruction is not traced, and only the instruction specified in the trace valid instruction is traced. The amount produced can be reduced. Trace valid instructions are branch, read, store, etc., and trace invalid instructions are other instructions such as arithmetic instructions. However, if this type of tracing is used in conjunction with the ability to enable or disable trace, subsequent trace valid instructions are not traced when the trace is turned off, and therefore cannot indicate the execution of a trace invalid instruction. To deal with this problem, use the sticky value of the trace control data. If the last instruction of the group to be executed is not a trace valid instruction that triggers the output of the trace element, a sticky value is set for the subsequent group. This sticky value is stored in the data store of the subsequent group, and is set in the control register 60 of FIG. 3 that controls the trace. The sticky value is maintained in the trace control register 60 until the trace element is output, and is reset when the trace element is output. That is, when the trace is enabled and a trace valid instruction is encountered, the trace element is output and the sticky value is reset in the control register. The diagnostic device can determine that the last trace invalid instruction of the preceding group for which no trace element has been output has actually been executed.

  In FIG. 9, a sticky value is set for group C in response to execution of the trace invalid instruction of group B. Trace enable is off when the branch of group C is executed, but the sticky value is set, so the trace element is output. In this way, the diagnostic tool can indicate that a Group B NOP has been performed. After the trace element is output, the sticky value is reset in the control register 60, but the sticky value accumulated in the data store of group C is continuously set.

  In a similar example seen in FIG. 10, some of the speculatively executed instructions are canceled. In this case, the trace is enabled in group A, and the trace element is output. Trace is enabled in group B, but no trace element is output because it is a trace invalid instruction. However, the sticky value is set. Group C is then executed and the trace is not enabled but the sticky value is set, so the branch triggers the output of the trace atom. Next, the sticky value is reset in the control register 60 of FIG. 3, but the data store 65 continues to be set to group C. Group D is then executed, tracing is re-enabled, and a trace atom is output. Since the sticky value is set in the preceding group, there is no “trace-on” output.

  Next, cancel group C is received from the core, and cancel 2 is output to instruct the cancellation of the previous two atoms. When canceling group C, a part of the trace control values accumulated in group B is read into the control register. The sticky value stored in group B has been set and is read into the control register, causing an exception. Since a sticky value is set in the control register, an exception is traced even if trace enable is low.

  The trace unit 40 seen in FIG. 11 is similar to that of FIG. 3, but a trace control value of multiple-traced is added to the register 60 and the data store 65. In this embodiment, the apparatus is configured so that there are up to two trace valid instructions in the group. If there are two trace valid instructions included in the group, multiple traced is set, and there is one trace valid instruction in the group. If there is no (determined from traced_interesting), multiple traced is cleared. In this way, only the first key value or the last key value may be stored in the data store 65 in some embodiments, and the rest can be determined by whether or not a multiple traced value is set. Therefore, the remaining keys can be indicated by accumulating a single bit rather than accumulating a multi-bit count value.

  In another embodiment, the multiple-traced value is several bits wide and the total number of trace valid instructions in the group is stored. In this case, the counter can be updated using this value. Although this value is multi-bit wide, it is more efficient than accumulating two trace keys indicating the first count value and the last count value. In yet another embodiment, this is multi-bit wide and the total number of trace valid instructions in the group minus one is stored. Whether the trace valid instruction is 1 or 0 is determined from the traced_interesting value.

  The trace control value is set for each group, and is accumulated in the data store 65 when a new group is encountered. However, the traced-interesting is appropriately updated for each instruction in the group, and a final value for the group is accumulated. The first sticky value in the control register 60 is accumulated in the data store 65 of the group, but this may be updated as the group is executed, and the updated value is not accumulated in the data store.

  Figures 12a to 12c are flow diagrams illustrating how various trace control values are updated.

  FIG. 12a shows how the sticky bit is set and cleared. First, it is determined whether or not a new group has been received. If it has been received, the current sticky bit is stored in the data store 65. Next, whether or not a new group is received, it is determined whether or not the instruction is a trace valid instruction. If the trace valid instruction, the sticky bit is cleared. If not, the trace is enabled. The sticky bit is set if enabled. Next, if there is a trace valid instruction, the sticky bit is cleared, and if the instruction is not a trace valid instruction and trace is enabled, the sticky bit is set.

  FIG. 12b shows how the previous-traced is set. When a new group starts, the current value of previous-traced is accumulated in the data store 65. Next, it is determined whether or not the trace is enabled. If enabled, the previous-traced is set. If not enabled, it is determined whether the sticky bit is set. If it is set, the previous-traced is set. Is set, and if it is not set, previous-traced is cleared.

  FIG. 12c shows how initial_traced is updated and used to determine when to force a new state output when a group is canceled. When the execution of the group starts, it is determined whether or not the sticky bit is set. If the sticky bit is set, tracing is not enabled, but the previous_traced and initial_traced values of the canceled group need to be considered.

  If the sticky bit is not set, it is determined whether tracing is enabled. If not enabled, initial_traced is cleared (this is the trace_enable value of the first instruction in the group), and if enabled, it is determined whether this is the first instruction after cancellation. If it is the first instruction after cancellation, consider the previous_traced value and initial_traced value of the canceled group.

  If previous_traced is set for a canceled group, it means that tracing was enabled when the last instruction of the group preceding the canceled group was executed, and if initial_traced is clear, cancel This means that tracing was not enabled when the first instruction of the specified group was executed. During execution of the canceled group, tracing may be enabled and a status element may have been output. When this is detected, a force new state is generated. When it is determined that the group is canceled and trace_enable transitions from 0 to 1 and the state is output, a new state is output, and the trace diagnosis tool can determine the execution position of the program.

  In this case, initial-traced is cleared if tracing is not enabled in the first instruction of the group (if initial_traced is cleared, tracing was not enabled, and the previous value of the canceled group is set to the previous value). Reset). If initial_traced is set in the canceled group, initial-traced is set because tracing is enabled by the first instruction in this group.

  If the instruction is not the first instruction after cancellation or previous_traced is not set, tracing is enabled on the first instruction in the group and initial_traced is set to reflect this in initial_traced.

  Next, when a new group starts, initial_traced of the group is accumulated.

  FIG. 13 shows an example of instruction execution and how the counter key value and the trace control value change. The first instruction to be executed is in group A, has address 1000, and is a branch instruction. Trace is enabled, the trace element is output, and the current counter value key 1 is stored as the trace key for this instruction. At this time, the sticky value is 0 and the initial trace is set to 1. There is no load store, no multiple trace instruction, no previously traced value, and the oldest committed instruction is set to zero.

  The next instruction to be executed is in group B and is a trace invalid instruction. Trace is still enabled and the counter is incremented to 2, so key 2 is accumulated for this group and the sticky value is set by executing the trace invalid instruction. Since the trace was enabled when the last instruction of the preceding group executed, the previously traced value was set to 1, and since trace was enabled when the first instruction of this group was executed, initial traced was set to 1. The

  The next instruction to be executed is in group C. This is also a trace invalid instruction and the trace is not enabled. Since the counter value does not increase, this instruction in group C is assigned key 2 and the sticky value continues to be set.

  The next instruction to be executed is a branch and trace enable is still off. However, since a sticky value is set, a trace atom is output to instruct the diagnostic device that analyzes the trace stream that the instruction has been executed in 3000. For this instruction, the counter value key 2 is accumulated and the counter is incremented. The sticky value is reset according to the output of the trace atom.

  The next group to be executed is group D, the trace is enabled, and a trace element is output because it is a branch instruction. Since the counter value is key 3, key 3 is accumulated and allocated to this instruction. The sticky value is still 0, and since trace was not enabled when the last instruction of group C was executed, previously traced was 0, and the trace was enabled when the first instruction of group D was executed, so initial traced is 1.

  The trace circuit then receives a signal instructing to cancel the instruction up to group C. Since the key accumulated in group C is key 2 and oldest committed is 0, a cancel signal of 2-0, that is, 2 is transmitted to the diagnostic apparatus in the trace stream, and the counter is decreased by 2. The control state controlling the trace is restored from the value of the data store related to group C.

  The next instruction received is in group E, it is a branch, the trace is enabled so that the trace element is output, the key is incremented, and key 2 is accumulated for this instruction. Since both previous traced and initial trace are set to 1 and there are further trace valid instructions load in this group, multiple trace is set to 1. The trace load store is also set to 1 to indicate that the address of the load and store instructions needs to be output. In this case, no address is output because the trace is not enabled.

  The next instruction is in group F and is a trace invalid instruction. Since trace enable is turned on at this time, trace on and a status output are output. The counter does not increment and the sticky value is not set because it is a trace invalid instruction.

  Since the next instruction of group F is a branch, the trace element is output. The sticky value is reset and the counter is incremented to 4.

  Next, an instruction to commit group B is received from the core. Since the key value accumulated in the group B is “key 2”, the commit 2 signal is output because the oldest committed value is 0 in normal cases. However, since the group B traced interesting is 0 and indicates that the group B has not been traced, the commit 1 indicating that the group A branch instruction has been executed is output.

  The next group is group G. The counter continues to increment, and since this is a trace valid instruction and the trace is enabled, an atom is output. Note that the counter is not affected by the commit signal.

  A flow diagram illustrating a method according to an embodiment of the invention is shown in FIG.

  The behavior of a processor that processes an instruction stream arranged in an instruction group is monitored by a trace control circuit. The storage circuit stores current trace control data for controlling the trace circuit. When a group is executed, at least a part of the trace control data of the executed group is stored in the data store together with an identifier for identifying the group. The Next, it is determined whether or not the processor has canceled the speculatively executed instruction group. This is determined by a trace control circuit that monitors the processor. When the instruction is canceled, the trace control data of the instruction group immediately before the canceled instruction is fetched and stored in the storage circuit, whereby the trace circuit is controlled by appropriate trace control data. If the instruction is not canceled, the trace circuit continues to monitor the processor under the control of the trace control data.

  Although illustrative embodiments of the present invention have been described herein with reference to the accompanying drawings, the present invention is not limited to these embodiments and departs from the scope and spirit of the invention as defined by the appended claims. It should be understood that various changes and modifications can be made by those skilled in the art without limitation.

50 Trace Circuit 60 Register 65 Data Store 70 Trace Index Unit 72 Counter 80 Store

Claims (25)

A trace unit that generates trace data items indicative of processing activity of at least one processor executing at least one instruction stream, the at least one instruction stream comprising a plurality of instruction groups, wherein the at least one processor Speculatively executing at least part of the instructions, the trace unit comprising:
A trace circuit controlled by current trace control data and monitoring the behavior of the at least one processor;
A data store for storing at least a part of the trace control data related to the corresponding instruction group among the executed instruction groups;
The trace circuit is configured to store the trace control data in the data store in response to detection of execution of the instruction group;
The trace circuit is responsive to detecting that the at least one processor canceled the speculatively executed instruction group and at least a portion of the trace control data stored in the data store And a trace unit for controlling the trace circuit according to the extracted trace control data.   The trace unit further comprises a storage circuit that stores the current trace control data to control the trace circuit, the trace circuit canceling the at least one instruction group executed speculatively. 2. The trace unit according to claim 1, wherein the extracted trace control data is stored in the storage circuit in response to detecting one processor.   The trace unit according to claim 1, wherein the trace control data is stored in the data store together with an identifier for identifying the corresponding instruction group.   The trace unit according to claim 1, wherein the trace circuit is configured to retrieve the at least part of the trace control data stored in the data store of the canceled instruction group.   The trace unit of claim 1, wherein the instruction group comprises instructions grouped such that all of the instructions in the group execute when the first instruction in the group is executed.   The trace unit is responsive to an asserted trace enable signal to allow the trace circuit to monitor the behavior of the at least one processor and is responsive to an unasserted trace enable signal to respond to the behavior of the trace circuit. The trace unit according to claim 1, wherein monitoring is prohibited.   The trace control data includes a sticky value, the trace circuit responds to the sticky value having a predetermined value, and a trace value of a trace valid instruction to be executed later regardless of whether or not the trace enable signal has an enabled value. The trace unit according to claim 6, wherein the trace valid instruction is an instruction that triggers output of a trace data item.   8. The trace circuit sets the sticky value in the trace control data in response to detecting execution of an instruction that is not a trace valid instruction that triggers output of a trace data item. The described trace unit.   The trace circuit is responsive to detecting execution of a final instruction in one instruction group of the instruction group that is not a trace valid instruction that triggers output of a trace data item, and sets the sticky value in the trace control data. 9. The trace unit according to claim 8, wherein the set sticky value is stored in the data store of the subsequent instruction group.   The trace control data comprises a previous-traced value, and the trace circuit is responsive to detecting that trace is not enabled when a last instruction of a preceding group is executed, and for the subsequent instruction group Setting a previous-traced value, the trace circuit reacts to the processor canceling a speculatively executed instruction group and the previous-traced value stored and set in relation to the canceled group The trace unit according to claim 1, wherein a trace element instructing that the trace is turned on is output.   The trace control data comprises an initial-traced value, and the trace circuit is responsive to an output of a trace state element indicating an instruction address during execution of an instruction group, sets the initial-traced value of the group, and The trace circuit outputs a further state element indicating an instruction address of the instruction executed after the cancellation in response to detecting the processor that cancels the instruction group in which the initial-traced value is set. The trace unit according to claim 1.   The trace control data includes a traced-interesting value, the traced-interesting value is set in response to the output of a group trace element, and is cleared when the group trace element is not output. The trace unit according to claim 1.   The trace control data includes a trace multiple value, and when the value is set, the group includes a plurality of trace valid instructions for generating a trace element, and when the value is not set, the group The trace unit according to claim 1, which means that comprises one or zero trace valid instructions.   The trace unit according to claim 1, wherein the trace control data comprises a trace multiple value, and the value indicates the number of trace valid instructions in the group for generating a trace element.   The trace unit is configured to generate an index value and store the index value allocated to each of the instruction groups, the index value being updated each time a trace element is generated. The trace unit according to claim 1.   The trace unit includes a counter that generates the index value, and the trace circuit indicates an initial counter value that indicates the counter value at the start of execution of the group and the counter value at the end of execution of the group. The trace unit according to claim 15, wherein at least one of the last counter values is stored in the data store of each instruction group.   The trace unit includes a counter that generates the index value, and the trace circuit indicates an initial counter value that indicates the counter value at the start of execution of the group and the counter value at the end of execution of the group. 16. The trace unit according to claim 15, wherein a last counter value is stored in the data store of each instruction group.   The trace circuit receives a cancel instruction from the data processing apparatus indicating that the speculatively executed selected instruction group is canceled, and generates a cancel trace item indicating the canceled selected instruction group; 18. The trace unit according to claim 17, wherein the cancel trace item is configured to include information on a difference between the current counter value and the counter value at the start of execution of the canceled group. .   The trace control data includes a traced-interesting value, the traced-interesting value is set in response to the output of a group trace element, and is cleared when the group trace element is not output. The trace unit of claim 18, wherein a circuit is configured to determine the information about the difference depending on the traced-interesting value.   The trace unit is responsive to receiving a commit indication from the data processing device that communicates that a speculatively executed selection instruction group has been committed, and generates a commit trace item indicating the selection group; and The trace unit according to claim 16, characterized in that it includes information on the difference between the current counter value and the last counter value of the selected group.   The trace control data includes a traced-interesting value, the traced-interesting value is set in response to the output of a group trace element, and is cleared when the group trace element is not output. 21. The trace unit of claim 20, wherein a circuit is configured to determine the information regarding the difference depending on the traced-interesting value.   The trace control data includes a trace start / stop value of the group, the trace start / stop value affects whether or not a trace enable is set, and the trace start / stop value is detected by the at least one processor. The trace unit according to claim 1, wherein the trace unit is set according to a predetermined behavior.   A data processing unit comprising: a data processing device that executes an instruction stream; and the trace unit according to claim 1 that monitors the data processing device. A method for generating trace data items indicative of processing activity of at least one processor executing at least one instruction stream, wherein the at least one instruction stream comprises a plurality of instruction groups, the at least one processor comprising the instructions And at least partly performing the method, the method comprising:
Monitoring the behavior of the at least one processor using a trace circuit controlled by current trace control data;
Storing at least a portion of the trace control data associated with an instruction group of the executed instruction group;
Accumulating in the data store of the instruction group executed immediately before the speculative execution instruction to be canceled in response to detecting that the at least one processor has canceled the at least one instruction group executed speculatively Extracting at least a part of the trace control data obtained, and controlling the trace circuit according to the fetched trace control data. A tracing device for generating trace data items indicative of processing activity of at least one processor executing at least one instruction stream, wherein the at least one instruction stream comprises a plurality of instruction groups, wherein the at least one processor Speculatively executing at least part of the instructions, the tracing device comprising:
Trace monitoring means for monitoring the behavior of the at least one processor controlled by current trace control data;
Data storage means for storing at least a part of the trace control data related to the corresponding instruction group among the executed instruction groups;
The trace monitoring means stores the at least part of the trace control data in the data storage means in response to detection of execution of the instruction group;
The trace monitoring means is responsive to detecting that the at least one processor cancels the at least one instruction group executed speculatively, and the trace monitoring means is executed before the canceled speculative execution instruction. A tracing apparatus characterized in that at least a part of the trace control data stored in the data storage means of an instruction group is extracted and the trace monitoring means is controlled by the extracted trace control data.

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