JP5598916B2 - Gate electrode and manufacturing method thereof - Google Patents

Description

  The present invention relates to an nMOSFET gate electrode and a method of manufacturing the same, and more particularly to a gate electrode material suitable for controlling a flat band voltage and having a stable structure.

  In a CMOS consisting of a metal gate electrode / high dielectric constant gate insulating film, control of the flat band voltage of the nMOSFET is required, and so far nitride materials of TiN and TaN and carbide materials of TaC have been popular as n gate electrode materials. Has been considered. However, the nitride material has a problem in that nitrogen diffuses into the high dielectric constant gate insulating film and causes deterioration of electrical characteristics. Further, although TaC discloses that the flat band voltage is controlled by introducing oxygen or nitrogen, the instability of the structure is a serious problem.

  The object of the present invention is to solve the problems of the nMOSFET gate electrode using the above-mentioned conventional material, to control the flat band voltage, and to be exposed to the high temperature used in the semiconductor device manufacturing process. Another object of the present invention is to provide a gate electrode and a method for manufacturing the same with little deterioration in characteristics.

According to one aspect of the present invention, tantalum carbide, yttrium _{Ta 1-x Y x C y} , titanium carbide, yttrium _{Ti 1-x Y x C y} , zirconium carbide, yttrium _{Zr 1-x Y x C y} , hafnium carbide, yttrium Hf _{1 -x} Y _x C _y, vanadium carbide, yttrium _{V 1-x Y x C y} , niobium carbide, yttrium _{Nb 1-x Y x C y} , molybdenum carbide, yttrium _{Mo 1-x} Y _{x C y} and tungsten carbide yttrium _{W 1-x} A gate electrode of an nMOSFET made of a carbide selected from the group consisting of Y _x C _y is provided.
The y may be greater than 0 and less than or equal to 5.
The carbide may be tantalum yttrium carbide.
The x may be greater than 0 and less than or equal to 0.5.
The x may be 0.4 or less.
According to another aspect of the present invention, there is provided a method for manufacturing the gate electrode, wherein the carbide film is formed on the gate insulating film.
The carbide film may be formed by a co-sputtering method using the carbide target not containing yttrium and the yttrium target.
The carbide film may be formed by MOCVD or ALD.

  According to the present invention, a gate electrode having a stable structure even after a heat treatment of about 500 ° C. to 600 ° C., having a low resistance, and capable of adjusting a flat band voltage by adjusting the amount of Y element added, and the gate electrode A manufacturing method is given.

Ta _1-x Y _{x C y} diagram showing an X-ray diffraction pattern changes when changing the x value of the film. It shows a resistance change when changing the x value of the Ta _1-x Y _{x C y} film. Ta _1-x Y _{x C y} shows the C-V characteristics change when changing the x value of the film. It shows the shift of the flat band voltage when changing the x value of the Ta _1-x Y _{x C y} film. It shows the shift of the flat band voltage for each heat treatment conditions HfO ₂ film and HfSiO _x film when changing the x value of the Ta _1-x Y _{x C y} film.

In the present invention, by adding a Y element having a small work function to TaC _x as a gate electrode material of an nMOSFET, the work function can be reduced, the structure is stable even after heat treatment at 600 ° C., low resistance and Y element The flat band voltage can be adjusted in accordance with the amount of addition. Here, since the gate electrode is required to be a low-resistance conductor, the x value of Ta _1-x Y _x C _y is preferably 0.50 or less because the influence of heat treatment is small (here, The y value (desirably takes a value in the range of greater than 0 and less than or equal to 5 with respect to (1-x) which is the amount of Ta + (x which is the amount of Y) = 1)). From the viewpoint of the stability of the element structure with respect to the heat treatment temperature, when the heat treatment temperature up to 500 ° C. is required, the x value of Ta _1-x Y _x C _y is preferably 0.50 or less, and up to 600 ° C. For example, the x value is preferably 0.40 or less. From the viewpoint of the stability of the crystallized FCC structure, the x value of Ta _1-x Y _x C _y is preferably 0.40 or less.

Although the same rare-earth La and II group Sr and Ba carbides have a small work function, their structures are unstable, such as easily reacting with oxygen and moisture in the air. On the other hand, Y carbides of Y ₂ C ₃ , Y ₄ C ₅ and Y ₄ C ₇ are stable in air. In this respect, the present invention using Y has an advantage over the other elements described above.

Instead of TaC _y, other _{TiC y, ZrC y, HfC y} , VC y, NbC y, may be added to Y element to MoC _y or WC _y carbide. Even in this case, when the sum of the amounts of M (Ti, Zr, Hf, V, Nb, Mo, or W) and Y is ₁ (that is, M _1−x Y _x C _y ), the y value is more than 0. Largely 5 or less is desirable.

The FET manufacturing process based on the embodiments of the present invention will be described below. However, as a matter of course, the present invention is not limited to the electrodes described herein or the manufacturing method thereof.
In the gate last process, first, a stack structure of a SiO ₂ dummy gate insulating film and a polysilicon dummy gate electrode is formed, and a source / drain is formed using the dummy gate electrode as a mask. Subsequently, the dummy gate electrode is embedded with an insulating film, and the surface of the insulating film is planarized by CMP (Chemical Mechanical Polishing) or the like, and then the dummy gate electrode and the dummy gate insulating film are selectively removed.

Subsequently, a gate insulating film is formed from the silicon layer side. Specifically, after removing the natural oxide film on the silicon layer with a diluted hydrofluoric acid solution, for example, a silicon oxide film having a thickness of about 0.1 to 2 nm is deposited by a high-temperature heat treatment oxidation method at 950 ° C. or higher. About 1 to 8 nm by an ALD (Atomic Layer Deposition) method using an O (oxygen) source of H ₂ O and a Hf (hafnium) source of TEMAHf (Tetrakis-Ethylmethylamido-Hafnium: Hf (NEtMe) ₄ ) on the film, for example. After depositing a hafnium oxide (HfO ₂ ) film, an annealing process is performed to form a gate insulating film. This annealing process is performed at 700 ° C. or higher in an N ₂ atmosphere, for example.

  In this embodiment mode, hafnium oxide is used as the high dielectric constant film (high-k film) constituting the gate insulating film. This hafnium oxide has a higher dielectric constant than silicon oxide film and silicon oxynitride film, so the physical film thickness can be increased by (dielectric constant of hafnium oxide film / dielectric constant of silicon oxide film) times, resulting in leakage current. Can be reduced. Therefore, a hafnium oxide film may be formed directly on the silicon layer in order to reduce the leakage current. In the present embodiment, hafnium oxide is used as the high dielectric constant film, but high dielectric constant dielectrics such as hafnium nitride silicate, Hf—Si—O, Hf—Al—O, and Hf—Al—O—N are also used. Can be used.

Subsequently, tantalum carbide, yttrium on the gate insulating film _{(Ta 1-x Y x C} y) to form a metal gate electrode. Specifically, a metal gate electrode is formed by depositing a Ta _1-x Y _{x Cy} film of about 5 to 50 nm by a co-sputtering method using a tantalum carbide (TaC _y ) target and an yttrium (Y) target. To do.

As shown in Table 1, x value of Ta / Y ratio by changing the sputtering power ratio of TaC _y target and Y target can be varied.

FIG. 1 shows the results of X-ray diffraction measurement of Ta _1-x Y _x C _y films with different x values. An x value of 0.40 or less indicates an FCC structure of TaC, and when it is 0.50 or more, it turns out to be amorphous. It can be seen that the FCC structure is stable even after heat treatment at 600 ° C.

FIG. 2 shows the relationship between the x value of the Ta _1-x Y _x C _y film and the resistance. When the x value is 0.50 or less, it can be seen that even at a heat treatment temperature of 600 ° C., the resistance value is equivalent to that of an as-depo (as-depo, not particularly post-treated) film. On the other hand, when the x value is 0.68, the resistance tends to increase at a heat treatment temperature of 500 ° C. or higher.

FIG. 3 shows the capacitance (C) -gate voltage (V) characteristics of a MOS capacitor having a Ta _1-x Y _x C _y gate electrode / HfO ₂ / SiO ₂ / Si structure. It can be seen that the CV curve when the x value of the as _- deposited Ta _1-x Y _x C _y gate electrode is changed shifts in the negative direction as the x value increases.

FIG. 4 shows the change of the flat band voltage V _fb with respect to the x value in the Ta _1-x Y _{x Cy} gate electrode / HfO ₂ / SiO ₂ / Si structure. The flat band voltage was calculated from the CV characteristics of the MOS capacitor. In the CV characteristic, the measured value was reproduced with an ideal curve regardless of the x value in the Ta _1-x Y _x C _y film. Asdepo, reduction treatment at 400 ° C. (FGA: Forming Gas anneal) and heat treatment at 500 ° C. and 600 ° C. in a nitrogen atmosphere, both show a tendency that the flat band voltage shifts in the negative direction as the x value increases. This is because the Do Y atoms small work function that is added to TaCy material, the work function of the Ta _1-x Y _x C _y gate electrode is changed to a small value. Further, it was found that good CV characteristics can be obtained when the x value is 0.50 or less at 500 ° C. and the x value is 0.40 or less at 600 ° C. Under each heat treatment condition, it has been found that when the x value is higher than that, the breakdown voltage of the gate insulating film is lowered and the leakage current is increased.

FIG. 5 shows the change (shift) V _fb shift of the flat band voltage V _{fb with} respect to the heat treatment conditions when the HfO ₂ film and the HfSiO _x film are used as the high-k gate insulating film. The flat band voltage shift with respect to each heat treatment condition of the HfO ₂ film and the HfSiO _x film when the x value of the Ta _1-x Y _x C _y film is changed shows almost the same tendency and depends on the material of the high-k gate insulating film. It can be seen that there is no significant difference.

The Ta _1-x Y _x C _y gate electrode has been described by the sputtering method, but may be formed by the MOCVD method or the ALD method.

Subsequently, electrodes such as Ti, TiN, AL, and W are formed on the Ta _1-x Y _x C _y gate electrode as a buried electrode, and then planarized by a CMP process. After that, an nMOSFET can be manufactured by performing an insulating film formation, contact hole formation to the source / drain portion, and contact metal formation using a lithography process.

  As described above, according to the present invention, it is possible to realize a gate electrode with a stable structure even after heat treatment and capable of adjusting a flat band voltage, which can greatly contribute to improving the performance of an nMOSFET device. is there.

JP2009-272368

Claims (6)

Tantalum carbide, yttrium _{Ta 1-x} Y _{x C y} or Ranaru nMOSFET gate electrode having a FCC structure.   The gate electrode according to claim 1, wherein y is greater than 0 and 5 or less. The gate electrode according to claim 1 , wherein the x is 0.4 or less . 4. The method of manufacturing a gate electrode according to claim 1, wherein the tantalum yttrium carbide film is formed on the gate insulating film . 5. The method of manufacturing a gate electrode according to claim 4, wherein the tantalum carbide yttrium film is formed by a co-sputtering method using a tantalum carbide target and an yttrium target . 5. The method for manufacturing a gate electrode according to claim 4 , wherein the tantalum carbide yttrium film is formed by MOCVD or ALD .