JP5589666B2 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- JP5589666B2 JP5589666B2 JP2010183371A JP2010183371A JP5589666B2 JP 5589666 B2 JP5589666 B2 JP 5589666B2 JP 2010183371 A JP2010183371 A JP 2010183371A JP 2010183371 A JP2010183371 A JP 2010183371A JP 5589666 B2 JP5589666 B2 JP 5589666B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Description
本発明は、搭載された半導体素子を冷却する機能を具備した半導体装置に関するものである。 The present invention relates to a semiconductor device having a function of cooling a mounted semiconductor element.
半導体集積回路（ＬＳＩ）など半導体素子の更なる高性能化に伴い、発熱量が増大するため、素子の冷却技術の重要性が高まっている。半導体装置に適用される代表的な冷却方式としては、空冷方式と冷媒循環方式とがある。 As the semiconductor device such as a semiconductor integrated circuit (LSI) further increases in performance, the amount of heat generation increases, and therefore the importance of element cooling technology is increasing. Typical cooling methods applied to semiconductor devices include an air cooling method and a refrigerant circulation method.
空冷方式では、半導体素子の接合部近傍、具体的には素子パッケージの一方の面ないし両面にヒートシンクを具備させ、このヒートシンクに冷却風を当てて熱を奪う方法である。 The air cooling method is a method in which a heat sink is provided in the vicinity of a junction portion of a semiconductor element, specifically, one surface or both surfaces of the element package, and heat is taken away by applying cooling air to the heat sink.
図４に空冷方式の例を示す。本図は、空冷方式を用いた半導体装置１０１の断面模式図であり、回路基板１０２上に、半導体素子１０３を含み、その電極１０４と接続するはんだ１０５を外部出力端子とする半導体パッケージ１０７を、回路基板１０２の電極パッド１０６と接続する。半導体パッケージ１０７上に熱伝導性を考慮した接着剤などの材料である、ＴＩＭ（熱界面材料、Ｔｈｅｒｍａｌ Ｉｎｔｅｒｆａｃｅ Ｍａｔｅｒｉａｌ）１０８を介して、ヒートシンク１０９を装着する。このヒートシンク１０９や回路基板１０２に冷却風を当てて冷却する。 FIG. 4 shows an example of the air cooling method. This figure is a schematic cross-sectional view of a semiconductor device 101 using an air cooling system. A semiconductor package 107 including a semiconductor element 103 on a circuit board 102 and having a solder 105 connected to the electrode 104 as an external output terminal is shown in FIG. It connects with the electrode pad 106 of the circuit board 102. A heat sink 109 is mounted on the semiconductor package 107 via a TIM (Thermal Interface Material) 108, which is a material such as an adhesive considering thermal conductivity. The heat sink 109 and the circuit board 102 are cooled by applying cooling air.
空冷方式で冷却するためには、相当の放熱面積を必要とする。発熱量の増大に対応するためにはヒートシンクの大型化か、あるいは冷却風の風量の増大が必要である。半導体素子の周辺には様々な電子部品が設置されるため、スペースが少なく、半導体素子直上に設けられるヒートシンクの大型化は容易ではない。また、冷却風の増大は送風ファンの電力増加だけでなく、ファンの風切り音が増すことによる騒音増大にもつながるので、風量の増大は極力避けたい。 In order to cool by the air cooling method, a considerable heat radiation area is required. In order to cope with an increase in the amount of heat generation, it is necessary to increase the size of the heat sink or increase the amount of cooling air. Since various electronic components are installed around the semiconductor element, the space is small, and it is not easy to increase the size of the heat sink provided immediately above the semiconductor element. Further, the increase in cooling air not only increases the power of the blower fan, but also increases the noise due to the increase in the wind noise of the fan, so an increase in the air volume should be avoided as much as possible.
冷媒循環方式は、基本的に、液状の冷媒をポンプにより強制的に循環し、冷媒への熱伝達により半導体素子の熱を奪う方法である。通常、二つの熱交換器がパイプにより連結された構造をもち、流路の途中に冷媒を循環させるためのポンプがある。半導体素子の熱は、パッケージ直上に設置された第一の熱交換器に伝わり、内部の冷媒の温度を上昇させることにより、顕熱として冷媒に吸収される。第二の熱交換器において冷却された冷媒は再び第一の熱交換器に還流する。 The refrigerant circulation method is basically a method in which a liquid refrigerant is forcibly circulated by a pump, and heat of the semiconductor element is taken away by heat transfer to the refrigerant. Usually, there is a pump for circulating a refrigerant in the middle of a flow path having a structure in which two heat exchangers are connected by a pipe. The heat of the semiconductor element is transferred to the first heat exchanger installed immediately above the package, and is absorbed by the refrigerant as sensible heat by increasing the temperature of the internal refrigerant. The refrigerant cooled in the second heat exchanger returns to the first heat exchanger again.
この冷媒循環方式の利点は、放熱器となる第二の熱交換器を半導体素子から離れたところへ設置できることにある。この利点により電子部品が少なく、スペース上の制限が少ない領域に大きな放熱器を設置して、少ない風量で効率的に冷却することが可能となる。しかし、冷媒の顕熱を利用した熱輸送を伴うため、冷媒の循環にポンプを必要とし、冷却に余分な電力を必要とする。 The advantage of this refrigerant circulation system is that the second heat exchanger that serves as a radiator can be installed at a location away from the semiconductor element. Due to this advantage, it is possible to efficiently cool with a small air volume by installing a large radiator in a region where there are few electronic components and space is limited. However, since it involves heat transport using the sensible heat of the refrigerant, a pump is required to circulate the refrigerant, and extra power is required for cooling.
上記冷媒循環方式において、熱輸送を効率的に行うために、冷媒の蒸発潜熱を利用する方法が提案されている。図５はその方法の一例を説明するための模式図である。図において、発熱体１１０は、例えば、電子基板１１１上にＬＳＩなどの電子部品１１２が実装されたもので、その表面に防水層１１３と含水層１１４とが形成されたものである。含水層１１４は毛細管現象で水を吸い上げる効果を有するもので形成され、発熱体１１０の凹凸面でも均等に覆うように形成されている。缶体１１５は密閉空間１１６を構成し、その底部の水溜部１１７には水１１８が貯液されている。発熱体１１０は含水層１１４の端部を水１１８に浸漬するようにして缶体１１５内に収容されている。缶体１１５と減湿装置１１９が空気循環路としての管路１２０により連結され閉ループを構成している。そして、空気循環手段としての空気循環器１２１が管路１２０に配設され、循環空気Ａが閉ループ内を循環するように構成されている。さらに、減湿装置１１９の底部と缶体１１５の底部とが返水手段としての返水管１２２で連結され、減湿装置１１９の底部の底部に溜まった水が返水管１２２を介して缶体１１５の水溜部１１７に返水されるように構成されている。減湿装置１１９は、例えば、冷媒圧縮式空気冷却機で構成する。 In the above refrigerant circulation system, a method using latent heat of vaporization of the refrigerant has been proposed in order to efficiently carry out heat transport. FIG. 5 is a schematic diagram for explaining an example of the method. In the figure, the heating element 110 is, for example, one in which an electronic component 112 such as LSI is mounted on an electronic substrate 111, and a waterproof layer 113 and a water-containing layer 114 are formed on the surface thereof. The water-containing layer 114 is formed to have an effect of sucking water by capillary action, and is formed so as to evenly cover the uneven surface of the heating element 110. The can body 115 constitutes a sealed space 116, and water 118 is stored in the water reservoir 117 at the bottom thereof. The heating element 110 is accommodated in the can body 115 so that the end of the water-containing layer 114 is immersed in the water 118. The can body 115 and the dehumidifying device 119 are connected by a pipe line 120 as an air circulation path to form a closed loop. And the air circulator 121 as an air circulation means is arrange | positioned by the pipe line 120, and it is comprised so that the circulating air A may circulate through the inside of a closed loop. Further, the bottom of the dehumidifying device 119 and the bottom of the can body 115 are connected by a water return pipe 122 serving as a water return means, and water accumulated at the bottom of the bottom of the dehumidifying device 119 passes through the water return pipe 122. The water reservoir 117 is configured to return water. The dehumidifying device 119 is composed of, for example, a refrigerant compression air cooler.
この方法は冷媒（空気）の循環に空気循環機を用いており、このため、これを作動するには電力を必要とする。また、水の蒸発潜熱を用いていることから、電子部品の絶縁のために防水層を設ける必要があることから、これが、熱伝導効率の低下を招き、発熱体表面から直接熱を奪う場合に比べ、冷却効果が劣る。 This method uses an air circulator to circulate the refrigerant (air), and thus requires electric power to operate it. In addition, because it uses the latent heat of vaporization of water, it is necessary to provide a waterproof layer to insulate electronic components.This leads to a decrease in heat conduction efficiency, and when heat is taken directly from the surface of the heating element. In comparison, the cooling effect is inferior.
上記の冷却方式においては、冷却装置と素子表面の発熱部位との間にはパッケージ材（防水層）やＴＩＭなどの介在物が存在し、冷却効果を低下させている。冷却効果の向上に限らず、省スペースの観点からも、素子表面からの直接放熱をすることが望ましい。 In the cooling method described above, inclusions such as a package material (waterproof layer) and TIM are present between the cooling device and the heat generating portion on the element surface, thereby reducing the cooling effect. It is desirable to directly radiate heat from the element surface not only from the improvement of the cooling effect but also from the viewpoint of space saving.
半導体素子表面から直接放熱させる技術として、低沸点で絶縁性の冷媒中に、ＬＳＩやＬＳＩモジュールを浸漬する技術が提案されている。図６は、その例を説明するための断面模式図である。図において、半導体装置１２３は、ヒートパイプ１２４と、その内部に半導体チップ１２５を備え、半導体チップ１２５は配線１２６を介してヒートパイプ１２４の外部と電気的に接続されている。半導体チップ１２５は実装基板１２７上に形成され、実装基板１２７はヒートパイプ１２４の壁面の一部としてよい。半導体チップ１２５は配線１２６とボンディングワイヤ１２８により接続されている。ヒートパイプ１２４は、内部にウィック１２９および作動液１３０（水、アルコール、または代替フロンなど）を有している。半導体チップ１２５は作動液１３０に直接（または薄い保護膜を介して）接触している。このように、冷媒（作動液）の蒸発・凝縮の相変化に伴う潜熱を利用して冷却するため、効率よく冷却できる。 As a technique for directly radiating heat from the surface of a semiconductor element, a technique for immersing an LSI or an LSI module in an insulating refrigerant having a low boiling point has been proposed. FIG. 6 is a schematic cross-sectional view for explaining the example. In the figure, a semiconductor device 123 includes a heat pipe 124 and a semiconductor chip 125 therein, and the semiconductor chip 125 is electrically connected to the outside of the heat pipe 124 via a wiring 126. The semiconductor chip 125 may be formed on the mounting substrate 127, and the mounting substrate 127 may be part of the wall surface of the heat pipe 124. The semiconductor chip 125 is connected to the wiring 126 and the bonding wire 128. The heat pipe 124 has a wick 129 and a hydraulic fluid 130 (water, alcohol, or alternative chlorofluorocarbon) inside. The semiconductor chip 125 is in direct contact with the hydraulic fluid 130 (or through a thin protective film). Thus, since it cools using the latent heat accompanying the phase change of evaporation (condensation fluid) and condensation, it can cool efficiently.
半導体素子表面から直接放熱させる技術においては、冷媒の蒸発潜熱を利用した冷却方法を用いたものも提案されている。図７は、その例を説明するための断面模式図である。熱制御装置１３１は、無底ヒート筐体１３２が取付台１３３上に一体載着しており、冷媒液を含むウィック１３４は発熱物１３５を被包して無底ヒート筐体１３２および無底ヒート筐体１３２内取付台１３３上面全域に亙り内張りされており、取付リム１３６で無底ヒート筐体１３２を取付台１３３上に取付る。 As a technique for directly radiating heat from the surface of a semiconductor element, a technique using a cooling method using latent heat of vaporization of a refrigerant has been proposed. FIG. 7 is a schematic cross-sectional view for explaining the example. In the heat control device 131, a bottomless heat casing 132 is integrally mounted on the mounting base 133, and a wick 134 containing a refrigerant liquid encloses a heating element 135 so that the bottomless heat casing 132 and bottomless heat are included. The inner surface of the mounting base 133 in the casing 132 is lined over the entire upper surface, and the bottomless heat casing 132 is mounted on the mounting base 133 with the mounting rim 136.
発熱物１３５からの発熱は発熱物１３５に接するウィック１３４の吸熱部１３７に含まれる冷媒液が蒸発するとき、蒸発潜熱として蒸気に取り込まれ、取付台１３３に伝えられ、取付台１３３から外部へ放熱される。取付台１３３は発熱物１３５の温度より低いために蒸気はそこで液体に相変化し、輸送してきた熱量を凝縮熱として無底ヒート筐体１３２に伝熱するので再び液体となってウィック１３４内を毛細管作用により連続的に吸熱部１３７へと循環する。 When the refrigerant liquid contained in the heat absorbing portion 137 of the wick 134 in contact with the heat generating material 135 evaporates, the heat generated from the heat generating material 135 is taken into the vapor as latent heat of vaporization and transmitted to the mounting base 133, and is radiated from the mounting base 133 to the outside. Is done. Since the mounting base 133 is lower than the temperature of the heat generating material 135, the vapor changes into a liquid there, and the amount of heat transported is transferred to the bottomless heat casing 132 as condensed heat, so that it becomes liquid again and passes through the wick 134. It continuously circulates to the heat absorption part 137 by capillary action.
このように、ウィック（即ち、多孔質体）が流路に設けられており、多孔質体に冷媒が浸透する際の毛細管力を、冷媒を加熱面まで還流させる駆動力として用いるので、重力による還流に比べて、半導体装置の姿勢や冷却部の配置の影響を受けにくいといった特徴を持っている。 Thus, the wick (ie, the porous body) is provided in the flow path, and the capillary force when the refrigerant permeates the porous body is used as a driving force for refluxing the refrigerant to the heating surface. Compared to reflux, it has a feature that it is less affected by the posture of the semiconductor device and the arrangement of the cooling unit.
しかし、図６で示したような、低沸点で絶縁性の冷媒中に、ＬＳＩやＬＳＩモジュールを浸漬する冷却方法は、蒸気と液の流路が分離していないため、熱を輸送中の蒸気と、放熱後の液とが干渉して放熱部に十分に熱が運ばれず、冷却効率が低下する。また、冷媒の還流手段として、主に重力を利用するので、冷却性能を維持するためには、凝縮した液が重力により落下して、ＬＳＩに常に液が供給されるような配置・姿勢にする必要がある。したがって、使用状況に応じて上下方向が変わるモバイル機器などでは、安定的な冷却性能が期待できない。 However, the cooling method in which the LSI or LSI module is immersed in an insulating refrigerant having a low boiling point as shown in FIG. 6 does not separate the flow path of the vapor and the liquid. And the liquid after heat dissipation interferes and heat is not carried enough to a heat radiating part, and cooling efficiency falls. In addition, since gravity is mainly used as the refrigerant recirculation means, in order to maintain the cooling performance, an arrangement / attitude in which the condensed liquid falls due to gravity and the liquid is always supplied to the LSI is adopted. There is a need. Therefore, a stable cooling performance cannot be expected in a mobile device whose vertical direction changes depending on the usage situation.
一方、図７で示したような、冷媒の蒸発潜熱を利用した冷却方法においては、冷媒が多孔質体の連通した微細な気孔内を流動するので、流動抵抗が大きく、熱輸送距離が制限される。また、冷媒が還流する輸送管は、蒸気が移動する径路の役割も果たしており、蒸気と液の干渉による冷却効果の低下が避けられない。 On the other hand, in the cooling method using the latent heat of vaporization of the refrigerant as shown in FIG. 7, since the refrigerant flows in fine pores communicating with the porous body, the flow resistance is large and the heat transport distance is limited. The In addition, the transport pipe through which the refrigerant recirculates also plays a role of a path through which the steam moves, and the cooling effect is inevitably lowered due to the interference between the steam and the liquid.
そこで、本発明の課題は、高効率である冷媒直接冷却方式で、パッケージ部材やＴＩＭを介在させることなく、半導体素子表面から直接、高効率に放熱可能で、かつ蒸気流路と液流路を分離し、多孔質体内の流動距離を短縮化した、低背の冷却構造を有する半導体装置を提供することにある。 Therefore, an object of the present invention is a highly efficient refrigerant direct cooling system that can dissipate heat efficiently and directly from the surface of a semiconductor element without interposing a package member or a TIM, and a vapor channel and a liquid channel. An object of the present invention is to provide a semiconductor device having a low-profile cooling structure that is separated and has a reduced flow distance in a porous body.
本発明の半導体装置は、
回路基板と、
一の面で前記回路基板上に接続された半導体素子と、
前記半導体素子の他の面上に直接形成された多孔質膜と、
前記回路基板上で前記半導体素子と前記多孔質膜を覆う密閉構造と、
前記多孔質膜に浸透した冷媒と、
前記密閉構造の前記多孔質膜と対向する二ヶ所に設けられた第１の壁面開口部及び第２の壁面開口部と、
前記第１の壁面開口部と前記第２の壁面開口部とを接続し、気化状態又は液化状態の前記冷媒が通過する密閉流路と
を、有することを特徴とする。
The semiconductor device of the present invention is
A circuit board;
A semiconductor element connected on one side to the circuit board;
A porous film directly formed on the other surface of the semiconductor element;
A sealed structure covering the semiconductor element and the porous film on the circuit board;
A refrigerant permeating the porous membrane;
A first wall surface opening and a second wall surface opening provided at two locations facing the porous membrane of the sealed structure;
It has the closed flow path which connects the said 1st wall surface opening part and the said 2nd wall surface opening part, and the said refrigerant | coolant of a vaporization state or a liquefaction state passes through.
本発明の半導体装置により、半導体素子背面に直接形成した多孔質膜を用いること、冷媒の流路を一貫して一方通行化したこと、かつ多孔質膜内の流動距離も最小化したことで、高効率で、低背である冷媒直接冷却構成を有する半導体装置を実現し得た。 By using the porous film formed directly on the back surface of the semiconductor element by the semiconductor device of the present invention, consistently making the refrigerant flow path one-way, and minimizing the flow distance in the porous film, A semiconductor device having a refrigerant direct cooling configuration with high efficiency and low profile can be realized.
以下に、本発明の実施の形態を、添付図を参照しつつ説明する。
（実施構成例）
図１に本発明の半導体装置の構成を説明するための断面模式図を、図２にその半導体装置の上面の模式図、そして、図３にその半導体装置の多孔質膜上面の模式図を示す。図１は、図３における、Ｂ−Ｃ間の断面に相当する。
Embodiments of the present invention will be described below with reference to the accompanying drawings.
(Example configuration)
FIG. 1 is a schematic cross-sectional view for explaining the structure of the semiconductor device of the present invention, FIG. 2 is a schematic view of the upper surface of the semiconductor device, and FIG. 3 is a schematic view of the upper surface of the porous film of the semiconductor device. . FIG. 1 corresponds to a cross section between B and C in FIG.
図１において、半導体装置１は、回路基板２の一面側に、半導体素子３が、その電極４に形成された、例えばボール状のはんだ５と、回路基板２の電極パッド６との接続を介して、搭載されている。半導体素子３の基板接続面の反対側背面上には、多孔質膜７が直接形成されている。回路基板２の半導体素子接続面を一つの面として、その上の、多孔質膜７形成の半導体素子３をその内部空間に包含する密閉空間を有するパッケージ８が搭載される。図１、２を参照し、パッケージ８の一方端の開口部９と他方端の開口部１０は、例えば、金属製あるいは合成樹脂製のフレキシブルチューブなどの管１１で接続される。管１１の、例えば中間位置に、ヒートシンク１２を具備する。また、他方端の開口部１０近傍のパッケージ８内の空間には、液溜部１３の空間を形成する。 In FIG. 1, a semiconductor device 1 has a semiconductor element 3 formed on an electrode 4 on one surface side of a circuit board 2, for example, via a connection between a ball-shaped solder 5 and an electrode pad 6 of the circuit board 2. It is installed. A porous film 7 is directly formed on the back surface of the semiconductor element 3 opposite to the substrate connection surface. A package 8 having a sealed space including the semiconductor element 3 on which the porous film 7 is formed on the semiconductor element connection surface of the circuit board 2 is mounted. 1 and 2, the opening 9 at one end and the opening 10 at the other end of the package 8 are connected by a tube 11 such as a flexible tube made of metal or synthetic resin, for example. A heat sink 12 is provided in the tube 11 at an intermediate position, for example. Further, a space for the liquid reservoir 13 is formed in the space in the package 8 near the opening 10 at the other end.
半導体素子３に接触する多孔質膜７中の、常温状態で液体である冷媒は、電流印加によって高温化した半導体素子のため、多孔質膜７内で蒸気化する。図３を参照して、多孔質膜７が、膜中の冷媒蒸気が効率よくそれから分離蒸発するようにパターン化された櫛形状の蒸気流出溝１４−１が複数形成された、蒸気流出溝形成領域１４において、多孔質膜７中の冷媒蒸気が空中に蒸発し、蒸気は一方端の開口部９に流入する。この蒸気は、図１を参照して、一方端の開口部９に接続された管１１における、蒸気流路１１−１の領域を流れる。やがて蒸気はヒートシンク１２が形成された管１１の領域、すなわち冷却流路１１−２中に入って冷却され、液化する。液化した冷媒は、管１１中を移動して液流路１１−３の領域を通過し、やがて液は、他方端の開口部１０からパッケージ８内に還流する。他方端の開口部１０からパッケージ８内に流入した液は、図１、３を参照して、液溜部１３の、多孔質膜７の（櫛形状が形成されていない）液溜空間領域１５上に滴下し、その部分の多孔質膜７は液状の冷媒に満たされる。多孔質膜７の毛細管力により、液溜空間領域１５の冷媒液は蒸気流出溝形成領域１４へ移動しつつ温度上昇を受けて蒸気化し、これにより、高温化した半導体素子３の熱は、冷媒の蒸発潜熱により冷媒に奪われ、半導体素子３は冷却化される。 The refrigerant that is liquid at room temperature in the porous film 7 that is in contact with the semiconductor element 3 is vaporized in the porous film 7 because it is a semiconductor element that has been heated to a high temperature by applying current. With reference to FIG. 3, the porous membrane 7 is formed with a vapor outflow groove formed by a plurality of comb-shaped vapor outflow grooves 14-1 patterned so that the refrigerant vapor in the film is efficiently separated and evaporated therefrom. In the region 14, the refrigerant vapor in the porous film 7 evaporates into the air, and the vapor flows into the opening 9 at one end. With reference to FIG. 1, this steam flows through the region of the steam channel 11-1 in the pipe 11 connected to the opening 9 at one end. Eventually, the steam enters the region of the tube 11 where the heat sink 12 is formed, that is, enters the cooling channel 11-2, is cooled, and is liquefied. The liquefied refrigerant moves through the pipe 11 and passes through the region of the liquid flow path 11-3, and the liquid eventually returns into the package 8 from the opening 10 at the other end. The liquid that has flowed into the package 8 from the opening 10 at the other end, referring to FIGS. The portion of the porous film 7 is dropped and filled with a liquid refrigerant. Due to the capillary force of the porous film 7, the refrigerant liquid in the liquid storage space region 15 is moved to the vapor outflow groove forming region 14 and is vaporized as a result of the temperature rise. Due to the latent heat of vaporization, the semiconductor element 3 is cooled by the refrigerant.
この様に、本発明の構成では、冷媒は多孔質膜７中を液体から蒸気へと変化する一方向の経路、そして、管１１中を蒸気（蒸気流路１１−１中）の状態から（冷却流路１１−２を経て）液体（液流路１１−３中）の状態へと変化する一方向の経路を確保して、液体と蒸気の流路を完全に分離しており、多孔質中、管中いずれも、液体・蒸気の両状態の干渉による冷却効果の低下を防いでいる。また、多孔質膜内の液体−蒸気の流動距離を半導体素子の背面長とほぼ同等の最短距離化を実現しており、余計な流動を抑制していることも冷却効率の向上に寄与する。 As described above, in the configuration of the present invention, the refrigerant is changed from the state of the vapor (in the vapor channel 11-1) through the one-way path in the porous film 7 that changes from the liquid to the vapor, and in the pipe 11 ( The liquid and vapor flow paths are completely separated by securing a one-way path that changes to a liquid state (in the liquid flow path 11-3) via the cooling flow path 11-2. Both the inside and the inside of the pipe prevent the cooling effect from being lowered due to the interference between the liquid and vapor states. Further, the flow distance of the liquid-vapor in the porous film is made the shortest distance substantially equal to the back length of the semiconductor element, and the suppression of unnecessary flow also contributes to the improvement of the cooling efficiency.
さらに、本実施例では多孔質膜の接続に関し、ＴＩＭなどを介さず、半導体素子３のパッケージの背面表面に直接形成しているため、半導体素子の熱を効果的に多孔質膜中の冷媒に伝導することができる。 Furthermore, in the present embodiment, the porous film is connected directly to the back surface of the package of the semiconductor element 3 without using a TIM or the like, so that the heat of the semiconductor element is effectively transferred to the refrigerant in the porous film. Can conduct.
こうして、従来の冷却機能搭載の半導体装置に比べ、冷却効果が高く、かつ低背構造の半導体装置を形成することが可能となる。
（実施例）
図１〜３で示した装置構成において、図１の一部拡大模式図に示すよう様に、幅２０ｍｍの背面面積を有するＬＳＩ（半導体素子３）の背面上に、ニッケル（Ｎｉ）のナノサイズの微粒子を、微粒子噴射法、つまりガスデポジション法によって、直接、厚さ３０μｍの多孔質膜７を形成した。図３に示す蒸気流出溝形成領域１４における多孔質膜７と蒸気流出溝１４−１の幅は、それぞれ１．８ｍｍとして櫛形パターンとした。勿論、パターン形状はこれに限る必要は無い。冷媒還流による上記のような冷却効果を得るためには、多孔質膜の厚さについては、２０μｍ程度以上で、１００μｍ程度以下であることが望ましい。
In this way, it is possible to form a semiconductor device having a high cooling effect and a low profile as compared with a conventional semiconductor device with a cooling function.
(Example)
In the apparatus configuration shown in FIGS. 1 to 3, as shown in the partially enlarged schematic diagram of FIG. 1, a nickel (Ni) nanosize is formed on the back surface of an LSI (semiconductor element 3) having a back surface area of 20 mm in width. A porous film 7 having a thickness of 30 μm was directly formed from the fine particles by a fine particle injection method, that is, a gas deposition method. The widths of the porous film 7 and the steam outflow groove 14-1 in the steam outflow groove forming region 14 shown in FIG. Of course, the pattern shape need not be limited to this. In order to obtain the above cooling effect due to the refrigerant reflux, the thickness of the porous membrane is desirably about 20 μm or more and about 100 μm or less.
使用するナノ粒子材料としては、ニッケル（Ｎｉ）以外にＳＵＳなどの金属材料、セラミック、シリカ（ＳｉＯ２）、アルミナ（Ａｌ２Ｏ３）などが適用可能である。また、使用粒子の平均粒径は、０．３〜２μｍ程度が望ましい。 As a nanoparticle material to be used, a metal material such as SUS, ceramic, silica (SiO 2 ), alumina (Al 2 O 3 ), and the like can be applied in addition to nickel (Ni). The average particle size of the particles used is preferably about 0.3 to 2 μm.
こうして、ガスデポジション法で製作した多孔質膜は、気孔の平均直径が２μｍ程度の膜が形成可能で、また気孔率も４０％程度のものが得られた。冷媒が毛細管力による浸透に十分であり、かつ、ＬＳＩ背面との接合強度においても、問題ないものが得られた。なお、毛細管力による十分な浸透を得るために、気孔の直径としては、０．５μｍ以上〜３μｍ以下が望ましく、気孔率は３０％程度以上が望ましい。 Thus, a porous film manufactured by the gas deposition method was able to form a film having an average pore diameter of about 2 μm and a porosity of about 40%. The refrigerant was sufficient for permeation by capillary force, and the bonding strength with the backside of the LSI was satisfactory. In order to obtain sufficient penetration by capillary force, the pore diameter is preferably 0.5 μm to 3 μm, and the porosity is preferably about 30% or more.
この用途に用いる多孔質膜を直接ＬＳＩなど半導体素子背面に直接形成するには、微粒子噴射法、即ちガスデポジション法が適している。粒子流生成室の圧力と膜生成室の圧力の差を制御することで、多孔質性を有する所望の膜（多孔質膜すなわちウィック）を形成できる。 In order to directly form a porous film used for this purpose directly on the back surface of a semiconductor element such as an LSI, a fine particle injection method, that is, a gas deposition method is suitable. By controlling the difference between the pressure in the particle flow generation chamber and the pressure in the membrane generation chamber, it is possible to form a desired film (porous film or wick) having porosity.
回路基板２上に、多孔質膜７を形成して回路基板２に接続したＬＳＩ（半導体素子３）を包含密閉するように、パッケージ８を載置する。セラミック製のパッケージ８は２つの開口部９，１０（開口径２ｍｍ）を有し、これら開口部に接合する、蒸気流路１１−１、及び液流路１１−３の管１１部分は、金属製ないしフレキシブルな樹脂製のチューブを用いた。また管１１の冷却流路１１−２は、熱伝導率の良い銅を用い、これに多数のフィンを有するヒートシンク１２を取り付け、前記二つのチューブと繋いだ。パッケージ８の材料としては、合成樹脂、セラミック、および金属を用いることができる。 A package 8 is mounted so as to enclose and seal an LSI (semiconductor element 3) connected to the circuit board 2 by forming a porous film 7 on the circuit board 2. The ceramic package 8 has two openings 9 and 10 (opening diameter 2 mm), and the pipe 11 part of the steam channel 11-1 and the liquid channel 11-3 joined to these openings is made of metal. A made or flexible resin tube was used. The cooling flow path 11-2 of the pipe 11 is made of copper having good thermal conductivity, and a heat sink 12 having a large number of fins is attached to the cooling flow path 11-2 and connected to the two tubes. As a material of the package 8, synthetic resin, ceramic, and metal can be used.
冷媒としては、フロロカーボンを用いたが、それ以外に、半導体素子などと接するため絶縁性で不活性であり、上記のような蒸発−凝固（液化）サイクルで還流する液体冷媒であれば、他の冷媒も使用でき、例えば、ハイドロフロロエーテルなども適用できる。 As the refrigerant, fluorocarbon is used, but other than that, any other liquid refrigerant that is insulative and inactive because it is in contact with a semiconductor element or the like and recirculates in the evaporation-solidification (liquefaction) cycle as described above can be used. A refrigerant can also be used. For example, hydrofluoroether can be applied.
こうして、本発明の半導体装置は、非常にコンパクトな冷却システムを有する構成となる。蒸気−液の循環用の管の部分にフレキシブルな細い管を使用する場合には、引き回しが容易であり、回路基板上に搭載された他の電子部品上部と干渉するのを避けて、非搭載領域の低い高さの領域を引き回すなどをすることで、電子部品搭載基板の高さ制限を回避することが可能となる。 Thus, the semiconductor device of the present invention has a very compact cooling system. When a flexible thin tube is used for the vapor-liquid circulation tube, it is easy to route and avoids interference with the upper part of other electronic components mounted on the circuit board. It is possible to avoid the restriction on the height of the electronic component mounting board by, for example, drawing a region having a low height.
この半導体装置の高さは、基本的に密閉構造のパッケージ８の高さ（プラス、管の立上がり部分）である。実施例においては、パッケージ８内の多孔質膜７の上部に液溜部１３を設けているが、液溜部１３をパッケージ８の外部に設置して、液流路１１−３から入る液状冷媒がスムーズに多孔質膜７内に連続的に流れ込むようにすることも可能であり、この場合には、高さは、半導体素子の高さ＋多孔質膜厚＋パッケージ壁厚（プラス、管の立上がり部分）と非常に薄い構成が可能となる。 The height of this semiconductor device is basically the height of the sealed package 8 (plus, the rising portion of the tube). In the embodiment, the liquid reservoir 13 is provided above the porous film 7 in the package 8. However, the liquid refrigerant entering the liquid channel 11-3 by installing the liquid reservoir 13 outside the package 8. Can smoothly flow into the porous film 7, and in this case, the height is the height of the semiconductor element + the porous film thickness + the package wall thickness (plus, the tube A very thin structure is possible.
更に、管の立上がり部分に関し、実施例ではパッケージ８の上方に開口部９、１０を設ける構成にしていることから、高さ方向制限に管の立上がり部分を含むことになるが、両開口部をパッケージ８の左右の両側面に形成してもよい。こうすることで、本発明の半導体装置の高さが、従来のものに比べ、非常に低いものが形成可能であることがわかる。 Furthermore, with respect to the rising portion of the tube, in the embodiment, since the openings 9 and 10 are provided above the package 8, the rising portion of the tube is included in the restriction in the height direction. It may be formed on both left and right side surfaces of the package 8. By doing so, it can be seen that the semiconductor device of the present invention can be formed with a very low height compared to the conventional one.
１、１０１、１２３ 半導体装置
２、１０２ 回路基板
３、１０３ 半導体素子
４、１０４ 電極
５、１０５ はんだ
６、１０６ 電極パッド
７ 多孔質膜
８ パッケージ
９ 一方端の開口部
１０ 他方端の開口部
１１ 管
１２、１０９ ヒートシンク
１３ 液溜部
１４ 蒸気流出溝形成領域
１５ 液溜空間領域
１０７ 半導体パッケージ
１０８ ＴＩＭ
１１０ 発熱体
１１１ 電子基板
１１２ 電子部品
１１３ 防水層
１１４ 含水層
１１５ 缶体
１１６ 密閉空間
１１７ 水溜部
１１８ 水
１１９ 減湿装置
１２０ 管路
１２１ 空気循環器
１２２ 返水管
１２４ ヒートパイプ
１２５ 半導体チップ
１２６ 配線
１２７ 実装基板
１２８ ボンディングワイヤ
１２９、１３４ ウィック
１３０ 作動液
１３１ 熱制御装置
１３２ 無底ヒート筐体
１３３ 取付台
１３５ 発熱物
１３６ 取付リム
１３７ 吸熱部
DESCRIPTION OF SYMBOLS 1, 101, 123 Semiconductor device 2, 102 Circuit board 3, 103 Semiconductor element 4, 104 Electrode 5, 105 Solder 6, 106 Electrode pad 7 Porous film 8 Package 9 Opening at one end 10 Opening at the other end 11 Tube 12, 109 Heat sink 13 Liquid reservoir 14 Steam outflow groove forming area 15 Liquid reservoir space area 107 Semiconductor package 108 TIM
DESCRIPTION OF SYMBOLS 110 Heat generating body 111 Electronic substrate 112 Electronic component 113 Waterproof layer 114 Water-containing layer 115 Can body 116 Sealed space 117 Water reservoir 118 Water 119 Dehumidifier 120 Pipe line 121 Air circulator 122 Return pipe 124 Heat pipe 125 Semiconductor chip 126 Wiring 127 Mounting Substrate 128 Bonding wire 129, 134 Wick 130 Hydraulic fluid 131 Thermal control device 132 Bottomless heat casing 133 Mounting base 135 Heating material 136 Mounting rim 137 Heat absorbing portion
Claims (4)
一の面で前記回路基板上に接続された半導体素子と、
前記半導体素子の他の面上に直接形成された多孔質膜と、
前記回路基板上で前記半導体素子と前記多孔質膜を覆う密閉構造と、
前記多孔質膜に浸透した冷媒と、を有し、
前記密閉構造内において、
前記多孔質膜の両端の二ヶ所に設けられた第１の壁面開口部及び第２の壁面開口部と、を有し、
前記第１の壁面開口部と前記第２の壁面開口部とを接続し、気化状態又は液化状態の前記冷媒が通過する密閉流路と、
前記第１の壁面開口部に接続し、液化した冷媒が溜まる液留空間と、
前記第２の壁面開口部に接続し、気化した冷媒が溜まる蒸気形成空間とが、備えられ、
前記多孔質膜が、前記液留空間と、前記蒸気形成空間とを分離するように形成されていることを特徴とする半導体装置。 A circuit board;
A semiconductor element connected on one side to the circuit board;
A porous film directly formed on the other surface of the semiconductor element;
A sealed structure covering the semiconductor element and the porous film on the circuit board;
A refrigerant that has permeated the porous membrane ,
In the sealed structure,
A first wall surface opening and a second wall surface opening provided at two locations on both ends of the porous membrane ,
A closed flow path that connects the first wall surface opening and the second wall surface opening and through which the refrigerant in a vaporized state or a liquefied state passes ;
A liquid distillation space connected to the first wall surface opening and storing a liquefied refrigerant;
A vapor forming space connected to the second wall surface opening and storing the evaporated refrigerant,
The semiconductor device, wherein the porous film is formed so as to separate the liquid distillation space and the vapor formation space .
体装置。 The semiconductor device according to claim 1, wherein the porous film is formed by a fine particle injection method.
特徴とする請求項１または２記載の半導体装置。 3. The semiconductor device according to claim 1, further comprising a liquid reservoir attached in the vicinity of one of the first and second wall surface openings.
いずれかに記載の半導体装置。 4. The semiconductor device according to claim 1, further comprising a condensing portion attached in the middle of the sealed flow path.
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| JP5882292B2 (en) * | 2013-03-18 | 2016-03-09 | 国立大学法人横浜国立大学 | COOLER, COOLING DEVICE USING SAME, AND METHOD OF COOLING HEAT GENERATOR |
| JP2015170625A (en) * | 2014-03-05 | 2015-09-28 | 株式会社東芝 | semiconductor package |
| WO2015174423A1 (en) * | 2014-05-12 | 2015-11-19 | 国立大学法人横浜国立大学 | Cooler and cooling device using same, and cooling method for heating element |
| JP2016040505A (en) * | 2014-08-12 | 2016-03-24 | 国立大学法人横浜国立大学 | Cooler, cooling device using the same, and cooling method of heating element |
| EP3199897A4 (en) * | 2014-09-26 | 2018-05-23 | Nec Corporation | Refrigerant relay device, cooling device using same, and cooling method |
| JP6485075B2 (en) * | 2015-01-29 | 2019-03-20 | 富士通株式会社 | Loop heat pipe and method of manufacturing loop heat pipe |
| WO2017037921A1 (en) | 2015-09-03 | 2017-03-09 | 富士通株式会社 | Loop heat pipe, manufacturing method for same, and electronic device |
| JP6740654B2 (en) * | 2016-03-18 | 2020-08-19 | 日亜化学工業株式会社 | Light source |
| JP6860086B2 (en) * | 2017-11-29 | 2021-04-14 | 富士通株式会社 | Loop heat pipes and electronics |
| KR102539336B1 (en) * | 2021-06-07 | 2023-06-01 | 중앙대학교 산학협력단 | Semiconductor device thermal management module and manufacturing method thereof |
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| JPS6015953A (en) * | 1983-07-06 | 1985-01-26 | Matsushita Electric Ind Co Ltd | Cooling method for semiconductor device |
| JPH03209859A (en) * | 1990-01-12 | 1991-09-12 | Hitachi Ltd | Semiconductor cooling device |
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