JP5540655B2 - Method for manufacturing integrated circuit device - Google Patents

Description

  The present invention relates to a method for manufacturing an integrated circuit device.

  The fine structure of the integrated circuit device is formed by a photolithography technique. In the photolithography technique, first, a photomask pattern is projected onto a photoresist film formed on a substrate surface. Thereafter, the photoresist film is developed to form a resist pattern corresponding to the pattern of the photomask. Next, using this resist pattern as an etching mask, for example, a fine structure is formed on the substrate surface.

  An exposure method for projecting a photomask pattern onto a resist film has changed with the miniaturization of integrated circuit devices. Currently, the most widely used exposure method is a reduced projection exposure method in which a reduced image of a photomask pattern is projected (irradiated) onto a resist film.

International Publication 2003/074428

  The performance (operation speed, etc.) of an integrated circuit device depends on its fine structure, particularly the wiring width. The wiring width of the integrated circuit device is determined by the line width of the resist pattern serving as an etching mask. Therefore, it is preferable that the line width of the resist pattern is constant regardless of the chip.

  However, the line width of the resist pattern formed by the reduced projection exposure method is not necessarily constant and may vary greatly. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for manufacturing an integrated circuit device that reduces the variation in the line width of a resist pattern formed by a reduction projection exposure method.

  In order to achieve the above object, according to a first aspect of the present manufacturing method, a reduced image of a photomask is sequentially projected onto a plurality of first resist regions of a first photoresist film formed on a substrate surface. Thereafter, the first photoresist film is developed to form a reduced projection exposure process for forming a resist pattern corresponding to the reduced image, and the photomask is arranged with the strip-like patterns juxtaposed at the first interval. In the exposure characteristics of the first resist line width after development of the band-shaped pattern included in the resist pattern, including a dense pattern and an isolated pattern in which the band-shaped pattern is juxtaposed at a second interval wider than the first interval The first resist line width increases as the substrate surface position increases with respect to the image plane of the reduced image, decreases after reaching the maximum line width, and irradiates the photomask. A method of manufacturing an integrated circuit device in which the first resist line width is changed in accordance with a change in the exposure amount, wherein the first line width and the substrate surface position corresponding to the dense pattern are shown. A second maximum line width position characteristic indicating a relationship between the maximum line width position characteristic and the maximum line width and the substrate surface position corresponding to the isolated pattern is derived, and a desired maximum line width position characteristic in the first maximum line width position characteristic is obtained. A first substrate surface position corresponding to the maximum line width and an intermediate substrate surface position between the second substrate surface positions corresponding to the desired maximum line width in the second maximum line width position characteristic; And a second step of performing the reduced projection exposure step after the substrate surface is arranged at the substrate surface position at the time of exposure. Provided.

  According to the manufacturing method of the integrated circuit device, the variation in the line width of the resist pattern formed by the reduction projection exposure method can be reduced.

1 is a schematic diagram of a reduction exposure apparatus used in Embodiment 1. FIG. It is a schematic plan view of a photoresist film on which a reduced image is projected. 4 is a schematic plan view of a photomask used in Embodiment 1. FIG. It is the elements on larger scale of the pattern for a test contained in a photomask. 3 shows exposure characteristics of the reduced projection exposure apparatus according to the first embodiment. It is an example of the exposure characteristic when a resist line | wire width is fluctuate | varied largely. It is a schematic plan view of the test substrate used for deriving the exposure conditions. 4 shows exposure characteristics of a dense pattern and an isolated pattern according to the first embodiment. 9 is a smoothed exposure characteristic obtained by fitting the relation between the substrate surface position and the resist line width with a quadratic function in the exposure characteristic of FIG. It is a figure explaining the method of determining the substrate surface position at the time of exposure. It is a figure explaining the determination method of exposure amount. It is a figure showing the relationship between a substrate surface position and a resist line | wire width in the exposure amount g. It is an exposure characteristic of Embodiment 2. FIG. FIG. 10 is a diagram illustrating a procedure for determining a substrate surface position at the time of exposure in the second embodiment. It is a figure explaining a time-dependent change of a bias line width. It is the figure which represented the standard deviation of the bias line width in each lot on the histogram. 10 is a flowchart of a resist pattern forming process included in the method of manufacturing an integrated circuit device according to the fourth embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the matters described in the claims and equivalents thereof. In addition, the same code | symbol is attached | subjected to the corresponding part even if drawings differ, and the description is abbreviate | omitted.

(Embodiment 1)
(1) Reduction Projection Exposure Apparatus FIG. 1 is a schematic view of a reduction exposure apparatus 2 used in the present embodiment. The reduced projection exposure apparatus is an apparatus called a stepper or a scanner. FIG. 2 is a schematic plan view of the photoresist film 14 onto which a reduced image is projected.

  As shown in FIG. 1, the reduction projection exposure apparatus 2 includes a light source 4 and a condenser lens 10 that shapes radiation light 6 emitted from the light source 4 and irradiates a photomask 8 called a reticle. Further, the reduction projection exposure apparatus 2 has a reduction projection lens 16 that reduces the mask pattern formed on the photomask 8 and projects it onto the photoresist film 14 formed on the substrate surface of the substrate (for example, Si substrate) 12. ing. Further, the reduction projection exposure apparatus 2 has a stage 18 on which the substrate 12 is placed. Here, the stage 18 is movable in the up-down direction 20 and the horizontal direction 22 while the substrate 12 is supported.

  In the present embodiment, the reduced projection exposure apparatus 2 irradiates the photomask 8 with the radiation 6 and irradiates the photomask 8 on the plurality of resist regions 23 of the photoresist film 14 formed on the substrate surface of the substrate 12. A reduced image is projected (see FIG. 2). The projection of the reduced image onto the plurality of resist regions 23 is realized by the horizontal movement function (step and repeat function) of the stage 18. Thereafter, the photoresist film 14 is developed to form a resist pattern corresponding to the reduced image of the photomask 8.

  As described above, after a reduced image of the photomask 8 (a reduced image of the mask pattern) is projected onto the photoresist film 14 formed on the substrate surface, the photoresist film 14 is developed to correspond to the reduced image. The step of forming the resist pattern is referred to as a reduced projection exposure step. On the other hand, projecting a reduced image of a photomask pattern onto a resist film is referred to as reduced projection exposure.

(2) Photomask FIG. 3 is a schematic plan view of the photomask 8 used in the present embodiment. FIG. 4 is a partially enlarged view for testing included in the photomask 8.

  In the process of manufacturing an integrated circuit device, a large number of photomasks are used. Each of these many photomasks corresponds to a component of the integrated circuit device (for example, an element isolation trench, a gate, a diffusion layer, and a contact hole). A mask pattern corresponding to each component is formed in a mask pattern region 26 of the photomask 8 as shown in FIG.

  Furthermore, the photomask mask 8 of the present embodiment has a test pattern 24 between the mask pattern regions 26 as shown in FIG. There are two types of test patterns 24, a dense pattern 24a and an isolated pattern 24b. As shown in FIG. 4A, the dense pattern 24a is a pattern in which the belt-like patterns 28 are juxtaposed at a constant interval D1. Here, the line width W of the strip pattern 28 is preferably equal to the minimum line width of the wiring of the integrated circuit device manufactured by the photomask 8. The interval D1 is preferably equal to the width W of the belt-like pattern. The line width W and the interval D1 in the present embodiment are both 360 nm.

  On the other hand, as shown in FIG. 4B, the isolated pattern 24b is a pattern in which strip-like patterns 28 having a line width W are juxtaposed at a constant interval D2 wider than the interval D1 of the dense pattern. Here, it is preferable that the distance D2 is sufficiently wider than the resolution of photolithography and has a width that does not cause the proximity effect. The distance D2 between the isolated patterns 24b in the present embodiment is 1 to 10 μm.

(3) Exposure Characteristics FIG. 5 shows the exposure characteristics of the reduced projection exposure apparatus 2. The vertical axis in FIG. 5 represents the resist line width of the strip pattern. The horizontal axis represents the substrate surface position when the photomask film 14 is exposed. Here, the substrate surface position 19 is the difference in height between the imaging surface 21 (the surface where the resolution of the reduced image is highest) projected by the reduction projection exposure apparatus 2 and the substrate surface 25 (the substrate relative to the imaging surface). Surface position). The sign of the substrate surface position is determined to be positive on the photomask side. As is well known, the image plane of the reduced image coincides with the focal plane of the reduced projection lens 16.

  The resist line width of the strip pattern shown in FIG. 5 is measured by the following procedure. First, a positive photoresist film is formed on the surface of an unprocessed Si substrate. Next, reduced images of the dense pattern 24 a and the isolated pattern 24 b are sequentially projected onto the plurality of resist regions of the photoresist film by the reduction projection exposure apparatus 2.

  At this time, the substrate surface position is changed by 0.2 μm. Further, reduced images are sequentially projected onto a plurality of resist regions while changing the irradiation amount of the radiated light 6 (hereinafter referred to as exposure amount) by 5% at each changed substrate surface position. Here, there are five exposure amounts, which are referred to as exposure amount a, exposure amount b, exposure amount c, exposure amount d, and exposure amount e in ascending order. The intensity of the emitted light 6 is kept constant, and the exposure amount is adjusted by the exposure time.

  Next, the photoresist film is developed to form a strip pattern. Thereafter, the resist line width of the belt-like pattern is measured by an electron beam length measuring machine (CD-SEM; Critical Dimension-Scanning Electron Microscope). The film forming conditions for the photoresist film (the composition of the photoresist solution, the coating conditions, the heat treatment conditions, etc.) and the developing conditions are constant, including other embodiments.

  FIGS. 5A and 5B show exposure characteristics corresponding to a dense pattern and an isolated pattern, respectively. The polygonal lines 30a to 30e in FIG. 5A represent the relationship between the resist line width of the strip-like pattern included in the resist pattern formed with the exposure doses a to e and the substrate surface position (hereinafter referred to as substrate surface position characteristics). ing. Here, the alphabet part of the code | symbol attached | subjected to the broken line represents the exposure amount. For example, the broken line 30a is a substrate surface position characteristic of a strip-shaped pattern formed with an exposure amount a. The same applies to the following drawings. The exposure characteristic is a characteristic having a plurality of substrate surface position characteristics with different exposure amounts as described above.

  As shown in FIGS. 5A and 5B, the resist line widths (folded lines 30a to 30e, 32a to 32e) of the belt-like pattern included in the resist pattern after development correspond to the increase in the substrate surface position. It increases monotonously and decreases monotonically after reaching the maximum line width on the imaging plane (substrate surface position = 0 μm). The change in the resist line width depending on the substrate surface position can be explained as follows.

  The reduced image of the photomask 8 becomes the clearest on the image plane 21. For this reason, as the substrate surface position 19 is further away from the imaging surface 21, the emitted light 6 wraps around the lower side of the belt-like pattern of the photomask 8. For this reason, the distance between the substrate surface position 19 and the imaging surface 21 decreases the width of the resist line of the belt-like pattern included in the resist pattern.

  Further, as shown in FIG. 5, the resist line width changes according to the change in the exposure amount. Since the photoresist film 14 of the present embodiment is a positive type, the resist line width becomes narrow as the exposure amount increases. When the photoresist film 14 is a screw type, the resist line width increases as the exposure amount increases.

Incidentally, as shown in FIGS. 5A and 5B, the exposure characteristics of the dense pattern and the isolated pattern do not match. This discrepancy is a phenomenon called the so-called, and the proximity effect.

-Adjustment of resist line width by exposure amount (Related technology)-
As described above, the reduced image of the photomask becomes the clearest on the image plane. Therefore, it is preferable that the reduction projection exposure is performed in a state where the substrate surface position coincides with the imaging plane. However, as shown in FIG. 5, the resist line width of the dense pattern and the resist line width of the isolated pattern included in the developed resist pattern do not match. Therefore, it is conceivable that the exposure amount is adjusted so that both the resist line width of the dense pattern and the resist line width of the isolated pattern are close to the desired resist line width in a well-balanced manner. At this time, by selecting an exposure amount that reduces the difference between the resist line width of the isolated pattern and the resist line width of the dense pattern (hereinafter referred to as the bias line width), the balance between the two resist line widths is improved.

  For example, when the substrate surface 25 is disposed on the imaging surface 21 and the resist film 14 is subjected to the reduction projection exposure process with the exposure amount c, the resist line width corresponding to the dense pattern 24a becomes 360 nm. On the other hand, the resist line width corresponding to the isolated pattern 24b is 370 nm. Therefore, the bias line width is 10 nm (= 370 nm-360 nm).

  Further, when the substrate surface 25 is disposed on the imaging surface 21 and the resist film 14 is subjected to a reduction projection exposure process by exposure d, the resist line width corresponding to the dense pattern becomes 348 nm. On the other hand, the resist line width corresponding to the isolated pattern is 363 nm. Therefore, the bias line width is 15 nm (= 363 nm-348 nm).

  As described above, the resist line width of the dense pattern and the resist line width of the isolated pattern are approximately 360 nm regardless of whether the reduced projection exposure process is performed with the exposure amount c or d. However, the bias line width (10 nm) when the reduced projection exposure process is performed with the exposure amount c is smaller than (15 nm) when the reduced projection exposure process is performed with the exposure amount d. Therefore, by performing the reduced projection exposure process with the exposure amount c, it is possible to bring the resist line width of the dense pattern and the resist line width of the isolated pattern close to the desired resist line width in a balanced manner.

  Incidentally, the exposure characteristics of the reduction projection exposure apparatus may change when a fine structure such as an insulating film is formed on the substrate surface. That is, the exposure characteristics may be different in each manufacturing process (for example, diffusion forming process, gate forming process, contact hole forming process) of an integrated circuit device that performs reduced projection exposure. For this reason, it is preferable to determine the exposure conditions for each photomask used in each manufacturing process. For example, it is preferable to define exposure conditions for the photomasks of the diffusion layer, gate layer, and contact hole layer.

  However, it is not easy to measure detailed exposure characteristics as shown in FIG. 5 for all the photomasks used. Therefore, by carrying out a reduction projection exposure process in which only the exposure amount is changed while the substrate surface position is fixed to the imaging plane, the exposure amount dependency characteristic of the resist line width is derived, and a desired value is obtained based on this characteristic. It is conceivable to determine an exposure amount corresponding to the resist line width.

  However, such a method for adjusting the resist line width based on the exposure amount has a problem that the resist line width of the belt-like pattern included in the resist pattern sometimes fluctuates greatly (this problem is caused by the lenses 10 and 16). This can occur regardless of the aberration, that is, even if the aberration of the lenses 10 and 16 converges within a predetermined reference value, the resist line width may fluctuate greatly.

  FIG. 6 shows an example of exposure characteristics when such a variation in resist line width occurs. FIGS. 6A and 6B show exposure characteristics corresponding to the dense pattern 24a and the isolated pattern 24b, respectively. The vertical axis and the horizontal axis are the same as those in FIGS. 5 (a) and 5 (b).

  The exposure characteristics of the dense pattern shown in FIG. 6A are substantially the same as the exposure characteristics of the dense pattern shown in FIG. On the other hand, the exposure characteristic of the isolated pattern shown in FIG. 6B is greatly different from the exposure characteristic of the isolated pattern shown in FIG. In FIG. 6B, the substrate surface position where the resist line width is maximum (hereinafter referred to as the maximum line width position) does not coincide with the imaging plane. Moreover, the maximum line width position moves as the exposure amount changes.

  In the exposure characteristics of FIG. 6, when the exposure amount is determined according to the above procedure, the exposure amount for a desired resist line width of 360 nm becomes the exposure amount c. As is apparent from FIG. 6, when the reduced projection exposure process is performed with the exposure amount c, the resist line widths of the dense pattern and the isolated pattern become 360 nm and 363 nm, respectively, and a substantially desired resist line width of 360 nm is obtained. Moreover, the bias line width is also reduced to 3 nm (= 363 nm to 360 nm). Therefore, at first glance, there seems to be no problem.

  Incidentally, the reduced image of the photomask 8 is projected onto a plurality of resist regions 23 of the resist film 14 (see FIGS. 1 and 2). The projection exposure of the reduced image onto the plurality of resist regions 23 is performed by moving the stage 18 in parallel. At this time, the substrate surface position 19 may slightly fluctuate up and down.

  In the case where the maximum line width position where the resist line width is maximized and the image plane coincide with each other, the resist line width hardly changes even if the substrate surface position is slightly moved up and down. However, when the maximum line width position does not coincide with the imaging plane as shown in FIG. 6B, when the substrate surface position 19 moves up and down, the resist line width varies greatly.

  For example, in the manufacturing process having the exposure characteristics shown in FIG. 6, when the substrate surface is arranged on the imaging surface (substrate surface position = 0 μm) and the reduced projection exposure process is performed with the exposure amount c, the resist line width corresponding to the isolated pattern is obtained. Becomes 363 nm (see FIG. 6B). Now, it is assumed that the substrate surface position changes to +0.2 μm while the reduced projection exposure is performed in the plurality of resist regions 23. Then, the resist line width corresponding to the isolated pattern is greatly reduced to 340 nm (see FIG. 6B).

  As shown in FIG. 6B, the vertex of the substrate surface position characteristic 36c corresponding to the exposure amount c does not coincide with the imaging plane. For this reason, the inclination of the substrate surface position characteristic 36c in the imaging plane does not become zero. For this reason, the resist line width is greatly reduced only by slightly increasing the substrate surface position.

  Note that the change in exposure characteristics as shown in FIG. 6B also changes due to factors other than the formation of the fine structure on the substrate surface. For example, the exposure characteristics also change due to a change in the intensity of the emitted light, a pattern occupancy ratio of the photomask, a temporal change in the image plane position, and the like.

  By the way, among these fluctuation factors, the temporal change of the imaging plane position can be easily removed by the procedure described below. First, a photoresist film is formed on an unprocessed Si substrate surface, and reduced projection exposure is performed with a constant exposure amount while changing the substrate surface position in a plurality of resist regions of the photoresist film. Next, the photoresist film is developed, and the resist line width of the strip-like resist pattern included in the resist pattern is measured to obtain the relationship between the substrate surface position and the resist line width (substrate surface position characteristic).

  Here, the position of the image plane of the reduced image is nothing but the substrate surface position (that is, the maximum line width position) at which the resist line width is maximum in this substrate surface position characteristic. Therefore, by moving the origin of the stage 18 to this maximum line width position, it is possible to correct the change with time of the imaging plane position. Such correction of the image plane position is preferably performed on a daily basis.

  In the above example, the exposure characteristic corresponding to the isolated pattern varies, but the exposure characteristic for the dense pattern may vary.

(4) Manufacturing Method Next, a manufacturing method of the integrated circuit device of the present embodiment will be described.

(i) Process for determining exposure conditions-Process for deriving exposure characteristics-
First, the exposure characteristics corresponding to the dense pattern 24a and the isolated pattern 24b are derived. FIG. 7 is a schematic plan view of a test substrate 38 used for deriving exposure characteristics.

  First, a test substrate having substantially the same structure as a substrate on which a reduction projection exposure process (reduction projection exposure + development) is performed in the manufacturing process of an integrated circuit device (for example, a Si substrate on which a transistor and an interlayer insulating film are formed) is prepared. To do. That is, a test substrate corresponding to the above substrate is prepared.

  Next, a photoresist film 14 is formed on the surface of the test substrate 38, and the test substrate 38 is placed on the stage 18 of the reduction projection exposure apparatus 2 (see FIG. 1).

  Next, a reduced projection exposure process is sequentially performed on each of the plurality of resist regions 23a of the photoresist film 14 while changing the substrate surface position and the exposure amount of the test substrate surface (see FIG. 7). Here, the substrate surface position is changed along a direction 42 horizontal to the orientation flat 40 of the test substrate, for example. On the other hand, the exposure amount is changed along a direction 44 perpendicular to the orientation flat 40.

  As shown in FIG. 3, the photomask 8 used at this time has a mask pattern region 26, a dense pattern 24a, and an isolated pattern 24b. Here, a mask pattern corresponding to the components of the integrated circuit device is formed in the mask pattern region 26.

  Next, the resist line width of the strip-shaped resist pattern corresponding to the dense pattern and the isolated pattern formed in the resist region 23a by the reduced projection exposure process is measured by CD-SEM, and the exposure characteristics of the dense pattern and the isolated pattern are measured. Is derived.

  FIG. 8 shows the exposure characteristics derived in this way. Here, FIGS. 8A and 8B show the exposure characteristics of the dense pattern and the isolated pattern, respectively. Also, the broken lines 48b and 50b in FIGS. 8A and 8B represent the relationship (substrate surface position characteristics) between the resist line width and the substrate surface position of the strip pattern formed with the exposure amount b. On the other hand, the polygonal lines 48d and 50d in FIGS. 8A and 8B represent the resist line width and the substrate surface position characteristic of the substrate surface position of the belt-like pattern formed with the exposure dose d.

  In the above example, the exposure characteristics are measured using the dense pattern 24a and the isolated pattern 24b provided between the mask pattern regions 26. However, the exposure characteristics may be measured using a wiring pattern included in the mask pattern region 26. Normally, the mask pattern area 26 includes both dense wiring patterns and isolated wiring patterns. Therefore, the exposure characteristics may be derived in accordance with the above procedure using these as a dense pattern and an isolated pattern.

―Derivation process of maximum line width position characteristics―
Next, the dense patterns 24a and isolated pattern 24b respectively, derive the maximum line width position characteristics indicating a relationship between the maximum width line and the substrate surface position. At that time, the relationship between the board surface position and the resist line width (substrate surface position characteristic) and fitting a quadratic function, the maximum value of the resist line width substrate surface position corresponding to the (maximum line width) (maximum line width position ).

  FIG. 9 shows the smoothed exposure characteristics obtained by fitting the relationship between the substrate surface position and the resist line width (substrate surface position characteristics 48b, 48d, 50b, 50d) in the exposure characteristics of FIG. 8 with a quadratic function. FIGS. 9A and 9B show smoothing exposure characteristics (curves 52b and 52d) and isolated pattern smoothing exposure characteristics (curves 54b and 54d) corresponding to dense patterns, respectively. In this way, by performing fitting with a low-order polynomial, it becomes easy to specify the maximum value (maximum line width) of the resist line width and the substrate surface position (maximum line width position) corresponding to the maximum line width. .

  FIG. 9A shows a one-dot chain line 56a derived by connecting the coordinates 55a and the coordinates 55b corresponding to the specified maximum line width and the maximum line width position. Similarly, FIG. 9B shows a one-dot chain line 56b derived by connecting the specified maximum line width and the coordinates 55c and 55d corresponding to the maximum line width position. These alternate long and short dash lines 56a and 56b indicate the relationship between the maximum line width and the maximum line width position (maximum line width position characteristic).

  As described above, in this step, the relationship between the substrate surface position and the resist line width (substrate surface position characteristics 48b and 48d) in the exposure characteristics of the dense pattern 24a shown in FIG. Thus, the substrate surface position corresponding to the maximum line width is specified, and the maximum line width position characteristic 56a corresponding to the dense pattern 24a is derived. Similarly, the maximum line width position characteristic 56b corresponding to the isolated pattern 24b is derived.

-Determining process of substrate surface position-
Next, the substrate surface position at the time of exposure corresponding to the desired resist line width is determined. FIG. 10 is a diagram illustrating a method for determining the substrate surface position during exposure. The vertical axis represents the resist line width. The horizontal axis is the substrate surface position. FIG. 10 shows smoothed exposure characteristics (curves 52b and 52d, curves 54b and 54d) and maximum line width position characteristics 56a and 56b for the dense pattern 24a and the isolated pattern 24b, respectively.

  In this step, first, a substrate surface position (for example, 0.00 μm) corresponding to a desired maximum line width (for example, 370 nm) is derived in the maximum line width position characteristic 56a of the dense pattern 24a (see FIG. 10). Similarly, in the maximum line width position characteristic 56b of the isolated pattern 24b, a substrate surface position (for example, −0.18 μm) corresponding to the desired maximum line width (for example, 370 nm) is derived. Thereafter, each intermediate substrate surface position (for example, average value −0.09 μm) is determined as the substrate surface position P at the time of exposure.

-Exposure amount determination process-
Next, an exposure amount at the time of exposure corresponding to a desired resist line width is determined. FIG. 11 is a diagram illustrating a method for determining an exposure amount at the time of exposure. FIG. 11 is a simplified diagram of FIG. 10 and shows maximum line width position characteristics 56a and 56b and smoothed exposure characteristics (curves 52b and 52d, curves 54b and 54d). The relationship between the resist line width and the substrate surface position in the smoothing exposure characteristic is referred to as a smoothing-substrate surface position characteristic.

  Here, the maximum line width position characteristics 56a and 56b indicate the relationship between the maximum line width and the substrate surface position where the resist line width is maximum. However, the maximum line width position characteristics 56a and 56b do not represent the exposure amount at which the maximum line width can be obtained.

  However, this exposure amount is determined based on the exposure amount of the smoothing exposure characteristics (exposure amounts 52b, 52d, 54b, 54d) from which the maximum line width position characteristics 56a, 56b are derived, according to the maximum line width. It can be easily derived by proportional distribution.

  For example, as is apparent from FIG. 11, the exposure amount for setting the maximum line width of the dense pattern to a desired line width of 370 nm is the exposure amount b of the dense pattern smoothing-substrate surface position characteristic 52b. On the other hand, the point A corresponding to the desired line width 370 nm in the maximum line width position characteristic 56b of the isolated pattern is the smoothing of the isolated pattern—the smoothing of the isolated pattern—the substrate surface position characteristic from the vertex B of the substrate surface position characteristic 54b. It is at a position 47% of the distance L to the vertex C of 54d. Here, the exposure dose d is 110% of the exposure dose b. Therefore, the exposure amount (exposure amount corresponding to the point A) for setting the maximum line width of the isolated pattern to the desired line width of 370 nm is 104.7% (= 100% + 10% × 0.47) of the exposure amount b. The quantity f.

  Derived as described above, an exposure amount “b” intermediate between the exposure amount “b” that makes the maximum line width of the dense pattern a desired line width and the exposure amount “f” that makes the maximum line width of the isolated pattern a desired line width, Determine the exposure amount at the time of exposure. That is, a first exposure amount (for example, exposure amount b) corresponding to a desired line width (for example, 370 nm) in the first maximum line width position characteristic (maximum line width position property 56a), and a second maximum An exposure amount (for example, exposure amount f) intermediate between the second exposure amount (for example, exposure amount d) corresponding to a desired line width (for example, 370 nm) in the line width position characteristic (maximum line width position property 56b). Is defined as the exposure amount during exposure.

  In the above example, the exposure amount is determined after determining the substrate surface position. However, the substrate surface position may be determined after the exposure amount is determined first.

-Variation of resist line width-
Next, the variation of the resist line width when the substrate surface is arranged at the substrate surface position P during the exposure and the reduced projection exposure process is performed with the exposure amount g during the exposure will be described.

  FIG. 12 is a diagram illustrating the substrate surface position characteristics (relationship between the substrate surface position and the resist line width) at the exposure amount g during exposure. Curve 60g is the substrate surface position characteristic corresponding to the dense pattern. On the other hand, the curve 62g is the substrate surface position characteristic corresponding to the dense pattern.

  When the substrate surface on which the photoresist film 14 is formed is arranged at the substrate surface position (−0.09 μm) at the time of exposure and the reduced projection exposure process is performed with the exposure amount g, the resist line widths of the dense pattern and the isolated pattern are as follows. 366 nm and 372 nm, respectively (see FIG. 12).

  Now, it is assumed that the substrate surface position is increased by 0.2 μm to 0.11 μm due to the horizontal movement (step and repeat) of the stage 18. At this time, as apparent from the substrate surface position characteristic 60g, the resist line width of the dense pattern hardly changes.

  On the other hand, the resist line width of the isolated pattern is 360 nm as shown in FIG. Therefore, the resist line width of the isolated pattern decreases by 12 nm (= 372 nm-360 nm) when the substrate surface position increases by 0.2 μm. This variation range is the resist line width variation of 23 nm (= 363 nm to 340 nm) when the substrate surface is disposed on the imaging surface, as described above with reference to FIG. 6B in “(3) Exposure characteristics”. About half. Thus, according to the present embodiment, it is possible to reduce the variation of the resist line width.

  In the above example, the desired line width has been described as 370 nm so as not to obscure FIG. However, if the desired resist line width is set to 360 nm as in the case of “(3) Exposure characteristics”, the variation of the resist line width is further reduced.

  As described above, in the present embodiment, the substrate surface position at the time of exposure is set such that the first substrate surface position at which the maximum line width of the dense pattern is a desired line width, and the maximum line width of the isolated pattern is the desired line width. The second substrate surface position is set to an intermediate value. Therefore, the substrate surface position is not shifted to either the maximum line width position of the dense pattern (vertex of the substrate surface position characteristic 60g) or the maximum substrate surface position of the isolated pattern (vertex of the substrate surface position characteristic 62g). The fluctuation of the width becomes smaller.

  The substrate surface position at the time of exposure may not be an average value of the first substrate surface position and the second substrate surface position. For example, the substrate surface position closer to the substrate surface position characteristic 62g of the isolated pattern than the average value may be determined as the substrate surface position at the time of exposure. For example, a position obtained by adding 1/2 of the sum of the average value and the second substrate surface position to the average value may be determined as the substrate surface position at the time of exposure. In this case, the variation of the resist line width is further reduced.

  In the above example, the “exposure amount at the time of exposure” is determined based on the exposure characteristic that determines the “substrate surface position at the time of exposure”. However, as long as “the substrate surface position at the time of exposure” is determined, the “exposure amount at the time of exposure” can be appropriately determined by various methods.

  For example, the surface substrate position at the time of exposure is first determined by the “substrate surface position determining step”. Thereafter, the surface of the test substrate is fixed at the position of the surface substrate at the time of exposure, and the reduced projection exposure process is performed with different exposure amounts. Next, the resist line width of the strip-shaped pattern formed with each exposure light quantity is measured, and the exposure amount dependency characteristic of the resist line width is derived. Also based on this exposure amount dependency characteristic, the “exposure amount at the time of exposure” corresponding to a desired line width can be determined.

(Ii) Reduced projection exposure step First, a resist film 14 is formed on the surface of a substrate 12 (for example, a Si substrate on which a transistor and an interlayer insulating film are formed) that is in the process of manufacturing, which is the basis of the test substrate. 12 is placed on the stage 18 of the reduced projection exposure apparatus 2 (see FIG. 1).

  Next, the surface of the substrate 12 is placed at the above-described “substrate surface position P during exposure” by the vertical movement function of the stage 18. Thereafter, the reduced images of the photomask 8 are sequentially projected onto the plurality of resist regions 23 a of the photoresist film 14 with the above-described “exposure amount g during exposure”. Thereafter, the photoresist film 14 is developed to form a resist pattern corresponding to the reduced image of the photomask 8.

  Here, the reduced projection exposure to the plurality of resist regions 23a is realized by a horizontal movement function (step and repeat function) to the stage 18. At this time, the substrate surface position may vary. However, as described above, according to the present embodiment, the variation of the resist line width is slight. Therefore, according to the present embodiment, it is possible to reduce fluctuations in the wiring width of the integrated circuit device.

(Embodiment 2)
The present embodiment is substantially the same as the first embodiment. Therefore, description of common parts is omitted.

  FIG. 13 shows exposure characteristics in the manufacturing process (for example, contact hole forming process) according to the present embodiment. FIGS. 13A and 13B show exposure characteristics of a dense pattern and an isolated pattern, respectively. Further, the horizontal axis extending along the vertical axis represents the resist line width and the substrate surface position, respectively.

  As shown in FIG. 13A, the maximum line width position of the dense pattern does not coincide with the imaging plane. On the other hand, the maximum line width position of the isolated pattern coincides with the image plane as shown in FIG.

  In the first embodiment, the manufacturing process of the integrated circuit device when the maximum line width position of the isolated pattern does not coincide with the imaging plane has been described (see FIG. 6). However, even if the exposure characteristics are different as described above, an integrated circuit device can be manufactured by the same procedure as in the first embodiment.

  FIG. 14 is a diagram for explaining the procedure for determining the “substrate surface position during exposure” according to the present embodiment.

  First, in the same manner as in the first embodiment, exposure characteristics are measured using a test substrate with exposure amount as a parameter. Next, the exposure characteristics are fitted with a quadratic function to derive smoothed exposure characteristics (smoothing-substrate surface position characteristics 64b, 64d, smoothing-substrate surface position characteristics 66b, 66d). Next, the maximum line width position characteristics 68a and 68b connecting the vertices of the respective smoothing-substrate surface position characteristics are derived.

  Thereafter, the substrate surface position corresponding to the desired maximum line width in the maximum line width position characteristic 68a of the dense pattern and the substrate intermediate between the substrate surface positions corresponding to the desired maximum line width in the maximum line width position characteristic 68b of the isolated pattern. The surface position is determined as the substrate surface position during exposure. Further, the exposure amount at the time of exposure is determined in the same procedure as in the first embodiment.

  Next, a reduced projection exposure process is performed on the substrate in the middle of manufacture, which is the basis of the test substrate, based on these “substrate surface position during exposure” and “exposure amount during exposure”.

(Embodiment 3)
The manufacture of an integrated circuit device usually proceeds in units of a certain number of substrates (hereinafter referred to as lots). When performing reduction projection exposure on a lot, exposure conditions are first set in the reduction projection exposure apparatus, and reduction projection exposure is performed on all substrates in the lot under the same conditions.

  By the way, the exposure characteristics in each manufacturing process hardly change even if the lots are different as long as the structure of the integrated circuit device to be manufactured is the same. Accordingly, when an integrated circuit device having a predetermined structure is manufactured for the first time, if the exposure conditions are determined first, the reduced projection exposure process can be performed on the subsequent lots under the same exposure conditions.

  However, the exposure characteristics may suddenly change due to various causes. For this reason, the present inventor monitors whether the error between the resist line width of the belt-like pattern and the desired resist line width (for example, 360 nm) is within a certain range while manufacturing the integrated circuit device. Yes. When the resist line width error exceeds a certain range, the exposure conditions are reviewed. Note that the allowable range of resist line width error is determined by the specifications of device characteristics (such as operating speed).

  However, the present inventor has noticed that there may be a case where the variation in the resist line width becomes large even if the error in the resist line width is within an allowable range (for example, ± 30 nm). As described above, when the exposure condition changes, the variation in the resist line width increases. However, since the allowable range of the resist line width error is relatively wide, even if only the resist line width error is monitored, the exposure condition may not be noticed.

  Therefore, the present inventor monitors the difference between the resist line width corresponding to the dense pattern and the resist line width corresponding to the isolated pattern (hereinafter referred to as a bias line width) to detect a change in exposure characteristics. did.

  FIG. 15 is a diagram for explaining a change with time in the bias line width. The vertical axis represents the bias line width. The horizontal axis is the lot number. Here, the bias line width shown on the vertical axis is the bias line width in a predetermined resist region of the substrate extracted from each lot. On the other hand, the lot number on the horizontal axis is the order of the reduced projection exposure process performed on each lot.

  A broken line 70 in FIG. 15 is a change in the bias line width in the uppermost resist region 23a (see FIG. 2). A broken line 72 is a change in the bias line width in the resist region 23b at the center. A broken line 74 is a change in the bias line width in the lowermost resist region 23c. A broken line 76 is a change in the bias line width in the leftmost resist region 23d. A broken line 78 is a change in the bias line width in the rightmost resist region 23e. The number of substrates per lot is 24.

  As shown in FIG. 15, the bias line width varies within a range of −2 nm to 15 nm. This value itself is within the range assumed from the exposure characteristics. Therefore, even if only the magnitude of the bias line width is monitored, a change in exposure characteristics is not noticed.

  FIG. 16 is a diagram showing the standard deviation of the bias line width in each lot in a histogram. The vertical axis represents the appearance frequency. The horizontal axis is the standard deviation of the bias line width. Here, the standard deviation is a value obtained by quantifying variation, as is well known.

  As shown in FIG. 16, the standard deviation of the bias line width is 5.0 nm or less in most lots. However, for some lots, the standard deviation exceeds 5.0 nm. Even when the exposure characteristics at the time of production of a lot having a standard deviation of 5.0 nm or less were examined, no change was observed in the exposure characteristics. On the other hand, when the exposure characteristics at the time of manufacturing lots having a standard deviation of 5.0 nm or more were examined, the exposure characteristics changed. Therefore, by monitoring the standard deviation of the bias line width, it becomes possible to reliably detect a change in exposure characteristics.

  FIG. 17 is a flowchart of a resist pattern forming process included in the method of manufacturing an integrated circuit device according to this embodiment.

  In the present embodiment, first, it is determined whether the substrate surface position at the time of exposure has already been determined (step S1).

  If the substrate surface position at the time of exposure is not determined, the “exposure condition determining step” (step S4) and the “reduced projection exposure step” (step S5) described in the first embodiment are sequentially performed. Proceed to the next step (for example, etching step).

  On the other hand, if the substrate surface position at the time of exposure has already been determined, a photoresist film is formed on the surface of the test substrate, and reduced images of the photomask 8 are sequentially applied to a plurality of resist regions of the photoresist film. Project.

  Next, the photoresist film is developed to form a resist pattern corresponding to the reduced image. Next, the resist line width corresponding to the dense pattern formed in each resist region and the resist line width corresponding to the isolated pattern are measured, and the difference between the resist line width of the dense pattern and the resist line width of the isolated pattern (bias A standard deviation of (line width) is derived (step S2). Here, the number of resist regions for measuring the bias line width is, for example, 3 to 8.

  Next, it is determined whether this standard deviation exceeds a reference value (for example, 5 nm) (step S3). When the standard deviation exceeds the reference value, the “exposure condition determination step” (step S4) described in the first embodiment is performed to define a new exposure condition. "Process" (step S5) is implemented. On the other hand, if the standard deviation does not exceed the reference value, the “reduced projection exposure step” (step S5) of the first embodiment is performed under existing exposure conditions. Then, it progresses to the next process (for example, etching process).

  According to the present embodiment, it becomes easy to detect variations in exposure characteristics, so that it is possible to prevent an increase in variations in wiring width and the like.

Regarding the above embodiment, the following additional notes are disclosed.
(Appendix)
(Appendix 1)
After sequentially projecting a reduced image of the photomask onto a plurality of first resist regions of the first photoresist film formed on the substrate surface, the first photoresist film is developed to correspond to the reduced image. A reduced projection exposure process for forming a resist pattern;
The photomask includes a dense pattern in which strip-shaped patterns are juxtaposed at a first interval, and an isolated pattern in which the strip-shaped patterns are juxtaposed at a second interval wider than the first interval,
In the exposure characteristics of the first resist line width after development of the belt-like pattern included in the resist pattern, the first resist line width increases as the substrate surface position increases with respect to the image plane of the reduced image. A method of manufacturing an integrated circuit device, wherein the first resist line width is decreased after reaching a maximum line width, and the first resist line width is changed in accordance with a change in an exposure amount of light applied to the photomask,
A first maximum line width position characteristic indicating the relationship between the maximum line width and the substrate surface position corresponding to the dense pattern, and a second relationship indicating the relationship between the maximum line width and the substrate surface position corresponding to the isolated pattern. The maximum line width position characteristic of the first substrate surface position corresponding to the desired maximum line width and the desired maximum line width position characteristic in the first maximum line width position characteristic are derived. A first step of determining a substrate surface position in the middle of the second substrate surface position corresponding to the maximum line width as a substrate surface position at the time of exposure;
A second step of performing the reduced projection exposure step after placing the substrate surface at the substrate surface position at the time of exposure;
Having
A method for manufacturing an integrated circuit device.

(Appendix 2)
In the manufacturing method of the integrated circuit device according to attachment 1,
Further, when the substrate surface position at the time of the exposure is determined, a plurality of second resist regions of the second photoresist film formed on the first test substrate surface corresponding to the substrate surface are formed. Then, after sequentially projecting the reduced images of the photomask, the second photoresist film is developed to form a resist pattern corresponding to the reduced image, and the isolated pattern in the plurality of second resist regions A third step of deriving a standard deviation of a difference between the second resist line width corresponding to the third resist line width corresponding to the dense pattern,
When the standard deviation exceeds a reference value, the first step is performed, and the substrate surface position at the time of exposure is newly determined, and then the substrate surface position at the time of exposure is newly determined. Perform the second step,
If the standard deviation does not exceed a predetermined reference value, performing the second step according to the determined substrate surface position at the time of exposure,
A method of manufacturing an integrated circuit device.

(Appendix 3)
In the method for manufacturing an integrated circuit device according to appendix 1 or 2,
In the first step, a plurality of third resist regions of a third photoresist film formed on the second test substrate surface corresponding to the substrate surface are provided with a substrate surface position on the test substrate surface and the substrate surface position. After sequentially projecting the reduced image of the photomask while changing the exposure amount, the third photoresist film is developed to form a resist pattern corresponding to the reduced image,
First exposure characteristics of the dense pattern are measured by measuring a fourth resist line width corresponding to the dense pattern and a fifth resist line width corresponding to the isolated pattern formed in the third resist region. And deriving a second exposure characteristic of the isolated pattern,
Deriving the first maximum line width position characteristic and the second maximum line width position characteristic based on the first exposure characteristic and the second exposure characteristic;
A method of manufacturing an integrated circuit device.

(Appendix 4)
In the method of manufacturing an integrated circuit device according to attachment 3,
By fitting the relationship between the substrate surface position in the first exposure characteristic and the first resist line width with a quadratic function, the substrate surface position corresponding to the maximum line width is specified, and the first Deriving maximum line width position characteristics
By fitting the relationship between the substrate surface position in the second exposure characteristic and the first resist line width with a quadratic function, the substrate surface position corresponding to the maximum line width is specified, and the second Deriving the maximum line width position characteristics
A method of manufacturing an integrated circuit device.

(Appendix 5)
In the method of manufacturing an integrated circuit device according to appendix 2,
When the substrate surface position at the time of exposure is not defined, after performing the first step, performing the second step,
A method of manufacturing an integrated circuit device.

(Appendix 6)
In the method for manufacturing an integrated circuit device according to any one of appendices 1 to 5,
In the first step, an average value of the first substrate surface position and the second substrate surface position is determined as a substrate surface position at the time of exposure,
A method for manufacturing an integrated circuit device.

(Appendix 7)
In the method of manufacturing an integrated circuit device according to attachment 3,
That there are at least two exposure amounts,
A method of manufacturing an integrated circuit device.

(Appendix 8)
In the method of manufacturing an integrated circuit device according to attachment 3,
The first exposure characteristics are derived for the two exposure amounts, and the relationship between the substrate surface position and the first resist line width in each of the first exposure characteristics is fitted with a quadratic function to obtain a fit. Connecting the vertices of the quadratic function obtained by the Ting with a straight line to derive the first maximum line width position characteristic;
The second exposure characteristics are derived for the two exposure amounts, and the relationship between the substrate surface position and the first resist line width in each of the first exposure characteristics is fitted with a quadratic function, and Connecting the vertices of the quadratic function obtained by the Ting with a straight line to derive the second maximum line width position characteristic;
A method of manufacturing an integrated circuit device.

(Appendix 9)
In the method for manufacturing a semiconductor device according to appendices 1 to 8,
In the first step,
A first exposure amount corresponding to the desired line width in the first maximum line width position characteristic, and a second exposure amount corresponding to the desired line width in the second maximum line width position characteristic. Determining an intermediate exposure amount as an exposure amount at the time of exposure, and then determining a substrate surface position at the time of exposure,
A method of manufacturing an integrated circuit device.

(Appendix 10)
In the method for manufacturing an integrated circuit device according to any one of appendices 1 to 5,
In the first step, a position obtained by adding 1/2 of the sum of the average value and the second substrate surface position to the average value of the first substrate surface position and the second substrate surface position; It is defined as a substrate surface position at the time of exposure,
A method for manufacturing an integrated circuit device.

8 ... Photomask 12 ... Substrate 14 ... Photoresist film 19 ... Substrate surface position 23 ... Resist region 24a ... Dense pattern 24b ... Isolated pattern

Claims (4)

The first resist line width of the resist pattern obtained by projecting the dense pattern in which the belt-like patterns are juxtaposed at the first interval onto the photoresist film on the surface of the first test substrate becomes the first maximum value. A first maximum line representing a relationship between a plurality of the first maximum values and a plurality of the first positions by obtaining a first position on the surface of the first test substrate with respect to a plurality of exposure amounts. A resist pattern obtained by deriving width position characteristics and projecting an isolated pattern in which strip-like patterns are juxtaposed at a second interval wider than the first interval onto a photoresist film on the surface of the first test substrate. By determining the second position on the first test substrate surface at which the second resist line width becomes the second maximum value with respect to a plurality of exposure amounts, a plurality of the second maximum values and a plurality of the plurality of second maximum values are obtained. A second maximum line width position characteristic representing the relationship with the second position. A first step of deriving,
Before SL that put the first maximum line width position characteristics, the first and the substrate surface position, that put the second maximum line width position characteristic the desired maximum value corresponding to the desired maximum value of the resist line width provided for in the middle of the substrate surface position of the second substrate surface position location corresponding, as the third base plate surface positioned to project a reduced image of the photomask to the photoresist film containing said dense pattern the isolated pattern A second step;
A first exposure amount corresponding to the desired maximum value in the first maximum line width position characteristic and a second exposure amount corresponding to the desired maximum value in the second maximum line width position characteristic A third step of determining an intermediate exposure amount as a third exposure amount for projecting a reduced image of the photomask onto a photoresist film;
A reduced image of the photomask is projected onto a photoresist film on a substrate surface corresponding to the first test substrate surface based on the third substrate surface position and the third exposure amount. Having a process,
Method for manufacturing Integrated Circuit device. The method of manufacturing an integrated circuit device according to claim 1,
Further, when the reduced image board surface position to be projected on the photoresist film of the photomask is defined, forms a reduced image of the photomask on the second test substrate surface corresponding to the substrate surface and projected onto the plurality of areas of the photoresist film to form a resist pattern, derive the standard deviation of the difference, Relais resist line width corresponding to the dense pattern, Relais resist line width corresponding to the previous Symbol isolated pattern And has a fifth step of
If the standard deviation exceeds the standard values, the first as to implement a ~ the third step Engineering, after defining a new said third substrate surface position and the third exposure , performed more the fourth step to the third exposure amount the determined third board surface position location and newly the newly defined,
If the standard deviation does not exceed the standard values is Ri by the that have been established before Symbol substrate surface position, projecting a reduced image of the photomask to the photoresist film on the substrate surface,
A method of manufacturing an integrated circuit device. In the manufacturing method of the integrated circuit device according to claim 1 or 2 ,
By fitting the relationship between the position of the first test substrate surface and the first resist line width when projecting the dense pattern with a quadratic function, the first maximum value and the first To determine the first maximum line width position characteristic,
By fitting the relationship between the position of the first test substrate surface and the second resist line width when projecting the isolated pattern with a quadratic function, the second maximum value and the second maximum value are obtained. And deriving the second maximum line width position characteristic,
A method of manufacturing an integrated circuit device. Photoresist film on substrate surface with reduced image of photomask including dense pattern in which band-like patterns are juxtaposed at a first interval and isolated pattern in which band-like patterns are juxtaposed at a second interval wider than the first interval When the substrate surface position to be projected is determined, the reduced image of the photomask is projected onto a plurality of regions of the photoresist film formed on the surface of the first test substrate corresponding to the substrate surface. Forming a resist pattern, deriving a standard deviation of a difference between a resist line width corresponding to the isolated pattern and a resist line width corresponding to the dense pattern;
When the standard deviation does not exceed a reference value, a reduced image of the mask pattern is projected on a photoresist film on the substrate surface according to a predetermined position on the substrate surface,
When the standard deviation exceeds the reference value,
The second test in which a first resist line width of a resist pattern obtained by projecting the dense pattern onto a photoresist film on a second test substrate surface corresponding to the substrate surface is a first maximum value. A first maximum line width position characteristic representing a relationship between the plurality of first maximum values and the plurality of first positions by obtaining a first position of the substrate surface for a plurality of exposure amounts. Derived,
The second resist line width of the resist pattern obtained by projecting the isolated pattern onto the photoresist film on the surface of the second test substrate becomes the second maximum value of the second test substrate surface. A second maximum line width position characteristic representing a relationship between a plurality of the second maximum values and a plurality of the second positions by deriving the position of 2 for a plurality of exposure amounts;
A first substrate surface position corresponding to a desired maximum value of the resist line width in the first maximum line width position characteristic and a second corresponding to the desired maximum value in the second maximum line width position characteristic. A substrate surface position intermediate to the substrate surface position is defined as a third substrate surface position for projecting a reduced image of the photomask onto a photoresist film,
Based on the position of the third substrate surface, a reduced image of the photomask is projected onto a photoresist film on the substrate surface.
A method for manufacturing an integrated circuit device.

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