JP5536517B2 - Solid-state imaging device - Google Patents

Description

  The present invention relates to a solid-state imaging device.

  A plurality of light receiving units each including a silicon substrate including a first main surface and a second main surface facing each other as a solid-state imaging device, each having a photodiode that generates an amount of charge according to the intensity of incident light. Are arranged on the first main surface side (see, for example, Patent Document 1).

JP 2001-309243 A

  In a solid-state imaging device using a silicon substrate, it is generally possible to improve sensitivity characteristics on the long wavelength side by setting the thickness of the silicon substrate to be large. However, even when the thickness of the silicon substrate is set sufficiently large (for example, about 500 μm), it has been difficult to obtain sufficient sensitivity characteristics in the near-infrared wavelength band of 1100 nm. This is because the absorption length of light in the near-infrared wavelength band by silicon is long (for example, in the case of 1100 nm light, the absorption length of silicon is 50 μm or more), so that the probability of photoelectric conversion deep in the silicon substrate is high. This is because it is difficult to collect the charges photoelectrically converted in this depth in the light receiving portion. For this reason, it has been difficult to realize a solid-state imaging device having practically sufficient sensitivity characteristics in a wavelength band including the near infrared using a silicon substrate. Although there is a prior example in which a reflective film is applied to the surface of the silicon substrate facing the light incident surface, the reflectance is low and the sensitivity increase rate is not so large.

  An object of the present invention is to provide a solid-state imaging device using a silicon substrate, which has practically sufficient sensitivity characteristics in a wavelength band including near infrared.

  The solid-state imaging device according to the present invention includes a first main surface and a second main surface facing each other, and a plurality of first light receiving units each including a photodiode that generates an amount of electric charge according to an incident light intensity. A solid-state imaging device including a silicon substrate arranged on the first main surface side, wherein the silicon substrate has a first conductivity type accumulation layer formed on the second main surface side, and Irregular irregularities are formed at least in a region facing the first light receiving portion, a region facing the first light receiving portion in the second main surface of the silicon substrate is optically exposed, and the silicon substrate is The portion corresponding to the first light receiving portion is optically substantially separated by the isolation region.

  In the solid-state imaging device according to the present invention, the light in the long wavelength band including the near infrared is incident on the silicon substrate, then travels through the silicon substrate, and is at least in a region facing the first light receiving unit on the second main surface. Reach the irregular irregularities formed. The reached light is reflected, scattered, or diffused by the irregular irregularities, and further travels in the silicon substrate. As a result, most of the light in the long wavelength band including the near infrared is absorbed by the silicon substrate without being transmitted through the silicon substrate and generates charges. The charge generated by light in a long wavelength band including near infrared moves to the photodiode (first light receiving unit) and is detected as a photocurrent. Therefore, in the solid-state imaging device, the travel distance of the light incident on the silicon substrate is increased and the distance at which the light is absorbed is also increased, so that the sensitivity characteristic in the near-infrared wavelength band is improved.

  In the solid-state imaging device according to the present invention, a first conductivity type accumulation layer is formed on the second main surface side of the silicon substrate. For this reason, the unnecessary electric charges generated regardless of light on the second main surface side are recombined, and the dark current can be reduced. Further, the accumulation layer of the first conductivity type suppresses trapping of charges generated by light near the second main surface of the silicon substrate on the one main surface. For this reason, the electric charge generated by light efficiently moves to the photodiode (first light receiving unit), and the light detection sensitivity of the solid-state imaging device can be improved.

  By the way, when light incident on the irregular irregularities is reflected, scattered, or diffused, crosstalk occurs between the first light receiving portions (photodiodes), and the resolution may decrease. However, in the solid-state imaging device according to the present invention, the silicon substrate is optically substantially separated for each part corresponding to the first light receiving part by the isolation region. The occurrence of crosstalk can be suppressed. Therefore, in the solid-state imaging device according to the present invention, it is possible to prevent the resolution from being lowered.

  Preferably, the isolation region is formed to extend from the second main surface in the thickness direction of the silicon substrate. In this case, each 1st light-receiving part can be optically isolate | separated reliably.

  Preferably, the isolation region reaches the first main surface. In this case, each first light receiving portion can be completely optically separated.

  Preferably, the first light-receiving unit outputs a voltage value corresponding to the amount of charge input to the gate terminal, and transfer for transferring the charge generated by the photodiode to the gate terminal of the amplification transistor. A transistor for discharging, a discharging transistor for discharging the charge at the gate terminal of the amplifying transistor, and a selecting transistor for selectively outputting a voltage value output from the amplifying transistor. In this case, an active pixel type solid-state imaging device can be realized.

  Preferably, on the silicon substrate, a plurality of second light receiving parts each having a photodiode that generates an amount of electric charge according to the incident light intensity is further arranged on the first main surface side, and the first light receiving part and the first light receiving part The two light receiving portions constitute one pixel region, and an infrared light cut filter and a color filter are provided for the second light receiving portion. In this case, a solid-state imaging device that can acquire a visible image and a near-infrared image can be realized.

  Preferably, the second light-receiving unit outputs a voltage value corresponding to the amount of charge input to the gate terminal, and transfers to transfer the charge generated by the photodiode to the gate terminal of the amplification transistor. A transistor for discharging, a discharging transistor for discharging the charge at the gate terminal of the amplifying transistor, and a selecting transistor for selectively outputting a voltage value output from the amplifying transistor. In this case, an active pixel type solid-state imaging device can be realized.

  Preferably, the isolation region has a discontinuous portion for connecting an accumulation layer located in the isolation region and an accumulation layer located outside the isolation region at least on the second main surface side. In this case, the potential on the second main surface side of the silicon substrate can be easily taken.

  According to the present invention, it is possible to provide a solid-state imaging device using a silicon substrate, which has practically sufficient sensitivity characteristics in a wavelength band including near infrared.

It is a block diagram which shows the solid-state imaging device which concerns on 1st Embodiment. It is a circuit diagram of the light-receiving part which the solid-state imaging device concerning a 1st embodiment contains. It is a figure for demonstrating the cross-sectional structure of the solid-state imaging device which concerns on 1st Embodiment. It is a top view which shows the solid-state imaging device which concerns on 1st Embodiment. It is a figure which shows the cross-sectional structure along the VV line of Fig.4 (a). It is the SEM image which observed the irregular unevenness | corrugation formed in the silicon substrate. It is a block diagram which shows the solid-state imaging device which concerns on 1st Embodiment. It is a block diagram which shows the solid-state imaging device which concerns on 2nd Embodiment. It is a figure for demonstrating the cross-sectional structure of the solid-state imaging device which concerns on 2nd Embodiment. It is a top view which shows the solid-state imaging device which concerns on 2nd Embodiment. It is a figure which shows the cross-sectional structure along the XI-XI line of Fig.10 (a). It is a figure for demonstrating the cross-sectional structure of the solid-state imaging device which concerns on the modification of 1st and 2nd embodiment. It is a figure for demonstrating the cross-sectional structure of the solid-state imaging device which concerns on the modification of 1st Embodiment. It is a figure for demonstrating the cross-sectional structure of the solid-state imaging device which concerns on the modification of 2nd Embodiment. It is a figure for demonstrating the cross-sectional structure of the solid-state imaging device which concerns on the modification of 2nd Embodiment.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

(First embodiment)
FIG. 1 is a configuration diagram showing a solid-state imaging device 1A according to the first embodiment. As shown in this figure, the solid-state imaging device 1A has M × N light receiving portions P _{1,1 to} P _{M, N} formed on a silicon substrate. The light receiving portions P _{1,1 to} P _{M, N} have the same configuration and are arranged in M rows and N columns. The light receiving part P _{m, n} is located in the m-th row and the n-th column. Here, M and N are each an integer of 2 or more, m is an arbitrary integer of 1 to M, and n is an arbitrary integer of 1 to N. Incidentally, each of the light receiving portions P _m, wiring for transmitting a control signal for controlling the operation of the _n, the control circuit for generating the control signal, wiring for transmitting the light receiving unit P _m, the output signal output from the _n, The signal processing circuit that processes the output signal is not shown. Each of the light receiving portions P _{m, n} has a substantially rectangular shape, and in the present embodiment, has a size of 5 μm × 5 μm. That is, the pitch of each light receiving part P _{m, n} is 5 μm.

FIG. 2 is a circuit diagram of each light receiving unit P _{m, n} . The light receiving part P _{m, n} shown in this figure is of an active pixel type, and generates a charge corresponding to the incident light intensity, and corresponds to the amount of charge input to the gate terminal. and amplifying transistors T ₁ which outputs a voltage _value, the transfer transistor T ₂ of the order to transfer the charges generated in the photodiode PD to the gate terminal of the amplifying transistors T _1, the charge of the gate terminal of the amplifying transistors T ₁ A discharging transistor T ₃ for discharging and a selecting transistor T ₄ for outputting a voltage value output from the amplifying transistor T ₁ to the external wiring L _n are included.

The photodiode PD has an anode terminal at the ground potential. Amplifying transistors T ₁ has its drain terminal is at a bias potential. Transferring transistor T ₂ are, its drain terminal connected to the gate terminal of the amplifying transistor T _1, its source terminal is connected to the cathode terminal of the photodiode PD. Discharging transistor T ₃ has its source terminal connected to the gate terminal of the amplifying transistor T _1, its drain terminal is at a bias potential. Selecting transistor T ₄ has its source terminal connected to the source terminal of the amplifying transistor T _1, its drain terminal is connected to the wiring L _n. The wiring L _n constant current source is connected. Amplifying transistor T ₁ and selection transistor T ₄ constitute a source follower circuit.

Transferring transistor T ₂ are, m-th row transfer control signal S _trans at its gate _terminal, type _m, the m-th row transfer control signal S _trans, when _m is at a high level, generated by the photodiode PD transferring charge to the gate terminal of the amplifying transistor T _1. The discharge transistor T ₃ receives the m-th row discharge control signal S _{reset, m} at its gate terminal, and when the m-th row discharge control signal S _{reset, m} is at a high level, the amplifying transistor T ₁ Discharge the gate terminal charge. The selection transistor T ₄ receives the m-th row selection control signal S _{address, m} at its gate terminal, and when the m-th row selection control signal S _{address, m} is at a high level, the amplification transistor T ₁ and it outputs a voltage value output to the outside of the wiring L _n.

Each light receiving unit P _{m, n} configured as described above is amplified by the m-th row transfer control signal S _{trans, m} being at a low level and the m-th row discharge control signal S _{reset, m} being at a high level. the charge of the gate terminal of the use transistors T ₁ is discharged, the m-th row selecting control signal S _address, if _m is at a high level, the voltage value outputted from the amplification transistors T ₁ in its initial state (dark signal component) is output to the wiring L _n via the select transistor T _4. On the other hand, if the m-th row discharge control signal S _{reset, m} is at a low level and each of the m-th row transfer control signal S _{trans, m} and the m-th row selection control signal S _{address, m} is at a high level, the photodiode charge generated by the PD is input to the gate terminal of the amplifying transistors T _1, the voltage value outputted from the amplification transistors T ₁ according to the amount of the charge (bright signal component) via a selection transistor T ₄ is output to the wiring _{L n.}

Each of the m-th row transfer control signal S _{trans, m} , the m-th row discharge control signal S _{reset, m} , and the m-th row selection control signal S _{address, m} is output from a control circuit (not shown) and passes through the light receiving unit P. Enter in _{m and n} . Each light receiving portion P _m, the wiring from the selection transistor T ₄ of _n L _n is output to the voltage value (dark signal component, bright signal component) is inputted to the signal processing circuit (not shown), the differential voltage in the signal processing circuit A value (= bright signal component−dark signal component) is obtained and output.

FIG. 3 is a diagram for explaining a cross-sectional configuration of the solid-state imaging device 1A. 4A is a plan view of the solid-state imaging device 1A as viewed from the first main surface 10a side of the silicon substrate 10, and FIG. 4B is a second main surface of the solid-state imaging device 1A. It is the top view seen from 10b side. FIG. 5 is a diagram showing a cross-sectional configuration along the line V-V in FIG. In these drawings, the photodiode PD and the transfer transistor T ₂ in FIG. 2 are shown, and the circuit including the other transistors T ₁ , T ₃ , T ₄ is simply illustrated as a pixel circuit PC. In addition, illustration of various wirings is omitted.

The solid-state imaging device 1 </ b> A includes a silicon (Si) substrate 10. The silicon substrate 10 includes a first main surface 10a and a second main surface 10b that face each other. The light receiving parts P _{m, n} are arranged on the first main surface 10a side of the silicon substrate 10. The silicon substrate 10 is a p-type region having a relatively low impurity concentration. The silicon substrate 10 can be constituted by, for example, a p-type well region.

Each light receiving portion P _{m, n} includes an n ⁻ -type first semiconductor region 11 formed in a predetermined region of the silicon substrate 10, and a p ⁺ -type second semiconductor formed on the first semiconductor region 11 and its periphery. A semiconductor region 12, an n ⁺ -type third semiconductor region 13 formed at a distance from the first semiconductor region 11, and the first semiconductor region 11 and the third semiconductor region 13 on the silicon substrate 10; And a gate electrode 16 provided with an insulating film 15 interposed therebetween. The first semiconductor region 11 is an n-type region having a relatively low impurity concentration. The second semiconductor region 12 is a p-type region having a relatively high impurity concentration. The third semiconductor region 13 is an n-type region having a relatively high impurity concentration.

In the present embodiment, “relatively high impurity concentration” means, for example, an impurity concentration of about 1 × 10 ¹⁶ cm ⁻³ or more, and “+” is attached to the conductivity type, and “impurity concentration is compared. “Low” means that the impurity concentration is about 1 × 10 ¹⁵ cm ⁻³ or less and “−” is attached to the conductivity type. Examples of n-type impurities include antimony (Sb) and arsenic (As), and examples of p-type impurities include boron (B). The thickness / impurity concentration of each semiconductor region is as follows.
Silicon substrate 10: thickness 3 to 20 μm / impurity concentration 1 × 10 ¹⁴ to 10 ¹⁷ cm ⁻³
First semiconductor region 11: thickness 0.1 to 0.5 μm / impurity concentration 1 × 10 ¹⁸ to 10 ²¹ cm ⁻³
Second semiconductor region 12: thickness 0.2-2 μm / impurity concentration 1 × 10 ¹⁶ to 10 ¹⁸ cm ⁻³
Third semiconductor region 13: thickness 0.1 to 0.3 μm / impurity concentration 1 × 10 ¹⁸ to 10 ²¹ cm ⁻³

In each light receiving portion P _{m, n} , the silicon substrate 10, the first semiconductor region 11, and the second semiconductor region 12 constitute the buried photodiode PD. Further, the silicon substrate 10, first semiconductor region 11, the third semiconductor region 13 and the gate electrode 16, constitute a transfer transistor _{T 2} of the field effect. That is, the gate electrode 16 corresponds to the gate terminal of the transfer transistor T _2, the first semiconductor region 11 corresponds to the source terminal of the transfer transistor T _2, the third semiconductor region 13 is the drain terminal of the transfer transistor T ₂ It corresponds to. The gate electrode 16 is disposed on the first main surface 10a side of the silicon substrate 10 with the insulating film 17 interposed therebetween.

Wire connected to the third semiconductor region 13 (the drain terminal of the transfer transistor _{T 2)} is connected to the pixel circuit PC (other transistors _{T 1, T 3, T 4} ). Further, the wiring connected to the gate electrode 16 (the gate terminal of the transfer transistor T ₂₎ is connected to the control circuit (not shown).

  Irregular irregularities 20 are formed on the second main surface 10 b of the silicon substrate 10. An accumulation layer 21 is formed on the second main surface 10b side of the silicon substrate 10, and the second main surface 10b is optically exposed. The second main surface 10b is optically exposed that not only the second main surface 10b is in contact with atmospheric gas such as air, but also an optically transparent film is formed on the second main surface 10b. This includes cases where

The accumulation layer 21 is formed by ion-implanting or diffusing p-type impurities in the silicon substrate 10 from the second main surface 10 b side so as to have an impurity concentration higher than that of the silicon substrate 10. The thickness of the accumulation layer 21 is, for example, about 1 μm. The accumulation layer 21 may be formed before the irregular irregularities 20 are formed, or may be formed after the irregular irregularities 20 are formed. Note that it is preferable to activate the accumulation layer 21 by heat-treating the silicon substrate 10. The heat treatment is performed, for example, in the range of about 800 to 1000 ° C. for about 0.5 to 1.0 hour in an atmosphere such as N ₂ gas. At this time, the crystallinity of the silicon substrate 10 is also recovered.

  The irregular irregularities 20 are formed by irradiating the second main surface 10b side of the silicon substrate 10 with pulsed laser light. For example, a silicon substrate is placed in a chamber having a gas inlet and a gas outlet, and pulsed laser light is irradiated onto the silicon substrate 10 from a pulse laser generator disposed outside the chamber. An inert gas flow is formed in the chamber by introducing an inert gas (for example, nitrogen gas or argon gas) from the gas introduction unit and exhausting the gas from the gas discharge unit. Thereby, dust generated when the pulse laser beam is irradiated is discharged out of the chamber by the inert gas flow, and adhesion of processing waste and dust to the silicon substrate 10 can be prevented.

In the present embodiment, a picosecond to femtosecond pulse laser generator is used as the pulse laser generator, and the entire second main surface 10b is irradiated with picosecond to femtosecond pulse laser light. The second main surface 10b is roughened by picosecond to femtosecond pulse laser light, and irregular irregularities 20 are formed on the entire surface of the second main surface 10b as shown in FIG. The irregular irregularities 20 have a surface that intersects the direction orthogonal to the first major surface 10a. The height difference of the unevenness 20 is, for example, about 0.5 to 10 μm, and the interval between the convex portions in the unevenness 20 is about 0.5 to 10 μm. The pulse time width of the picosecond to femtosecond pulse laser beam is, for example, about 50 fs to 2 ps, the intensity is, for example, about 4 to 16 GW, and the pulse energy is, for example, about 200 to 800 μJ / pulse. More generally, the peak intensity is about 3 × 10 ^{11 to} 2.5 × 10 ¹³ (W / cm ² ), and the fluence is about 0.1 to 1.3 (J / cm ² ). FIG. 6 is an SEM image obtained by observing irregular irregularities 20 formed on the second major surface 10b.

It is preferable to heat-treat the silicon substrate 10 after forming irregular irregularities 20. The heat treatment is performed, for example, in the range of about 800 to 1000 ° C. for about 0.5 to 1.0 hour in an atmosphere of N ₂ gas. By the heat treatment, the crystal damage in the silicon substrate 10 can be recovered and recrystallized, and problems such as an increase in dark current can be prevented. Note that the heat treatment after the formation of the accumulation layer 21 may be omitted, and only the heat treatment after the irregular irregularities 20 may be formed.

The silicon substrate 10 is optically separated for each part corresponding to each light receiving part P _{m, n} by the isolation region 23. The isolation region 23 extends in the thickness direction of the silicon substrate 10 and is formed so as to penetrate from the first main surface 10 a to the second main surface 10 b of the silicon substrate 10. The isolation region 23 is formed in a lattice shape when viewed from the second main surface 10b side so as to completely surround each portion corresponding to the light receiving portion _{Pm, n} . Therefore, the portions of the silicon substrate 10 corresponding to the light receiving portions _{Pm, n} are separated not only optically but also electrically by the isolation region 23.

As shown in the drawing, an optically transparent conductive film 24 is formed on the second main surface 10 b of the silicon substrate 10. Thereby, the potential of the accumulation layer 21 in the portion corresponding to each light receiving portion Pm _{, n} in the silicon substrate 10 can be made the same as the surrounding potential.

The isolation region 23 is configured by, for example, trench isolation. The isolation region 23 is a substance that reflects light in a wavelength band absorbed by the silicon substrate 10 at the interface between the trench groove and the silicon substrate 10 after the trench groove is formed by etching or the like in the silicon substrate 10 (for example, SiO ₂ or the like). The trench groove is filled with an insulating material). A shallow trench isolation (STI) 25 is formed inside the isolation region 23 so as to surround each light receiving portion P _{m, n} .

  When the solid-state imaging device 1A is actually manufactured, a support substrate (not shown) is bonded to the first main surface 10a side of the silicon substrate 10 with an adhesive. Thereby, the intensity | strength of the silicon substrate 10 increases and it can respond to an isolation process etc. now. Since the isolation regions 23 are formed in a lattice shape, the accumulation layer 21 is separated for each pixel. In order to establish conduction between the accumulation layers 21, an optically transparent conductive film 24 is formed on the second main surface 10 b side of the silicon substrate 10 as shown in the figure. The conductive film 24 is made of a conductive resin or the like. The support substrate is separated from the silicon substrate 10 after completion of the process.

  In the solid-state imaging device 1A, since irregular irregularities 20 are formed on the second main surface 10b, the light L incident on the silicon substrate 10 from the first main surface 10a side of the silicon substrate 10 is shown in FIG. As shown, the light travels through the silicon substrate 10 and is reflected, scattered, or diffused by the unevenness 20 and travels through the silicon substrate 10 for a long distance.

  Usually, the refractive index n of air is 1.0 while the refractive index n of Si is 3.5. In a solid-state imaging device, when light is incident from a direction perpendicular to the light incident surface, the light component that is not absorbed in the silicon substrate is reflected by the back surface of the light incident surface and transmitted by the solid-state imaging device. Divided into The light transmitted through the solid-state imaging device does not contribute to the sensitivity of the solid-state imaging device. If the light component reflected on the back surface of the light incident surface is absorbed in the silicon substrate, it becomes a photocurrent, and the light component not absorbed is the light component that has reached the back surface of the light incident surface on the light incident surface. Similarly, it is reflected or transmitted.

  In the solid-state imaging device 1A, when the light L enters from a direction perpendicular to the light incident surface (first main surface 10a), when the light reaches the irregular unevenness 20 formed on the second main surface 10b, the light from the unevenness 20 The light component that reaches at an angle of 16.6 ° or more with respect to the emission direction is totally reflected by the unevenness 20. Since the irregularities 20 are irregularly formed, they have various angles with respect to the emission direction, and the totally reflected light component diffuses in various directions. Therefore, the totally reflected light component includes a light component absorbed inside the silicon substrate 10 and a light component reaching the interface with the isolation region 23 and the first main surface 10a.

  The light component that reaches the interface with the isolation region 23 and the first main surface 10a travels in various directions due to the diffusion of the irregularities 20, and thus the light that reaches the interface with the isolation region 23 and the first main surface 10a. The possibility that the component is totally reflected at the interface with the isolation region 23 or the first main surface 10a is very high. The light component totally reflected at the interface with the isolation region 23 and the first main surface 10a repeats total reflection on different surfaces, and the travel distance is further increased. As described above, the light incident on the solid-state imaging device 1A is absorbed by the silicon substrate 10 and detected as a photocurrent while traveling through the silicon substrate 10 for a long distance.

  Thus, most of the light L incident on the solid-state imaging device 1 </ b> A is absorbed by the silicon substrate 10 without being transmitted through the solid-state imaging device 1 </ b> A, having a longer travel distance. Therefore, in the solid-state imaging device 1A, the sensitivity characteristic in the near-infrared wavelength band is improved.

  When regular irregularities are formed on the second main surface 10b, the light components that reach the first major surface 10a and the side surfaces are diffused by the irregularities, but proceed in a uniform direction. The possibility that the light component that has reached the interface with the first main surface 10a is totally reflected at the interface with the isolation region 23 or the first main surface 10a is low. For this reason, the light component which permeate | transmits in the interface with the isolation area | region 23, 1st main surface 10a, and also 2nd main surface 10b increases, and the traveling distance of the light which injected into the solid-state imaging device will become short. For this reason, it is difficult to improve sensitivity characteristics in the near-infrared wavelength band.

In the solid-state imaging device 1 </ b> A, the accumulation layer 21 is formed on the second main surface 10 b side of the silicon substrate 10. Thereby, unnecessary carriers generated regardless of light on the second main surface 10b side are recombined, and dark current can be reduced. In addition, the accumulation layer 21 suppresses charges generated by light near the second main surface 10b from being trapped by the second main surface 10b. For this reason, the electric charge generated by light efficiently moves to the photodiode PD (light receiving part P _{m, n} ), and the light detection sensitivity of the solid-state imaging device 1A can be further improved.

By the way, when light incident on the irregular irregularities 20 is reflected, scattered, or diffused, crosstalk occurs between the light receiving portions P _{m, n} (photodiode PD), and the resolution may be lowered. . However, in the solid-state imaging device 1A, since the silicon substrate 10 is optically substantially separated for each part corresponding to the light receiving part P _{m, n} by the isolation region 23 _, between the light receiving parts P _{m, n} The occurrence of crosstalk can be suppressed. Therefore, in the solid-state imaging device 1A, it is possible to prevent the resolution from being lowered.

The isolation region 23 is formed to extend in the thickness direction of the silicon substrate 10 from the second major surface 10b. Thereby, each light-receiving part _{Pm, n} can be reliably optically separated. The isolation region 23 preferably reaches the first main surface 10a. In this case, each light receiving part P _{m, n} can be completely optically separated.

Each light receiving portion P _{m, n} and amplifying transistor _{T 1,} a transfer transistor _{T 2,} the discharge transistor _{T 3,} has a selecting transistor _{T 4,} the. Thereby, an active pixel type solid-state imaging device 1A can be realized.

(Second Embodiment)
FIG. 8 is a configuration diagram illustrating a solid-state imaging device 1B according to the second embodiment. As shown in this figure, the solid-state imaging device 1B includes M × N first light receiving parts P _{1,1 to} P _{M, N} and second light receiving parts _{PR 1,1 to} P, respectively on a silicon substrate. _{PRM , N} , _{PG1,1 to PGM , N} , _{PB1,1 to PBM , N} are formed. Each light receiving portions _{P 1,1 ~P M, N, P} R1,1 ~P RM, N, P G1,1 ~P GM, N, P B1,1 ~P BM, N is have a same structure with each other Each of them is arranged in M rows and N columns. Receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, n is positioned in the m-th row and the n-th column, respectively. Here, M and N are each an integer of 2 or more, m is an arbitrary integer of 1 to M, and n is an arbitrary integer of 1 to N. Each light receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, wiring for transmitting a control signal for controlling the operation of the _n, the control circuit for generating the control signal, the light receiving portions The wiring for transmitting the output signal output from P _{m, n} , _{PRm, n} , _{PGm, n} , and P _{Bm, n} and the signal processing circuit for processing the output signal are not shown. .

Each of the light receiving portions P _{m, n} , _{PRm, n} , P _{Gm, n} , and P _{Bm, n} is of an active pixel type, and although not shown in the drawings, the light receiving portions P _{m, n} in the first embodiment _The configuration is the same as _n . That is, the light receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, n includes a photodiode, an amplifying transistor for outputting a voltage value according to the amount of charge that is input to the gate terminal A transfer transistor for transferring the charge generated in the photodiode to the gate terminal of the amplification transistor, a discharge transistor for discharging the charge at the gate terminal of the amplification transistor, and a voltage output from the amplification transistor Includes a selection transistor for outputting values to external wiring.

The first light receiving portion P _{m, n} is a region for detecting light in the near-infrared wavelength band. The second light receiving part _{PRm, n} is an area for detecting visible light, in particular, a red light component. The second light receiving unit P _{Gm, n} is an area for detecting visible light, particularly a green light component. The second light receiving portion P _{Bm, n} is an area for detecting visible light, particularly, a blue light component. Receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, with _n, one pixel region is formed. In the solid-state imaging device 1B, it is possible to acquire a visible image and a near-infrared image. As a solid-state imaging device that acquires a visible image and a near-infrared image, there is a solid-state imaging device described in Japanese Unexamined Patent Application Publication No. 2009-89158.

  FIG. 9 is a diagram for explaining a cross-sectional configuration of the solid-state imaging device 1B. 10A is a plan view of the solid-state imaging device 1B as viewed from the first main surface 10a side of the silicon substrate 10, and FIG. 10B is a second main surface of the silicon substrate 10 where the solid-state imaging device 1B is viewed. It is the top view seen from 10b side. FIG. 11 is a diagram showing a cross-sectional configuration along the line XI-XI in FIG. In these drawings, photodiodes and transfer transistors are shown. Circuits including other transistors are simplified as pixel circuits PC, and various wirings are not shown.

The solid-state imaging device 1B includes a silicon (Si) substrate 10. The first principal surface 10a side of the silicon substrate 10, the light receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, n are arranged. Each light receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, n is the light receiving portion P _M in the first _{embodiment, N} Like, the first semiconductor region 11, the second semiconductor region 12 A third semiconductor region 13 and a gate electrode 16. An infrared light cut filter 30 and a color filter 31 are provided for each of the second light receiving portions _{PRm, n} , _{PGm, n} , and _{PBm, n} . The infrared light cut filter 30 is a filter that cuts light components in the near-infrared wavelength band. The color filter 31 is a filter that transmits light in a wavelength band corresponding to a light component detected by each of the second light receiving parts _{PRm, n} , _{PGm, n} , and _{PBm, n} .

  Irregular irregularities 20 are formed on the second main surface 10 b of the silicon substrate 10. An accumulation layer 21 is formed on the second main surface 10b side of the silicon substrate 10, and the second main surface 10b is optically exposed.

The silicon substrate 10 is optically substantially separated for each portion corresponding to each light receiving part P _{m, n} by the isolation region 23. The isolation region 23 extends in the thickness direction of the silicon substrate 10 and is formed so as to penetrate from the first main surface 10 a to the second main surface 10 b of the silicon substrate 10. The isolation region 23 is formed in a rectangular frame shape when viewed from the second main surface 10b side so as to completely surround each portion corresponding to the light receiving portion _{Pm, n} .

In the solid-state imaging device 1B, the second light receiving portion _{P Rm, n, P Gm,} n, P Bm, with respect to _n, since the infrared light cut filter 30 and the color filter 31 is provided, each second The light receiving parts P _{Rm, n} , P _{Gm, n} , P _{Bm, n} are not incident on the light components in the near-infrared wavelength band, and the second light receiving parts P _{Rm, n} , P _{Gm, n} , The light component in the wavelength band corresponding to the light component detected by P _{Bm, n} is incident. Therefore, in each of the second light receiving parts _{PRm, n} , _{PGm, n} , and _{PBm, n} , light in the corresponding wavelength band is detected without detecting the light component in the near infrared wavelength band. It will be. On the other hand, since the infrared light cut filter 30 is not provided for each first light receiving part P _{m, n} , light in the near-infrared wavelength band is incident.

As in the solid-state imaging device 1A, the near-infrared wavelength band light incident on the first light receiving unit P _{m, n} has a longer travel distance and a longer distance for light absorption. For this reason, in the solid-state imaging device 1B, the sensitivity characteristic in the near-infrared wavelength band can be improved.

Each light receiving portion _{P m, n, P Rm,} n, P Gm, n, P Bm, n is an amplifying transistor has a transfer transistor, a discharge transistor, a selection transistor. Thus, an active pixel type solid-state imaging device 1B can be realized.

  The preferred embodiments of the present invention have been described above. However, the present invention is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

  In the above embodiment, the isolation region 23 is formed to penetrate from the first main surface 10a to the second main surface 10b of the silicon substrate 10, but is not limited thereto. For example, as shown in FIG. 12, the isolation region 23 is formed so as to extend from the second main surface 10b side of the silicon substrate 10 to a middle portion of the silicon substrate 10, that is, not to reach the first main surface 10a. May be.

The isolation region 23 is for suppressing crosstalk due to light reflected, scattered, or diffused by the irregular irregularities 20, and it is extremely preferable that the isolation region 23 reaches the second main surface 10b. That is, since the isolation region 23 reaches the second main surface 10b, crosstalk can be reliably prevented. The silicon substrate 10 only needs to be substantially optically separated for each part corresponding to the light receiving part P _{m, n} by the isolation region 23. For example, the isolation region 23 does not necessarily reach the second main surface 10b, and may be formed away from the second main surface 10b. In this case, crosstalk cannot be reliably prevented, but the effect of suppressing crosstalk can be obtained.

In the above embodiment, the isolation region 23 is formed so as to completely surround each portion corresponding to the light receiving portion P _{m, n} in the silicon substrate 10 _, but is not limited thereto. As shown in FIGS. 13A and 13B and FIGS. 14A and 14B, the isolation region 23 is an accumulation layer located in the isolation region 23 at least on the second main surface 10b side. 21 and a discontinuous portion for connecting the accumulation layer 21 located outside the isolation region 23, that is, the isolation region 23 is intermittently formed when viewed from the second main surface 10b side. May be. In either case, the potential on the second main surface 10b side of the silicon substrate 10 can be easily taken. In these cases, the conductive film 24 is not necessary.

In the second embodiment, the irregular irregularities 20 are formed over substantially the entire second main surface 10b of the silicon substrate 10, but the present invention is not limited to this. For example, the irregular irregularities 20 may be formed only in a region corresponding to the first light receiving portion P _{m, n} in the second main surface 10b of the silicon substrate 10, as shown in FIG.

  The solid-state imaging devices 1A and 1B according to the present embodiment are front-illuminated solid-state imaging devices, but are not limited thereto and may be back-illuminated solid-state imaging devices.

  The p-type and n-type conductivity types in the solid-state imaging devices 1 </ b> A and 1 </ b> B according to the present embodiment may be interchanged so as to be opposite to those described above.

DESCRIPTION OF SYMBOLS 1A, 1B ... Solid-state imaging device, 10 ... Silicon substrate, 10a ... 1st main surface, 10b ... 2nd main surface, 11 ... 1st semiconductor region, 12 ... 2nd semiconductor region, 13 ... 3rd semiconductor region, 16 ... Gate electrode 20 Irregular irregularities 21 Accumulation layer 23 Isolation region 30 Infrared light filter 31 Color filter PD Photodiode P _{1,1 to} P _{M, N} Light reception part (a first light receiving _{portion), P R1,1 ~P RM, N} , P G1,1 ~P GM, N, P B1,1 ~P BM, N ... second light receiving portions, T 1 _... amplifier Transistor, T ₂ ... transfer transistor, T ₃ ... discharge transistor, T ₄ ... selection transistor.

Claims (7)

A plurality of first light receiving portions each including a first main surface and a second main surface facing each other and each having a photodiode that generates an amount of electric charge according to an incident light intensity are arranged on the first main surface side. A solid-state imaging device comprising a silicon substrate,
The silicon substrate has a first conductivity type accumulation layer formed on the second main surface side, and irregular irregularities in at least a region of the second main surface facing the first light receiving portion. Formed,
The region facing the first light receiving portion on the second main surface of the silicon substrate is optically exposed,
The solid-state imaging device, wherein the silicon substrate is optically substantially separated for each portion corresponding to the first light receiving portion by an isolation region.   The solid-state imaging device according to claim 1, wherein the isolation region is formed to extend from the second main surface in a thickness direction of the silicon substrate.   The solid-state imaging device according to claim 2, wherein the isolation region reaches the first main surface.   The first light receiving unit outputs a voltage value corresponding to the amount of electric charge input to the gate terminal, and transfers the electric charge generated by the photodiode to the gate terminal of the amplifying transistor. A transistor for discharging, a discharging transistor for discharging a charge at a gate terminal of the amplifying transistor, and a selecting transistor for selectively outputting a voltage value output from the amplifying transistor. The solid-state imaging device according to any one of claims 1 to 3. The silicon substrate further includes a plurality of second light receiving portions each having a photodiode that generates an amount of charge corresponding to an incident light intensity, on the first main surface side, and the first light receiving portion and the One pixel region is configured with the second light receiving unit,
The solid-state imaging device according to claim 1, wherein an infrared light cut filter and a color filter are provided for the second light receiving unit.   The second light receiving unit outputs a voltage value corresponding to the amount of charge input to the gate terminal, and transfers the charge generated by the photodiode to the gate terminal of the amplification transistor. A transistor for discharging, a discharging transistor for discharging a charge at a gate terminal of the amplifying transistor, and a selecting transistor for selectively outputting a voltage value output from the amplifying transistor. The solid-state imaging device according to claim 5, wherein The isolation region has a discontinuous portion for connecting the accumulation layer located in the isolation region and the accumulation layer located outside the isolation region at least on the second main surface side. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is provided.