JP5509165B2 - 誤り訂正符号化装置、誤り訂正復号装置、不揮発性半導体記憶システム及びパリティ検査行列生成方法 - Google Patents
誤り訂正符号化装置、誤り訂正復号装置、不揮発性半導体記憶システム及びパリティ検査行列生成方法 Download PDFInfo
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
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Description
第1の実施形態に係る誤り訂正符号化装置及び誤り訂正復号装置は、例えば記憶システム、通信システムなどに組み込まれる。以降の説明は、簡単化のために、本実施形態に係る誤り訂正符号化装置及び誤り訂正復号装置が、不揮発性半導体記憶システムに組み込まれることを前提に述べられる。但し、本実施形態に係る誤り訂正符号化装置及び誤り訂正復号装置は、通信システム、光記録システム、磁気記録システムなど、誤り訂正符号を利用可能なあらゆるシステムに適用されてよい。
101・・・第1の誤り訂正符号化部
102・・・CRC符号化部
103・・・LDPC符号化部
104・・・不揮発性半導体メモリ
105・・・LDPC復号部
106・・・CRC検査部
107・・・制御部
108・・・バッファメモリ
109・・・第1の誤り訂正復号部
Claims (6)
- 生成多項式を用いた除算によってパリティ検査を実施可能な線形符号方式をサポートし、第1のデータに前記生成多項式を適用して第2のデータを得る線形符号化部と、
LDPC符号のパリティ検査行列に対応する生成行列を前記第2のデータに適用し、第3のデータを得るLDPC符号化部と、
前記第3のデータが記憶される不揮発性半導体メモリと、
前記パリティ検査行列を用いて、前記不揮発性半導体メモリから前記第3のデータを読み出すことによって得られた第4のデータを復号し、第5のデータを得るLDPC復号部と、
前記線形符号方式をサポートし、前記第5のデータに前記生成多項式を適用して誤りを検査し、第6のデータを得る検査部と
を具備し、
前記パリティ検査行列は、数式:
不揮発性半導体記憶システム。 - 第1の誤り訂正符号方式に基づいて入力データを符号化して前記第1のデータを得る第1の誤り訂正符号化部と、
前記第1の誤り訂正符号方式に基づいて前記第6のデータを復号して出力データを得る第1の誤り訂正復号部と
を更に具備する、
請求項3の不揮発性半導体記憶システム。 - 前記パリティ検査行列は、設計時において前記数式を満足することが確認されている、請求項3の不揮発性半導体記憶システム。
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US13/406,808 US8739005B2 (en) | 2011-08-24 | 2012-02-28 | Error correction encoding apparatus, error correction decoding apparatus, nonvolatile semiconductor memory system, and parity check matrix generation method |
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US8566684B1 (en) * | 2011-05-26 | 2013-10-22 | Sandia Corporation | Decoding and optimized implementation of SECDED codes over GF(q) |
US8898539B2 (en) * | 2012-09-12 | 2014-11-25 | Lsi Corporation | Correcting errors in miscorrected codewords using list decoding |
TWI536749B (zh) * | 2013-12-09 | 2016-06-01 | 群聯電子股份有限公司 | 解碼方法、記憶體儲存裝置與記憶體控制電路單元 |
JP2016126813A (ja) * | 2015-01-08 | 2016-07-11 | マイクロン テクノロジー, インク. | 半導体装置 |
CN105227189B (zh) * | 2015-09-24 | 2019-01-01 | 电子科技大学 | 分段crc辅助的极化码编译码方法 |
CN106788456B (zh) * | 2016-12-14 | 2019-09-03 | 电子科技大学 | 一种极化码编译码方法 |
EP3596830A4 (en) * | 2017-03-15 | 2020-11-18 | Nokia Technologies Oy | EARLY TERMINATION WITH DISTRIBUTED CRC POLAR CODES |
CN108170556A (zh) * | 2018-01-18 | 2018-06-15 | 江苏华存电子科技有限公司 | 纠错码生成与校验矩阵的保护方法及矩阵存储/产生装置 |
CN109981112B (zh) * | 2018-09-26 | 2022-11-18 | 东南大学 | 一种部分循环冗余校验辅助的排序统计译码方法 |
CN109729105A (zh) * | 2019-03-26 | 2019-05-07 | 黄策 | 一种数据包装方法 |
CN112865809A (zh) * | 2019-11-27 | 2021-05-28 | 量子芯云(北京)微电子科技有限公司 | Ecc超强数据纠错方法 |
WO2021184246A1 (zh) * | 2020-03-18 | 2021-09-23 | 黄策 | 一种数据包装方法 |
EP4128594A1 (en) * | 2020-03-23 | 2023-02-08 | Telefonaktiebolaget LM ERICSSON (PUBL) | Verifying data integrity in a receiver |
CN115118287A (zh) * | 2021-03-18 | 2022-09-27 | 华为技术有限公司 | 用于编解码的方法、设备和系统 |
CN115037414B (zh) * | 2022-05-31 | 2023-12-22 | 江苏屹信航天科技有限公司 | 基于crc的纠错解码的方法、装置、终端 |
US11881871B1 (en) * | 2022-09-14 | 2024-01-23 | SK Hynix Inc. | On-the-fly scaling factor change for irregular LDPC codes |
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US8108758B2 (en) * | 2006-09-22 | 2012-01-31 | Mcgill University | Stochastic decoding of LDPC codes |
US7971127B2 (en) * | 2007-03-31 | 2011-06-28 | Sandisk Technologies Inc. | Guided simulated annealing in non-volatile memory error correction control |
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JP2009271956A (ja) * | 2008-04-30 | 2009-11-19 | Toshiba Corp | データ復号装置,データ再生装置,およびデータ復号方法 |
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