JP5508560B2 - Electronic clock - Google Patents

Description

  The present invention relates to a rechargeable analog electronic timepiece.

  In a rechargeable analog electronic timepiece using a secondary battery, it is known that voltage fluctuation is severe due to its characteristics. Therefore, in order to stabilize the motor drive, the specification of the drive pulse is changed in the voltage range (refer to Patent Document 1 for details).

  In the above description, the determination of the motor drive pulse requires battery voltage detection at short intervals (usually 1 second or 2 seconds) in order to catch up with voltage fluctuations.

  In addition, rechargeable analog electronic timepieces are required to display the remaining battery capacity. In many cases, the remaining capacity detection is performed by detecting the battery voltage as in the case of a normal primary battery.

  It is well known that the remaining capacity of a battery correlates with the open circuit voltage of a terminal.

  Further, as shown in Non-Patent Document 1, the voltage between terminals, which is called “polarization”, is smaller than the open circuit voltage when charging / discharging, both during discharging / charging of the battery, and when charging, The phenomenon that becomes larger occurs. This phenomenon increases as the current density increases. That is, when driving a heavy load that requires a large current, the terminal voltage rapidly decreases, and conversely, when rapidly charging with a large current, the terminal voltage rapidly increases. However, it is also described in Non-Patent Document 1 that when the charging / discharging is stopped, the original terminal voltage is indicated.

  Furthermore, it is also described in Non-Patent Document 1 that these polarization actions are the true identity of the internal resistance of the battery. That is, due to the presence of the internal resistance due to this polarization, the voltage rises from the original terminal voltage during charging and falls below the original terminal voltage during discharging.

  Due to the fluctuation of the terminal voltage due to the polarization action, it is very difficult to accurately detect the remaining capacity of the battery while charging, and various methods have been devised.

  In Patent Document 2, battery voltage measurement is performed in order to prevent an overcharge prevention voltage from being erroneously determined as a voltage increase due to an internal resistance during charging, resulting in an overcharge prevention state and insufficient charging. It is described that charging is sometimes prohibited.

  Patent Document 3 discloses that a terminal voltage including an apparent increase in battery voltage due to internal resistance during rapid charging cannot accurately detect the remaining capacity. Therefore, after a voltage corresponding to full charge is detected during rapid charging. Describes that a full charge state is obtained by detecting a voltage during trickle charge in which trickle charge and rapid charge are repeated and there is almost no voltage increase due to internal resistance.

  In Patent Document 4, since the battery voltage fluctuates due to the apparent resistance due to the internal resistance, the same method as the method of eliminating the wobbling due to heavy load at the time of discharging described in Patent Document 5 is used, and the voltage exceeds a predetermined voltage for a predetermined time. Describes that a display corresponding to a predetermined remaining capacity is performed.

WO95 / 27926 JP 61-236332 A (FIG. 4, page 2) Japanese Examined Patent Publication No. 53-16895 (FIG. 2, page 1, column 2 to page 2, column 3) JP-A-7-306275 (FIG. 4, claim 1) JP-A-60-161572 (FIGS. 2 and 3)

"Battery Handbook" (Denki Shoin Co., Ltd., April 15, 1975, 1st edition, 1st issue, 1-17-18, 3-42, 3-52)

  In a rechargeable analog electronic timepiece, there are the following problems when both the stability of motor drive control and the display of the remaining capacity (charge amount) are compatible. For motor drive control, it is necessary to measure the actual voltage value in a short cycle because of its nature.

  This is because the motor drive is a heavy load for the timepiece, and it is necessary to drive the secondary battery as a power source, and the actual terminal voltage at that time becomes the motor drive voltage. Further, since the battery voltage varies greatly in the rechargeable timepiece, it needs to be measured in a short cycle (usually 1 second to 2 seconds).

  On the other hand, in the case of battery voltage detection for remaining capacity display (hereinafter referred to as BD), the actual voltage value cannot be used as it is. This is because many secondary batteries have a polarization effect, and if the remaining capacity is determined immediately based on the measured actual voltage value, there is a possibility that an erroneous display is performed. For this purpose, the corresponding remaining capacity is displayed only after it has been detected that the predetermined voltage has been continuously exceeded for a predetermined time, or the charging is temporarily stopped, and the remaining capacity is determined based on the voltage drop after the lapse of the predetermined time since the stop. This is disclosed in Patent Document 4.

  Therefore, as disclosed in Patent Document 4, it is necessary to measure the battery voltage value in the charging prohibited state.

  However, although it depends on the capacity of the secondary battery and the amount of power generated by the power generation means, it is impossible to generate power with a large capacity current with the power source built into the watch, and the watch will have very low power consumption due to its nature. Therefore, there is usually no rapid change in the remaining capacity, and there is no problem even in measurement with a time period (minute unit period) far longer than the battery voltage period for driving the motor.

  Here, battery voltages required for motor drive control and remaining capacity display are summarized as shown in FIG.

  As can be seen from FIG. 5, the battery voltage detection for motor drive control and the battery voltage detection for remaining capacity display are inherently incompatible, and it has been very difficult to arrange them in parallel.

  For this reason, it is necessary to mount two battery voltage measurement systems, ie, a battery voltage detection for motor drive control and a battery voltage detection for display of remaining capacity, and there is a problem that the circuit becomes large.

  The present invention is a rechargeable analog electronic timepiece that solves the above problems, solves the above problems by a small-scale improvement using a conventional battery voltage detection system, and realizes stable motor drive control and accurate remaining capacity display. I will provide a.

In the present invention,
A motor for driving the time display means and the like;
A motor driver circuit for driving the motor;
The motor driver circuit and power storage means as a power source of the motor;
A voltage detection circuit for detecting the voltage of the storage means;
A control unit for controlling the voltage detection circuit and the motor driver circuit;
The controller is
Voltage detection of the power storage means required for driving the motor by the motor driver circuit (hereinafter referred to as motor BD), and voltage detection of the power storage means required for estimation of the remaining capacity of the power storage means (hereinafter referred to as remaining capacity BD). )
In the electronic timepiece implemented by the voltage detection circuit,
The control unit uses the remaining capacity of the power storage means estimated by the remaining capacity BD,
The detection period of the motor BD is changed .

The power storage means has a period in which there is almost no fluctuation in voltage and a period showing a steep drop in its discharge characteristics,
The controller is
The detection cycle of the motor BD during the period showing the steep drop,
The period is changed so as to be shorter than the detection cycle of the motor BD during a period in which the voltage hardly varies .

The period of the remaining capacity detection BD and the motor BD may be varied depending on the state of the battery to be detected. For example, the cycle is short when the remaining capacity in which rapid charge / discharge occurs is empty, and conversely, the detection cycle is lengthened in an intermediate region where there is almost no change.

  According to the present invention, the motor drive control BD detection circuit and the remaining capacity detection BD detection circuit can be performed by a single BD circuit, and high-precision motor drive control and remaining capacity display can be realized. In addition, by using a single BD circuit, the system can be simplified and reduced in size, and the power consumption can be reduced.

1 is a system block diagram of an electronic timepiece showing a form of a first embodiment of the present invention. It is a time chart figure which shows the form of 1st Example of this invention. It is a system block diagram of the electronic timepiece which shows the form of 2nd Example of this invention. It is a discharge characteristic figure of the general secondary battery used with an electronic timepiece. 6 is a chart summarizing characteristics of a motor BD and a remaining capacity BD.

  Hereinafter, an electronic timepiece according to the invention will be described with reference to the drawings.

[First embodiment]
The first example is an example showing the basic embodiment of the present invention.
FIG. 1 is a block diagram showing a schematic configuration of an electronic timepiece according to a first embodiment of the present invention.

  As shown in FIG. 1, in the electronic timepiece of this embodiment, reference numeral 1 denotes an oscillation circuit, which is a reference signal source that uses a crystal oscillator (not shown) and outputs a 32768 Hz reference signal.

  Reference numeral 2 denotes a frequency dividing circuit, which receives and divides the 32768 Hz reference signal output from the oscillation circuit 1 to create each signal of P1, P2, and P3, which will be described later, and a 1 Hz signal that is a reference signal for timing. Reference numeral 3 denotes a time measuring circuit, which inputs a 1 Hz signal from the frequency dividing circuit 2, performs time counting, and outputs a reference signal PK for displaying the time measuring result.

  Reference numeral 4 denotes a waveform generation circuit which inputs a reference signal PK and outputs a drive signal (motor drive pulse) PM for driving the motor 6 that drives the time display means 7. A drive circuit 5 receives a signal from the waveform shaping circuit 4 and drives the motor 6.

  Reference numeral 8 denotes a motor drive voltage detection signal generation circuit which inputs a signal P1 every 2 seconds from the frequency dividing circuit and generates a motor drive voltage detection (hereinafter referred to as motor BD) signal BD1 every 2 seconds. The voltage is output to the drive voltage level determination circuit 11 and a voltage detection circuit 15 described later.

  Reference numeral 9 denotes a remaining capacity voltage detection signal generation circuit, which inputs an hourly signal P2 from the frequency dividing circuit to generate an hourly signal BD2, and later-described data type flip-flop (hereinafter referred to as D-FF). ) 22 clock input and output to the reset terminal of the counter 19. Based on BD2, a remaining capacity voltage detection (hereinafter, remaining capacity BD) control signal BD3 is generated and output to a voltage detection circuit 15 described later.

  Reference numeral 12 denotes power generation means including a solar cell, and reference numeral 14 denotes power storage means for storing generated power of the power generation means 12. A charge control circuit 13 is a switch unit that is inserted between the power generation unit 12 and the power storage unit 14 and charges / cuts off the generated power from the power generation unit 12. The control is performed by the charge prohibition signal KP, which will be described in detail later.

  In the present embodiment, the charging control circuit 13 is a switching means inserted between the power generation means 12 and the power storage means 14, but it is of course not limited to this. For example, as described in Patent Document 2, the overcharge prevention unit may have the role.

  Reference numeral 15 denotes a voltage detection circuit which measures a charging voltage BV which is a terminal voltage of the power storage means 14 and outputs the result as a detection signal B1.

  Since the voltage detection circuit 15 operates only at the active potential input timing of the motor BD signal BD1 every 2 seconds and the remaining capacity BD signal BD3 every hour, the power consumption in the voltage detection circuit 15 can be suppressed very slightly. I can do it.

  The D-FF 22 is connected to Vdd whose data input terminal is at H level, the clock input terminal Φ receives BD2 from the BD2 signal generation circuit 9, operates in synchronization with the rising edge of BD2, and from the output terminal Q An H level charge inhibition signal KP is output to the charge control circuit 13 and the AND gate 20.

  The charge control circuit 13 cuts off the charging of the power storage means 14 when the charge prohibition signal KP is at the H level, and performs the charging of the power storage means 14 when at the L level.

  The AND gate 20 inputs the charge prohibition signal KP and the clock P3 from the frequency dividing circuit 2 and outputs them to the counter 19. The output of the AND gate 20 is clocked to the counter 19 only during a period in which the charging prohibition signal KP prohibits charging of the power storage means 14.

  The counter 19 is a counter that prescribes the charge prohibition time for the power storage means 14 by the charge prohibition signal KP. After resetting by the BD2, the counter 19 counts a predetermined time corresponding to the charge prohibition time, and outputs the remaining capacity BD signal BD3 when counting up. The data is output to the reset terminal of the D-FF 22 and a remaining capacity display level determination circuit 16 described later. The D-FF 22 is reset by the remaining capacity BD signal BD3, the charge prohibition signal KP becomes L level, and the charge prohibition is released.

The remaining capacity display level determination circuit 16 receives the remaining capacity BD signal BD3 and the detection signal B1 from the voltage detection circuit 15, and stores the remaining capacity to be displayed from the stored correlation between the remaining capacity of the power storage means 14 and the open terminal voltage. The capacity level is determined and a level determination signal H2 is output.

  A remaining capacity display control circuit 17 receives a level determination signal H2 from the remaining capacity display level determination circuit 16, and a remaining capacity display device 18 outputs remaining capacity display data D2 indicating the display contents of the remaining capacity.

  The remaining capacity display device 18 receives the remaining capacity display data D2 and displays the corresponding remaining capacity. It should be noted that the specific contents of the remaining capacity display device 18 (eg, pointer display by a motor, LCD display, etc.) are not the essence of the present invention, and the details thereof are omitted.

  Reference numeral 11 denotes a motor drive voltage level determination circuit 11 which receives a detection signal B1 output from the voltage detection circuit 15 and a motor BD signal BD1, and receives a plurality of voltage level determination signals H1 corresponding to the voltage of the detection signal B1. Is output.

  The motor drive waveform selection circuit 10 receives the voltage level determination signal H1 and outputs a selection signal D1 corresponding to the voltage level to the waveform generation circuit 4. The waveform generation circuit 4 that has received the selection signal D1 outputs to the drive circuit 5 a motor drive signal PM that is optimal for the terminal voltage of the power storage means 14 at that time.

Next, the operation of the first embodiment will be described with reference to FIG.
FIG. 2 is a time chart for explaining the operation mode of the electronic timepiece.

  The power storage means 14 is charged from the power generation means 12 via the charge control circuit 13, and the charging voltage BV is charged. Here, the charging control circuit 13 permits charging of the power storage means 14.

Next, BD detection for motor driving is performed at the timing of t1.
The secondary battery, which is the power storage means 14 during charging, generates a voltage higher than the actual charging voltage between the terminals due to the polarization action. However, in order to drive the motor normally, it is necessary to detect the actual terminal voltage including the polarization voltage. Therefore, at the timing t1, the BD1 signal is output from the motor BD circuit 8, and voltage detection for driving the motor is performed. BD detection of the circuit 15 is performed.

  A voltage level determination signal H1 is output from the motor drive voltage level determination circuit 11 according to the output result of the detection signal B1, and is output to the motor drive waveform selection circuit 10.

  The motor drive waveform selection circuit 10 outputs a selection signal D1 to the waveform creation circuit 4, and the waveform creation circuit 4 outputs a motor drive pulse (signal) PM corresponding to the secondary battery voltage, via the drive circuit 5. The motor 6 and the time display device 7 are normally operated.

  The BD1 signal for motor control is performed in a cycle of 2 seconds, and t4, t5, and t8 perform the same operation as t1.

  Note that the actual motor drive pulse (signal) PM itself is not the essence of the present invention and is not shown in FIG.

  Subsequently, the remaining capacity is measured at the timing t2. The detection of the remaining capacity requires an open terminal voltage correlated with the remaining capacity, but V1 is an apparent voltage increase voltage due to polarization and cannot be used as it is for measuring the remaining capacity.

Therefore, a dedicated B for measuring the remaining capacity at the timing t2 that is a predetermined time value from t1.
D detection is performed.

  At the timing t2, the charging prohibition signal KP, which is the output signal of the D-FF 22, becomes H level by the BD2 output from the remaining capacity BD signal generation circuit 9, and charging of the power storage means 14 is prohibited.

  By prohibiting charging, the charging voltage BV changes from the polarization terminal voltage to the actual charging voltage correlated with the remaining capacity.

  The remaining capacity voltage detection control signal BD3 is output to the voltage detection circuit 15 at the timing t3 after the lapse of a predetermined time after the prohibition of charging (when the counter 19 is counted up), which can be regarded as settled at the actual charging voltage, and the actual charging is performed. A terminal voltage of the storage means 14 that can be regarded as a voltage is output as the detection signal B1.

The remaining capacity display level determination circuit 16 detects the actual charge voltage based on the input remaining capacity BD signal BD3 and the detection signal B1, detects the remaining capacity, and outputs a level determination signal H2.
Based on the level determination signal H2, the remaining capacity display data D2 is output from the remaining capacity display control circuit 17, and the remaining capacity display device 18 displays the remaining capacity.

  The D-FF 22 is reset by the signal of the remaining capacity voltage detection control signal BD3, and charging is resumed by setting the charge inhibition signal KP, which is the output of the D-FF 22, to the L level.

  The remaining capacity control BD2 signal and BD3 signal are performed in one hour period, and t6 and t7 perform the same operation as t2 and t3.

  As described above, the drive control of the motor 6 requires the actual terminal voltage including the increase due to the polarization action of the power storage means 14, and the detection of the remaining capacity of the power storage means 14 does not include the increase due to the polarization action. The open voltage in the non-charged state is necessary, and the fact that both measurements are incompatible with each other is used in reverse, and a single voltage detection circuit 15 makes it possible to measure both voltages.

This has the following advantages.
(1) In the prior art, two voltage detection circuits for the motor and the remaining capacity and the control circuit thereof are necessary. However, according to the present invention, the single voltage detection circuit 15 can be used in common, so the circuit can be made compact. Can be Therefore, the timepiece can be reduced in size and the cost of the circuit can be reduced.

  Further, the remaining capacity BD is detected as a voltage with a long cycle of once per hour using the fact that the change in the remaining capacity is not so large.

This has the following advantages.
(2) Since it is executed at a frequency of 1/1800 of the motor BD, there is almost no influence on the power consumption.
(3) Since the frequency of charging prohibition associated with the remaining capacity BD can be extremely reduced, it is possible to detect the remaining capacity without substantially reducing the charging efficiency.

  Note that the time from t1 to t2 from the motor BD to the charging prohibition start and the charging prohibition time from t2 to t3 can be appropriately determined based on the characteristics of the motor and the battery.

[Second Embodiment]
Next, a second embodiment will be described with reference to the drawings.
2nd Example is an Example in the case of changing the period of remaining capacity BD according to the capacity | capacitance of a battery.

  FIG. 3 is a block diagram showing a schematic configuration of the electronic timepiece according to the second embodiment. FIG. 3 has the same configuration as that of FIG. The difference between FIG. 1 and FIG. 3 is only the addition of the detection cycle selection circuit 23.

  The detection cycle selection circuit 23 receives the detection signal B1 output from the voltage detection circuit 15 and the frequency division signal PF from the frequency division circuit 2, and outputs a sampling cycle variable signal PT. The output of the sampling cycle variable signal PT is input to the remaining capacity BD signal generation circuit 9 and the signal BD2 is output.

  FIG. 4 is a diagram showing discharge characteristics of a general secondary battery used in an electronic timepiece.

As shown in FIG. 4, there is a relatively steep drop from the full charge shown in the t1 interval, and then there is a period in which the voltage is kept almost constant as in the t2 interval, and relatively steep as in the t3 interval in which charging is lost. Has the property of causing a descent. Therefore, it is problematic for the following reason that BD sampling for displaying the remaining capacity is always performed in the same cycle regardless of the battery voltage of the power storage means 14.
(A) At T1 and T3 indicating a relatively steep drop, correct remaining capacity cannot be detected unless BD sampling is executed finely. In particular, in the t3 section where there is almost no remaining capacity, it is essential to display the remaining capacity at an accurate and accurate timing in order to notify the user of the danger of stopping the clock and to prompt charging.
(B) On the contrary, in the T2 period in which an almost constant voltage is maintained, there is almost no voltage change, and there is no need to notify the user of the danger of stopping the clock and to prompt charging. For this reason, BD sampling with the same period as the T1 and T3 intervals is wasteful of power consumption and the charging efficiency also deteriorates.

  Therefore, in order to solve the above problems (a) and (b), in the T1 and T3 sections, detection is performed at a relatively fast period although it is longer than the motor BD detection (2 seconds) (for example, In the interval of 5 minutes) and T2, the above problem is solved by performing a long cycle (for example, 1 hour cycle).

  In FIG. 3, the detection cycle selection circuit 23 receives the detection signal B1 output from the voltage detection circuit 15 and is in which state in FIG. 4, specifically, in which section of T1, T2, and T3. Determine whether. Based on the determination result, the detection cycle selection circuit 23 outputs a sampling cycle variable signal PT. Specifically, a signal having a period of 5 minutes is output in the T1 and T3 intervals, and a signal having an hour period in the T2 interval. Based on the sampling cycle variable signal PT, the remaining capacity BD signal generation circuit 9 outputs a BD2 signal having a period of 5 minutes in the T1 and T3 sections and a period of 1 hour in the T2 section.

By doing in this way, it has the following advantages.
(3) Since the state of the battery is determined based on the characteristics of the secondary battery, and the period of the remaining capacity BD is varied based on the result, the consumption current is reduced, the charging efficiency is improved, and the remaining capacity detection accuracy is improved. It can be realized more efficiently.

  In the above-described embodiment, the remaining capacity BD detection cycle is set to the same cycle (5-minute cycle) in the T1 and T3 sections, but another cycle may be used in T1 and T3. The T1 section is a state close to a fully charged state, and is a state that does not require the remaining capacity detection to be so accurately practically. On the other hand, a very accurate remaining capacity detection is required in the T3 section. Therefore, a period of 30 minutes in the T1 section and a period of 5 minutes in the T3 section may be implemented.

In this embodiment, only the remaining capacity BD is changed, but the cycle of the motor BD may be changed. As described above, since the battery voltage hardly varies in the T2 section, the frequency of changing the motor driving pulse may be low in the T2 section. Therefore, in the T2 section, for example, the motor BD may be executed at a cycle of 10 seconds.

  Of course, the numerical value of the period in the above description is not limited to the value, and can be appropriately changed according to the characteristics of the secondary battery, the motor, and the like to be used.

DESCRIPTION OF SYMBOLS 1 Oscillator 2 Frequency divider 3 Timekeeping circuit 4 Waveform creation circuit 5 Drive circuit 6 Motor 7 Time display device 8 Motor drive voltage detection signal creation circuit 9 Remaining capacity voltage detection signal creation circuit 10 Motor drive waveform selection circuit 11 Motor drive Voltage level determination circuit 12 Power generation means 13 Charge control circuit 14 Power storage means 15 Voltage detection circuit 16 Voltage-remaining capacity display level determination circuit 17 Remaining capacity display control circuit 18 Remaining capacity display device 19 Counter 20 Control AND 21 Timer circuit 22 Data Type flip-flop 23 detection cycle selection circuit

Claims (3)

A motor for driving the time display means and the like;
A motor driver circuit for driving the motor;
The motor driver circuit and power storage means as a power source of the motor;
A voltage detection circuit for detecting the voltage of the storage means;
A control unit for controlling the voltage detection circuit and the motor driver circuit;
The controller is
Voltage detection of the power storage means required for driving the motor by the motor driver circuit (hereinafter referred to as motor BD), and voltage detection of the power storage means required for estimation of the remaining capacity of the power storage means (hereinafter referred to as remaining capacity BD). )
In the electronic timepiece implemented by the voltage detection circuit,
Power generation means for charging the power storage means;
Charging control switch means inserted between the power generation means and the power storage means and controlled to be turned on / off by the control unit;
The motor BD is detected in a state where the charge control switch means is connected,
The remaining capacity BD is detected in a state where the charge control switch means is shut off,
The control unit uses the remaining capacity of the power storage means estimated by the remaining capacity BD,
An electronic timepiece characterized by changing a detection cycle of the motor BD. The power storage means has a period in which there is almost no fluctuation in voltage and a period showing a steep drop in its discharge characteristics,
The detection cycle of the motor BD during the period showing the steep drop,
The electronic timepiece according to claim 1, wherein the electronic timepiece is changed so as to be shorter than a detection cycle of the motor BD in a period in which the voltage hardly changes. The control unit determines a detection cycle of the remaining capacity BD during a period indicating the steep drop by the remaining capacity of the power storage unit estimated by the remaining capacity BD.
The electronic timepiece according to claim 2, wherein the electronic timepiece is changed so as to be shorter than a detection cycle of the remaining capacity BD in a period in which the voltage hardly varies.

Images